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llvm-project/llvm/test/Transforms/SLPVectorizer
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Ryan Buchner 95ef1a5c31
[SLP] Use the correct identity when combining binary opcodes with AND/MUL (#180457) 
Fixes #180456

Fix bug in the following SLP lowering:
```
define void @sub_mul(ptr %p, ptr %s) {
entry:
  %p1 = getelementptr i16, ptr %p, i64 1

  %l0 = load i16, ptr %p
  %l1 = load i16, ptr %p1

  %mul0 = sub i16 %l0, 0
  %mul1 = mul i16 %l1, 5

  %s1 = getelementptr i16, ptr %s, i64 1

  store i16 %mul0, ptr %s
  store i16 %mul1, ptr %s1
  ret void
}
```
to
```
define void @sub_mul(ptr %p, ptr %s) {
entry:
%tmp0 = load <2 x i16>, ptr %p, align 2
%tmp1 = mul <2 x i16> %tmp0, <i16 0, i16 5> -> updates to <i16 1, i16 5>
store <2 x i16> %tmp1, ptr %s, align 2
ret void
}
```
2026-02-12 09:34:44 -08:00
..
AArch64
[SLP]Skip operands comparing on non-matching (but compatible) instructions
2026-02-11 04:55:29 -08:00
AMDGPU
AMDGPU: Improve getShuffleCost accuracy for 8- and 16-bit shuffles (#168818)
2025-11-21 19:33:13 +00:00
ARM
[SLP]Check the MainOp matches the requirements for the instructions
2025-01-28 06:00:52 -08:00
NVPTX
[SLP]Exclude non-profitable subtrees.
2025-12-30 09:32:05 -08:00
PowerPC
[SLP]Disable modeling disjoint reduction or as bitcast for big endian
2026-02-03 06:16:25 -08:00
RISCV
[SLP]Correctly process deleted gathered loads and short trees
2026-02-11 10:27:01 -08:00
SystemZ
[llvm] Regenerate test checks including TBAA semantics (NFC)
2025-09-12 20:01:17 +02:00
VE
…
WebAssembly
[SLP] Avoid -passes=instcombine stages in SLP tests (#146257)
2025-07-02 06:14:41 -04:00
X86
[SLP] Use the correct identity when combining binary opcodes with AND/MUL (#180457)
2026-02-12 09:34:44 -08:00
XCore
…
abs-overflow-incorrect-minbws.ll
[LLVM][IR] Use splat syntax when printing Constant[Data]Vector. (#112548)
2024-11-06 11:53:33 +00:00
addsub.ll
[SLP]Reduce number of alternate instruction, where possible
2025-03-12 08:18:51 -07:00
alt-cmp-vectorize.ll
…
alternate-cmp-swapped-pred-parent.ll
[SLP]Add cost estimation for gather node reshuffling
2024-12-24 15:35:29 -05:00
alternate-non-profitable.ll
[SLP]Enable float point math ops as copyables elements.
2025-12-26 11:55:58 -08:00
alternate-opcode-sindle-bv.ll
[AArch64,TTI] Remove RealUse check for vector insert/extract costs. (#146526)
2025-07-15 15:19:27 +01:00
arith-div-undef.ll
…
bbi-106161.ll
[SLP] Make getSameOpcode support interchangeable instructions. (#135797)
2025-04-16 00:08:59 +08:00
bool-logical-op-reduction-with-poison.ll
[SLP]Enable Shl as a base opcode in copyables (#156766)
2025-10-06 07:07:37 -04:00
boolean-op-with-poisons.ll
[SLP]FIx order of bool logical ops, if the right op is used in the first reduction operarion
2025-12-28 11:52:44 -08:00
buildvector-insert-mask-size.ll
…
buildvector-nodes-dependency.ll
…
call-arg-reduced-by-minbitwidth.ll
[LLVM][IR] Use splat syntax when printing Constant[Data]Vector. (#112548)
2024-11-06 11:53:33 +00:00
catchswitch.ll
…
consecutive-access.ll
[test][Transforms] Remove unsafe-fp-math uses part 3 (NFC) (#164787)
2025-10-24 18:49:45 +08:00
const-bool-logical-or-reduction.ll
…
crash_exceed_scheduling.ll
[SLP]Enable float point math ops as copyables elements.
2025-12-26 11:55:58 -08:00
crash_extractelement_poison.ll
…
diamond_broadcast.ll
…
empty-struct.ll
…
ext-after-phi-node.ll
…
ext-int-reduced-not-operand.ll
…
extended-vectorized-gathered-inst.ll
[LLVM][IR] Use splat syntax when printing Constant[Data]Vector. (#112548)
2024-11-06 11:53:33 +00:00
external-user-instruction-minbitwidth.ll
…
extract_with_non_const_index.ll
…
extract-many-users-buildvector.ll
[SLP]Exclude non-profitable subtrees.
2025-12-30 09:32:05 -08:00
extract-vectorized-operand.ll
…
extractelement-insertpoint.ll
[llvm][test] Fix REQUIRES in extractelement-insertpoint.ll
2025-07-03 13:14:42 +00:00
extractlements-gathered-first-node.ll
…
extracts-with-undefs.ll
[SLP]Initial FMAD support (#149102)
2025-08-11 05:53:55 -07:00
fix-113880.ll
[SLP] NFC. Replace TreeEntry::setOperandsInOrder with VLOperands. (#118949)
2024-12-11 10:09:23 +08:00
freeze-signedness-missed.ll
[LLVM][IR] Use splat syntax when printing Constant[Data]Vector. (#112548)
2024-11-06 11:53:33 +00:00
full-overlap-non-schedulable.ll
[SLPVectorizer] Move X86 specific handling into X86TTIImpl. (#137830)
2025-04-30 17:11:27 +02:00
gather_extract_from_vectorbuild.ll
[SLP]Exclude non-profitable subtrees.
2025-12-30 09:32:05 -08:00
gathered-consecutive-loads-different-types.ll
[SLP]Initial support for copyable elements
2025-08-11 09:41:19 -04:00
gep-with-extractelement-many-users.ll
…
insert-crash-index.ll
…
insert-element-build-vector-const.ll
[SLP][NFC]Replace undef with constant zero in tests, NFC
2025-01-17 09:48:03 -08:00
insert-element-build-vector-inseltpoison.ll
[test][Transforms] Remove unsafe-fp-math uses part 3 (NFC) (#164787)
2025-10-24 18:49:45 +08:00
insert-element-build-vector.ll
[test][Transforms] Remove unsafe-fp-math uses part 3 (NFC) (#164787)
2025-10-24 18:49:45 +08:00
insert-element-multiple-uses.ll
…
insert-shuffle.ll
…
insertelement-across-zero.ll
…
insertelement-postpone.ll
[SLP]Enable float point math ops as copyables elements.
2025-12-26 11:55:58 -08:00
insertelement-uses-vectorized-index.ll
…
InstructionsState-is-invalid-2.ll
[SLP] Replace MainOp and AltOp in TreeEntry with InstructionsState. (#122443)
2025-01-18 10:23:20 +08:00
int_sideeffect.ll
…
int-bitcast-minbitwidth.ll
…
is_fpclass.ll
…
isCommutative.ll
[SLP] Fix isCommutative to check uses of the original instruction instead of the converted instruction. (#143094)
2025-06-17 22:03:14 +08:00
isOpcodeOrAlt.ll
[SLP] Make getSameOpcode support interchangeable instructions. (#135797)
2025-04-16 00:08:59 +08:00
jumbled_store_crash.ll
[LLVM][IR] Use splat syntax when printing Constant[Data]Vector. (#112548)
2024-11-06 11:53:33 +00:00
limit.ll
…
logical-ops-poisonous-repeated.ll
[SLP]Followup fix for the poisonous logical op in reductions
2024-12-26 05:11:26 -08:00
materialize-vector-of-consts.ll
[AArch64][NFC] NFC for const vector as Instruction operand (#116790)
2024-11-21 10:23:05 +05:30
minbitwidth-multiuse-with-insertelement.ll
…
minbitwidth-node-with-multi-users.ll
[SLP]Enable support for logical ops in copyables (#162945)
2025-10-13 08:01:32 -04:00
minbitwidth-user-not-min.ll
…
multi-node-vectorized-insts.ll
…
multi-uses-with-deps-in-first.ll
…
one-element-vector.ll
…
operand-is-reduced-val.ll
[SLP] Support for copyables in the reduced values (#153589)
2026-01-01 13:31:13 -08:00
orig-btiwidth-les-projected.ll
…
partial-register-extract.ll
[SLP]Remove emission of vector_insert/vector_extract intrinsics
2025-07-11 15:26:45 -04:00
peek-through-shuffle.ll
…
phi-not-ordered.ll
…
phi-undef-input.ll
…
postponed_gathers.ll
…
pr31599-inseltpoison.ll
…
pr31599.ll
…
rdar128092379.ll
…
reduced-gathered-vectorized.ll
…
reduction_loads.ll
[LLVM][IR] Use splat syntax when printing Constant[Data]Vector. (#112548)
2024-11-06 11:53:33 +00:00
reduction-gather-non-scheduled-extracts.ll
[SLP]Use TTI::getScalarizationOverhead where possible
2025-02-04 18:49:43 -05:00
reduction-min-select.ll
…
reduction-modified-values.ll
[SLP] Support for copyables in the reduced values (#153589)
2026-01-01 13:31:13 -08:00
reduction-whole-regs-loads.ll
[SLP]Remove emission of vector_insert/vector_extract intrinsics
2025-07-11 15:26:45 -04:00
reductions.ll
[LV] Create in-loop sub reductions (#147026)
2025-08-12 10:22:41 +01:00
reorder-clustered-node.ll
[SLP]Add cost estimation for gather node reshuffling
2024-12-24 15:35:29 -05:00
reorder-node.ll
…
reordered-top-scalars.ll
…
reordering-single-phi.ll
[SLP]Model single unique value insert + shuffle as splat + select, where profitable
2025-04-22 11:30:29 -04:00
reschedule.ll
…
resized-alt-shuffle-after-minbw.ll
[SLP]Remove emission of vector_insert/vector_extract intrinsics
2025-07-11 15:26:45 -04:00
return.ll
…
reudction-or-non-poisoned.ll
[LLVM][IR] Use splat syntax when printing Constant[Data]Vector. (#112548)
2024-11-06 11:53:33 +00:00
reused-buildvector-matching-vectorized-node.ll
[LLVM][IR] Use splat syntax when printing Constant[Data]Vector. (#112548)
2024-11-06 11:53:33 +00:00
reused-scalar-in-multi-node.ll
…
revec-fix-109835.ll
[LLVM][IR] Use splat syntax when printing Constant[Data]Vector. (#112548)
2024-11-06 11:53:33 +00:00
revec-insertelement.ll
[SLP]Remove emission of vector_insert/vector_extract intrinsics
2025-07-11 15:26:45 -04:00
revec-reduction-logical.ll
[SLP]Remove emission of vector_insert/vector_extract intrinsics
2025-07-11 15:26:45 -04:00
revec-shufflevector.ll
[SLP]Remove emission of vector_insert/vector_extract intrinsics
2025-07-11 15:26:45 -04:00
revec.ll
[SLP]Initial support for copyable elements
2025-08-11 09:41:19 -04:00
root-trunc-extract-reuse.ll
…
same-scalar-in-same-phi-extract.ll
…
same-scalars-reordered-in-reduction.ll
…
scalarazied-result.ll
[AArch64] Add better fcmp costs for expanded predicates (#147940)
2025-08-04 13:42:57 +01:00
scalarization-overhead.ll
[SLP]Improved reduction cost/codegen
2025-02-14 11:03:33 -08:00
semanticly-same.ll
[SLP] Use the correct identity when combining binary opcodes with AND/MUL (#180457)
2026-02-12 09:34:44 -08:00
several_store_chains.ll
…
shrink_after_reorder2.ll
[LLVM][IR] Use splat syntax when printing Constant[Data]Vector. (#112548)
2024-11-06 11:53:33 +00:00
shuffle-mask-resized.ll
[SLP] Make getSameOpcode support interchangeable instructions. (#135797)
2025-04-16 00:08:59 +08:00
shuffle-multivector.ll
[SLP]Fix shuffling of entries of the different sizes
2024-11-21 13:08:27 -08:00
shufflebuilder-bug.ll
…
slp-deleted-inst.ll
[SLP] Check if instructions exist after vectorization (#120434)
2024-12-19 06:21:57 +08:00
slp-hr-with-reuse.ll
…
slp-max-phi-size.ll
…
slp-max-reg-size.ll
…
slp-non-pow-2-insertelement.ll
…
slp-umax-rdx-matcher-crash.ll
[llvm] Remove br i1 undef from some regression tests [NFC] (#118419)
2024-12-03 20:54:36 +00:00
slp-variable-insertelement.ll
…
splat-buildvector.ll
…
stores-non-ordered.ll
…
test_intermediate_dual_use.ll
[SLP]Do not swap RHS, if it is used in bool op, used as a second operand in a reduction
2025-12-28 13:33:17 -08:00
unknown-entries.ll
…
vectorizable-functions-inseltpoison.ll
…
vectorizable-functions.ll
…
vectorize-reorder-alt-shuffle.ll
[SLP]Exclude non-profitable subtrees.
2025-12-30 09:32:05 -08:00
vectorize-reordered-list.ll
…
zext-incoming-for-neg-icmp.ll
[SLP]Model reduction_add(ext(<n x i1>)) as ext(ctpop(bitcast <n x i1> to int n))
2024-11-22 06:50:25 -08:00