95ef1a5c31
Fixes #180456 Fix bug in the following SLP lowering: ``` define void @sub_mul(ptr %p, ptr %s) { entry: %p1 = getelementptr i16, ptr %p, i64 1 %l0 = load i16, ptr %p %l1 = load i16, ptr %p1 %mul0 = sub i16 %l0, 0 %mul1 = mul i16 %l1, 5 %s1 = getelementptr i16, ptr %s, i64 1 store i16 %mul0, ptr %s store i16 %mul1, ptr %s1 ret void } ``` to ``` define void @sub_mul(ptr %p, ptr %s) { entry: %tmp0 = load <2 x i16>, ptr %p, align 2 %tmp1 = mul <2 x i16> %tmp0, <i16 0, i16 5> -> updates to <i16 1, i16 5> store <2 x i16> %tmp1, ptr %s, align 2 ret void } ```
112 lines
3.3 KiB
LLVM
112 lines
3.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: %if x86-registered-target %{ opt -S --passes=slp-vectorizer -mtriple=x86_64-unknown-linux-gnu -slp-threshold=-50 < %s | FileCheck %s %}
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; RUN: %if aarch64-registered-target %{ opt -S --passes=slp-vectorizer -mtriple=aarch64-unknown-linux-gnu -slp-threshold=-50 < %s | FileCheck %s %}
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; Don't care about the profitability with these tests, just want to demonstrate the ability
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; to combine opcodes
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define void @sub_mul(ptr %p, ptr %s) {
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; CHECK-LABEL: define void @sub_mul(
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; CHECK-SAME: ptr [[P:%.*]], ptr [[S:%.*]]) {
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; CHECK-NEXT: [[ENTRY:.*:]]
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; CHECK-NEXT: [[TMP0:%.*]] = load <4 x i16>, ptr [[P]], align 2
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; CHECK-NEXT: [[TMP1:%.*]] = mul <4 x i16> [[TMP0]], <i16 1, i16 5, i16 2, i16 3>
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; CHECK-NEXT: store <4 x i16> [[TMP1]], ptr [[S]], align 2
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; CHECK-NEXT: ret void
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;
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entry:
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%p1 = getelementptr i16, ptr %p, i64 1
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%p2 = getelementptr i16, ptr %p, i64 2
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%p3 = getelementptr i16, ptr %p, i64 3
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%l0 = load i16, ptr %p
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%l1 = load i16, ptr %p1
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%l2 = load i16, ptr %p2
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%l3 = load i16, ptr %p3
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%mul0 = sub i16 %l0, 0
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%mul1 = mul i16 %l1, 5
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%mul2 = mul i16 %l2, 2
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%mul3 = mul i16 %l3, 3
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%s1 = getelementptr i16, ptr %s, i64 1
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%s2 = getelementptr i16, ptr %s, i64 2
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%s3 = getelementptr i16, ptr %s, i64 3
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store i16 %mul0, ptr %s
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store i16 %mul1, ptr %s1
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store i16 %mul2, ptr %s2
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store i16 %mul3, ptr %s3
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ret void
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}
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define void @add_mul(ptr %p, ptr %s) {
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; CHECK-LABEL: define void @add_mul(
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; CHECK-SAME: ptr [[P:%.*]], ptr [[S:%.*]]) {
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; CHECK-NEXT: [[ENTRY:.*:]]
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; CHECK-NEXT: [[TMP0:%.*]] = load <4 x i16>, ptr [[P]], align 2
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; CHECK-NEXT: [[TMP1:%.*]] = mul <4 x i16> [[TMP0]], <i16 1, i16 5, i16 2, i16 3>
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; CHECK-NEXT: store <4 x i16> [[TMP1]], ptr [[S]], align 2
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; CHECK-NEXT: ret void
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;
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entry:
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%p1 = getelementptr i16, ptr %p, i64 1
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%p2 = getelementptr i16, ptr %p, i64 2
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%p3 = getelementptr i16, ptr %p, i64 3
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%l0 = load i16, ptr %p
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%l1 = load i16, ptr %p1
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%l2 = load i16, ptr %p2
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%l3 = load i16, ptr %p3
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%mul0 = add i16 %l0, 0
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%mul1 = mul i16 %l1, 5
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%mul2 = mul i16 %l2, 2
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%mul3 = mul i16 %l3, 3
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%s1 = getelementptr i16, ptr %s, i64 1
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%s2 = getelementptr i16, ptr %s, i64 2
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%s3 = getelementptr i16, ptr %s, i64 3
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store i16 %mul0, ptr %s
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store i16 %mul1, ptr %s1
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store i16 %mul2, ptr %s2
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store i16 %mul3, ptr %s3
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ret void
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}
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define void @sub_and(ptr %p, ptr %s) {
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; CHECK-LABEL: define void @sub_and(
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; CHECK-SAME: ptr [[P:%.*]], ptr [[S:%.*]]) {
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; CHECK-NEXT: [[ENTRY:.*:]]
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; CHECK-NEXT: [[TMP0:%.*]] = load <4 x i16>, ptr [[P]], align 2
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; CHECK-NEXT: [[TMP1:%.*]] = and <4 x i16> [[TMP0]], <i16 -1, i16 5, i16 2, i16 3>
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; CHECK-NEXT: store <4 x i16> [[TMP1]], ptr [[S]], align 2
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; CHECK-NEXT: ret void
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;
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entry:
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%p1 = getelementptr i16, ptr %p, i64 1
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%p2 = getelementptr i16, ptr %p, i64 2
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%p3 = getelementptr i16, ptr %p, i64 3
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%l0 = load i16, ptr %p
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%l1 = load i16, ptr %p1
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%l2 = load i16, ptr %p2
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%l3 = load i16, ptr %p3
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%mul0 = add i16 %l0, 0
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%mul1 = and i16 %l1, 5
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%mul2 = and i16 %l2, 2
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%mul3 = and i16 %l3, 3
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%s1 = getelementptr i16, ptr %s, i64 1
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%s2 = getelementptr i16, ptr %s, i64 2
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%s3 = getelementptr i16, ptr %s, i64 3
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store i16 %mul0, ptr %s
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store i16 %mul1, ptr %s1
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store i16 %mul2, ptr %s2
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store i16 %mul3, ptr %s3
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ret void
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}
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