512 lines
20 KiB
Markdown
512 lines
20 KiB
Markdown
<!-- This document is written in Markdown and uses extra directives provided by
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MyST (https://myst-parser.readthedocs.io/en/latest/). -->
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LLVM {{env.config.release}} Release Notes
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=========================================
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```{contents}
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```
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````{only} PreRelease
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```{warning} These are in-progress notes for the upcoming LLVM {{env.config.release}}
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release. Release notes for previous releases can be found on
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[the Download Page](https://releases.llvm.org/download.html).
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```
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````
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Introduction
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============
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This document contains the release notes for the LLVM Compiler Infrastructure,
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release {{env.config.release}}. Here we describe the status of LLVM, including
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major improvements from the previous release, improvements in various subprojects
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of LLVM, and some of the current users of the code. All LLVM releases may be
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downloaded from the [LLVM releases web site](https://llvm.org/releases/).
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For more information about LLVM, including information about the latest
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release, please check out the [main LLVM web site](https://llvm.org/). If you
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have questions or comments, the [Discourse forums](https://discourse.llvm.org)
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is a good place to ask them.
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Note that if you are reading this file from a Git checkout or the main
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LLVM web page, this document applies to the *next* release, not the current
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one. To see the release notes for a specific release, please see the
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[releases page](https://llvm.org/releases/).
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Non-comprehensive list of changes in this release
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=================================================
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<!-- For small 1-3 sentence descriptions, just add an entry at the end of
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this list. If your description won't fit comfortably in one bullet
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point (e.g. maybe you would like to give an example of the
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functionality, or simply have a lot to talk about), see the comment below
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for adding a new subsection. -->
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* Added a new IRNormalizer pass which aims to transform LLVM modules into
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a normal form by reordering and renaming instructions while preserving the
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same semantics. The normalizer makes it easier to spot semantic differences
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when diffing two modules which have undergone different passes.
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* ...
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<!-- If you would like to document a larger change, then you can add a
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subsection about it right here. You can copy the following boilerplate:
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Special New Feature
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-------------------
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Makes programs 10x faster by doing Special New Thing.
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-->
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Changes to the LLVM IR
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----------------------
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* Types are no longer allowed to be recursive.
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* The `x86_mmx` IR type has been removed. It will be translated to
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the standard vector type `<1 x i64>` in bitcode upgrade.
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* Renamed `llvm.experimental.stepvector` intrinsic to `llvm.stepvector`.
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* Added `usub_cond` and `usub_sat` operations to `atomicrmw`.
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* Introduced `noalias.addrspace` metadata.
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* Remove the following intrinsics which can be replaced with a `bitcast`:
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* `llvm.nvvm.bitcast.f2i`
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* `llvm.nvvm.bitcast.i2f`
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* `llvm.nvvm.bitcast.d2ll`
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* `llvm.nvvm.bitcast.ll2d`
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* Remove the following intrinsics which can be replaced with a funnel-shift:
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* `llvm.nvvm.rotate.b32`
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* `llvm.nvvm.rotate.right.b64`
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* `llvm.nvvm.rotate.b64`
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* Remove the following intrinsics which can be replaced with an
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`addrspacecast`:
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* `llvm.nvvm.ptr.gen.to.global`
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* `llvm.nvvm.ptr.gen.to.shared`
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* `llvm.nvvm.ptr.gen.to.constant`
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* `llvm.nvvm.ptr.gen.to.local`
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* `llvm.nvvm.ptr.global.to.gen`
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* `llvm.nvvm.ptr.shared.to.gen`
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* `llvm.nvvm.ptr.constant.to.gen`
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* `llvm.nvvm.ptr.local.to.gen`
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* Remove the following intrinsics which can be relaced with a load from
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addrspace(1) with an !invariant.load metadata
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* `llvm.nvvm.ldg.global.i`
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* `llvm.nvvm.ldg.global.f`
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* `llvm.nvvm.ldg.global.p`
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* Operand bundle values can now be metadata strings.
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* Fast math flags are now permitted on `fptrunc` and `fpext`.
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Changes to LLVM infrastructure
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------------------------------
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Changes to building LLVM
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------------------------
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* Raised the minimum MSVC version to Visual Studio 2019 16.8.
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Changes to TableGen
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-------------------
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Changes to Interprocedural Optimizations
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----------------------------------------
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Changes to the AArch64 Backend
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------------------------------
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* `.balign N, 0`, `.p2align N, 0`, `.align N, 0` in code sections will now fill
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the required alignment space with a sequence of `0x0` bytes (the requested
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fill value) rather than NOPs.
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* Assembler/disassembler support has been added for Armv9.6-A (2024)
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architecture extensions.
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* Added support for the FUJITSU-MONAKA CPU.
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Changes to the AMDGPU Backend
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-----------------------------
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* Removed `llvm.amdgcn.flat.atomic.fadd` and
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`llvm.amdgcn.global.atomic.fadd` intrinsics. Users should use the
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{ref}`atomicrmw <i_atomicrmw>` instruction with `fadd` and
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addrspace(0) or addrspace(1) instead.
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Changes to the ARM Backend
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--------------------------
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* `.balign N, 0`, `.p2align N, 0`, `.align N, 0` in code sections will now fill
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the required alignment space with a sequence of `0x0` bytes (the requested
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fill value) rather than NOPs.
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* The default behavior for frame pointers in leaf functions has been updated.
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When the `-fno-omit-frame-pointer` option is specified, `FPKeepKindStr` is
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set to `-mframe-pointer=all`, meaning the frame pointer (FP) is now retained
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in leaf functions by default. To eliminate the frame pointer in leaf functions,
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you must explicitly use the `-momit-leaf-frame-pointer` option.
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* When using the `MOVT` or `MOVW` instructions, the Assembler will now check to
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ensure that any addend that is used is within a 16-bit signed value range. If the
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addend falls outside of this range, the LLVM backend will emit an error like so
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`Relocation Not In Range`.
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Changes to the AVR Backend
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--------------------------
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Changes to the DirectX Backend
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------------------------------
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Changes to the Hexagon Backend
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------------------------------
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Changes to the LoongArch Backend
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--------------------------------
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Changes to the MIPS Backend
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---------------------------
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Changes to the PowerPC Backend
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------------------------------
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* The Linux `ppc64` LLC default cpu is updated from `ppc` to `ppc64`.
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* The AIX LLC default cpu is updated from `generic` to `pwr7`.
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Changes to the RISC-V Backend
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-----------------------------
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* `.balign N, 0`, `.p2align N, 0`, `.align N, 0` in code sections will now fill
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the required alignment space with a sequence of `0x0` bytes (the requested
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fill value) rather than NOPs.
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* Added Syntacore SCR4 and SCR5 CPUs: `-mcpu=syntacore-scr4/5-rv32/64`
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* `-mcpu=sifive-p470` was added.
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* Added Hazard3 CPU as taped out for RP2350: `-mcpu=rp2350-hazard3` (32-bit
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only).
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* Fixed length vector support using RVV instructions now requires VLEN>=64. This
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means Zve32x and Zve32f will also require Zvl64b. The prior support was
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largely untested.
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* The `Zvbc32e` and `Zvkgs` extensions are now supported experimentally.
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* Added `Smctr`, `Ssctr` and `Svvptc` extensions.
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* `-mcpu=syntacore-scr7` was added.
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* `-mcpu=tt-ascalon-d8` was added.
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* `-mcpu=mips-p8700` was added.
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* `-mcpu=sifive-p550` was added.
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* The `Zacas` extension is no longer marked as experimental.
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* Added Smdbltrp, Ssdbltrp extensions to -march.
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* The `Smmpm`, `Smnpm`, `Ssnpm`, `Supm`, and `Sspm` pointer masking extensions
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are no longer marked as experimental.
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* The `Sha` extension is now supported.
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* The RVA23U64, RVA23S64, RVB23U64, and RVB23S64 profiles are no longer marked
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as experimental.
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* `.insn <length>, <raw encoding>` can be used to assemble 48- and 64-bit
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instructions from raw integer values.
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* `.insn [<length>,] <raw encoding>` now accepts absolute expressions for both
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expressions, so that they can be computed from constants and absolute symbols.
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* The following new inline assembly constraints and modifiers are accepted:
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* `cr` constraint meaning an RVC-encoding compatible GPR (`x8`-`x15`)
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* `cf` constraint meaning an RVC-encoding compatible FPR (`f8`-`f15`)
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* `R` constraint meaning an even-odd GPR pair (prints as the even register,
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but both registers in the pair are considered live).
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* `N` modifer meaning print the register encoding (0-31) rather than the name.
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* `f` and `cf` inline assembly constraints, when using F-/D-/H-in-X extensions,
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will use the relevant GPR rather than FPR. This makes inline assembly portable
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between e.g. F and Zfinx code.
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* Adds experimental assembler support for the Qualcomm uC 'Xqcicsr` (CSR)
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extension.
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* Adds experimental assembler support for the Qualcomm uC 'Xqcisls` (Scaled Load Store)
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extension.
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* Adds experimental assembler support for the Qualcomm uC 'Xqcia` (Arithmetic)
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extension.
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* Adds experimental assembler support for the Qualcomm uC 'Xqciac` (Load-Store Address Calculation)
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extension.
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* Adds experimental assembler support for the Qualcomm uC 'Xqcics` (Conditonal Select)
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extension.
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* Adds experimental assembler support for the Qualcomm uC 'Xqcilsm` (Load Store Multiple)
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extension.
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* Adds experimental assembler support for the Qualcomm uC 'Xqcicli` (Conditional Load Immediate)
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extension.
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* Adds experimental assembler support for the Qualcomm uC 'Xqcicm` (Conditonal Move)
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extension.
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* Adds experimental assembler support for the Qualcomm uC 'Xqciint` (Interrupts)
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extension.
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* Added ``Sdext`` and ``Sdtrig`` extensions.
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Changes to the WebAssembly Backend
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----------------------------------
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* The default target CPU, "generic", now enables the `-mnontrapping-fptoint`
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and `-mbulk-memory` flags, which correspond to the [Bulk Memory Operations]
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and [Non-trapping float-to-int Conversions] language features, which are
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[widely implemented in engines].
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* A new Lime1 target CPU is added, `-mcpu=lime1`. This CPU follows the
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definition of the Lime1 CPU [here], and enables `-mmultivalue`,
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`-mmutable-globals`, `-mcall-indirect-overlong`, `-msign-ext`,
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`-mbulk-memory-opt`, `-mnontrapping-fptoint`, and `-mextended-const`.
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* Support for the new standardized [Exception Handling] proposal is added.
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The [legacy Exception Handling] proposal is still supported, and turned on by
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the newly added `-wasm-use-legacy-eh` option. Given that major web browsers
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still default to the legacy EH proposal, this option is turned on by default
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for the moment.
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[Bulk Memory Operations]: https://github.com/WebAssembly/bulk-memory-operations/blob/master/proposals/bulk-memory-operations/Overview.md
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[Non-trapping float-to-int Conversions]: https://github.com/WebAssembly/spec/blob/master/proposals/nontrapping-float-to-int-conversion/Overview.md
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[Exception Handling]: https://github.com/WebAssembly/exception-handling/blob/main/proposals/exception-handling/Exceptions.md
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[legacy Exception Handling]: https://github.com/WebAssembly/exception-handling/blob/main/proposals/exception-handling/legacy/Exceptions.md
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[widely implemented in engines]: https://webassembly.org/features/
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[here]: https://github.com/WebAssembly/tool-conventions/blob/main/Lime.md#lime1
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Changes to the Windows Target
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-----------------------------
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Changes to the X86 Backend
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--------------------------
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* `.balign N, 0x90`, `.p2align N, 0x90`, and `.align N, 0x90` in code sections
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now fill the required alignment space with repeating `0x90` bytes, rather than
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using optimised NOP filling. Optimised NOP filling fills the space with NOP
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instructions of various widths, not just those that use the `0x90` byte
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encoding. To use optimised NOP filling in a code section, leave off the
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"fillval" argument, i.e. `.balign N`, `.p2align N` or `.align N` respectively.
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* Due to the removal of the `x86_mmx` IR type, functions with
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`x86_mmx` arguments or return values will use a different,
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incompatible, calling convention ABI. Such functions are not
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generally seen in the wild (Clang never generates them!), so this is
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not expected to result in real-world compatibility problems.
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* Support ISA of `AVX10.2-256` and `AVX10.2-512`.
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* Supported instructions of `MOVRS AND AVX10.2`
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* Supported ISA of `SM4(EVEX)`.
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* Supported ISA of `MSR_IMM`.
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* Supported ``-mcpu=diamondrapids``
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* Supported emitting relocation types for x86-64 target:
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* `R_X86_64_CODE_4_GOTPCRELX`
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* `R_X86_64_CODE_4_GOTTPOFF`
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* `R_X86_64_CODE_4_GOTPC32_TLSDESC`
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* `R_X86_64_CODE_6_GOTTPOFF`
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Changes to the OCaml bindings
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-----------------------------
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Changes to the Python bindings
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------------------------------
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Changes to the C API
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--------------------
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* The following symbols are deleted due to the removal of the `x86_mmx` IR type:
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* `LLVMX86_MMXTypeKind`
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* `LLVMX86MMXTypeInContext`
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* `LLVMX86MMXType`
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* The following functions are added to further support non-null-terminated strings:
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* `LLVMGetNamedFunctionWithLength`
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* `LLVMGetNamedGlobalWithLength`
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* The following functions are added to access the `LLVMContextRef` associated
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with `LLVMValueRef` and `LLVMBuilderRef` objects:
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* `LLVMGetValueContext`
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* `LLVMGetBuilderContext`
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* The new pass manager can now be invoked with a custom alias analysis pipeline, using
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the `LLVMPassBuilderOptionsSetAAPipeline` function.
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* It is now also possible to run the new pass manager on a single function, by calling
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`LLVMRunPassesOnFunction` instead of `LLVMRunPasses`.
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* Support for creating instructions with custom synchronization scopes has been added:
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* `LLVMGetSyncScopeID` to map a synchronization scope name to an ID.
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* `LLVMBuildFenceSyncScope`, `LLVMBuildAtomicRMWSyncScope` and
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`LLVMBuildAtomicCmpXchgSyncScope` versions of the existing builder functions
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with an additional synchronization scope ID parameter.
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* `LLVMGetAtomicSyncScopeID` and `LLVMSetAtomicSyncScopeID` to get and set the
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synchronization scope of any atomic instruction.
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* `LLVMIsAtomic` to check if an instruction is atomic, for use with the above functions.
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Because of backwards compatibility, `LLVMIsAtomicSingleThread` and
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`LLVMSetAtomicSingleThread` continue to work with any instruction type.
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* The `LLVMSetPersonalityFn` and `LLVMSetInitializer` APIs now support clearing the
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personality function and initializer respectively by passing a null pointer.
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* The following functions are added to allow iterating over debug records attached to
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instructions:
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* `LLVMGetFirstDbgRecord`
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* `LLVMGetLastDbgRecord`
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* `LLVMGetNextDbgRecord`
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* `LLVMGetPreviousDbgRecord`
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||
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* Added `LLVMAtomicRMWBinOpUSubCond` and `LLVMAtomicRMWBinOpUSubSat` to `LLVMAtomicRMWBinOp` enum for AtomicRMW instructions.
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Changes to the CodeGen infrastructure
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-------------------------------------
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||
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Changes to the Metadata Info
|
||
---------------------------------
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||
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||
Changes to the Debug Info
|
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---------------------------------
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||
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Changes to the LLVM tools
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||
---------------------------------
|
||
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* llvm-objcopy now supports the following options for Mach-O:
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||
`--globalize-symbol`, `--globalize-symbols`,
|
||
`--keep-global-symbol`, `--keep-global-symbols`,
|
||
`--localize-symbol`, `--localize-symbols`,
|
||
`--skip-symbol`, `--skip-symbols`.
|
||
|
||
Changes to LLDB
|
||
---------------------------------
|
||
|
||
* It is now recommended that LLDB be built with Python >= 3.8, but no changes
|
||
have been made to the supported Python versions. The next release, LLDB 21,
|
||
will require Python >= 3.8.
|
||
|
||
* LLDB now supports inline diagnostics for the expression evaluator and command line parser.
|
||
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||
Old:
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||
```
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(lldb) p a+b
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error: <user expression 0>:1:1: use of undeclared identifier 'a'
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||
1 | a+b
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| ^
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||
error: <user expression 0>:1:3: use of undeclared identifier 'b'
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||
1 | a+b
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| ^
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```
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||
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||
New:
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||
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||
```
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||
(lldb) p a+b
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˄ ˄
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||
│ ╰─ error: use of undeclared identifier 'b'
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||
╰─ error: use of undeclared identifier 'a'
|
||
```
|
||
|
||
* LLDB can now read the `fpmr` register from AArch64 Linux processes and core
|
||
files.
|
||
|
||
* Program stdout/stderr redirection will now open the file with O_TRUNC flag, make sure to truncate the file if path already exists.
|
||
* eg. `settings set target.output-path/target.error-path <path/to/file>`
|
||
|
||
* A new setting `target.launch-working-dir` can be used to set a persistent cwd that is used by default by `process launch` and `run`.
|
||
|
||
* LLDB now parses shared libraries in parallel, resulting in an average 2x speedup when attaching (only available on Darwin platforms) and launching (available on all platforms).
|
||
|
||
* It is now possible to implement lldb commands in Python that use lldb's native command-line parser. In particular, that allows per-option/argument completion,
|
||
with all the basic completers automatically supported and auto-generated help.
|
||
The command template file in `lldb/examples/python/cmdtemplate.py` has been updated to show how to use this.
|
||
|
||
* Breakpoints on "inlined call sites" are now supported. Previous to this fix, breakpoints on source lines that only contained inlined call sites would be
|
||
moved to the next source line, causing you to miss the inlined executions.
|
||
|
||
* On the command line, LLDB now limits tab completions to your terminal width to avoid wrapping.
|
||
|
||
Old:
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```
|
||
Available completions:
|
||
_regexp-attach -- Attach to process by ID or name.
|
||
_regexp-break -- Set a breakpoint using one of several shorthand
|
||
formats.
|
||
_regexp-bt -- Show backtrace of the current thread's call sta
|
||
ck. Any numeric argument displays at most that many frames. The argument 'al
|
||
l' displays all threads. Use 'settings set frame-format' to customize the pr
|
||
inting of individual frames and 'settings set thread-format' to customize th
|
||
e thread header. Frame recognizers may filter thelist. Use 'thread backtrace
|
||
-u (--unfiltered)' to see them all.
|
||
_regexp-display -- Evaluate an expression at every stop (see 'help
|
||
target stop-hook'.)
|
||
|
||
```
|
||
|
||
New:
|
||
```
|
||
Available completions:
|
||
_regexp-attach -- Attach to process by ID or name.
|
||
_regexp-break -- Set a breakpoint using one of several shorth...
|
||
_regexp-bt -- Show backtrace of the current thread's call ...
|
||
_regexp-display -- Evaluate an expression at every stop (see 'h...
|
||
```
|
||
* DWARF indexing speed (for binaries not using the debug_names index) increased
|
||
by [30-60%](https://github.com/llvm/llvm-project/pull/118657).
|
||
|
||
* Minidumps generated by LLDB now support:
|
||
* 64 bit memory (due to 64b support, Minidumps are now paged to disk while being written).
|
||
* Capturing of TLS variables.
|
||
* Multiple signals or exceptions, including breakpoints.
|
||
|
||
* [New Core File API](https://lldb.llvm.org/python_api/lldb.SBSaveCoreOptions.html). This gives greater control on the data captured into the core file, relative to the existing `process save-core` styles.
|
||
|
||
* When opening ELF core files, LLDB will print additional information about the
|
||
signal that killed the process and the disassembly view will display actual
|
||
(relocated) targets of the jump instructions instead of raw offsets encoded in
|
||
the instruction. This matches existing behavior for live processes.
|
||
|
||
Old:
|
||
```
|
||
* thread #1: tid = 329384, 0x0000000000401262, name = 'a.out', stop reason = signal SIGSEGV
|
||
|
||
0x7f1e3193e0a7 <+23>: ja 0xfe100 ; <+112>
|
||
```
|
||
|
||
New:
|
||
```
|
||
* thread #1: tid = 329384, 0x0000000000401262, name = 'a.out', stop reason = SIGSEGV: address not mapped to object (fault address: 0x0)
|
||
|
||
0x7f1e3193e0a7 <+23>: ja 0x7f1e3193e100 ; <+112>
|
||
```
|
||
|
||
* `lldb-server` now listens to a single port for gdbserver connections and provides
|
||
that port to the connection handler processes. This means that only 2 ports need
|
||
to be opened in the firewall (one for the `lldb-server` platform, one for gdbserver connections).
|
||
In addition, due to this work, `lldb-server` now works on Windows in the server mode.
|
||
|
||
Changes to BOLT
|
||
---------------------------------
|
||
|
||
Changes to Sanitizers
|
||
---------------------
|
||
|
||
Other Changes
|
||
-------------
|
||
|
||
External Open Source Projects Using LLVM {{env.config.release}}
|
||
===============================================================
|
||
|
||
* A project...
|
||
|
||
Additional Information
|
||
======================
|
||
|
||
A wide variety of additional information is available on the
|
||
[LLVM web page](https://llvm.org/), in particular in the
|
||
[documentation](https://llvm.org/docs/) section. The web page also contains
|
||
versions of the API documentation which is up-to-date with the Git version of
|
||
the source code. You can access versions of these documents specific to this
|
||
release by going into the `llvm/docs/` directory in the LLVM tree.
|
||
|
||
If you have any questions or comments about LLVM, please feel free to contact
|
||
us via the [Discourse forums](https://discourse.llvm.org).
|