4d425f8663
Try to avoid some unprofitable predication on PPC. Recognize in the cost model that computing on i1 values will require extra mask or compare operation. Differential Revision: https://reviews.llvm.org/D155876
35 lines
2.3 KiB
LLVM
35 lines
2.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py
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; RUN: opt < %s -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr8 -passes="print<cost-model>" -cost-kind=throughput 2>&1 -disable-output | FileCheck %s
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define i32 @reduce_i1(i32 %arg) {
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; CHECK-LABEL: 'reduce_i1'
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; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V1 = call i1 @llvm.vector.reduce.and.v1i1(<1 x i1> undef)
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; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2 = call i1 @llvm.vector.reduce.and.v2i1(<2 x i1> undef)
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; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4 = call i1 @llvm.vector.reduce.and.v4i1(<4 x i1> undef)
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; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8 = call i1 @llvm.vector.reduce.and.v8i1(<8 x i1> undef)
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; CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V16 = call i1 @llvm.vector.reduce.and.v16i1(<16 x i1> undef)
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; CHECK-NEXT: Cost Model: Found an estimated cost of 129 for instruction: %V32 = call i1 @llvm.vector.reduce.and.v32i1(<32 x i1> undef)
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; CHECK-NEXT: Cost Model: Found an estimated cost of 257 for instruction: %V64 = call i1 @llvm.vector.reduce.and.v64i1(<64 x i1> undef)
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; CHECK-NEXT: Cost Model: Found an estimated cost of 514 for instruction: %V128 = call i1 @llvm.vector.reduce.and.v128i1(<128 x i1> undef)
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; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
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;
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%V1 = call i1 @llvm.vector.reduce.and.v1i1(<1 x i1> undef)
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%V2 = call i1 @llvm.vector.reduce.and.v2i1(<2 x i1> undef)
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%V4 = call i1 @llvm.vector.reduce.and.v4i1(<4 x i1> undef)
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%V8 = call i1 @llvm.vector.reduce.and.v8i1(<8 x i1> undef)
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%V16 = call i1 @llvm.vector.reduce.and.v16i1(<16 x i1> undef)
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%V32 = call i1 @llvm.vector.reduce.and.v32i1(<32 x i1> undef)
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%V64 = call i1 @llvm.vector.reduce.and.v64i1(<64 x i1> undef)
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%V128 = call i1 @llvm.vector.reduce.and.v128i1(<128 x i1> undef)
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ret i32 undef
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}
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declare i1 @llvm.vector.reduce.and.v1i1(<1 x i1>)
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declare i1 @llvm.vector.reduce.and.v2i1(<2 x i1>)
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declare i1 @llvm.vector.reduce.and.v4i1(<4 x i1>)
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declare i1 @llvm.vector.reduce.and.v8i1(<8 x i1>)
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declare i1 @llvm.vector.reduce.and.v16i1(<16 x i1>)
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declare i1 @llvm.vector.reduce.and.v32i1(<32 x i1>)
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declare i1 @llvm.vector.reduce.and.v64i1(<64 x i1>)
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declare i1 @llvm.vector.reduce.and.v128i1(<128 x i1>)
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