LiqinWeng 98e5962b7c

[RISCV][CostModel] Add cost for fabs/fsqrt of type bf16/f16 (#118608)

2025-01-10 17:22:51 +08:00

..

AArch64

[AArch64] Add sve div and rem tests. NFC

2025-01-09 08:46:13 +00:00

AMDGPU

[SLP]Add cost estimation for gather node reshuffling

2024-12-24 15:35:29 -05:00

ARM

[LLVM][IR] Use splat syntax when printing Constant[Data]Vector. (#112548)

2024-11-06 11:53:33 +00:00

PowerPC

[PowerPC] Update data layout aligment of i128 to 16 (#118004)

2024-12-09 18:02:24 -05:00

RISCV

[RISCV][CostModel] Add cost for fabs/fsqrt of type bf16/f16 (#118608)

2025-01-10 17:22:51 +08:00

SystemZ

[SystemZ] Add realistic cost estimates for vector reduction intrinsics (#118319)

2024-12-03 17:08:51 +01:00

X86

[CostModel][X86] getVectorInstrCost - correctly cost v4f32 insertelement into index 0

2025-01-07 12:23:45 +00:00

free-intrinsics-datalayout.ll

[CostModel] No cost for llvm.allow.{runtime,ubsan}.check() (#86064)

2024-03-31 22:27:57 -07:00

free-intrinsics-no_info.ll

[CostModel] No cost for llvm.allow.{runtime,ubsan}.check() (#86064)

2024-03-31 22:27:57 -07:00

no_info.ll

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