LiqinWeng 98e5962b7c

[RISCV][CostModel] Add cost for fabs/fsqrt of type bf16/f16 (#118608)

2025-01-10 17:22:51 +08:00

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abs.ll

[RISCV][TTI] Implement cost of intrinsic abs with LMUL (#115813)

2024-11-25 17:35:58 +08:00

active_lane_mask.ll

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arith-fp.ll

[RISCV][Test] Add test for vp float arithmetic ops. NFC (#114516)

2024-11-13 16:23:04 +08:00

arith-int.ll

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cast-half.ll

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cast.ll

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cmp-select.ll

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cmp.ll

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cttz_elts.ll

[RISCV][CostModel] Correct the cost of some reductions (#118072)

2024-12-04 17:26:54 +08:00

extractelement.ll

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fca-load-store.ll

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fixed-vector-gather.ll

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fixed-vector-insert-subvector.ll

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fixed-vector-scatter.ll

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fp-min-max-abs.ll

[RISCV][CostModel] Add cost for fabs/fsqrt of type bf16/f16 (#118608)

2025-01-10 17:22:51 +08:00

fp-sqrt-pow.ll

[RISCV][CostModel] Add cost for fabs/fsqrt of type bf16/f16 (#118608)

2025-01-10 17:22:51 +08:00

fp-trig-log-exp.ll

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fround.ll

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gep-zero-indices.ll

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gep.ll

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insertelement.ll

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int-bit-manip.ll

[TTI][RISCV] Implement cost of some intrinsics with LMUL (#117874)

2024-12-03 10:17:52 +08:00

int-min-max.ll

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int-sat-math.ll

[TTI][RISCV] Implement cost of some intrinsics with LMUL (#117874)

2024-12-03 10:17:52 +08:00

lit.local.cfg

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load-to-trunc.ll

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logicalop.ll

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masked_ldst.ll

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phi-const.ll

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reduce-add.ll

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reduce-and-i1.ll

[RISCV] Fix the cost of llvm.vector.reduce.and (#119160)

2025-01-10 10:10:42 +08:00

reduce-and.ll

[RISCV] Fix the cost of llvm.vector.reduce.and (#119160)

2025-01-10 10:10:42 +08:00

reduce-fadd.ll

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reduce-fmaximum.ll

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reduce-fminimum.ll

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reduce-fmul.ll

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reduce-max.ll

[RISCV] Fix the cost of llvm.vector.reduce.and (#119160)

2025-01-10 10:10:42 +08:00

reduce-min.ll

[RISCV] Fix the cost of llvm.vector.reduce.and (#119160)

2025-01-10 10:10:42 +08:00

reduce-or.ll

[RISCV][CostModel] Correct the cost of some reductions (#118072)

2024-12-04 17:26:54 +08:00

reduce-scalable-fp.ll

[RISCV][CostModel] Correct the cost of some reductions (#118072)

2024-12-04 17:26:54 +08:00

reduce-scalable-int.ll

[RISCV][CostModel] Correct the cost of some reductions (#118072)

2024-12-04 17:26:54 +08:00

reduce-xor.ll

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rvv-cmp.ll

[RISCV][NFC] precommit test for fcmp with f16

2025-01-03 01:45:27 -08:00

rvv-extractelement.ll

[RISCV][TTI] Model the cost of insert/extractelt when the vector split into multiple register group and idx exceed single group. (#118401)

2024-12-12 09:26:19 +08:00

rvv-fcmp-f16.ll

[RISCV][NFC] precommit test for fcmp with f16

2025-01-03 01:45:27 -08:00

rvv-insertelement.ll

[RISCV][TTI] Model the cost of insert/extractelt when the vector split into multiple register group and idx exceed single group. (#118401)

2024-12-12 09:26:19 +08:00

rvv-load-store.ll

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rvv-phi-const.ll

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rvv-select.ll

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rvv-shuffle.ll

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rvv-vectorextract.ll

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rvv-vectorinsert.ll

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scalable-gather.ll

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scalable-scatter.ll

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shuffle-broadcast.ll

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shuffle-exact-vlen.ll

[SLP]Add cost estimation for gather node reshuffling

2024-12-24 15:35:29 -05:00

shuffle-extract_subvector.ll

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shuffle-insert_subvector.ll

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shuffle-insert.ll

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shuffle-interleave.ll

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shuffle-permute.ll

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shuffle-reverse.ll

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shuffle-select.ll

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shuffle-transpose.ll

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splice.ll

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stepvector.ll

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vector-cost-without-v.ll

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vp-intrinsics.ll

[RISCV][CostModel] Correct the cost of some reductions (#118072)

2024-12-04 17:26:54 +08:00