2208c97c1b
Similar to 806761a7629df268c8aed49657aeccffa6bca449 -mtriple= specifies the full target triple while -march= merely sets the architecture part of the default target triple, leaving a target triple which may not make sense. Therefore, -march= is error-prone and not recommended for tests without a target triple. The issue has been benign as we recognize $unknown-apple-darwin as ELF instead of rejecting it outrightly.
33 lines
1.1 KiB
LLVM
33 lines
1.1 KiB
LLVM
; RUN: llc -mtriple=hexagon -mcpu=hexagonv5 -enable-pipeliner < %s -pipeliner-experimental-cg=true | FileCheck %s
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; RUN: llc -mtriple=hexagon -mcpu=hexagonv60 -enable-pipeliner < %s -pipeliner-experimental-cg=true | FileCheck %s --check-prefix=CHECKV60
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; Simple vector total.
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; CHECK: loop0(.LBB0_[[LOOP:.]],
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; CHECK: .LBB0_[[LOOP]]:
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; CHECK: add(r{{[0-9]+}},r{{[0-9]+}})
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; CHECK-NEXT: memw(r{{[0-9]+}}++#4)
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; CHECK-NEXT: endloop0
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; V60 does not pipeline due to latencies.
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; CHECKV60: memw(r{{[0-9]+}}++#4)
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; CHECKV60: add(r{{[0-9]+}},r{{[0-9]+}})
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define i32 @f0(ptr %a0, i32 %a1) {
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b0:
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br label %b1
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b1: ; preds = %b1, %b0
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%v0 = phi i32 [ 0, %b0 ], [ %v4, %b1 ]
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%v1 = phi ptr [ %a0, %b0 ], [ %v7, %b1 ]
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%v2 = phi i32 [ 0, %b0 ], [ %v5, %b1 ]
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%v3 = load i32, ptr %v1, align 4
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%v4 = add nsw i32 %v3, %v0
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%v5 = add nsw i32 %v2, 1
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%v6 = icmp eq i32 %v5, 10000
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%v7 = getelementptr i32, ptr %v1, i32 1
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br i1 %v6, label %b2, label %b1
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b2: ; preds = %b1
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ret i32 %v4
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}
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