2208c97c1b
Similar to 806761a7629df268c8aed49657aeccffa6bca449 -mtriple= specifies the full target triple while -march= merely sets the architecture part of the default target triple, leaving a target triple which may not make sense. Therefore, -march= is error-prone and not recommended for tests without a target triple. The issue has been benign as we recognize $unknown-apple-darwin as ELF instead of rejecting it outrightly.
62 lines
2.0 KiB
LLVM
62 lines
2.0 KiB
LLVM
; RUN: llc -mtriple=hexagon < %s | FileCheck %s
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; Check that we generate correct set of instructions for unordered
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; floating-point compares.
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; CHECK-LABEL: f0:
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; CHECK-DAG: [[PREG1:p[0-3]+]] = sfcmp.eq(r{{[0-9]+}},r{{[0-9]+}})
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; CHECK-DAG: [[PREG2:p[0-3]+]] = sfcmp.uo(r{{[0-9]+}},r{{[0-9]+}})
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; CHECK: p{{[0-3]+}} = or([[PREG2]],![[PREG1]])
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define float @f0(float %a0, float %a1, float %a2) #0 {
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b0:
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%v0 = fcmp une float %a0, 0.000000e+00
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%v1 = select i1 %v0, float %a2, float 0.000000e+00
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ret float %v1
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}
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; CHECK-LABEL: f1:
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; CHECK-DAG: [[PREG1:p[0-3]+]] = sfcmp.ge(r{{[0-9]+}},r{{[0-9]+}})
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; CHECK-DAG: [[PREG2:p[0-3]+]] = sfcmp.uo(r{{[0-9]+}},r{{[0-9]+}})
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; CHECK: p{{[0-3]+}} = or([[PREG2]],[[PREG1]])
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define float @f1(float %a0, float %a1, float %a2) #0 {
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b0:
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%v0 = fcmp uge float %a0, 0.000000e+00
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%v1 = select i1 %v0, float %a2, float 0.000000e+00
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ret float %v1
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}
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; CHECK-LABEL: f2:
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; CHECK-DAG: [[PREG1:p[0-3]+]] = sfcmp.gt(r{{[0-9]+}},r{{[0-9]+}})
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; CHECK-DAG: [[PREG2:p[0-3]+]] = sfcmp.uo(r{{[0-9]+}},r{{[0-9]+}})
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; CHECK: p{{[0-3]+}} = or([[PREG2]],[[PREG1]])
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define float @f2(float %a0, float %a1, float %a2) #0 {
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b0:
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%v0 = fcmp ugt float %a0, 0.000000e+00
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%v1 = select i1 %v0, float %a2, float 0.000000e+00
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ret float %v1
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}
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; CHECK-LABEL: f3:
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; CHECK-DAG: [[PREG1:p[0-3]+]] = sfcmp.ge(r{{[0-9]+}},r{{[0-9]+}})
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; CHECK-DAG: [[PREG2:p[0-3]+]] = sfcmp.uo(r{{[0-9]+}},r{{[0-9]+}})
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; CHECK: p{{[0-3]+}} = or([[PREG2]],[[PREG1]])
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define float @f3(float %a0, float %a1, float %a2) #0 {
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b0:
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%v0 = fcmp ule float %a0, 0.000000e+00
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%v1 = select i1 %v0, float %a2, float 0.000000e+00
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ret float %v1
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}
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; CHECK-LABEL: f4:
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; CHECK-DAG: [[PREG1:p[0-3]+]] = sfcmp.gt(r{{[0-9]+}},r{{[0-9]+}})
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; CHECK-DAG: [[PREG2:p[0-3]+]] = sfcmp.uo(r{{[0-9]+}},r{{[0-9]+}})
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; CHECK: p{{[0-3]+}} = or([[PREG2]],[[PREG1]])
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define float @f4(float %a0, float %a1, float %a2) #0 {
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b0:
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%v0 = fcmp ult float %a0, 0.000000e+00
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%v1 = select i1 %v0, float %a2, float 0.000000e+00
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ret float %v1
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}
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attributes #0 = { nounwind "target-cpu"="hexagonv55" }
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