2c782ab271
This patch adds basic support of `MachinePipeliner` and disable
it by default.
The functionality should be OK and all llvm-test-suite tests have
passed.
110 lines
4.5 KiB
LLVM
110 lines
4.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
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; RUN: llc -mtriple=riscv64 -mcpu=sifive-p670 -O3 -verify-machineinstrs -riscv-enable-pipeliner=false < %s \
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; RUN: | FileCheck %s --check-prefixes=CHECK,CHECK-NOT-PIPELINED
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; RUN: llc -mtriple=riscv64 -mcpu=sifive-p670 -O3 -verify-machineinstrs -riscv-enable-pipeliner=true < %s \
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; RUN: | FileCheck %s --check-prefixes=CHECK,CHECK-PIPELINED
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; We shouldn't pipeline this loop as one operand of branch is a PHI.
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define i32 @test_phi() {
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; CHECK-LABEL: test_phi:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: li a0, 0
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; CHECK-NEXT: .LBB0_1: # %for.body
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; CHECK-NEXT: # =>This Inner Loop Header: Depth=1
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; CHECK-NEXT: mv a1, a0
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; CHECK-NEXT: li a0, 1
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; CHECK-NEXT: sh a0, 0(zero)
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; CHECK-NEXT: bnez a1, .LBB0_1
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; CHECK-NEXT: # %bb.2: # %for.cond.cleanup
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; CHECK-NEXT: li a0, 0
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; CHECK-NEXT: ret
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entry:
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br label %for.body
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for.cond.cleanup: ; preds = %for.body
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ret i32 0
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for.body: ; preds = %for.body, %entry
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%indvars.iv1 = phi i64 [ 0, %entry ], [ 1, %for.body ]
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store i16 1, ptr null, align 4
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%exitcond.not.31 = icmp eq i64 %indvars.iv1, 0
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br i1 %exitcond.not.31, label %for.cond.cleanup, label %for.body
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}
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define void @test_pipelined_1(ptr noalias %in, ptr noalias %out, i32 signext %cnt) {
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; CHECK-NOT-PIPELINED-LABEL: test_pipelined_1:
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; CHECK-NOT-PIPELINED: # %bb.0: # %entry
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; CHECK-NOT-PIPELINED-NEXT: blez a2, .LBB1_3
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; CHECK-NOT-PIPELINED-NEXT: # %bb.1: # %for.body.preheader
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; CHECK-NOT-PIPELINED-NEXT: addi a2, a2, -1
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; CHECK-NOT-PIPELINED-NEXT: sh2add.uw a2, a2, a1
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; CHECK-NOT-PIPELINED-NEXT: addi a2, a2, 4
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; CHECK-NOT-PIPELINED-NEXT: .LBB1_2: # %for.body
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; CHECK-NOT-PIPELINED-NEXT: # =>This Inner Loop Header: Depth=1
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; CHECK-NOT-PIPELINED-NEXT: lw a3, 0(a1)
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; CHECK-NOT-PIPELINED-NEXT: addi a1, a1, 4
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; CHECK-NOT-PIPELINED-NEXT: addi a3, a3, 1
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; CHECK-NOT-PIPELINED-NEXT: sw a3, 0(a0)
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; CHECK-NOT-PIPELINED-NEXT: addi a0, a0, 4
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; CHECK-NOT-PIPELINED-NEXT: bne a1, a2, .LBB1_2
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; CHECK-NOT-PIPELINED-NEXT: .LBB1_3: # %for.end
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; CHECK-NOT-PIPELINED-NEXT: ret
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;
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; CHECK-PIPELINED-LABEL: test_pipelined_1:
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; CHECK-PIPELINED: # %bb.0: # %entry
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; CHECK-PIPELINED-NEXT: blez a2, .LBB1_6
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; CHECK-PIPELINED-NEXT: # %bb.1: # %for.body.preheader
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; CHECK-PIPELINED-NEXT: lw a4, 0(a1)
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; CHECK-PIPELINED-NEXT: addi a2, a2, -1
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; CHECK-PIPELINED-NEXT: sh2add.uw a6, a2, a1
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; CHECK-PIPELINED-NEXT: addi a2, a0, 4
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; CHECK-PIPELINED-NEXT: addi a1, a1, 4
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; CHECK-PIPELINED-NEXT: addi a6, a6, 4
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; CHECK-PIPELINED-NEXT: beq a1, a6, .LBB1_5
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; CHECK-PIPELINED-NEXT: # %bb.2: # %for.body
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; CHECK-PIPELINED-NEXT: lw a5, 0(a1)
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; CHECK-PIPELINED-NEXT: addi a3, a2, 4
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; CHECK-PIPELINED-NEXT: addi a4, a4, 1
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; CHECK-PIPELINED-NEXT: addi a1, a1, 4
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; CHECK-PIPELINED-NEXT: beq a1, a6, .LBB1_4
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; CHECK-PIPELINED-NEXT: .LBB1_3: # %for.body
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; CHECK-PIPELINED-NEXT: # =>This Inner Loop Header: Depth=1
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; CHECK-PIPELINED-NEXT: sw a4, 0(a0)
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; CHECK-PIPELINED-NEXT: mv a4, a5
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; CHECK-PIPELINED-NEXT: lw a5, 0(a1)
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; CHECK-PIPELINED-NEXT: mv a0, a2
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; CHECK-PIPELINED-NEXT: mv a2, a3
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; CHECK-PIPELINED-NEXT: addi a3, a3, 4
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; CHECK-PIPELINED-NEXT: addi a4, a4, 1
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; CHECK-PIPELINED-NEXT: addi a1, a1, 4
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; CHECK-PIPELINED-NEXT: bne a1, a6, .LBB1_3
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; CHECK-PIPELINED-NEXT: .LBB1_4:
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; CHECK-PIPELINED-NEXT: sw a4, 0(a0)
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; CHECK-PIPELINED-NEXT: mv a0, a2
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; CHECK-PIPELINED-NEXT: mv a4, a5
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; CHECK-PIPELINED-NEXT: .LBB1_5:
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; CHECK-PIPELINED-NEXT: addi a4, a4, 1
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; CHECK-PIPELINED-NEXT: sw a4, 0(a0)
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; CHECK-PIPELINED-NEXT: .LBB1_6: # %for.end
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; CHECK-PIPELINED-NEXT: ret
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entry:
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%cmp = icmp sgt i32 %cnt, 0
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br i1 %cmp, label %for.body, label %for.end
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for.body: ; preds = %entry, %for.body
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%inc.next = phi i32 [ %inc, %for.body ], [ 0, %entry ]
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%in.addr.next = phi ptr [ %incdec.in, %for.body ], [ %in, %entry ]
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%out.addr.next = phi ptr [ %incdec.out, %for.body ], [ %out, %entry ]
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%0 = load i32, ptr %out.addr.next, align 4
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%1 = add i32 %0, 1
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store i32 %1, ptr %in.addr.next, align 4
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%incdec.in = getelementptr inbounds i8, ptr %in.addr.next, i64 4
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%incdec.out = getelementptr inbounds i8, ptr %out.addr.next, i64 4
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%inc = add nuw nsw i32 %inc.next, 1
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%exitcond.not = icmp eq i32 %inc, %cnt
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br i1 %exitcond.not, label %for.end, label %for.body
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for.end: ; preds = %for.body, %entry
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ret void
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}
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