4b692a95d1
The code pattern that clang will generate for HLSL has changed from the original plan. This allows the SPIR-V backend to generate code for the current code generation. It looks for patterns of the form: ``` %1 = @llvm.spv.resource.handlefrombinding %2 = @llvm.spv.resource.getpointer(%1, index) load/store %2 ``` These three llvm-ir instruction are treated as a single unit that will 1. Generate or find the global variable identified by the call to `resource.handlefrombinding`. 2. Generate an OpLoad of the variable to get the handle to the image. 3. Generate an OpImageRead or OpImageWrite using that handle with the given index. This will generate the OpLoad in the same BB as the read/write. Note: Now that `resource.handlefrombinding` is not processed on its own, many existing tests had to be removed. We do not have intrinsics that are able to use handles to sampled images, input attachments, etc., so we cannot generate the load of the handle. These tests are removed for now, and will be added when those resource types are fully implemented.
38 lines
1.8 KiB
LLVM
38 lines
1.8 KiB
LLVM
; RUN: llc -O0 -verify-machineinstrs -mtriple=spirv1.6-vulkan1.3-library %s -o - | FileCheck %s
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; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv1.6-vulkan1.3-library %s -o - -filetype=obj | spirv-val %}
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; CHECK: OpCapability StorageImageWriteWithoutFormat
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; CHECK-DAG: OpDecorate [[IntBufferVar:%[0-9]+]] DescriptorSet 16
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; CHECK-DAG: OpDecorate [[IntBufferVar]] Binding 7
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; CHECK-DAG: [[int:%[0-9]+]] = OpTypeInt 32 0
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; CHECK-DAG: [[ten:%[0-9]+]] = OpConstant [[int]] 10
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; CHECK-DAG: [[v4_int:%[0-9]+]] = OpTypeVector [[int]] 4
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; CHECK-DAG: [[RWBufferTypeInt:%[0-9]+]] = OpTypeImage [[int]] Buffer 2 0 0 2 Unknown {{$}}
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; CHECK-DAG: [[IntBufferPtrType:%[0-9]+]] = OpTypePointer UniformConstant [[RWBufferTypeInt]]
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; CHECK-DAG: [[IntBufferVar]] = OpVariable [[IntBufferPtrType]] UniformConstant
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; CHECK: {{%[0-9]+}} = OpFunction {{%[0-9]+}} DontInline {{%[0-9]+}}
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declare <4 x i32> @get_data() #1
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; CHECK: {{%[0-9]+}} = OpFunction {{%[0-9]+}} DontInline {{%[0-9]+}}
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; CHECK-NEXT: OpLabel
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define void @RWBufferLoad_Vec4_I32() #0 {
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%buffer0 = call target("spirv.Image", i32, 5, 2, 0, 0, 2, 0)
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@llvm.spv.resource.handlefrombinding.tspirv.Image_f32_5_2_0_0_2_0(
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i32 16, i32 7, i32 1, i32 0, i1 false)
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; CHECK: [[data:%[0-9]+]] = OpFunctionCall
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%data = call <4 x i32> @get_data()
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; CHECK: [[buffer:%[0-9]+]] = OpLoad [[RWBufferTypeInt]] [[IntBufferVar]]
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; CHECK: OpImageWrite [[buffer]] [[ten]] [[data]]
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call void @llvm.spv.resource.store.typedbuffer(
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target("spirv.Image", i32, 5, 2, 0, 0, 2, 0) %buffer0, i32 10, <4 x i32> %data)
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ret void
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}
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attributes #0 = { convergent noinline norecurse "frame-pointer"="all" "hlsl.numthreads"="1,1,1" "hlsl.shader"="compute" "no-trapping-math"="true" "stack-protector-buffer-size"="8" }
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attributes #1 = { convergent noinline norecurse "frame-pointer"="all" "no-trapping-math"="true" "stack-protector-buffer-size"="8" }
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