cf3d6fded9
Many tests had this flag removed because of the G_BITCAST emission issue. Now that the PR is merged, we can re-enable this additional check. 2 tests (basic_int_types) just have the TODO removed because they are not useful for SPIR-V as-is: SPIR-V requires reg2mem/mem2reg to run, which removes all the body. Integers are used in other spirv tests, and seems like testing for spirv32/64 and relying on others for the logical target coverage should be fine. Signed-off-by: Nathan Gauër <brioche@google.com>
39 lines
1.2 KiB
LLVM
39 lines
1.2 KiB
LLVM
; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv32-unknown-unknown %s -o - | FileCheck %s
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; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv32-unknown-unknown %s -o - -filetype=obj | spirv-val %}
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; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv64-unknown-unknown %s -o - | FileCheck %s
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; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv64-unknown-unknown %s -o - -filetype=obj | spirv-val %}
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; CHECK: %[[#F32:]] = OpTypeFloat 32
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; CHECK: %[[#F64:]] = OpTypeFloat 64
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define void @main() {
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entry:
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; CHECK: OpConstant %[[#F32]] 0.5
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%f = alloca float, align 4
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store float 5.000000e-01, ptr %f, align 4
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; CHECK: OpConstant %[[#F64]] 0.5
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%d = alloca double, align 8
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store double 5.000000e-01, ptr %d, align 8
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; CHECK: OpConstant %[[#F32]] 1.0000016166037976e-39
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%hexf = alloca float, align 4
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store float 0x37D5C73200000000, ptr %hexf, align 4
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; CHECK: OpConstant %[[#F32]] 0x1p+128
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%inf = alloca float, align 4
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store float 0x7FF0000000000000, ptr %inf, align 4
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; CHECK: OpConstant %[[#F32]] -0x1p+128
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%ninf = alloca float, align 4
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store float 0xFFF0000000000000, ptr %ninf, align 4
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; CHECK: OpConstant %[[#F32]] 0x1.8p+128
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%nan = alloca float, align 4
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store float 0x7FF8000000000000, ptr %nan, align 4
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ret void
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}
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