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llvm-project/llvm/test/CodeGen/SPIRV/transcoding
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Vyacheslav Levytskyy b74d3e179d
[SPIR-V] Specify target environment in tests referring to the BuiltIn WorkgroupSize variable (#122755) 
https://github.com/KhronosGroup/SPIRV-Tools/pull/5407 introduces a check
for WorkgroupSize variable to be a 3-component 32-bit int vector, and
indeed, we see this requirement in
https://registry.khronos.org/vulkan/specs/latest/man/html/WorkgroupSize.html#VUID-WorkgroupSize-WorkgroupSize-04427

However, OpenCL imposes different requirements, documented here:
https://registry.khronos.org/OpenCL/specs/3.0-unified/html/OpenCL_Env.html#_built_in_variables
OpenCL environment requires WorkgroupSize variable to have components of
size_t size that will be 32 or 64 depending on a target. This is the way
how the SPIR-V Backend implements this, by querying pointer size of the
current platform/target.

To allow spirv-val to account target environments difference, this PR
adds `--target-env <env>` to test cases referring to the BuiltIn
WorkgroupSize variable.
2025-01-14 17:44:07 +01:00
..
OpenCL
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atomic_flag.ll
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atomic_load_store.ll
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AtomicCompareExchangeExplicit_cl20.ll
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bitcast-diff-addrspace.ll
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bitcast.ll
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BitReversePref.ll
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block_w_struct_return.ll
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BuildNDRange_2.ll
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BuildNDRange.ll
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builtin_calls.ll
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builtin_vars_arithmetics.ll
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builtin_vars_opt.ll
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builtin_vars.ll
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check_ro_qualifier.ll
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cl-types.ll
[SPIR-V] Overhaul module analysis to improve translation speed and simplify the underlying logics (#120415)
2025-01-07 10:42:23 +01:00
clk_event_t.ll
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ConvertPtr.ll
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DecorationAlignment.ll
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DecorationMaxByteOffset.ll
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DivRem.ll
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enqueue_kernel.ll
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ExecutionMode_SPIR_to_SPIRV.ll
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explicit-conversions.ll
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extract_insert_value.ll
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fadd.ll
[SPIR-V] Rework usage of virtual registers' types and classes (#101732)
2024-08-12 15:49:43 +02:00
fclamp.ll
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fcmp.ll
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fdiv.ll
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fmod.ll
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fmul.ll
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fneg.ll
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fp_contract_reassoc_fast_mode.ll
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frem.ll
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fsub.ll
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get_image_num_mip_levels.ll
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global_block.ll
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GlobalFunAnnotate.ll
[SPIR-V] Improve correctness of emitted MIR between passes for branching instructions (#106966)
2024-09-03 19:02:03 +02:00
group_ops.ll
[SPIR-V] Add implementation of the non-const G_BUILD_VECTOR and fix emission of the OpGroupBroadcast instruction (#103050)
2024-08-14 11:42:48 +02:00
image_get_size_with_access_qualifiers.ll
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image_with_access_qualifiers.ll
[SPIR-V] Rework usage of virtual registers' types and classes (#101732)
2024-08-12 15:49:43 +02:00
isequal.ll
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ldexp.ll
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memcpy-zext.ll
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memory_access.ll
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non32.ll
[SPIR-V] Rework usage of virtual registers' types and classes (#101732)
2024-08-12 15:49:43 +02:00
NoSignedUnsignedWrap.ll
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OpAllAny.ll
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OpBitReverse_i2.ll
[SPIR-V] Mark XFAIL tests which fail with LLVM_ENABLE_EXPENSIVE_CHECKS (#119497)
2024-12-11 14:10:00 -08:00
OpBitReverse_i32.ll
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OpBitReverse_v2i16.ll
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OpBitReverse-subbyte.ll
[SPIR-V] Mark XFAIL tests which fail with LLVM_ENABLE_EXPENSIVE_CHECKS (#119497)
2024-12-11 14:10:00 -08:00
OpConstantBool.ll
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OpConstantSampler.ll
[SPIR-V] Improve general validity of emitted code between passes (#119202)
2024-12-09 21:10:09 +01:00
OpDot.ll
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OpGenericCastToPtr.ll
[SPIR-V] Improve type inference: fix types of return values in call lowering (#116609)
2024-11-29 20:44:25 +01:00
OpGroupAllAny.ll
[SPIR-V] Allow non-const arguments in a Group builtin that requires a boolean argument (#102902)
2024-08-12 17:24:37 +02:00
OpGroupAsyncCopy-strided.ll
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OpGroupAsyncCopy.ll
[SPIR-V] Mark XFAIL tests which fail with LLVM_ENABLE_EXPENSIVE_CHECKS (#119497)
2024-12-11 14:10:00 -08:00
OpGroupBroadcast.ll
[SPIR-V] Specify target environment in tests referring to the BuiltIn WorkgroupSize variable (#122755)
2025-01-14 17:44:07 +01:00
OpImageQuerySize.ll
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OpImageReadMS.ll
[SPIRV] Add reads from image buffer for shaders. (#115178)
2024-11-12 14:04:45 -05:00
OpImageSampleExplicitLod.ll
[SPIR-V] Rework usage of virtual registers' types and classes (#101732)
2024-08-12 15:49:43 +02:00
OpImageWrite.ll
[SPIR-V] Rework usage of virtual registers' types and classes (#101732)
2024-08-12 15:49:43 +02:00
OpMin.ll
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OpPhi_ArgumentsPlaceholders.ll
[SPIR-V] Improve general validity of emitted code between passes (#119202)
2024-12-09 21:10:09 +01:00
OpPtrCastToGeneric.ll
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optional-core-features-multiple.ll
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OpVectorExtractDynamic.ll
[SPIR-V] Mark XFAIL tests which fail with LLVM_ENABLE_EXPENSIVE_CHECKS (#119497)
2024-12-11 14:10:00 -08:00
OpVectorInsertDynamic_i16.ll
[SPIR-V] Rework usage of virtual registers' types and classes (#101732)
2024-08-12 15:49:43 +02:00
readonly.ll
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RelationalOperators.ll
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RelationalOperatorsFUnord.ll
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relationals_double.ll
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relationals_float.ll
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relationals_half.ll
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ReqdSubgroupSize.ll
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SampledImage.ll
[SPIR-V] Overhaul module analysis to improve translation speed and simplify the underlying logics (#120415)
2025-01-07 10:42:23 +01:00
spec_const.ll
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SpecConstantComposite.ll
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spirv-event-null.ll
[SPIR-V] Emit Alignment decoration for alloca instructions and improve type inference (#118520)
2024-12-06 09:59:33 +01:00
spirv-private-array-initialization.ll
[SPIR-V] Overhaul module analysis to improve translation speed and simplify the underlying logics (#120415)
2025-01-07 10:42:23 +01:00
spirv-types.ll
[SPIR-V] Rework usage of virtual registers' types and classes (#101732)
2024-08-12 15:49:43 +02:00
sub_group_ballot.ll
[SPIR-V] Rework usage of virtual registers' types and classes (#104104)
2024-08-22 09:40:27 +02:00
sub_group_clustered_reduce.ll
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sub_group_extended_types.ll
[SPIR-V] Rework usage of virtual registers' types and classes (#101732)
2024-08-12 15:49:43 +02:00
sub_group_non_uniform_arithmetic.ll
[SPIR-V] Overhaul module analysis to improve translation speed and simplify the underlying logics (#120415)
2025-01-07 10:42:23 +01:00
sub_group_non_uniform_vote.ll
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sub_group_shuffle_relative.ll
[SPIR-V] Rework usage of virtual registers' types and classes (#101732)
2024-08-12 15:49:43 +02:00
sub_group_shuffle.ll
[SPIR-V] Rework usage of virtual registers' types and classes (#101732)
2024-08-12 15:49:43 +02:00
TransFNeg.ll
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vec8.ll
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vec_type_hint.ll
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