dianqk 15487238c4

[SPARC] Set how many bytes load from or store to stack slot (#182674) ...

Refer from: https://reviews.llvm.org/D44782

The testcase is copied from
llvm/test/CodeGen/RISCV/stack-slot-coloring.mir.

2026-02-22 20:20:54 +08:00

..

32abi.ll

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64abi.ll

[clang][SPARC] Pass 16-aligned structs with the correct alignment in CC (#155829)

2025-09-26 10:28:10 +07:00

64atomics.ll

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64bit.ll

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64cond.ll

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64spill.ll

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2006-01-22-BitConvertLegalize.ll

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2007-05-09-JumpTables.ll

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2007-07-05-LiveIntervalAssert.ll

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2008-10-10-InlineAsmMemoryOperand.ll

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2008-10-10-InlineAsmRegOperand.ll

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2009-08-28-PIC.ll

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2009-08-28-WeakLinkage.ll

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2011-01-11-Call.ll

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2011-01-11-CC.ll

[SPARC] Use addxccc to do multiword addition when we have VIS3

2025-04-16 08:36:47 +07:00

2011-01-11-FrameAddr.ll

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2011-01-19-DelaySlot.ll

[SPARC] Prevent RESTORE from sourcing from %o7 in call delay slots (#172593)

2026-01-20 17:41:02 -05:00

2011-01-21-ByValArgs.ll

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2011-01-22-SRet.ll

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2011-12-03-TailDuplication.ll

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2012-05-01-LowerArguments.ll

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2013-05-17-CallFrame.ll

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alloca-align.ll

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analyze-branch.ll

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atomicrmw-uinc-udec-wrap.ll

[Sparc] Optimize compare instruction (#167140)

2025-11-14 23:11:38 +07:00

atomics-ordering.ll

[SPARC] Weaken emitted barriers for atomic ops (#154950)

2025-10-08 10:40:25 +09:00

atomics.ll

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basictest.ll

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bigreturn.ll

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bitcast.ll

[SPARC] Use native bitcast instructions when we have VIS3

2025-04-17 23:39:46 +07:00

blockaddr.ll

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branches-relax.ll

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branches-v9.ll

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cast-sret-func.ll

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codemodel.ll

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constpool.ll

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constructor.ll

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ctlz.ll

[Sparc] Optimize compare instruction (#167140)

2025-11-14 23:11:38 +07:00

ctpop.ll

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cttz.ll

[Sparc] Optimize compare instruction (#167140)

2025-11-14 23:11:38 +07:00

data-align.ll

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DbgValueOtherTargets.test

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disable-fsmuld-fmuls.ll

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empty-functions.ll

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exception.ll

Sparc: Improve SETHI and R_SPARC_DISP32 tests

2025-05-05 09:17:27 -07:00

float-constants.ll

[SPARC] Use op-then-halve instructions when we have VIS3

2025-05-23 22:44:05 +07:00

float-ua2007.ll

[SPARC] Use FMA instructions when we have UA2007 (#148434)

2025-08-12 22:46:00 +07:00

float-vis3.ll

[SPARC] Use op-then-halve instructions when we have VIS3

2025-05-23 22:44:05 +07:00

float.ll

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fmuladd-soft-float.ll

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fp16-promote.ll

[SPARC] Properly handle CC for long double on sparc32 (#162226)

2025-11-29 21:30:39 +07:00

fp128-abi.ll

[SPARC] Remove CCIfConsecutiveRegs for f128 returns (#170133)

2025-12-03 15:38:48 -05:00

fp128-select.ll

[Sparc] Optimize compare instruction (#167140)

2025-11-14 23:11:38 +07:00

fp128-split.ll

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fp128.ll

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fshl.ll

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func-addr.ll

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getpcx-call.ll

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getpcx-rdpc.ll

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globals.ll

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half.ll

IR: Remove llvm.convert.to.fp16 and llvm.convert.from.fp16 intrinsics (#174484)

2026-01-21 09:50:28 +00:00

hard-quad-float.ll

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imm.ll

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inline-asm-i-constraint-i1.ll

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inlineasm-bad.ll

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inlineasm-output-template.ll

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inlineasm-v9.ll

[SPARC][IAS] Properly set implied feature sets for ISA levels/extensions (#143232)

2025-06-20 05:12:51 +07:00

inlineasm.ll

[SPARC][IAS] Properly set implied feature sets for ISA levels/extensions (#143232)

2025-06-20 05:12:51 +07:00

leafproc.ll

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LeonCASAInstructionUT.ll

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LeonDetectRoundChangePassUT.ll

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LeonFixAllFDIVSQRTPassUT.ll

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LeonInsertNOPLoadPassUT.ll

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LeonItinerariesUT.ll

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LeonSMACUMACInstructionUT.ll

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lit.local.cfg

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llvm.sincos.ll

[SPARC] Properly handle CC for long double on sparc32 (#162226)

2025-11-29 21:30:39 +07:00

lrint-conv.ll

[Test] Add and update tests for lrint/llrint (NFC) (#152662)

2025-08-12 09:56:51 +09:00

mature-mc-support.ll

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missing-sret.ll

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missinglabel.ll

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mult-alt-generic-sparc.ll

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multiple-div.ll

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multiply-extension.ll

Reapply "[SPARC] Use umulxhi to do extending 64x64->128 multiply when we have VIS3" (#135897) (#136475)

2025-04-22 20:57:56 +07:00

naked-fn-with-frame-pointer.ll

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obj-relocs.ll

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optcompare.ll

[SPARC][NFC] Update optcompare test that always returns false (#170025)

2025-12-05 20:35:03 +07:00

overflow-intrinsic-optimizations.ll

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parts.ll

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pic.ll

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predictable-select.ll

[SPARC] Mark branches as being expensive in early Niagara CPUs (#166489)

2025-11-06 04:32:56 +07:00

private.ll

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readcycle.ll

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reg64.ll

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register-clobber.ll

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rem.ll

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reserved-arg-regs.ll

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reserved-regs-named.ll

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reserved-regs-unavailable.ll

CodeGen: Emit error if getRegisterByName fails (#145194)

2025-06-23 16:33:35 +09:00

reserved-regs.ll

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salvage-debug-isel.ll

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select-mask.ll

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sethiandn.ll

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setjmp.ll

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smulo-128-legalisation-lowering.ll

[Sparc] Optimize compare instruction (#167140)

2025-11-14 23:11:38 +07:00

soft-float.ll

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soft-mul-div.ll

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spill.ll

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spillsize.ll

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sret-secondary.ll

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stack-align.ll

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stack-protector-target.ll

RuntimeLibcalls: Add some tests for OpenBSD stack protectors (#147888)

2025-07-15 15:50:54 +09:00

stack-protector.ll

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stack-slot-coloring.mir

[SPARC] Set how many bytes load from or store to stack slot (#182674)

2026-02-22 20:20:54 +08:00

stackaddress.ll

[Clang] Add __builtin_stack_address (#148281)

2026-01-12 10:01:57 +01:00

tailcall.ll

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thread-pointer.ll

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tls-sp.ll

[Sparc] Remove bogus stack adjustment for LD/GD TLS (#149890)

2025-07-22 16:44:18 +01:00

tls.ll

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tn0009.mir

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tn0010.mir

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tn0011.ll

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tn0012.mir

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tn0013.mir

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trap.ll

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umulo-128-legalisation-lowering.ll

[Sparc] Optimize compare instruction (#167140)

2025-11-14 23:11:38 +07:00

varargs-v8.ll

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varargs.ll

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vector-call.ll

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vector-extract-elt.ll

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zerostructcall.ll

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