Use multiple renderer instances to render faster

This commit is contained in:
shylie 2024-10-17 11:11:06 -04:00
parent dcc4a8215d
commit c499787a5b
16 changed files with 121 additions and 281 deletions

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@ -30,8 +30,8 @@ pull noblock ; get data from memory
mov x, ~osr mov x, ~osr
jmp !x recv_data_start ; check for end of values jmp !x recv_data_start ; check for end of values
mov osr, ~x mov osr, ~x
wait 1 gpio CLK_PIN ; synchronize
wait 0 gpio CLK_PIN ; synchronize wait 0 gpio CLK_PIN ; synchronize
wait 1 gpio CLK_PIN ; synchronize
out pins, 8 ; output data to pins out pins, 8 ; output data to pins
jmp send_data_loop ; keep sending since no null-terminator jmp send_data_loop ; keep sending since no null-terminator
@ -42,13 +42,14 @@ mov osr, x ; set pins to in
out pindirs, 8 ; ... out pindirs, 8 ; ...
set pindirs, 0b01 ; ... set pindirs, 0b01 ; ...
wait 1 gpio REQ_PIN ; wait for data to be ready, indicated by req signal high wait 1 gpio REQ_PIN ; wait for data to be ready, indicated by req signal high
wait 1 gpio CLK_PIN
.wrap_target .wrap_target
in pins, 8 ; read data from pins
push noblock ; write data to memory
wait 0 gpio CLK_PIN ; synchronize wait 0 gpio CLK_PIN ; synchronize
jmp pin start ; stop receiving data if FPGA is done jmp pin start ; stop receiving data if FPGA is done
wait 1 gpio CLK_PIN ; synchronize wait 1 gpio CLK_PIN ; synchronize
in pins, 8 ; read data from pins
push noblock ; ...
.wrap ; otherwise keep receiving data .wrap ; otherwise keep receiving data
% c-sdk { % c-sdk {

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@ -1 +1 @@
create_clock -period 125 [get_ports {clk}] create_clock -period 83.33333 [get_ports {clk}]

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@ -21,6 +21,9 @@
<Source name="../spram.sv" type="Verilog" type_short="Verilog"> <Source name="../spram.sv" type="Verilog" type_short="Verilog">
<Options VerilogStandard="System Verilog"/> <Options VerilogStandard="System Verilog"/>
</Source> </Source>
<Source name="../spram_big.sv" type="Verilog" type_short="Verilog">
<Options VerilogStandard="System Verilog"/>
</Source>
<Source name="../constraints.pdc" type="Physical Constraints File" type_short="PDC"> <Source name="../constraints.pdc" type="Physical Constraints File" type_short="PDC">
<Options/> <Options/>
</Source> </Source>

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@ -1,125 +0,0 @@
#Start recording tcl command: 9/25/2024 13:09:03
#Project Location: C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/mandelbrot; Project name: mandelbrot
prj_create -name "mandelbrot" -impl "impl_1" -dev iCE40UP5K-UWG30ITR -performance "High-Performance_1.2V" -synthesis "synplify"
prj_add_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/top.sv" "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/constraints.sdc" "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/constraints.pdc"
prj_save
prj_remove_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/top.sv"
prj_add_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/top.sv"
prj_remove_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/top.sv"
prj_add_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/mandelbrot/impl_1/top.sv"
prj_remove_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/mandelbrot/impl_1/top.sv"
prj_add_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/mandelbrot/source/impl_1/top.sv"
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_set_device -part iCE40UP5K-SG48I -performance "High-Performance_1.2V"
prj_run Synthesis -impl impl_1
prj_run Map -impl impl_1
prj_run Map -impl impl_1
prj_run Export -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_add_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/spi.sv"
prj_remove_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/spi.sv"
prj_add_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/top.sv"
prj_remove_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/top.sv"
prj_add_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/spi.sv"
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run PAR -impl impl_1
prj_run PAR -impl impl_1
prj_run PAR -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_add_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/xd.sv"
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_remove_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/xd.sv"
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_remove_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/spi.sv"
prj_add_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/spi.sv"
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run Export -impl impl_1
prj_add_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/ram.sv"
prj_disable_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/ram.sv"
prj_enable_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/ram.sv"
prj_remove_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/ram.sv"
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_remove_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/spi.sv"
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
#Stop recording: 9/28/2024 08:14:03

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@ -1,5 +0,0 @@
#Start recording tcl command: 10/2/2024 09:00:03
#Project Location: C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/mandelbrot; Project name: mandelbrot
prj_open "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/mandelbrot/mandelbrot.rdf"
prj_add_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/ram.sv"
#Stop recording: 10/2/2024 10:22:38

View File

@ -1,56 +0,0 @@
#Start recording tcl command: 10/2/2024 11:19:00
#Project Location: C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/mandelbrot; Project name: mandelbrot
prj_open "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/mandelbrot/mandelbrot.rdf"
prj_run Synthesis -impl impl_1
prj_run Synthesis -impl impl_1
prj_run PAR -impl impl_1
prj_run Synthesis -impl impl_1
prj_run Synthesis -impl impl_1
prj_run Synthesis -impl impl_1
prj_run Synthesis -impl impl_1
prj_run Synthesis -impl impl_1
prj_run Map -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_add_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/color_converter.sv"
prj_remove_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/color_converter.sv"
prj_add_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/framebuffer.sv"
prj_run PAR -impl impl_1
prj_run Synthesis -impl impl_1
prj_run Synthesis -impl impl_1
prj_run Synthesis -impl impl_1
prj_run Synthesis -impl impl_1
prj_run Synthesis -impl impl_1
prj_run Synthesis -impl impl_1
prj_run Synthesis -impl impl_1
prj_run Map -impl impl_1
prj_run Synthesis -impl impl_1
prj_run Synthesis -impl impl_1
prj_run Synthesis -impl impl_1
prj_run Synthesis -impl impl_1
prj_run Synthesis -impl impl_1
prj_run Synthesis -impl impl_1
prj_run Synthesis -impl impl_1
prj_run Synthesis -impl impl_1
prj_run Synthesis -impl impl_1
prj_run Synthesis -impl impl_1
prj_run Synthesis -impl impl_1
prj_run Synthesis -impl impl_1
prj_run Synthesis -impl impl_1
prj_run Export -impl impl_1
prj_run Synthesis -impl impl_1
#Stop recording: 10/3/2024 13:39:06

View File

@ -1,20 +0,0 @@
#Start recording tcl command: 10/3/2024 13:54:22
#Project Location: C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/mandelbrot; Project name: mandelbrot
prj_open "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/mandelbrot/mandelbrot.rdf"
prj_add_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/fifo.sv"
prj_remove_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/fifo.sv"
prj_add_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/xd.sv"
prj_run Synthesis -impl impl_1
prj_run Synthesis -impl impl_1
prj_run Map -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run Synthesis -impl impl_1
prj_run Export -impl impl_1
prj_set_impl_opt -impl "impl_1" "top" "top"
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_remove_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/xd.sv"
prj_remove_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/framebuffer.sv"
prj_add_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/fifo.sv"
#Stop recording: 10/4/2024 11:42:21

View File

@ -1,9 +0,0 @@
#Start recording tcl command: 10/4/2024 13:54:24
#Project Location: C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/mandelbrot; Project name: mandelbrot
prj_open "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/mandelbrot/mandelbrot.rdf"
prj_remove_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/fifo.sv"
prj_run Synthesis -impl impl_1
prj_add_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/coords.sv"
prj_add_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/mandelbrot/source/impl_1/renderer.sv"
prj_add_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/mandelbrot/source/impl_1/multiplier.sv"
#Stop recording: 10/4/2024 15:15:04

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@ -1,22 +0,0 @@
#Start recording tcl command: 10/7/2024 10:43:02
#Project Location: C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/mandelbrot; Project name: mandelbrot
prj_open "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/mandelbrot/mandelbrot.rdf"
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
#Stop recording: 10/8/2024 13:39:09

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@ -1,3 +1,7 @@
<?xml version="1.0" encoding="UTF-8"?> <?xml version="1.0" encoding="UTF-8"?>
<userSetting name="C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/mandelbrot/promote.xml" version="Diamond (64-bit) 2024.1.0.34.2" date="Wed Oct 09 15:10:53 2024" vendor="Lattice Semiconductor Corporation" > <userSetting name="C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/mandelbrot/promote.xml" version="Diamond (64-bit) 2024.1.0.34.2" date="Thu Oct 17 11:04:30 2024" vendor="Lattice Semiconductor Corporation" >
<msg mid="35921504" type="Info" internal="true" />
<msg mid="35901328" type="Info" internal="true" />
<msg mid="35901209" type="Warning" internal="true" />
<msg mid="35931002" type="Warning" internal="true" />
</userSetting> </userSetting>

View File

@ -1,7 +1,7 @@
module renderer module renderer
#( #(
parameter ITERATIONS = 127, parameter ITERATIONS = 220,
parameter OUTPUT_WIDTH = 7, parameter OUTPUT_WIDTH = 8,
localparam ITERATION_WIDTH = $clog2(ITERATIONS + 1), localparam ITERATION_WIDTH = $clog2(ITERATIONS + 1),
localparam SHIFT_AMOUNT = ITERATION_WIDTH - OUTPUT_WIDTH, localparam SHIFT_AMOUNT = ITERATION_WIDTH - OUTPUT_WIDTH,
localparam FRACTION_BITS = 13 localparam FRACTION_BITS = 13

View File

@ -107,9 +107,9 @@ int main(int argc, char** argv, char** env)
if (!dut->req || done) { continue; } if (!dut->req || done) { continue; }
framebuffer[current] = dut->data; framebuffer[current++] = dut->data;
if (++current == H_RES * V_RES * 2) if (current == H_RES * V_RES * 2)
{ {
current = 0; current = 0;
SDL_UpdateTexture(sdl_texture, nullptr, framebuffer, H_RES * 2); SDL_UpdateTexture(sdl_texture, nullptr, framebuffer, H_RES * 2);

View File

@ -7,6 +7,8 @@ module top
inout wire [7:0] data inout wire [7:0] data
); );
localparam RENDER_COUNT = 4;
reg req_last; reg req_last;
reg [7:0] waddr; reg [7:0] waddr;
@ -16,35 +18,83 @@ wire [7:0] command;
ram command_buffer(.wclk(clk), .rclk(clk), .waddr(waddr), .raddr(raddr), .data_in(data), .write_en(dir && req), .data_out(command)); ram command_buffer(.wclk(clk), .rclk(clk), .waddr(waddr), .raddr(raddr), .data_in(data), .write_en(dir && req), .data_out(command));
wire [6:0] iters; wire [7:0] iters[RENDER_COUNT];
wire [7:0] x[1]; wire [7:0] x[RENDER_COUNT];
wire [7:0] y[1]; wire [7:0] y[RENDER_COUNT];
wire [RENDER_COUNT-1:0] renderer_done;
reg [RENDER_COUNT-1:0] renderer_done_r;
wire coords_fin; wire coords_fin;
wire coords_inc; reg coords_inc;
reg coords_inc_last; reg coords_inc_last;
reg coords_fin_last; reg [5:0] coords_fin_last;
renderer r(.clk(clk), .rst(dir), .start(!dir && !coords_fin), .x(x[0]), .y(y[0]), .cx(16'h1000), .cy(16'h2000), .zoom(3'd6), .done(coords_inc), .iters(iters)); genvar ri;
coords #(.POS_COUNT(1)) coords_inst(.clk(clk), .rst(dir), .inc(coords_inc), .x(x), .y(y), .finished(coords_fin)); generate
for (ri = 0; ri < RENDER_COUNT; ri = ri + 1) begin
renderer r(.clk(clk), .rst(dir), .start(!dir && !coords_fin && !renderer_done[ri] && !renderer_done_r[ri]), .x(x[ri]), .y(y[ri]), .cx(15'h1000), .cy(15'h2000), .zoom(3'd6), .done(renderer_done[ri]), .iters(iters[ri]));
end
endgenerate
coords #(.POS_COUNT(RENDER_COUNT)) coords_inst(.clk(clk), .rst(dir), .inc(coords_inc), .x(x), .y(y), .finished(coords_fin));
wire fb_clk; wire fb_clk;
reg [15:0] fb_addr; reg [16:0] fb_addr;
wire fb_we; wire fb_we;
wire [15:0] fb_data_out; wire [15:0] fb_data_out;
reg [15:0] fb_data_out_last;
reg fb_half_out; reg fb_half_out;
spram_big fb(.clk(fb_clk), .we({ fb_we, fb_we, fb_we, fb_we }), .addr(fb_addr), .data_in({ 8'd128, 8'(iters) + 8'd62 }), .data_out(fb_data_out)); spram_big fb
(
.clk(fb_clk),
.we
({
{ fb_we, fb_we, fb_we, fb_we },
{ fb_we, fb_we, fb_we, fb_we },
{ fb_we, fb_we, fb_we, fb_we },
{ fb_we, fb_we, fb_we, fb_we }
}),
.addr(fb_addr[15:0]),
.data_in
({
{ 8'd128, iters[0] + 8'd16 },
{ 8'd128, iters[1] + 8'd16 },
{ 8'd128, iters[2] + 8'd16 },
{ 8'd128, iters[3] + 8'd16 }
}),
.data_out(fb_data_out)
);
always_ff @(posedge clk) begin always_ff @(posedge clk) begin
req_last <= req; req_last <= req;
coords_fin_last <= coords_fin && !dir; coords_fin_last[5:1] <= coords_fin_last[4:0];
coords_fin_last[0] <= coords_fin && !dir;
coords_inc_last <= coords_inc && !dir; coords_inc_last <= coords_inc && !dir;
if (dir) begin
renderer_done_r <= '0;
end else begin
integer i;
for (i = 0; i < RENDER_COUNT; i = i + 1) begin
if (renderer_done[i]) begin
renderer_done_r[i] <= 1;
end
end
if (renderer_done_r == '1) begin
renderer_done_r <= '0;
coords_inc <= 1;
end else begin
coords_inc <= 0;
end
end
if (dir) begin if (dir) begin
raddr <= 0; raddr <= 0;
fb_addr <= 0; fb_addr <= 0;
@ -56,25 +106,26 @@ always_ff @(posedge clk) begin
waddr <= 0; waddr <= 0;
end end
end else if (coords_fin) begin end else if (coords_fin) begin
if (!coords_fin_last) begin if (!coords_fin_last[0] || !coords_fin_last[1]) begin
fb_addr <= 0; fb_addr <= 0;
fb_half_out <= 0; fb_half_out <= 0;
end else begin end else begin
fb_half_out <= !fb_half_out; fb_half_out <= !fb_half_out;
if (fb_half_out) begin if (fb_half_out) begin
fb_data_out_last <= fb_data_out;
fb_addr <= fb_addr + 1; fb_addr <= fb_addr + 1;
end end
end end
end else if (coords_inc_last) begin end else if (coords_inc_last) begin
fb_addr <= fb_addr + 1; fb_addr <= fb_addr + RENDER_COUNT;
end end
end end
assign fb_clk = clk; assign fb_clk = clk;
assign fb_we = coords_inc; assign fb_we = coords_inc && !coords_fin;
assign fin = !dir && coords_fin && coords_fin_last && fb_addr >= 65531; assign fin = !dir && coords_fin_last[5] && fb_addr >= 65536;
assign req = dir ? 'Z : coords_fin_last; assign req = dir ? 'Z : coords_fin_last[5];
assign data = dir ? 'Z : (fb_half_out ? fb_data_out[15:8] : fb_data_out[7:0]); assign data = dir ? 'Z : (fb_half_out ? fb_data_out_last[15:8] : fb_data_out_last[7:0]);
endmodule endmodule

View File

@ -7,28 +7,25 @@ module spram
output wire [15:0] data_out output wire [15:0] data_out
); );
SP256K bb_spram_inst(.AD(addr), .DI(data_in), .MASKWE(we), .WE(|we), .CS('1), .CK(clk), .STDBY('0), .SLEEP('0), .PWROFF_N('1), .DO(data_out)); `ifdef VERILATOR
reg [15:0] mem[16384];
endmodule reg [15:0] data_out_r;
module spram_big always_ff @(posedge clk) begin
( integer i;
input wire clk,
input wire [3:0] we,
input wire [15:0] addr,
input wire [15:0] data_in,
output wire [15:0] data_out
);
wire [15:0] datas_out[4];
genvar i;
generate
for (i = 0; i < 4; i = i + 1) begin for (i = 0; i < 4; i = i + 1) begin
spram spram_inst(.clk(clk), .we(addr[15:14] == i ? we : '0), .addr(addr[13:0]), .data_in(data_in), .data_out(datas_out[i])); if (we[i]) begin
mem[addr][(3+4*i)+:4] <= data_in[(3+4*i)+:4];
end
end end
endgenerate
assign data_out = datas_out[addr[15:14]]; data_out_r <= mem[addr];
end
assign data_out = data_out_r;
`else
SP256K bb_spram_inst(.AD(addr), .DI(data_in), .MASKWE(we), .WE(|we), .CS('1), .CK(clk), .STDBY('0), .SLEEP('0), .PWROFF_N('1), .DO(data_out));
`endif
endmodule endmodule

21
ice/spram_big.sv Normal file
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@ -0,0 +1,21 @@
module spram_big
(
input wire clk,
input wire [3:0] we[4],
input wire [15:0] addr,
input wire [15:0] data_in[4],
output wire [15:0] data_out
);
wire [15:0] datas_out[4];
genvar i;
generate
for (i = 0; i < 4; i = i + 1) begin
spram spram_inst(.clk(clk), .we(we[i]), .addr(addr[15:2]), .data_in(data_in[i]), .data_out(datas_out[i]));
end
endgenerate
assign data_out = datas_out[addr[1:0]];
endmodule

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@ -30,7 +30,7 @@ int main()
ice_led_init(); ice_led_init();
ice_usb_init(); ice_usb_init();
ice_fpga_init(8); ice_fpga_init(4);
ice_fpga_start(); ice_fpga_start();
gpio_pull_up(DIR_PIN); gpio_pull_up(DIR_PIN);