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2,994 Commits 81 Branches 74 Tags 83 MiB
7d73a5d320
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756 Commits

Author SHA1 Message Date
Christophe Riccio
7d73a5d320 Fixed test 2016-09-11 13:32:51 +02:00
Christophe Riccio
8a54ba3462 Added GTC_color_encoding 2016-09-11 02:50:08 +02:00
Christophe Riccio
d029db8ac0 Merge 0.9.8 2016-09-02 01:46:56 +02:00
Christophe Riccio
a609a0fea6 - Added more information to build messages 2016-09-02 00:30:37 +02:00
Christophe Riccio
10dc67e2b5 - Added GLM_FORCE_UNRESTRICTED_GENTYPE allowing non basic genType #543 2016-09-01 23:32:12 +02:00
Christophe Riccio
f71171d49b Fixed 32-bits build #528 #529, fixed VC 32 bits crash 2016-08-07 12:43:38 +02:00
Christophe Riccio
0dbdf3fad4 Fixed 32-bits build #528 #529, fixed VC 32 bits crash 2016-08-07 12:42:45 +02:00
Christophe Riccio
55d7fa2775 Merge branch '0.9.8' 2016-08-06 19:28:34 +02:00
Christophe Riccio
edc328c7c9 Fixed GTX_wrap #534, improved GTX_wrap for SIMD friendliness 2016-08-06 19:28:16 +02:00
Christophe Riccio
ecc91d4361 Merge 0.9.8 branch 2016-07-17 11:52:15 +02:00
Christophe Riccio
4ab9776756 Fixed build error 2016-07-17 03:43:56 +02:00
Christophe Riccio
8c8c8367e3 Improved aligned types support 2016-07-17 03:37:24 +02:00
Christophe Riccio
b3d57f2cc9 Improved aligned types support 2016-07-17 03:06:58 +02:00
Christophe Riccio
eb20cdc6ae Added precision qualifier tests 2016-07-17 02:17:25 +02:00
Christophe Riccio
48ab7db993 Merge branch '0.9.8' 2016-07-17 01:13:47 +02:00
Christophe Riccio
dc89797275 - Added quaternion version of isnan and isinf #521 2016-07-17 01:02:30 +02:00
Christophe Riccio
630f0840f2 Removed 0.9.8 deprecated extensions 2016-07-16 23:46:41 +02:00
Christophe Riccio
7eb0adb7a5 Clean up 2016-07-16 23:41:50 +02:00
Christophe Riccio
6a6b54b699 Fixed long long warnings, fixed precision qualifier values on Clang where qualifiers had the same values 2016-07-16 22:34:07 +02:00
Christophe Riccio
6271aa1530 Merged 0.9.7 branch, Factorized GLM_COMPILER_LLVM and GLM_COMPILER_APPLE_CLANG into GLM_COMPILER_CLANG 2016-07-16 00:54:05 +02:00
Christophe Riccio
76fce77337 - Updated list of compiler versions detected 2016-07-15 23:49:20 +02:00
Christophe Riccio
6e9b524be1 Fixed matrix functions using SIMD code on unaligned types #518 2016-07-14 15:21:45 +02:00
Christophe Riccio
b8b43e6a4d Added GTC_functions extension 2016-07-14 15:20:44 +02:00
Christophe Riccio
0e1e181484 Clean up 2016-06-10 23:14:17 +02:00
Christophe Riccio
4155e5b820 Workaround GCC build with GLM_FORCE_PURE defined 2016-06-02 02:54:05 +02:00
Christophe Riccio
731a263325 Fixed bitcount build errors 2016-06-02 02:32:54 +02:00
Christophe Riccio
5fdca07eee Clean up 2016-06-02 01:01:36 +02:00
Christophe Riccio
fd4ada5843 Support aligned *vec* even when SIMD isn't enabled 2016-06-02 00:33:55 +02:00
Christophe Riccio
41984e42ab Added GTC_type_aligned with aligned *vec* types 2016-06-01 00:43:35 +02:00
Christophe Riccio
688756b3e2 SIMD matrix functions optimizations 2016-05-30 18:01:06 +02:00
Christophe Riccio
52f8ecd973 Added AVX optimizations and equal tests 2016-05-30 14:23:58 +02:00
Christophe Riccio
9ed2a9601b Adde vec4 swizzle operators SIMD optimizations 2016-05-30 02:00:32 +02:00
Christophe Riccio
b9199a2c1a Refactoring of swizzle operators, preparing for vec4 swizzle SIMD optimizations 2016-05-30 01:39:16 +02:00
Christophe Riccio
28cb770d14 SIMD common functions optimizations 2016-05-29 19:14:39 +02:00
Christophe Riccio
42d86b8955 Fixed exponential low level API 2016-05-29 03:14:19 +02:00
Christophe Riccio
20cf68679c SIMD sqrt optimizations including lowp 2016-05-29 02:57:53 +02:00
Christophe Riccio
7fe2f5fe65 Renamed instruction set flags 2016-05-28 19:26:59 +02:00
Christophe Riccio
d33e3df02a Fixed SIMD code path selection 2016-05-28 18:24:39 +02:00
Christophe Riccio
ab159770b3 mad optimizations, fixed build 2016-05-28 17:12:48 +02:00
Christophe Riccio
fdec412ff7 Added FMA SIMD optimization 2016-05-28 12:31:43 +02:00
Christophe Riccio
a9fefc7300 Added vec4 SIMD contructor specialization 2016-05-28 01:33:29 +02:00
Christophe Riccio
f577611328 Added bitwise inverse SIMD optimization. Factorized bitwise optimization code 2016-05-27 23:03:38 +02:00
Christophe Riccio
4797ea9540 Added specialized SSE2 and AVX bool mix 2016-05-26 02:47:43 +02:00
Christophe Riccio
72c741d8ea Fixed sign with signed integer function on non-x86 architecture 2016-05-24 13:29:18 +02:00
Christophe Riccio
757fe39587 Removed simd precision qualifier. All precision qualifiers may generate SIMD instructions, precision may affect the generated instructions accordingly 2016-05-22 17:12:32 +02:00
Christophe Riccio
93612791cd Removed Apple specific check for LLVM versions 2016-05-04 18:46:59 +02:00
Christophe Riccio
affd5f3ba0 Fixed CUDA compiler error in type_vec4.inl #504 2016-05-04 16:35:57 +02:00
Christophe Riccio
1f71f6fb3a Improved SIMD and swizzle operators interactions with GCC and Clang, Added raw SIMD API. 2016-05-03 23:57:41 +02:00
Christophe Riccio
1becd76c5f Fixed build 2016-05-01 12:39:16 +02:00
Christophe Riccio
96963f88cc Single file for simd specialization 2016-05-01 05:00:13 +02:00