514994 Commits

Author SHA1 Message Date
Michael Maitland
c2c4db8d8f
[RISCV][VLOPT] Add support for 11.11 div instructions (#112201)
This adds support for these instructions and also tests getOperandInfo
for these instructions as well.
2024-10-14 14:44:33 -04:00
Michael Maitland
82e89c0271
[RISCV][VLOPT] Add support for 11.9 min/max instructions (#112198)
This adds support for these instructions and also tests getOperandInfo
for these instructions as well.
2024-10-14 14:43:56 -04:00
Sasha Lopoukhine
36a405519b
[mlir][SCF] Multiply lower bound in loop range folding (#111875)
Fixes #83482
2024-10-14 20:15:12 +02:00
Shourya Goel
8906bff5ab
[libc][complex] Silence pedantic warning (#112239)
Fix buildbot errors due to #111659
2024-10-14 14:11:01 -04:00
ChiaHungDuan
53c9553562
[scudo] Apply the min release threshold to the group (#112014)
For the block smaller than a page size, one block is unlikely to
introduce more unused pages (at most 2 if it acrosses the page boundary
and both touched pages are unused). So it's better to apply the
threshold to reduce the time of scanning groups that can't release any
new pages.
2024-10-14 10:46:12 -07:00
Yuta Saito
d4efc3e097
[Coverage][WebAssembly] Add initial support for WebAssembly/WASI (#111332)
Currently, WebAssembly/WASI target does not provide direct support for
code coverage.
This patch set fixes several issues to unlock the feature. The main
changes are:

1. Port `compiler-rt/lib/profile` to WebAssembly/WASI.
2. Adjust profile metadata sections for Wasm object file format.
- [CodeGen] Emit `__llvm_covmap` and `__llvm_covfun` as custom sections
instead of data segments.
    - [lld] Align the interval space of custom sections at link time.
- [llvm-cov] Copy misaligned custom section data if the start address is
not aligned.
    - [llvm-cov] Read `__llvm_prf_names` from data segments
3. [clang] Link with profile runtime libraries if requested

See each commit message for more details and rationale.
This is part of the effort to add code coverage support in Wasm target
of Swift toolchain.
2024-10-15 02:41:43 +09:00
Michael Maitland
2f077ece2f [RISCV][VLOPT] Enable VLOptimizer for vl-opt.ll test file 2024-10-14 10:36:06 -07:00
Shourya Goel
f4ba6a654d
[libc][complex] Set up headers and add documentation for complex.h. (#111659)
Refer: 7.3.1 from [ISO
SPEC](https://www.open-std.org/jtc1/sc22/wg14/www/docs/n3220.pdf)

I have added complex variants of F16 and F128 in libc doc but have
omitted support for them since we will have to first investigate how
their support matrix for clang and gcc looks like, and then add header
guards for them accordingly. Planning to add them in follow up PRs once
this gets landed.
2024-10-14 13:35:04 -04:00
Amir Ayupov
3c4f00905e
[BOLT] Support perf2bolt-N in the driver
Check invoked tool with `starts_with`.

Addresses the issue where `perf2bolt` invoked using a distro symlink
`perf2bolt-16` fails to run in perf2bolt mode and runs in llvm-bolt mode
instead.

The issue is mentioned in https://vondra.me/posts/playing-with-bolt-and-postgres/

Test Plan:
```
ln -sf perf2bolt perf2bolt-20
perf2bolt-20 clang -p perf.data -o fdata.clang -w yaml.clang
...
PERF2BOLT: wrote 188593 objects and 0 memory objects to fdata.clang
```

Reviewers: ayermolo, rafaelauler, dcci, maksfb

Reviewed By: maksfb

Pull Request: https://github.com/llvm/llvm-project/pull/111072
2024-10-14 10:17:31 -07:00
Pavel Labath
a89e01634f
[lldb] Improve unwinding for discontinuous functions (#111409)
Currently, our unwinder assumes that the functions are continuous (or at
least, that there are no functions which are "in the middle" of other
functions). Neither of these assumptions is true for functions optimized
by tools like propeller and (probably) bolt.

While there are many things that go wrong for these functions, the
biggest damage is caused by the unwind plan caching code, which
currently takes the maximalist extent of the function and assumes that
the unwind plan we get for that is going to be valid for all code inside
that range. If a part of the function has been moved into a "cold"
section, then the range of the function can be many megabytes, meaning
that any function within that range will probably fail to unwind.

We end up with this maximalist range because the unwinder asks for the
Function object for its range. This is only one of the strategies for
determining the range, but it is the first one -- and also the most
incorrect one. The second choice would is asking the eh_frame section
for the range of the function, and this one returns something reasonable
here (the address range of the current function fragment) -- which it
does because each fragment gets its own eh_frame entry (it has to,
because they have to be continuous).

With this in mind, this patch moves the eh_frame (and debug_frame) to
the front of the queue. I think that preferring this range makes sense
because eh_frame is one of the unwind plans that we return, and some
others (augmented eh_frame) are based on it. In theory this could break
some functions, where the debug info and eh_frame disagree on the extent
of the function (and eh_frame is the one who's wrong), but I don't know
of any such scenarios.
2024-10-14 18:56:37 +02:00
Michael Marjieh
b5600c6f85
[TargetLowering][SelectionDAG] Exploit nneg Flag in UINT_TO_FP (#108931)
1. Propagate the nneg flag in WidenVecRes
2. Use SINT_TO_FP in expandUINT_TO_FP when possible.
2024-10-14 20:55:48 +04:00
Keith Smiley
c79e5acfe8
[clang-tidy][readability-identifier-naming] Support namespace aliases (#112112)
Fixes: https://github.com/llvm/llvm-project/issues/109385
2024-10-14 09:35:20 -07:00
Keith Smiley
39ac8b25cd
[clang][GNU] Pass -t through to the linker (#112106) 2024-10-14 09:24:42 -07:00
c8ef
ab6ec7ab14
[clang] Mark __builtin_convertvector and __builtin_shufflevector as constexpr. (#112129)
Closes #107985.

LanguageExtensions.rst states that `__builtin_shufflevector` and
`__builtin_convertvector` can be evaluated as constants, but this is not
reflected in Butiltins.td. This patch aligns these two.
2024-10-15 00:09:36 +08:00
Erich Keane
cf456ed2a4
[OpenACC] implement loop 'worker' clause. (#112206)
The worker clause specifies iterations of the loop/ that are executed in
parallel by distributing the iterations among the multiple works within
a single gang.

The sema rules for this type are simply that it cannot be combined with
a `kernel` construct with a `num_workers` clause, child `loop` clauses
cannot contain a `gang` or `worker` clause, and that the argument is oly
allowed when associated with a `kernel`.
2024-10-14 09:08:24 -07:00
Doug Wyatt
cef66aa04d
[Clang] Diagnose additional ObjC statements as function effect violations (#112148)
Bug fix: `@autoreleasepool`, `@synchronized`, and `@finally` were not
being noticed and treated as function effect violations.

---------

Co-authored-by: Doug Wyatt <dwyatt@apple.com>
2024-10-14 17:49:30 +02:00
Shilei Tian
a74659445d
[AMDGPU] Skip terminators when forcing emit zero flag (#112116)
When forcing emit zero, we need to skip terminators of a MBB; otherwise
the terminator list of the MBB would be broken.
2024-10-14 11:46:18 -04:00
Michael Maitland
a31e834ba8 [RISCV][VLOPT] Update test cases to use riscv-enable-vl-optimizer and better formatting 2024-10-14 08:44:16 -07:00
Aaron Ballman
8e5aa538ca
[C2y] Add test coverage for N3298 (#112033)
This paper adds 'i' and 'j' as suffixes for forming a _Complex constant.
This feature has been supported in Clang since at least Clang 3.0, so
only test coverage is needed.

It does remove -Wgnu-imaginary-constant in C mode (still used in C++
mode) because the feature is now a C2y feature rather than a GNU one.
2024-10-14 11:40:10 -04:00
Thomas Fransham
09fa2f012f
[Clang] Add explicit visibility symbol macros (#108276)
This is part of the effort to support for enabling plugins on windows by
adding better support for building llvm and clang as a DLL. These macros
are similar to the ones i added in #96630, but are for clang.
Added explicit symbol visibility macros definitions that are defined in
a new header and will be used to for shared library builds of clang to
export
symbols. 
Updated clang cmake to define a macro to enable the symbol visibility
macros and explicitly disable them for clang tools that always use
static linking.

---------

Co-authored-by: Aaron Ballman <aaron@aaronballman.com>
2024-10-14 18:32:50 +03:00
David Spickett
eb83e4abd6 [llvm][llvm-lit] Fix typo in --resultdb-output help 2024-10-14 15:12:40 +00:00
Benjamin Kramer
7900daaa7b [MLIR] Fix parseInteger(uint64_t) for large values
This is a regression from e692af85966903614d470a7742ed89d124baf1a6
2024-10-14 17:07:27 +02:00
Alexey Bataev
ab902ee54a [SLP][NFC]Replace more unreachable terminators by rets, NFC 2024-10-14 07:50:07 -07:00
Albert Huang
aa2c0f35a1
[ARM] [AArch32] Add support for Arm China STAR-MC1 CPU (#110085)
STAR-MC1 is an Armv8m CPU.

Technical specifications available at:

https://www.armchina.com/download/Documents/Application-Notes/Technical-Reference-Manual?infoId=160
2024-10-14 15:48:12 +01:00
Tarun Prabhu
839344f025
[clang][flang][mlir] Reapply "Support -frecord-command-line option (#102975)"
The underlying issue was caused by a file included in two different
places which resulted in duplicate definition errors when linking
individual shared libraries. This was fixed in c3201ddaeac02a2c86a38b
[#109874].
2024-10-14 08:44:24 -06:00
Jay Foad
cbc4be2dd5 [AMDGPU] Use MachineInstr::mayLoadOrStore. NFC. 2024-10-14 15:37:56 +01:00
pkarveti
81fee740d0
[Hexagon] Mark instructions as part of the frame setup to fix test sugared-constants.ll (#111795)
Added .setMIFlag(MachineInstr::FrameSetup) to all BuildMI calls in
HexagonFrameLowering::insertAllocframe. This change ensures that the
test sugared-constants.ll passes upstream by correctly marking
instructions as part of the frame setup.
2024-10-14 09:27:55 -05:00
Rahul Joshi
84b99b4b1e
[NFC][CodingStandard] Extend if-else brace example with else-if (#112193)
Extend example to document that single statement `else if` needs a brace
as well if the associated `if` needs a brace.
2024-10-14 07:20:39 -07:00
Durgadoss R
a8b5115441
[MLIR][NVGPU] Fix the cga_cluster.mlir test (#112191)
This patch fixes the sm90 cluster test by:
* Fixing a typo in LowerGpuOpsToNVVMOps where one of the ClusterDim Op
   conversion pattern should actually be for the
   ClusterDimBlocks Op. This addresses the compilation error for this test.
* The grid-size should be (4,4,1) instead of (2,2,1). This passes the
   scf-if check against the threshold of 3 below and actually
   generates the required prints from the GPU.

Signed-off-by: Durgadoss R <durgadossr@nvidia.com>
2024-10-14 19:44:13 +05:30
Jonathan Thackray
ddb64e62bd
[AArch64] Add support for Armv9.6-A FEAT_MPAM system registers (#111822)
Add support for Armv9.6-A FEAT_MPAM system registers as documented here:

https://developer.arm.com/documentation/ddi0601/2024-09/AArch64-Registers
2024-10-14 15:13:09 +01:00
Jonas Devlieghere
3dedcab6d9
[lldb] Make the system log a NOOP on Windows (#112052)
Windows doesn't have a built-in system log. Previously we got away with
writing to stdout and stderr because it was used only sporadically. As
we're trying to make the system log more useful on the other platforms,
the increased use become a concern. Make it a NOOP until someone figures
out a reasonable alternative.
2024-10-14 15:02:02 +01:00
Alexey Bataev
91a0fecf19 [SLP][NFC]Replace unreachable instructions by rets, NFC. 2024-10-14 07:00:56 -07:00
Nico Weber
b53186f93c [gn build] Port 8f9cce0bef31 2024-10-14 09:58:26 -04:00
sstwcw
253ff32724
[clang-format] Stop crashing when formatting Verilog (#112043)
The part of the code for parsing Verilog module instantiations
dereferenced a pointer without checking for null pointer. The pointer
may be null if the input is not complete and a line starts with a comma.
2024-10-14 13:57:35 +00:00
Kazu Hirata
9c64b5e759
[ARM] Simplify code with std::map::operator[] (NFC) (#112159) 2024-10-14 06:56:39 -07:00
Kazu Hirata
ef436f3f60
[mlir] Avoid repeated hash lookups (NFC) (#112158) 2024-10-14 06:55:30 -07:00
Kazu Hirata
23c834092e
[BOLT] Avoid repeated set lookups (NFC) (#112157) 2024-10-14 06:55:04 -07:00
Kazu Hirata
4459a9b643
[Sema] Avoid repeated hash lookups (NFC) (#112156) 2024-10-14 06:54:32 -07:00
Simon Pilgrim
d81c2f16a3 [X86] canCreateUndefOrPoisonForTargetNode - X86ISD::VPERMV3 shuffles don't create undef/poison
The operands might contain an undef/poison element, but the shuffle node itself will not create one by itself.

Improves test case from #109272
2024-10-14 14:54:03 +01:00
Simon Pilgrim
fd8a4b0073 [X86] combineAndnp - fold ANDN(SEXT(SETCC()),X) -> SELECT(NOT(SETCC()),X,0) on AVX512 targets
Reverse the generic foldVSelectToSignBitSplatMask fold on AVX512 targets where we can use the SETCC result directly in predicated moves/instructions.

Fixes #109272
2024-10-14 14:54:03 +01:00
Kazu Hirata
c765b5eda7
[AST] Avoid repeated set lookups (NFC) (#112155) 2024-10-14 06:53:49 -07:00
Akshat Oke
cd6c2b80be
[NewPM][CodeGen] Port StackColoring to NPM (#111812) 2024-10-14 19:23:34 +05:30
c8ef
a3b0c31ebc
Revert "[DAG] Enhance SDPatternMatch to match integer minimum and maximum patterns in addition to the existing ISD nodes." (#112200)
Reverts llvm/llvm-project#111774

This appears to be causing some tests to fail.
2024-10-14 21:43:49 +08:00
Aaron Ballman
c2d8112f71 Silence a "not all control paths return a value" diagnostic; NFC 2024-10-14 09:41:42 -04:00
Raghu Maddhipatla
8a7a7a46d0
[Flang] [Semantics] [OpenMP] Fix semantic check to not report error for compound OMP TARGET directives. (#112059)
For test program like this variable array is mentioned in both shared
clause and map clause. For OMP TARGET compound directives like this
where we have OMP TARGET TEAMS, map clause applies to TARGET directive
and SHARED clause applies to TEAMS directive. So both SHARED and MAP
clauses can co-exist.

> program test
> implicit none
>   integer :: array(10,10),i,j
>     !$omp target teams shared(array) map(tofrom:array)
>       do i=1,10
>       !$omp parallel do
>         do j=1,10
>           array(j,i)=i+j
>         end do
>       end do
>   !$omp end target teams
>   print *, array
> end program test
> 
> 

Before this PR we were checking for exclusivity for all target
directives set which is now relaxed to exclusivity check not being
applied to compound directives which can accept SHARED clause.
2024-10-14 08:39:25 -05:00
c8ef
11f625cb87
[DAG] Enhance SDPatternMatch to match integer minimum and maximum patterns in addition to the existing ISD nodes. (#111774)
Closes #108218.

This patch adds icmp+select patterns for integer min/max matchers in
SDPatternMatch, similar to those in IR PatternMatch.
2024-10-14 21:19:34 +08:00
Alexey Bataev
f9bc00e4bb
[SLP]Initial support for interleaved loads
Adds initial support for interleaved loads, which allows
emission of segmented loads for RISCV RVV.

Vectorizes extra code for RISCV
CFP2006/447.dealII, CFP2006/453.povray,
CFP2017rate/510.parest_r, CFP2017rate/511.povray_r,
CFP2017rate/526.blender_r, CFP2017rate/538.imagick_r, CINT2006/403.gcc,
CINT2006/473.astar, CINT2017rate/502.gcc_r, CINT2017rate/525.x264_r

Reviewers: RKSimon, preames

Reviewed By: preames

Pull Request: https://github.com/llvm/llvm-project/pull/112042
2024-10-14 09:12:33 -04:00
Timm Baeder
4c78c8cc21
[clang][bytecode] Fix discarding block expressions (#112185) 2024-10-14 15:11:39 +02:00
Nico Weber
f3947aaa37 [gn] port aa44f59abf39 2024-10-14 09:10:27 -04:00
Ramkumar Ramachandra
bdf241cab3
ValueTracking: handle more ops in isNotCrossLaneOperation (#112183)
Reuse llvm::isTriviallyVectorizable in llvm::isNotCrossLaneOperation, in
order to get it to handle more intrinsics.

Alive2 proofs for changed tests: https://alive2.llvm.org/ce/z/XSV_GT
2024-10-14 14:08:12 +01:00