564802 Commits

Author SHA1 Message Date
Maksim Panchenko
f223ebfc2b [BOLT] Add aaupov to X86 maintainers list 2026-01-09 15:17:22 -08:00
Joseph Huber
9f203509ce
[AMDGPU] Fix AMDGPULowerKernelAttributes not invalidating analysis (#175256)
Summary:
The new PM wasn't using the changed result which triggered failures
after https://github.com/llvm/llvm-project/pull/174112
2026-01-09 23:03:15 +00:00
Abhinav Gaba
cd81aae57a
[OpenMP] Preserve the original address when use_device_ptr/addr lookup fails. (#174659)
As per OpenMP 5.1, we need to assume that when the lookup for
`use_device_ptr/addr` fails, the incoming pointer was already device
accessible.
    
Prior to 5.1, a lookup-failure meant a user-error (for
`use_device_ptr`),
so we could do anything in that scenario. For `use_device_addr`,
it was always incorrect to set the address to null.

OpenMP 6.1 adds a way to retain the previous behavior of nullifying a
pointer
when the lookup fails. That will be tackled by the PR stack
starting with https://github.com/llvm/llvm-project/pull/169603.
2026-01-09 14:42:30 -08:00
Aiden Grossman
acb78bde6f
[VPlan] Use unsigned integers for lane start indices (#175231)
a83c89495ba6fe0134dcaa02372c320cc7ff0dbf caused assertion failures here
as if we have a single bit induction variable and two lanes (0 and 1),
then the second lane index (1) will be out of bounds of what a signed
1-bit integer can hold. Lane indices are always >0 according to
VPlanHelpers.h:125, and the lane representation in this code is also
unsigned.

The test case come from tensorflow/XLA.
2026-01-09 14:28:28 -08:00
Mircea Trofin
480af73916
[profcheck] Exclude IRCE because it's not hooked up to the pass pipeline (#175238)
To keep the profcheck effort manageable, excluding (for now) passes that aren't yet hooked up to a pass pipeline.

Issue #147390
2026-01-09 14:27:22 -08:00
Jay Foad
79069ce86d
[AMDGPU] Generate checks for many MC tests (#175174)
Generate checks for all tests where that did not change the number of
checks with each prefix, and where the resulting test still passed.
2026-01-09 22:17:06 +00:00
Aiden Grossman
c11df52f9b Revert "[ORC] Add utilities for limited symbolication of JIT backtraces (#175099)"
This reverts commit 906b48616c03948a4df62a5a144f7108f3c455e8.

The forward fix for this got reverted in
25976e83606f1a7615e3725e6038bb53ee96c3d5, so reverting the original
commit given it is still broken and the forward fix that mitigated most
of the issues is no longer in tree.
2026-01-09 22:13:57 +00:00
Jonas Devlieghere
ae29bfd9db
Revert "[LLDB] Swig python extensions tests for SBTargetExtention" (#175251)
Reverts llvm/llvm-project#173473
2026-01-09 21:58:37 +00:00
Snehasish Kumar
85b90f560d
Add a flag to preserve the old macro behaviour. (#174895)
[Clang][DebugInfo] Add a flag to use expansion loc for macro params.

This patch adds a flag to allow users to preserve the old behaviour -
use the macro expansion location for parameters. This is useful for
wider testing of sample profile driven PGO which relies on debug
information based mapping. This flag is intended to be temporary
and should be safe to remove by EOY 2026. Filed #175249 to
track the cleanup.

---------

Assisted-by: Gemini
2026-01-09 21:53:55 +00:00
Alex Langford
54840055b8
[lldb] Fix TestMultithreaded.py when libc++ symbols are present (#174664)
There are a few test cases in TestMultithreaded.py. Most of them set a
breakpoint by name on "next". There's no problem with doing that, but
one of the tests cases in particular relies on being able to grab a
specific breakpoint location corresponding to the test inferior.

If you have libc++ symbols, this test will also have breakpoint
locations for symbols named `next` in libc++. I could have changed the
test to find the correct `next` breakpoint location, but it seems easier
to give it a more uncommon name instead.
2026-01-09 13:50:56 -08:00
Joshua Batista
719006a195
[HLSL][Sema] Validate that occupied register numbers never exceed UINT32_MAX (#174028)
This PR adds validation for register numbers.
Register numbers ought never to exceed UINT32_MAX, or 4294967295
Additionally, resource arrays will have each resource element bound
sequentially, and those resource's register numbers should not exceed
UINT32_MAX, or 4294967295. Even though not explicitly given a register
number, their effective register number is also validated.
This accounts for nested resource declarations and resource arrays too.

Fixes https://github.com/llvm/llvm-project/issues/136809
2026-01-09 13:37:49 -08:00
Yuvaraj Venkatesh
eef8e79e3a
[mlir][tosa] Add log2_ceil/log2_floor/exp2_shape ops (#175057)
This commit introduces new ext-shape operations,
- LOG2_CEIL_SHAPE
- LOG2_FLOOR_SHAPE
- EXP2_SHAPE

These additions include the operator definitions, same-rank
verification, and level checks during validation.

---------

Co-authored-by: Luke Hutton <luke.hutton@arm.com>
2026-01-09 21:33:47 +00:00
Daniel Thornburgh
25976e8360
Revert "[llvm-jitlink] Replace IR backtrace symbolication testcase with asm." (#175242)
Reverts llvm/llvm-project#175117
2026-01-09 21:17:45 +00:00
Craig Topper
51e0248aef
[RISCV] Try to disassemble 48-bit and larger instructions as 32-bit instructions first. (#175122)
The encoding scheme for 48-bit and larger instructions has not
been ratified yet. The RISC-V ISA manual previously included a
proposal that included 4 reserved major opcodes. LLVM's
disassembler implements this proposal as does binutils.

A vendor extension might have used the reserved opcodes,
as a non-conforming 32-bit extension. Try to decode as a
32-bit instruction first to catch these cases.

Should help with #174571.
2026-01-09 13:16:30 -08:00
Jan Patrick Lehr
4a8a0593bd
[Offload] Fix failing Fortran test w/ line number (#175247)
This test also depends on the line number. Following similar approach as
other with [[@LINE]] macro.
2026-01-09 21:12:28 +00:00
Hamza Hassanain
1117d2a35f
[LLDB] Swig python extensions tests for SBTargetExtention (#173473)
Implements part of #168920
2026-01-09 15:00:59 -06:00
Matej Košík
42368f9194
[lldb] fix a problem in the ValueObject::GetExpressionPath method (#171521)
Consider the following program:
```
int main() {
  int foo[2][3][4];
  int (*bar)[3][4] = foo;
  return 0;
}
```
If we:
- compile this program
- launch an LLDB debugging session
- launch the process and let it stop at the `return 0;` statement
then the following LLDB command:
```
(lldb) script lldb.frame.FindVariable("bar").GetChildAtIndex(0).get_expr_path()
```
will produce the following output:
```
bar->[0]
```
What we were expecting:
- a valid expression in the C programming language
- that would allow us (in the scope of the `main` function) access the
appropriate object.

What we've got is a string that does not represent a valid expression in
the C programming language.

This pull-request proposes a fix to this problem.

---------

Co-authored-by: Matej Košík <matej.kosik@codasip.com>
2026-01-09 14:53:56 -06:00
tedj
d6d8622f12
[flang][flang-rt] Add flang-rt autolabel check (#175240)
Add flang-rt to the autolabel github yaml.
2026-01-09 12:52:40 -08:00
Florian Hahn
a5fcd840e7
[VPlan] Document getSplatVFValue (NFC).
Document helper, as suggested independently in
https://github.com/llvm/llvm-project/pull/174234.
2026-01-09 20:47:52 +00:00
Razvan Lupusoru
33c4e3e2bc
[flang][cuda] Avoid inserting GetDeviceAddress call in offload regions (#175225)
In regions destined for GPU offload, computing an address_of means
getting device address directly - no need (and actually incorrect) to
insert a runtime call to get the address. This was already working for
regions such as `gpu.launch` - but now it applies to acc regions as
well.
2026-01-09 12:20:18 -08:00
Krzysztof Parzyszek
4f1ab334a4
[flang] Visit "source" member in all AST nodes (#175211)
Some AST nodes had their "source" member visited by the parse tree
visitor, while others, in particular those that were handled by the
trait-based visitors, did not.

Make sure that we call the Walk function on the "source" member for all
classes that have it.
2026-01-09 14:09:02 -06:00
Matt Arsenault
bac9b7a387
InstCombine: Improve SimplifyDemandedFPClass fabs handling
(#175027)

Try to eliminate the fabs if the source is known positive.
2026-01-09 20:05:00 +00:00
Shilei Tian
df3629dc0c
[AMDGPU] Handle s_setreg_imm32_b32 targeting MODE register (#174681)
On certain hardware, this instruction clobbers VGPR MSB `bits[12:19]`,
so we need to restore the current mode.

Fixes SWDEV-571581.
2026-01-09 14:43:41 -05:00
Joseph Huber
ac508575ed
[SPIR-V] Permit implicit conversion to generic AS (#175109)
Summary:
We rely on this in most places we work with address spaces. This allows
target address spaces to implicity convert to generic ones.

I actually have no clue if this is valid or correct with SPIR-V, hoping
someone with more target / backend knowledge can chime in.

---------

Co-authored-by: Matt Arsenault <arsenm2@gmail.com>
2026-01-09 13:40:09 -06:00
Joseph Huber
2ff56633b9 [OpenMP] Fix tests that depend on the line number 2026-01-09 13:19:03 -06:00
Jonas Devlieghere
5c3f02cbb3
[lldb] Honor the process plugin name in the attach/launch info (#175195)
When connected to a GDB remote platform, we always use "gdb-remote" as
the process plugin when attaching. This means that the `--plugin`
argument to `process attach` is effectively ignored. This patch makes it
so that "gdb-remote" remains the default, while still honoring the
process plugin name specified in the attach info. The same thing applies
to launching a process.

rdar://167845923
2026-01-09 12:52:58 -06:00
Sean Fertile
b6212a4caf
XCOFF associated metadata (#159096)
Add a new metadata node `!implicit.ref` to represent an implicit
dependency between 2 symbols. The metadata is unique to AIX and gets
lowered to a relocation that adds an explicit link between the section
the global that the metadata is placed on is allocated in, to the
asscoiated symbol. This relocation will cause the associated symbol to
remain live if the section is not garbage collected. This is used mainly
for compiler features where there is some hidden runtime dependency
between the symbols that isn't otherwise obvious to the linker.
2026-01-09 13:49:21 -05:00
Benjamin Maxwell
471b7b79ee
Update veclib-sincos.c test checks (NFC) (#175221) 2026-01-09 18:48:52 +00:00
Craig Topper
8cfa36d190
[RISCV] Support i32 (S/U)(ADD/SUB)SAT for rv32ip. (#173693) 2026-01-09 10:42:47 -08:00
Matt Arsenault
75dd5b3df2
InstCombine: Improve SimplifyDemandedFPClass copysign handling
(#175026)

Recognize cases where the signbit is known.
2026-01-09 19:32:40 +01:00
Craig Topper
690d94b7bd
[TableGen] Print MVT name in the isel table when it doesn't require a VBR. NFC (#175128)
If the MVT is small enough, we can emit the enum name instead of
printing its encoding.
2026-01-09 10:13:03 -08:00
Paul Osmialowski
6ca6a328ae
[AArch64][VecLib] Add vector function mappings for the modf, sincos, sincospi vector intrinsics (#175098)
Following the improvements introduced in #109833 and the most recent
development of the libamath library (used by `-fveclib=ArmPL`), this
patch adds the missing mappings for the functions that return literal
struct values.
2026-01-09 18:08:16 +00:00
Akimasa Watanuki
e927f4bbf4
[CIR] Handle empty unions in record lowering and LLVM conversion (#172666)
Handle empty unions in CIR record lowering and LLVM conversion by
emitting padding when needed, guarding `getLargestMember` for
empty/padded unions, and lowering to empty or padded LLVM structs based
on language rules.

Added regression tests for C and C++ empty union lowering in
`clang/test/CIR/CodeGen/empty-union.c` and `empty-union.cpp`.
2026-01-09 09:52:30 -08:00
Jake Egan
54a1e05d3c
[asan][AIX] Set allocator size and beginning (#144784)
On 64-bit AIX, set allocator size to 256G and set beginning to
0x0a00000000000000.

Issue: #138916

---------

Co-authored-by: Hubert Tong <hubert.reinterpretcast@gmail.com>
2026-01-09 12:49:45 -05:00
Rahul Joshi
37e3af835e
[LLVM][TableGen] Use integers instead of string in CodeEmitterGen CaseMap (#172885)
CodeEmitterGen CaseMap values is always a vector of integer IDs (HwMode
or instruction opcode). So change the map values to be a vector of
integers instead of strings and instead print the string form when
emitting the case statements. This will help reduce the memory footprint
by not storing potentially long strings (for opcode names) in the map.
2026-01-09 09:47:03 -08:00
Craig Topper
c0da62a49f
[RISCV] Prevent P extension from creating unaligned scalar load/store insructions. (#174878)
The P extension requires us to use base ISA load/store instructions for
small vectors. We need to make sure we don't generate misaligned
instructions.

We'll need to do more work here if we want P and V to be enabled at the
same time, but that's a future problem.
2026-01-09 09:44:36 -08:00
Jonas Devlieghere
17e226f71e
[lldb] Fix crash when passing a folder in as the executable (#175181)
This is another instance where we weren't checking that the result of
FileSystem::CreateDataBuffer and unconditionally accessing it, similar
to the bug in SourceManager last week. In this particular case,
ObjectFile was assuming that we can read the contents non-zero, which
isn't true for directory nodes.

Jim figured this one out yesterday. I'm just putting up the patch and
adding a test.

rdar://167796036
2026-01-09 11:29:31 -06:00
Aiden Grossman
964f9c0754 [Clang][Driver] Disable crash-ir-repro.cpp on UBSan
UBSan causes the test to raise a signal, which violates the not
expectations after recent lit expectations.
2026-01-09 17:27:04 +00:00
Craig Topper
ceb2365a20
[TableGen] Add a helper function for emitting an MVT in the isel table. NFC (#175127) 2026-01-09 09:17:27 -08:00
Craig Topper
e5473760bb
[TableGen] Change emitted comments for OPC_Scope to be more like OPC_SwitchType/Opcode. NFC (#175124) 2026-01-09 09:16:49 -08:00
Craig Topper
55a9855be5
[RISCV] Merge multiple QC_EXTU patterns using ImmLeaf and SDNodeXForm. (#175119)
Instead of matching 6 different masks, use an ImmLeaf to detect any of
the 6 masks.

This isn't NFC because using an immediate directly will call
computeKnownBits to fill in bits that are expected to be 1, but have
been cleared because they are known 0 in the LHS of the and. We don't
have tests for this, if it's important we can switch to a ComplexPattern
to restore that behavior.
2026-01-09 09:16:29 -08:00
Konrad Kleine
dcef308ecc
[DWARF][NFC] Remove unused 'Reads' param from checkCFADiff and checkRegDiff (#174941) 2026-01-09 12:02:22 -05:00
vangthao95
b3d25f59d5
[AMDGPU][GlobalISel] Add RegBankLegalize support for G_FLDEXP (#175072) 2026-01-09 08:52:35 -08:00
vangthao95
7df0826c41
[AMDGPU][GlobalISel] Add RegBankLegalize support for G_PTRMASK (#174889)
Add support for G_PTRMASK but we are missing p8 (buffer resource) due to
a legalizer issue in GlobalISel which does not occur on SelectionDAG:
`LLVM ERROR: unable to legalize instruction: %17:_(p8) = G_PTRMASK %0:_,
%22:_(s128) (in function: v_ptrmask_buffer_resource_variable_i48)`

Added a FIXME to indicate this issue.
2026-01-09 08:51:51 -08:00
vangthao95
121a9c414f
[AMDGPU][GlobalISel] Add RegBankLegalize support for G_FCANONICALIZE (#174662)
Added -global-isel flags to fcanonicalize.ll test.
2026-01-09 08:51:16 -08:00
Derek Schuff
4c61843e44
[WebAssembly] Add wasm64 testing to varargs.ll [NFC] (#175102)
Looking at https://github.com/llvm/llvm-project/pull/173580 revealed
that our testing of varargs is inadequate. This is a start on improving it.
2026-01-09 08:51:06 -08:00
Andrew Haberlandt
b5a5276ca7
[compiler-rt] [Darwin] VerifyMemoryMapping should ignore zero-size sections (#175083)
Zero size sections cause VerifyMemoryMapping to falsely report
overlapping mappings.

rdar://167467041
2026-01-09 08:34:45 -08:00
Philip742
ec7ab6fb7b
[mlir][tosa] Add min/max_shape ops (#175146)
Signed-off-by: Philip Wilkinson <philip.wilkinson@arm.com>
2026-01-09 16:29:52 +00:00
Brandon Wu
327d6e1f97
[RISCV][llvm] Support frame index in zilsd optimizer (#174073)
Current zilsd optimizer only support base op that is in a register,
however many use cases are essentially stack load/store.
2026-01-10 00:27:48 +08:00
Sayan Sivakumaran
9e1a185be4
[InstCombine] Fold intrinsics over multi-use selects when the intrinsic is the only user (#172723)
Closes #172176.

Previously, `FoldOpIntoSelect` wouldn't fold multi-use selects if
`MultiUse` wasn't explicitly true. This prevents useful folding when the
select is used multiple times in the same intrinsic call. Similar to
what is done in `foldOpIntoPhi`, we'll now check that all of the uses
come from a single user, rather than checking that there is only one
use.
2026-01-09 17:25:43 +01:00