ff53086924
Add a new constraint corresponding to the AV_* register classes for operands which can allocate AGPRs or VGPRs. This applies to load and stores on gfx90a+, and srcA / srcB for MFMA instructions. The error emitted on unsupported targets isn't ideal, it is produced by the register allocator without a rationale, but it is consistent with the existing errors. I mostly want this for writing allocation tests.
28 lines
787 B
LLVM
28 lines
787 B
LLVM
; RUN: not llc -mtriple=amdgcn -mcpu=gfx90a -filetype=null %s 2>&1 | FileCheck %s
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; Make sure illegal type uses are correctly diagnosed
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; CHECK: error: couldn't allocate input reg for constraint 'VA'
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define void @use_A_i8(i8 %x) {
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call void asm sideeffect "; use $0", "^VA"(i8 %x)
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ret void
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}
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; CHECK: error: couldn't allocate output register for constraint 'VA'
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define i8 @def_A_i8() {
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%ret = call i8 asm sideeffect "; def $0", "=^VA"()
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ret i8 %ret
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}
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; CHECK: error: couldn't allocate input reg for constraint 'VA'
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define void @use_A_i1(i1 %x) {
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call void asm sideeffect "; use $0", "^VA"(i1 %x)
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ret void
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}
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; CHECK: error: couldn't allocate output register for constraint 'VA'
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define i1 @def_A_i1() {
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%ret = call i1 asm sideeffect "; def $0", "=^VA"()
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ret i1 %ret
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}
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