b7c8271601
We already do this for vector vXi1 types - this patch removes the vector constraint to handle it for all bool types.
34 lines
795 B
LLVM
34 lines
795 B
LLVM
; RUN: llc < %s -mtriple=nvptx64 -mcpu=sm_20 | FileCheck %s
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; RUN: %if ptxas %{ llc < %s -mtriple=nvptx64 -mcpu=sm_20 | %ptxas-verify %}
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; CHECK-LABEL: m2and_rr
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define i1 @m2and_rr(i1 %a, i1 %b) {
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; CHECK: and.b16 %rs{{[0-9]+}}, %rs{{[0-9]+}}, %rs{{[0-9]+}}
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; CHECK-NOT: mul
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%r = mul i1 %a, %b
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ret i1 %r
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}
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; CHECK-LABEL: m2and_ri
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define i1 @m2and_ri(i1 %a) {
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; CHECK-NOT: mul
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%r = mul i1 %a, 1
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ret i1 %r
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}
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; CHECK-LABEL: select2or
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define i1 @select2or(i1 %a, i1 %b) {
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; CHECK: or.b16 %rs{{[0-9]+}}, %rs{{[0-9]+}}, %rs{{[0-9]+}}
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; CHECK-NOT: selp
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%r = select i1 %a, i1 1, i1 %b
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ret i1 %r
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}
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; CHECK-LABEL: select2and
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define i1 @select2and(i1 %a, i1 %b) {
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; CHECK: and.b16 %rs{{[0-9]+}}, %rs{{[0-9]+}}, %rs{{[0-9]+}}
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; CHECK-NOT: selp
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%r = select i1 %a, i1 %b, i1 0
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ret i1 %r
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}
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