475cd8dfaf
This change continues rewriting and cleanup around DAG ISel for formal-arguments, return values, and function calls. This causes some incidental changes, mostly to instruction ordering and register naming but also a couple improvements caused by using scalar types earlier in the lowering.
92 lines
2.4 KiB
LLVM
92 lines
2.4 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
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; RUN: llc < %s -mtriple=nvptx -mcpu=sm_20 | FileCheck %s
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; RUN: llc < %s -mtriple=nvptx64 -mcpu=sm_20 | FileCheck %s
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; RUN: %if ptxas && !ptxas-12.0 %{ llc < %s -mtriple=nvptx -mcpu=sm_20 | %ptxas-verify %}
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; RUN: %if ptxas %{ llc < %s -mtriple=nvptx64 -mcpu=sm_20 | %ptxas-verify %}
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;; Integer conversions happen inplicitly by loading/storing the proper types
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; i16
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define i16 @cvt_i16_i32(i32 %x) {
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; CHECK-LABEL: cvt_i16_i32(
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; CHECK: {
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; CHECK-NEXT: .reg .b32 %r<2>;
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; CHECK-EMPTY:
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; CHECK-NEXT: // %bb.0:
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; CHECK-NEXT: ld.param.b32 %r1, [cvt_i16_i32_param_0];
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; CHECK-NEXT: st.param.b32 [func_retval0], %r1;
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; CHECK-NEXT: ret;
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%a = trunc i32 %x to i16
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ret i16 %a
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}
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define i16 @cvt_i16_i64(i64 %x) {
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; CHECK-LABEL: cvt_i16_i64(
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; CHECK: {
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; CHECK-NEXT: .reg .b32 %r<2>;
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; CHECK-EMPTY:
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; CHECK-NEXT: // %bb.0:
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; CHECK-NEXT: ld.param.b16 %r1, [cvt_i16_i64_param_0];
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; CHECK-NEXT: st.param.b32 [func_retval0], %r1;
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; CHECK-NEXT: ret;
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%a = trunc i64 %x to i16
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ret i16 %a
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}
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; i32
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define i32 @cvt_i32_i16(i16 %x) {
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; CHECK-LABEL: cvt_i32_i16(
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; CHECK: {
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; CHECK-NEXT: .reg .b32 %r<2>;
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; CHECK-EMPTY:
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; CHECK-NEXT: // %bb.0:
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; CHECK-NEXT: ld.param.b16 %r1, [cvt_i32_i16_param_0];
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; CHECK-NEXT: st.param.b32 [func_retval0], %r1;
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; CHECK-NEXT: ret;
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%a = zext i16 %x to i32
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ret i32 %a
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}
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define i32 @cvt_i32_i64(i64 %x) {
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; CHECK-LABEL: cvt_i32_i64(
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; CHECK: {
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; CHECK-NEXT: .reg .b64 %rd<2>;
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; CHECK-EMPTY:
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; CHECK-NEXT: // %bb.0:
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; CHECK-NEXT: ld.param.b64 %rd1, [cvt_i32_i64_param_0];
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; CHECK-NEXT: st.param.b32 [func_retval0], %rd1;
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; CHECK-NEXT: ret;
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%a = trunc i64 %x to i32
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ret i32 %a
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}
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; i64
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define i64 @cvt_i64_i16(i16 %x) {
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; CHECK-LABEL: cvt_i64_i16(
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; CHECK: {
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; CHECK-NEXT: .reg .b64 %rd<2>;
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; CHECK-EMPTY:
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; CHECK-NEXT: // %bb.0:
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; CHECK-NEXT: ld.param.b16 %rd1, [cvt_i64_i16_param_0];
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; CHECK-NEXT: st.param.b64 [func_retval0], %rd1;
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; CHECK-NEXT: ret;
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%a = zext i16 %x to i64
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ret i64 %a
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}
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define i64 @cvt_i64_i32(i32 %x) {
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; CHECK-LABEL: cvt_i64_i32(
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; CHECK: {
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; CHECK-NEXT: .reg .b64 %rd<2>;
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; CHECK-EMPTY:
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; CHECK-NEXT: // %bb.0:
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; CHECK-NEXT: ld.param.b32 %rd1, [cvt_i64_i32_param_0];
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; CHECK-NEXT: st.param.b64 [func_retval0], %rd1;
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; CHECK-NEXT: ret;
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%a = zext i32 %x to i64
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ret i64 %a
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}
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