d494eb0fa3
When assigning numbers to registers, skip any with neither uses nor defs. This is will not have any impact at all on the final SASS but it makes for slightly more readable PTX. This change should also ensure that future minor changes are less likely to cause noisy diffs in register numbering.
116 lines
3.7 KiB
LLVM
116 lines
3.7 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
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; RUN: llc < %s -mtriple=nvptx | FileCheck %s
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; RUN: %if ptxas && !ptxas-12.0 %{ llc < %s -mtriple=nvptx -verify-machineinstrs | %ptxas-verify %}
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target triple = "nvptx64-nvidia-cuda"
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%struct.float2 = type { float, float }
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; CHECK-LABEL: .visible .func (.param .b32 func_retval0) callee_md
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; CHECK-NEXT: (
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; CHECK-NEXT: .param .align 8 .b8 callee_md_param_0[8]
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; CHECK-NEXT: )
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; CHECK-NEXT: ;
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; CHECK-LABEL: .visible .func (.param .b32 func_retval0) callee
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; CHECK-NEXT: (
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; CHECK-NEXT: .param .align 8 .b8 callee_param_0[8]
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; CHECK-NEXT: )
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; CHECK-NEXT: ;
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define float @caller_md(float %a, float %b) {
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; CHECK-LABEL: caller_md(
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; CHECK: {
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; CHECK-NEXT: .reg .b32 %r<4>;
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; CHECK-EMPTY:
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; CHECK-NEXT: // %bb.0:
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; CHECK-NEXT: ld.param.b32 %r1, [caller_md_param_0];
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; CHECK-NEXT: ld.param.b32 %r2, [caller_md_param_1];
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; CHECK-NEXT: { // callseq 0, 0
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; CHECK-NEXT: .param .align 8 .b8 param0[8];
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; CHECK-NEXT: .param .b32 retval0;
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; CHECK-NEXT: st.param.v2.b32 [param0], {%r1, %r2};
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; CHECK-NEXT: call.uni (retval0), callee_md, (param0);
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; CHECK-NEXT: ld.param.b32 %r3, [retval0];
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; CHECK-NEXT: } // callseq 0
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; CHECK-NEXT: st.param.b32 [func_retval0], %r3;
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; CHECK-NEXT: ret;
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%s1 = insertvalue %struct.float2 poison, float %a, 0
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%s2 = insertvalue %struct.float2 %s1, float %b, 1
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%r = call float @callee_md(%struct.float2 %s2)
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ret float %r
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}
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define float @callee_md(%struct.float2 alignstack(8) %a) {
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; CHECK-LABEL: callee_md(
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; CHECK: {
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; CHECK-NEXT: .reg .b32 %r<4>;
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; CHECK-EMPTY:
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; CHECK-NEXT: // %bb.0:
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; CHECK-NEXT: ld.param.v2.b32 {%r1, %r2}, [callee_md_param_0];
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; CHECK-NEXT: add.rn.f32 %r3, %r1, %r2;
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; CHECK-NEXT: st.param.b32 [func_retval0], %r3;
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; CHECK-NEXT: ret;
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%v0 = extractvalue %struct.float2 %a, 0
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%v1 = extractvalue %struct.float2 %a, 1
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%2 = fadd float %v0, %v1
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ret float %2
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}
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define float @caller(float %a, float %b) {
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; CHECK-LABEL: caller(
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; CHECK: {
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; CHECK-NEXT: .reg .b32 %r<4>;
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; CHECK-EMPTY:
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; CHECK-NEXT: // %bb.0:
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; CHECK-NEXT: ld.param.b32 %r1, [caller_param_0];
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; CHECK-NEXT: ld.param.b32 %r2, [caller_param_1];
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; CHECK-NEXT: { // callseq 1, 0
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; CHECK-NEXT: .param .align 8 .b8 param0[8];
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; CHECK-NEXT: .param .b32 retval0;
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; CHECK-NEXT: st.param.v2.b32 [param0], {%r1, %r2};
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; CHECK-NEXT: call.uni (retval0), callee, (param0);
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; CHECK-NEXT: ld.param.b32 %r3, [retval0];
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; CHECK-NEXT: } // callseq 1
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; CHECK-NEXT: st.param.b32 [func_retval0], %r3;
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; CHECK-NEXT: ret;
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%s1 = insertvalue %struct.float2 poison, float %a, 0
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%s2 = insertvalue %struct.float2 %s1, float %b, 1
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%r = call float @callee(%struct.float2 %s2)
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ret float %r
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}
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define float @callee(%struct.float2 alignstack(8) %a ) {
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; CHECK-LABEL: callee(
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; CHECK: {
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; CHECK-NEXT: .reg .b32 %r<4>;
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; CHECK-EMPTY:
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; CHECK-NEXT: // %bb.0:
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; CHECK-NEXT: ld.param.v2.b32 {%r1, %r2}, [callee_param_0];
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; CHECK-NEXT: add.rn.f32 %r3, %r1, %r2;
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; CHECK-NEXT: st.param.b32 [func_retval0], %r3;
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; CHECK-NEXT: ret;
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%v0 = extractvalue %struct.float2 %a, 0
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%v1 = extractvalue %struct.float2 %a, 1
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%2 = fadd float %v0, %v1
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ret float %2
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}
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define alignstack(8) %struct.float2 @aligned_return(%struct.float2 %a ) {
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; CHECK-LABEL: aligned_return(
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; CHECK: {
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; CHECK-NEXT: .reg .b32 %r<3>;
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; CHECK-EMPTY:
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; CHECK-NEXT: // %bb.0:
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; CHECK-NEXT: ld.param.b32 %r1, [aligned_return_param_0];
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; CHECK-NEXT: ld.param.b32 %r2, [aligned_return_param_0+4];
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; CHECK-NEXT: st.param.b32 [func_retval0+4], %r2;
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; CHECK-NEXT: st.param.b32 [func_retval0], %r1;
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; CHECK-NEXT: ret;
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ret %struct.float2 %a
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}
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