Juan Manuel Martinez Caamaño 52ea06f884

[SPIRV] Add tests documenting incorrect lowering of load/store atomic (#185628) ...

This patch only adds the tests documenting the broken behavior, but does
not fix them.

2026-03-11 09:40:10 +01:00

..

AArch64

[AArch64][PAC] Don't skip global legalization for AUTH_TCRETURN (#182513)

2026-03-10 19:21:21 +01:00

AMDGPU

[AMDGPU][GlobalIsel] Add register bank legalization rules for amdgcn atomic fminmax num (#184564)

2026-03-10 14:53:32 -05:00

ARC

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ARM

[ARM] Add basic NPM support for LoadStoreOptimizer (#184139)

2026-03-08 19:28:27 +00:00

AVR

[AVR] Fix SETUGT during 128b -> 64b lowering (#182690)

2026-02-23 19:30:04 +01:00

BPF

[BPF] Fix CORE optimization bug in BPFMISimplifyPatchable (#183446)

2026-03-10 16:42:57 -07:00

CSKY

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DirectX

[HLSL][DXIL][SPIRV] Added WaveActiveBitOr HLSL intrinsic (#165156)

2026-03-10 18:30:37 -04:00

Generic

[CodeGen] Add tests for ShadowStackGCLowering IR pass (#183167)

2026-02-25 16:18:49 -05:00

Hexagon

[Hexagon] Fix 64-bit funnel shift miscompilation with register shift amounts (#183669)

2026-03-10 09:16:46 -05:00

Inputs

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Lanai

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LoongArch

[DAG] visitOR - attempt to fold (or buildvector(), buildvector()) -> buildvector() (#183032)

2026-02-25 10:03:15 +00:00

M68k

[M68k] Update llvm/test/CodeGen/M68k/pipeline.ll (#182809)

2026-02-23 17:50:43 +08:00

Mips

[MIPS] Fix duplicate RUN lines in tests (#182276)

2026-03-06 10:52:04 +00:00

MIR

[CodeGen] Fix 4f094816ef7d2811b36ee328bac3b418dfd021cc

2026-03-09 20:44:49 +00:00

MIR2Vec

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MLRegAlloc

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MSP430

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NVPTX

[NVPTX] Remove NoNaNsFPMath uses (#183447)

2026-03-05 20:50:05 +08:00

PowerPC

[MC] Rename PrivateGlobalPrefix to InternalSymbolPrefix. NFC (#185164)

2026-03-10 01:03:27 -07:00

RISCV

[RISCV] Combine vwaddu_wv+vabd(u) to vwabda(u)

2026-03-11 15:00:11 +08:00

SPARC

[SPARC] Set how many bytes load from or store to stack slot (#182674)

2026-02-22 20:20:54 +08:00

SPIRV

[SPIRV] Add tests documenting incorrect lowering of load/store atomic (#185628)

2026-03-11 09:40:10 +01:00

SystemZ

[SystemZ] Add a SystemZ specific pre-RA scheduling strategy. (#135076)

2026-03-10 15:38:05 +01:00

Thumb

[ARM] Explicitly mark certain instructions as having no side effects. (#182771)

2026-03-01 09:33:58 +00:00

Thumb2

[MVEGatherScatter] Fix GEP scale calculations (#185437)

2026-03-09 16:58:35 +01:00

VE

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WebAssembly

[WebAssembly][FastISel] Fold AND mask operations into ZExt load (#183743)

2026-03-11 11:30:48 +09:00

WinCFGuard

[win] Control Flow Guard: Don't set the GuardCF COFF feature if the checks are missing (#182205)

2026-02-19 10:21:53 -08:00

WinEH

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X86

[DAGCombiner] Combine (fshl A, B, S) | (fshr C, D, BW-S) --> (fshl (A|C), (B|D), S) (#180889)

2026-03-10 18:53:40 -07:00

XCore

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Xtensa

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