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llvm-project/llvm/lib/Target/AMDGPU
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Brox Chen 2a3f72ee6e
[AMDGPU][CodeGen][True16] Correct size calculation for d16 insts (#151042) 
D16 pesudo instructions are introduced in true16 mode to represet a D16
load/store. In MC lowering, the pesudo instructions are lowered to the
corresponding D16 Lo/Hi MC Inst respecting the register allocation.

However, the pesudo instruction has size 0 and cause an issue in the
Inst size estimation. Use D16 Lo when calculating inst size
2025-07-29 13:01:57 -04:00
..
AsmParser
[AMDGPU][gfx1250] Add cu-store subtarget feature (#150588)
2025-07-29 11:38:43 +02:00
Disassembler
[AMDGPU][gfx1250] Add cu-store subtarget feature (#150588)
2025-07-29 11:38:43 +02:00
MCA
[llvm] annotate interfaces in llvm/Target for DLL export (#143615)
2025-06-17 13:28:45 -07:00
MCTargetDesc
[AMDGPU][gfx1250] Add cu-store subtarget feature (#150588)
2025-07-29 11:38:43 +02:00
TargetInfo
[llvm] annotate interfaces in llvm/Target for DLL export (#143615)
2025-06-17 13:28:45 -07:00
Utils
[AMDGPU] MC support for async load and store on gfx1250 (#151030)
2025-07-28 13:45:37 -07:00
AMDGPU.h
AMDGPU: Add pass to replace constant materialize with AV pseudos (#149292)
2025-07-18 17:15:38 +09:00
AMDGPU.td
[AMDGPU] Support f64 atomics on gfx1250 (#151172)
2025-07-29 09:41:00 -07:00
AMDGPUAliasAnalysis.cpp
[NFC][LLVM][AMDGPU] Cleanup pass initialization for AMDGPU (#134410)
2025-04-07 17:27:50 -07:00
AMDGPUAliasAnalysis.h
…
AMDGPUAlwaysInlinePass.cpp
[NFC][AMDGPU] Replace direct arch comparison with isAMDGCN() (#131357)
2025-03-14 14:21:44 -04:00
AMDGPUAnnotateUniformValues.cpp
[AMDGPU] Preserve all analyses if nothing changed (#117994)
2024-11-28 14:33:05 +00:00
AMDGPUArgumentUsageInfo.cpp
[AMDGPU] Remove unused includes (NFC) (#116154)
2024-11-13 21:10:03 -08:00
AMDGPUArgumentUsageInfo.h
[AMDGPU] Add backward compatibility layer for kernarg preloading (#119167)
2025-01-10 11:39:02 -08:00
AMDGPUAsanInstrumentation.cpp
[IRBuilder] Add new overload for CreateIntrinsic (#131942)
2025-03-31 08:10:34 -07:00
AMDGPUAsanInstrumentation.h
…
AMDGPUAsmPrinter.cpp
[AMDGPU][gfx1250] Add cu-store subtarget feature (#150588)
2025-07-29 11:38:43 +02:00
AMDGPUAsmPrinter.h
Fix MSVC warning - "'llvm::AMDGPUResourceUsageAnalysis': type name first seen using 'class' now seen using 'struct'". NFC.
2025-07-10 10:20:40 +01:00
AMDGPUAtomicOptimizer.cpp
[IRBuilder] Add new overload for CreateIntrinsic (#131942)
2025-03-31 08:10:34 -07:00
AMDGPUAttributes.def
Reapply "[AMDGPU] Infer amdgpu-no-flat-scratch-init attribute in AMDGPUAttributor (#94647)" (#118907)
2024-12-09 16:44:48 -08:00
AMDGPUAttributor.cpp
AMDGPU: Remove unused TargetPassConfig include from attributor (#150892)
2025-07-28 20:58:25 +09:00
AMDGPUCallingConv.td
[AMDGPU] Change SGPR layout to striped caller/callee saved (#127353)
2025-03-08 09:28:20 -05:00
AMDGPUCallLowering.cpp
[AMDGPU] ISel & PEI for whole wave functions (#145858)
2025-07-21 10:39:09 +02:00
AMDGPUCallLowering.h
[AMDGPU] ISel & PEI for whole wave functions (#145858)
2025-07-21 10:39:09 +02:00
AMDGPUCodeGenPrepare.cpp
[AMDGPU] Remove widen-16-bit-ops from CGP (#145483)
2025-07-16 10:14:19 +02:00
AMDGPUCombine.td
[AMDGPU] Canonicalize G_ZEXT of the shift amount in RegBankCombiner (#131792)
2025-05-14 10:48:51 +02:00
AMDGPUCombinerHelper.cpp
[GlobalISel][NFC] Rename GISelKnownBits to GISelValueTracking (#133466)
2025-03-29 11:51:29 +01:00
AMDGPUCombinerHelper.h
[GlobalISel][NFC] Rename GISelKnownBits to GISelValueTracking (#133466)
2025-03-29 11:51:29 +01:00
AMDGPUCtorDtorLowering.cpp
AMDGPU: Add instruction flags when lowering ctor/dtor (#111652)
2024-10-09 18:03:35 +04:00
AMDGPUCtorDtorLowering.h
…
AMDGPUExportClustering.cpp
[AMDGPU] Remove unused includes (NFC) (#141376)
2025-05-24 14:48:46 -07:00
AMDGPUExportClustering.h
…
AMDGPUExportKernelRuntimeHandles.cpp
AMDGPU: Move enqueued block handling into clang (#128519)
2025-03-10 19:54:04 +07:00
AMDGPUExportKernelRuntimeHandles.h
AMDGPU: Move enqueued block handling into clang (#128519)
2025-03-10 19:54:04 +07:00
AMDGPUFeatures.td
AMDGPU: Increase the LDS size to support to 160 KB for gfx950 (#116309)
2024-11-18 10:48:56 -08:00
AMDGPUFrameLowering.cpp
…
AMDGPUFrameLowering.h
…
AMDGPUGenRegisterBankInfo.def
…
AMDGPUGISel.td
[AMDGPU] Support builtin/intrinsics for async loads/stores on gfx1250 (#151058)
2025-07-29 08:20:05 -07:00
AMDGPUGlobalISelDivergenceLowering.cpp
[NFC][LLVM][AMDGPU] Cleanup pass initialization for AMDGPU (#134410)
2025-04-07 17:27:50 -07:00
AMDGPUGlobalISelUtils.cpp
AMDGPU/GlobalISel: Add waterfall lowering in regbanklegalize (#145912)
2025-07-23 16:47:00 +02:00
AMDGPUGlobalISelUtils.h
AMDGPU/GlobalISel: Add waterfall lowering in regbanklegalize (#145912)
2025-07-23 16:47:00 +02:00
AMDGPUHSAMetadataStreamer.cpp
AMDGPU: Move enqueued block handling into clang (#128519)
2025-03-10 19:54:04 +07:00
AMDGPUHSAMetadataStreamer.h
AMDGPU: Move enqueued block handling into clang (#128519)
2025-03-10 19:54:04 +07:00
AMDGPUIGroupLP.cpp
Revert "[llvm][NFC] Use llvm::sort()" (#140668)
2025-05-20 11:27:03 +08:00
AMDGPUIGroupLP.h
…
AMDGPUImageIntrinsicOptimizer.cpp
[AMDGPU] Change placeholder from undef to poison (#130853)
2025-03-12 12:52:38 +00:00
AMDGPUInsertDelayAlu.cpp
AMDGPU: Treat WMMA XDL ops as TRANS in S_DELAY_ALU insertion for gfx1250 (#149208)
2025-07-16 17:07:48 -07:00
AMDGPUInstCombineIntrinsic.cpp
AMDGPU: Support v_wmma_f32_16x16x128_f8f6f4 on gfx1250 (#149684)
2025-07-21 10:09:42 -07:00
AMDGPUInstrInfo.cpp
AMDGPU: Remove AMDGPUInstrInfo class (#144984)
2025-06-20 18:26:56 +09:00
AMDGPUInstrInfo.h
AMDGPU: Remove AMDGPUInstrInfo class (#144984)
2025-06-20 18:26:56 +09:00
AMDGPUInstrInfo.td
[AMDGPU] ISel & PEI for whole wave functions (#145858)
2025-07-21 10:39:09 +02:00
AMDGPUInstructions.td
AMDGPU: Directly select minimumnum/maximumnum with ieee_mode=0 (#141903)
2025-06-18 00:27:41 +09:00
AMDGPUInstructionSelector.cpp
[AMDGPU] Support builtin/intrinsics for async loads/stores on gfx1250 (#151058)
2025-07-29 08:20:05 -07:00
AMDGPUInstructionSelector.h
[AMDGPU] Support builtin/intrinsics for async loads/stores on gfx1250 (#151058)
2025-07-29 08:20:05 -07:00
AMDGPUISelDAGToDAG.cpp
[AMDGPU] Support builtin/intrinsics for async loads/stores on gfx1250 (#151058)
2025-07-29 08:20:05 -07:00
AMDGPUISelDAGToDAG.h
[AMDGPU] Support builtin/intrinsics for async loads/stores on gfx1250 (#151058)
2025-07-29 08:20:05 -07:00
AMDGPUISelLowering.cpp
[NFC][AMDGPU] Move cmp+select arguments optimization to SIISelLowering. (#150929)
2025-07-28 22:11:36 +02:00
AMDGPUISelLowering.h
[AMDGPU] ISel & PEI for whole wave functions (#145858)
2025-07-21 10:39:09 +02:00
AMDGPULateCodeGenPrepare.cpp
[AMDGPU] Visit all PHIs in each call to optimizeLiveType (#147522)
2025-07-10 09:29:48 +02:00
AMDGPULegalizerInfo.cpp
[AMDGPU] Support f64 atomics on gfx1250 (#151172)
2025-07-29 09:41:00 -07:00
AMDGPULegalizerInfo.h
[AMDGPU] Support image_bvh8_intersect_ray instruction and intrinsic. (#130041)
2025-03-19 16:08:08 +01:00
AMDGPULibCalls.cpp
[ValueTracking] Make Depth last default arg (NFC) (#142384)
2025-06-03 17:12:24 +01:00
AMDGPULibFunc.cpp
[AMDGPU] Provide default value in get intrinsic param type (#122448)
2025-01-10 15:29:42 +01:00
AMDGPULibFunc.h
AMDGPU: Verify function type matches when matching libcalls (#119043)
2024-12-16 15:01:48 +09:00
AMDGPULowerBufferFatPointers.cpp
[DebugInfo] Remove intrinsic-flavours of findDbgUsers (#149816)
2025-07-21 17:49:25 +01:00
AMDGPULowerKernelArguments.cpp
[AMDGPU] Move kernarg preload logic to separate pass (#130434)
2025-05-11 21:18:11 -07:00
AMDGPULowerKernelAttributes.cpp
[AMDGPU] Add a new function getIntegerPairAttribute (#133271)
2025-03-27 15:38:54 -04:00
AMDGPULowerModuleLDSPass.cpp
AMDGPU: Use reportFatalUsageError in AMDGPULowerModuleLDS (#145130)
2025-06-21 12:18:25 +09:00
AMDGPUMachineFunction.cpp
[AMDGPU] Remove unused includes (NFC) (#116154)
2024-11-13 21:10:03 -08:00
AMDGPUMachineFunction.h
…
AMDGPUMachineModuleInfo.cpp
[NFC][LLVM][AMDGPU] Cleanup pass initialization for AMDGPU (#134410)
2025-04-07 17:27:50 -07:00
AMDGPUMachineModuleInfo.h
…
AMDGPUMacroFusion.cpp
…
AMDGPUMacroFusion.h
[CodeGen] Move MISched target hooks into TargetMachine (#125700)
2025-02-05 11:41:37 +05:30
AMDGPUMarkLastScratchLoad.cpp
[NFC][LLVM][AMDGPU] Cleanup pass initialization for AMDGPU (#134410)
2025-04-07 17:27:50 -07:00
AMDGPUMCInstLower.cpp
[AMDGPU] gfx1250 64-bit relocations and fixups (#148951)
2025-07-15 17:13:42 -07:00
AMDGPUMCInstLower.h
[AMDGPU][True16][CodeGen] reopen "FLAT_load using D16 pseudo instruction" (#127673)
2025-02-18 18:16:23 -05:00
AMDGPUMCResourceInfo.cpp
[AMDGPU][NewPM] Port "AMDGPUResourceUsageAnalysis" to NPM (#130959)
2025-07-10 13:35:43 +05:30
AMDGPUMCResourceInfo.h
[AMDGPU][NewPM] Port "AMDGPUResourceUsageAnalysis" to NPM (#130959)
2025-07-10 13:35:43 +05:30
AMDGPUMemoryUtils.cpp
AMDGPU: Use reportFatalUsageError for LDS mixed absolute addresses (#145135)
2025-06-21 23:54:27 +09:00
AMDGPUMemoryUtils.h
[AMDGPU] modify named barrier builtins and intrinsics (#114550)
2024-11-06 10:37:22 -08:00
AMDGPUMIRFormatter.cpp
[AMDGPU] Remove unused includes (NFC) (#116154)
2024-11-13 21:10:03 -08:00
AMDGPUMIRFormatter.h
…
AMDGPUPassRegistry.def
AMDGPU: Add pass to replace constant materialize with AV pseudos (#149292)
2025-07-18 17:15:38 +09:00
AMDGPUPerfHintAnalysis.cpp
[AMDGPU] Qualify auto. NFC. (#110878)
2024-10-03 13:07:54 +01:00
AMDGPUPerfHintAnalysis.h
…
AMDGPUPostLegalizerCombiner.cpp
[NFC][CodeGen] Adopt MachineFunctionProperties convenience accessors (#141101)
2025-05-23 08:30:29 -07:00
AMDGPUPredicateControl.td
…
AMDGPUPreLegalizerCombiner.cpp
[NFC][CodeGen] Adopt MachineFunctionProperties convenience accessors (#141101)
2025-05-23 08:30:29 -07:00
AMDGPUPreloadKernArgProlog.cpp
[AMDGPU][NPM] Cleanup AMDGPUPassRegistry.def (#130071)
2025-04-17 10:08:22 +05:30
AMDGPUPreloadKernArgProlog.h
[AMDGPU] Add backward compatibility layer for kernarg preloading (#119167)
2025-01-10 11:39:02 -08:00
AMDGPUPreloadKernelArguments.cpp
[DebugInfo][RemoveDIs] Delete debug-info-format flag (#143746)
2025-06-12 11:51:58 +01:00
AMDGPUPrepareAGPRAlloc.cpp
AMDGPU: Add pass to replace constant materialize with AV pseudos (#149292)
2025-07-18 17:15:38 +09:00
AMDGPUPrepareAGPRAlloc.h
AMDGPU: Add pass to replace constant materialize with AV pseudos (#149292)
2025-07-18 17:15:38 +09:00
AMDGPUPrintfRuntimeBinding.cpp
[AMDGPU] Support 'F' and 'A' conversion specifiers with ocl printf (#148784)
2025-07-15 13:24:08 +05:30
AMDGPUPromoteAlloca.cpp
[AMDGPU] Replace dynamic VGPR feature with attribute (#133444)
2025-06-24 11:09:36 +02:00
AMDGPUPromoteKernelArguments.cpp
…
AMDGPUPTNote.h
…
AMDGPURegBankCombiner.cpp
[NFC][CodeGen] Adopt MachineFunctionProperties convenience accessors (#141101)
2025-05-23 08:30:29 -07:00
AMDGPURegBankLegalize.cpp
AMDGPU/GlobalISel: Improve readanylane combines in regbanklegalize (#145911)
2025-07-23 16:44:53 +02:00
AMDGPURegBankLegalizeHelper.cpp
AMDGPU/GlobalISel: Add waterfall lowering in regbanklegalize (#145912)
2025-07-23 16:47:00 +02:00
AMDGPURegBankLegalizeHelper.h
AMDGPU/GlobalISel: Add waterfall lowering in regbanklegalize (#145912)
2025-07-23 16:47:00 +02:00
AMDGPURegBankLegalizeRules.cpp
AMDGPU/GlobalISel: Add waterfall lowering in regbanklegalize (#145912)
2025-07-23 16:47:00 +02:00
AMDGPURegBankLegalizeRules.h
AMDGPU/GlobalISel: Add waterfall lowering in regbanklegalize (#145912)
2025-07-23 16:47:00 +02:00
AMDGPURegBankSelect.cpp
[NFC][CodeGen] Adopt MachineFunctionProperties convenience accessors (#141101)
2025-05-23 08:30:29 -07:00
AMDGPURegisterBankInfo.cpp
[AMDGPU] Support builtin/intrinsics for async loads/stores on gfx1250 (#151058)
2025-07-29 08:20:05 -07:00
AMDGPURegisterBankInfo.h
…
AMDGPURegisterBanks.td
[AMDGPU][True16][CodeGen] uaddsat/usubsat true16 selection in gisel (#128233)
2025-02-25 17:09:34 -05:00
AMDGPURemoveIncompatibleFunctions.cpp
[AMDGPU][NewPM] Port AMDGPURemoveIncompatibleFunctions to NPM (#122261)
2025-01-13 10:11:40 +05:30
AMDGPURemoveIncompatibleFunctions.h
[AMDGPU][NewPM] Port AMDGPURemoveIncompatibleFunctions to NPM (#122261)
2025-01-13 10:11:40 +05:30
AMDGPUReserveWWMRegs.cpp
[AMDGPU] Remove unused includes (NFC) (#141376)
2025-05-24 14:48:46 -07:00
AMDGPUReserveWWMRegs.h
[AMDGPU][NewPM] Port AMDGPUReserveWWMRegs to NPM (#123722)
2025-03-10 17:36:35 +05:30
AMDGPUResourceUsageAnalysis.cpp
[AMDGPU] Use SIRegisterInfo to compute used registers. NFCI (#149051)
2025-07-18 09:22:37 +02:00
AMDGPUResourceUsageAnalysis.h
[AMDGPU][NewPM] Port "AMDGPUResourceUsageAnalysis" to NPM (#130959)
2025-07-10 13:35:43 +05:30
AMDGPURewriteAGPRCopyMFMA.cpp
AMDGPU: Fix asserting on non-register mfma src2 (#150552)
2025-07-25 10:13:53 +09:00
AMDGPURewriteOutArguments.cpp
[DebugInfo][RemoveDIs] Delete debug-info-format flag (#143746)
2025-06-12 11:51:58 +01:00
AMDGPURewriteUndefForPHI.cpp
[NFC][LLVM][AMDGPU] Cleanup pass initialization for AMDGPU (#134410)
2025-04-07 17:27:50 -07:00
AMDGPUSearchableTables.td
AMDGPU: Support intrinsic selection for gfx1250 wmma instructions (#148957)
2025-07-15 15:25:05 -07:00
AMDGPUSelectionDAGInfo.cpp
[SelectionDAG] Virtualize isTargetStrictFPOpcode / isTargetMemoryOpcode (#119969)
2024-12-21 05:29:51 +03:00
AMDGPUSelectionDAGInfo.h
[SelectionDAG] Virtualize isTargetStrictFPOpcode / isTargetMemoryOpcode (#119969)
2024-12-21 05:29:51 +03:00
AMDGPUSetWavePriority.cpp
[AMDGPU] AMDGPUSetWavePriority: Remove unused variable NFC (#134069)
2025-04-02 16:52:05 +05:30
AMDGPUSplitModule.cpp
[AMDGPU][SplitModule] Do not create empty modules (#135761)
2025-04-25 09:36:41 +02:00
AMDGPUSplitModule.h
…
AMDGPUSubtarget.cpp
[AMDGPU] Fix computation of waves/EU maximum (#140921)
2025-05-22 02:45:59 +02:00
AMDGPUSubtarget.h
AMDGPU: Support packed bf16 instructions on gfx1250 (#150283)
2025-07-23 12:01:23 -07:00
AMDGPUSwLowerLDS.cpp
[AMDGPU] Remove unused includes (NFC) (#141376)
2025-05-24 14:48:46 -07:00
AMDGPUTargetMachine.cpp
[HIPSTDPAR] Add handling for math builtins (#140158)
2025-07-28 22:29:31 +01:00
AMDGPUTargetMachine.h
AMDGPU: Add pass to replace constant materialize with AV pseudos (#149292)
2025-07-18 17:15:38 +09:00
AMDGPUTargetObjectFile.cpp
…
AMDGPUTargetObjectFile.h
…
AMDGPUTargetTransformInfo.cpp
AMDGPU: Fix runtime unrolling when cascaded GEPs present (#147700)
2025-07-10 03:44:04 -05:00
AMDGPUTargetTransformInfo.h
[AMDGPU] Enable vectorization of i8 values. (#134934)
2025-06-26 19:15:31 -04:00
AMDGPUUnifyDivergentExitNodes.cpp
[NFC][LLVM][AMDGPU] Cleanup pass initialization for AMDGPU (#134410)
2025-04-07 17:27:50 -07:00
AMDGPUUnifyDivergentExitNodes.h
…
AMDGPUUnifyMetadata.cpp
AMDGPU: Remove legacy pass manager version of AMDGPUUnifyMetadata (#144985)
2025-06-20 16:44:06 +09:00
AMDGPUWaitSGPRHazards.cpp
[llvm] Use llvm::any_of (NFC) (#141444)
2025-05-26 09:13:21 -07:00
AMDGPUWaitSGPRHazards.h
[AMDGPU] Rewrite GFX12 SGPR hazard handling to dedicated pass (#118750)
2025-01-30 11:21:11 +09:00
AMDKernelCodeT.h
…
BUFInstructions.td
[AMDGPU] Support f64 atomics on gfx1250 (#151172)
2025-07-29 09:41:00 -07:00
CaymanInstructions.td
…
CMakeLists.txt
AMDGPU: Add pass to replace constant materialize with AV pseudos (#149292)
2025-07-18 17:15:38 +09:00
DSDIRInstructions.td
AMDGPU: Remove LDS-direct(param)-loads and VINTERP ops from gfx1250 support (#145631)
2025-06-24 22:44:35 -07:00
DSInstructions.td
[AMDGPU] Support f64 atomics on gfx1250 (#151172)
2025-07-29 09:41:00 -07:00
EvergreenInstructions.td
…
EXPInstructions.td
AMDGPU: Remove export and related instructions from gfx1250 support (#145624)
2025-06-24 19:59:26 -07:00
FLATInstructions.td
[AMDGPU] Support f64 atomics on gfx1250 (#151172)
2025-07-29 09:41:00 -07:00
GCNCreateVOPD.cpp
[AMDGPU] VOPD/VOPD3 changes for gfx1250 (#147602)
2025-07-10 14:15:01 -07:00
GCNDPPCombine.cpp
[NFC][CodeGen] Adopt MachineFunctionProperties convenience accessors (#141101)
2025-05-23 08:30:29 -07:00
GCNDPPCombine.h
[NFC][CodeGen] Adopt MachineFunctionProperties convenience accessors (#141101)
2025-05-23 08:30:29 -07:00
GCNHazardRecognizer.cpp
[AMDGPU] Hazard handling for gfx1250 wmma instructions (#149865)
2025-07-21 13:24:10 -07:00
GCNHazardRecognizer.h
[AMDGPU] Hazard handling for gfx1250 wmma instructions (#149865)
2025-07-21 13:24:10 -07:00
GCNILPSched.cpp
[AMDGPU] Qualify auto. NFC. (#110878)
2024-10-03 13:07:54 +01:00
GCNIterativeScheduler.cpp
[AMDGPU] Replace dynamic VGPR feature with attribute (#133444)
2025-06-24 11:09:36 +02:00
GCNIterativeScheduler.h
[AMDGPU] Teach iterative schedulers about IGLP (#134953)
2025-04-11 15:34:49 -07:00
GCNMinRegStrategy.cpp
[AMDGPU] Qualify auto. NFC. (#110878)
2024-10-03 13:07:54 +01:00
GCNNSAReassign.cpp
[AMDGPU] Replace dynamic VGPR feature with attribute (#133444)
2025-06-24 11:09:36 +02:00
GCNNSAReassign.h
[AMDGPU][NewPM] Port GCNNSAReassign pass to new pass manager (#125034)
2025-02-18 11:13:31 +05:30
GCNPreRALongBranchReg.cpp
[CodeGen][NewPM] Port GCNPreRALongBranchReg to NPM. (#125844)
2025-02-05 18:46:27 +05:30
GCNPreRALongBranchReg.h
[CodeGen][NewPM] Port GCNPreRALongBranchReg to NPM. (#125844)
2025-02-05 18:46:27 +05:30
GCNPreRAOptimizations.cpp
[AMDGPU][True16][CodeGen] update test for buildbot failure (#131028)
2025-03-12 16:59:48 -04:00
GCNPreRAOptimizations.h
[AMDGPU][NewPM] Port "GCNPreRAOptimizations" pass to NPM (#126040)
2025-02-11 11:09:38 +05:30
GCNProcessors.td
AMDGPU: Remove "gds" feature from generic targets (#148269)
2025-07-11 12:40:13 -07:00
GCNRegPressure.cpp
[AMDGPU] NFCI: Track AV Register Pressure separately (#149863)
2025-07-25 12:11:52 -07:00
GCNRegPressure.h
[AMDGPU] NFCI: Track AV Register Pressure separately (#149863)
2025-07-25 12:11:52 -07:00
GCNRewritePartialRegUses.cpp
[AMDGPU] Simplify GCNRewritePartialRegUses pass. (#135199)
2025-04-11 15:45:24 +02:00
GCNRewritePartialRegUses.h
[AMDGPU][NewPM] Port "GCNRewritePartialRegUses" pass to NPM (#126024)
2025-02-12 11:21:40 +05:30
GCNSchedStrategy.cpp
[AMDGPU][Scheduler] Use AMDGPU::NoSubRegister instead of 0 (NFC) (#150610)
2025-07-25 14:25:13 +02:00
GCNSchedStrategy.h
[AMDGPU][Scheduler] Support for rematerializing SGPRs and AGPRs (#140036)
2025-06-24 19:30:27 +02:00
GCNSubtarget.cpp
AMDGPU: Move getMaxNumVectorRegs into GCNSubtarget (NFC) (#150889)
2025-07-28 17:25:20 +09:00
GCNSubtarget.h
[AMDGPU] Support f64 atomics on gfx1250 (#151172)
2025-07-29 09:41:00 -07:00
GCNVOPDUtils.cpp
[AMDGPU] VOPD/VOPD3 changes for gfx1250 (#147602)
2025-07-10 14:15:01 -07:00
GCNVOPDUtils.h
[AMDGPU] VOPD/VOPD3 changes for gfx1250 (#147602)
2025-07-10 14:15:01 -07:00
InstCombineTables.td
…
MIMGInstructions.td
AMDGPU: Implement tensor load and store instructions for gfx1250 (#146636)
2025-07-03 13:49:34 -07:00
R600.h
[NFC][LLVM][AMDGPU] Cleanup pass initialization for AMDGPU (#134410)
2025-04-07 17:27:50 -07:00
R600.td
…
R600AsmPrinter.cpp
…
R600AsmPrinter.h
[RISCV] Replace @plt/@gotpcrel in data directives with %pltpcrel %gotpcrel
2025-03-29 11:08:13 -07:00
R600ClauseMergePass.cpp
…
R600ControlFlowFinalizer.cpp
…
R600Defines.h
…
R600EmitClauseMarkers.cpp
[NFC][LLVM][AMDGPU] Cleanup pass initialization for AMDGPU (#134410)
2025-04-07 17:27:50 -07:00
R600ExpandSpecialInstrs.cpp
[CodeGen] Remove FinalizeMachineBundles pass (#149806)
2025-07-23 11:36:49 +01:00
R600FrameLowering.cpp
…
R600FrameLowering.h
[llvm] Consistently respect naked fn attribute in TargetFrameLowering::hasFP() (#106014)
2024-10-18 09:35:42 +04:00
R600InstrFormats.td
…
R600InstrInfo.cpp
[MC] Return MCRegister from MCRegisterClass::getRegister. NFC (#132126)
2025-03-20 07:24:53 -07:00
R600InstrInfo.h
[CodeGen] Change copyPhysReg interface to use Register instead of MCRegister. (#128473)
2025-02-24 09:55:34 -08:00
R600InstrInfo.td
…
R600Instructions.td
…
R600ISelDAGToDAG.cpp
[AMDGPU] Remove unused includes (NFC) (#141376)
2025-05-24 14:48:46 -07:00
R600ISelLowering.cpp
AMDGPU: Use reportFatalUsageError for unhandled calling conventions (#145261)
2025-06-23 15:30:13 +09:00
R600ISelLowering.h
…
R600MachineCFGStructurizer.cpp
[NFC][CodeGen] Adopt MachineFunctionProperties convenience accessors (#141101)
2025-05-23 08:30:29 -07:00
R600MachineFunctionInfo.cpp
…
R600MachineFunctionInfo.h
…
R600MachineScheduler.cpp
…
R600MachineScheduler.h
…
R600MCInstLower.cpp
[RISCV] Replace @plt/@gotpcrel in data directives with %pltpcrel %gotpcrel
2025-03-29 11:08:13 -07:00
R600OpenCLImageTypeLoweringPass.cpp
[AMDGPU] Qualify auto. NFC. (#110878)
2024-10-03 13:07:54 +01:00
R600OptimizeVectorRegisters.cpp
[AMDGPU] Use MachineRegisterInfo::def_instructions (NFC) (#142782)
2025-06-04 12:30:56 -07:00
R600Packetizer.cpp
[TableGen] Emit OpName as an enum class instead of a namespace (#125313)
2025-02-12 08:19:30 -08:00
R600Processors.td
[AMDGPU] Rename LocalMemorySize features to AddressableLocalMemorySize (#110242)
2024-09-30 10:29:31 +01:00
R600RegisterInfo.cpp
…
R600RegisterInfo.h
…
R600RegisterInfo.td
…
R600Schedule.td
…
R600Subtarget.cpp
[SelectionDAG] Add empty implementation of SelectionDAGInfo to some targets (#119968)
2024-12-16 15:13:46 +03:00
R600Subtarget.h
[SelectionDAG] Add empty implementation of SelectionDAGInfo to some targets (#119968)
2024-12-16 15:13:46 +03:00
R600TargetMachine.cpp
[CodeGen] Remove FinalizeMachineBundles pass (#149806)
2025-07-23 11:36:49 +01:00
R600TargetMachine.h
[CodeGen] Move MISched target hooks into TargetMachine (#125700)
2025-02-05 11:41:37 +05:30
R600TargetTransformInfo.cpp
[CostModel] Make Op0 and Op1 const in getVectorInstrCost. NFC (#137631)
2025-05-01 15:55:08 +01:00
R600TargetTransformInfo.h
[CostModel] Make Op0 and Op1 const in getVectorInstrCost. NFC (#137631)
2025-05-01 15:55:08 +01:00
R700Instructions.td
…
SIAnnotateControlFlow.cpp
AMDGPU: Rename variable from undef to poison (#130460)
2025-03-10 22:18:36 +07:00
SIDefines.h
[AMDGPU] Select VMEM prefetch for llvm.prefetch on gfx1250 (#150493)
2025-07-24 13:22:50 -07:00
SIFixSGPRCopies.cpp
[AMDGPU] Fix sgpr to vreg_1 copy analysis (#149181)
2025-07-18 14:08:50 +09:00
SIFixSGPRCopies.h
…
SIFixVGPRCopies.cpp
[AMDGPU][NewPM] Port SIFixVGPRCopies to NPM (#123592)
2025-01-21 15:27:46 +05:30
SIFixVGPRCopies.h
[AMDGPU][NewPM] Port SIFixVGPRCopies to NPM (#123592)
2025-01-21 15:27:46 +05:30
SIFoldOperands.cpp
AMDGPU: Fix not folding splat immediate into VGPR MFMA src2 (#150628)
2025-07-26 13:54:49 +09:00
SIFoldOperands.h
[NFC][CodeGen] Adopt MachineFunctionProperties convenience accessors (#141101)
2025-05-23 08:30:29 -07:00
SIFormMemoryClauses.cpp
[AMDGPU] Replace dynamic VGPR feature with attribute (#133444)
2025-06-24 11:09:36 +02:00
SIFormMemoryClauses.h
[AMDGPU][NewPM] Port "SIFormMemoryClauses" to NPM (#127181)
2025-02-17 11:07:17 +05:30
SIFrameLowering.cpp
[AMDGPU] ISel & PEI for whole wave functions (#145858)
2025-07-21 10:39:09 +02:00
SIFrameLowering.h
Reland [AMDGPU] Support block load/store for CSR #130013 (#137169)
2025-04-25 11:29:27 +02:00
SIInsertHardClauses.cpp
[AMDGPU] SIInsertHardClause: add configurable clause length limit (#142343)
2025-06-04 15:00:34 +09:00
SIInsertWaitcnts.cpp
[AMDGPU][gfx1250] Use SCOPE_SE for stores that may hit scratch (#150586)
2025-07-28 11:40:56 +02:00
SIInstrFormats.td
[AMDGPU] MC support for gfx1250 scale_offset modifier (#149881)
2025-07-21 15:04:59 -07:00
SIInstrInfo.cpp
[AMDGPU][CodeGen][True16] Correct size calculation for d16 insts (#151042)
2025-07-29 13:01:57 -04:00
SIInstrInfo.h
[AMDGPU][gfx1250] Use SCOPE_SE for stores that may hit scratch (#150586)
2025-07-28 11:40:56 +02:00
SIInstrInfo.td
[AMDGPU] Support AMDGPUClamp for bf16 on gfx1250 (#150663)
2025-07-25 12:13:06 -07:00
SIInstructions.td
[AMDGPU] Support AMDGPUClamp for bf16 on gfx1250 (#150663)
2025-07-25 12:13:06 -07:00
SIISelLowering.cpp
[AMDGPU] Support builtin/intrinsics for async loads/stores on gfx1250 (#151058)
2025-07-29 08:20:05 -07:00
SIISelLowering.h
[NFC][AMDGPU] Move cmp+select arguments optimization to SIISelLowering. (#150929)
2025-07-28 22:11:36 +02:00
SILateBranchLowering.cpp
[AMDGPU][NPM] Port SILateBranchLowering to NPM (#130063)
2025-03-26 19:28:19 +05:30
SILoadStoreOptimizer.cpp
[AMDGPU] Prohibit load/store merge if scale_offset is set on gfx1250 (#149895)
2025-07-21 15:41:24 -07:00
SILoadStoreOptimizer.h
[NFC][CodeGen] Adopt MachineFunctionProperties convenience accessors (#141101)
2025-05-23 08:30:29 -07:00
SILowerControlFlow.cpp
[AMDGPU][NewPM] Port SILowerControlFlow pass into NPM. (#123045)
2025-01-16 11:06:38 +05:30
SILowerControlFlow.h
[AMDGPU][NewPM] Port SILowerControlFlow pass into NPM. (#123045)
2025-01-16 11:06:38 +05:30
SILowerI1Copies.cpp
[NFC][CodeGen] Adopt MachineFunctionProperties convenience accessors (#141101)
2025-05-23 08:30:29 -07:00
SILowerI1Copies.h
AMDGPU/GlobalISel: Temporal divergence lowering (non i1) (#124298)
2025-03-12 12:09:37 +01:00
SILowerSGPRSpills.cpp
AMDGPU: Move getMaxNumVectorRegs into GCNSubtarget (NFC) (#150889)
2025-07-28 17:25:20 +09:00
SILowerSGPRSpills.h
[NFC][CodeGen] Adopt MachineFunctionProperties convenience accessors (#141101)
2025-05-23 08:30:29 -07:00
SILowerWWMCopies.cpp
[AMDGPU][NewPM] Port SILowerWWMCopies to NPM (#123695)
2025-01-22 14:54:01 +05:30
SILowerWWMCopies.h
[AMDGPU][NewPM] Port SILowerWWMCopies to NPM (#123695)
2025-01-22 14:54:01 +05:30
SIMachineFunctionInfo.cpp
AMDGPU: Fix -amdgpu-mfma-vgpr-form flag on gfx908 (#150599)
2025-07-25 19:49:56 +09:00
SIMachineFunctionInfo.h
[AMDGPU] ISel & PEI for whole wave functions (#145858)
2025-07-21 10:39:09 +02:00
SIMachineScheduler.cpp
[AMDGPU] Use MachineRegisterInfo::def_instructions (NFC) (#142782)
2025-06-04 12:30:56 -07:00
SIMachineScheduler.h
[AMDGPU] Replace unsigned with Register in SIMachineScheduler. NFC
2025-01-26 00:26:00 -08:00
SIMemoryLegalizer.cpp
[AMDGPU][gfx1250] Add cu-store subtarget feature (#150588)
2025-07-29 11:38:43 +02:00
SIModeRegister.cpp
[AMDGPU][NPM] Port SIModeRegister to NPM (#129014)
2025-03-04 10:51:03 +05:30
SIModeRegisterDefaults.cpp
…
SIModeRegisterDefaults.h
…
SIOptimizeExecMasking.cpp
[AMDGPU][True16][CodeGen] True16 Add OpSel when optimizing exec mask (#128928)
2025-02-28 09:41:05 -05:00
SIOptimizeExecMasking.h
[AMDGPU][NewPM] Port SIOptimizeExecMasking to NPM (#123572)
2025-01-20 16:34:01 +05:30
SIOptimizeExecMaskingPreRA.cpp
[AMDGPU][NewPM] Port SIOptimizeExecMaskingPreRA to NPM (#125351)
2025-02-20 17:35:56 +05:30
SIOptimizeExecMaskingPreRA.h
[AMDGPU][NewPM] Port SIOptimizeExecMaskingPreRA to NPM (#125351)
2025-02-20 17:35:56 +05:30
SIOptimizeVGPRLiveRange.cpp
[NFC][CodeGen] Adopt MachineFunctionProperties convenience accessors (#141101)
2025-05-23 08:30:29 -07:00
SIOptimizeVGPRLiveRange.h
[NFC][CodeGen] Adopt MachineFunctionProperties convenience accessors (#141101)
2025-05-23 08:30:29 -07:00
SIPeepholeSDWA.cpp
[AMDGPU][MC] Allow opsel for v_max_i16 etc in GFX10 (#143982)
2025-06-26 14:08:13 -07:00
SIPeepholeSDWA.h
…
SIPostRABundler.cpp
AMDGPU: VIMAGE/VSAMPLE are bundle candidates (#140854)
2025-05-28 08:47:05 +08:00
SIPostRABundler.h
[AMDGPU][NewPM] Port SIPostRABundler to NPM (#123717)
2025-02-21 16:05:58 +05:30
SIPreAllocateWWMRegs.cpp
[AMDGPU] Remove unused includes (NFC) (#116154)
2024-11-13 21:10:03 -08:00
SIPreAllocateWWMRegs.h
[NewPM][AMDGPU] Port SIPreAllocateWWMRegs to NPM (#109939)
2024-10-22 15:37:08 +05:30
SIPreEmitPeephole.cpp
[AMDGPU][NPM] Port SIPreEmitPeephole to NPM (#130065)
2025-04-08 17:58:48 +05:30
SIProgramInfo.cpp
[AMDGPU] Enable FWD_PROGRESS bit for GFX10+ on PAL (#139895)
2025-07-21 17:29:06 +01:00
SIProgramInfo.h
[llvm][AMDGPU] Enable FWD_PROGRESS bit for GFX10+ (#128367)
2025-03-17 23:17:46 +00:00
SIRegisterInfo.cpp
AMDGPU: Move getMaxNumVectorRegs into GCNSubtarget (NFC) (#150889)
2025-07-28 17:25:20 +09:00
SIRegisterInfo.h
AMDGPU: Move getMaxNumVectorRegs into GCNSubtarget (NFC) (#150889)
2025-07-28 17:25:20 +09:00
SIRegisterInfo.td
[AMDGPU] Allocate AVRegClass last (#146606)
2025-07-25 13:46:41 -07:00
SISchedule.td
AMDGPU: Support v_wmma_f32_16x16x128_f8f6f4 on gfx1250 (#149684)
2025-07-21 10:09:42 -07:00
SIShrinkInstructions.cpp
[AMDGPU] Codegen support for v_fmaak_f64/f_fmamk_f64 (#148734)
2025-07-14 17:57:06 -07:00
SIShrinkInstructions.h
…
SIWholeQuadMode.cpp
[NFC][CodeGen] Adopt MachineFunctionProperties convenience accessors (#141101)
2025-05-23 08:30:29 -07:00
SIWholeQuadMode.h
[NFC][CodeGen] Adopt MachineFunctionProperties convenience accessors (#141101)
2025-05-23 08:30:29 -07:00
SMInstructions.td
[AMDGPU] Select VMEM prefetch for llvm.prefetch on gfx1250 (#150493)
2025-07-24 13:22:50 -07:00
SOPInstructions.td
[AMDGPU] Use S_ADD_PC_I64 for long branches in gfx1250 (#148961)
2025-07-15 17:14:56 -07:00
VIInstrFormats.td
…
VINTERPInstructions.td
[AMDGPU][True16][CodeGen] support for true16 for vinterp 16bit instructions (#116702)
2024-12-09 11:52:05 -05:00
VOP1Instructions.td
[AMDGPU] Add support for v_sat_pk4_i4_[i8,u8] on gfx1250 (#149528)
2025-07-18 13:08:50 -04:00
VOP2Instructions.td
[AMDGPU] Add V_ADD|SUB|MUL_U64 gfx1250 opcodes (#150291)
2025-07-23 13:17:56 -07:00
VOP3Instructions.td
[AMDGPU] Add support for v_cvt_pk_bf16_f32 on gfx1250 (#150053)
2025-07-22 20:00:50 -04:00
VOP3PInstructions.td
[AMDGPU] Support AMDGPUClamp for bf16 on gfx1250 (#150663)
2025-07-25 12:13:06 -07:00
VOPCInstructions.td
[AMDGPU] VOPD/VOPD3 changes for gfx1250 (#147602)
2025-07-10 14:15:01 -07:00
VOPDInstructions.td
[AMDGPU] VOPD/VOPD3 changes for gfx1250 (#147602)
2025-07-10 14:15:01 -07:00
VOPInstructions.td
AMDGPU: Support v_wmma_f32_16x16x128_f8f6f4 on gfx1250 (#149684)
2025-07-21 10:09:42 -07:00