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llvm-project/llvm/test/CodeGen/AMDGPU
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Sameer Sahasrabuddhe 5f6172f068 [Transforms] Refactor CreateControlFlowHub (#103013) 
CreateControlFlowHub is a method that redirects control flow edges from a set of
incoming blocks to a set of outgoing blocks through a new set of "guard" blocks.
This is now refactored into a separate file with one enhancement: The input to
the method is now a set of branches rather than two sets of blocks.

The original implementation reroutes every edge from incoming blocks to outgoing
blocks. But it is possible that for some incoming block InBB, some successor S
might be in the set of outgoing blocks, but that particular edge should not be
rerouted. The new implementation makes this possible by allowing the user to
specify the targets of each branch that need to be rerouted.

This is needed when improving the implementation of FixIrreducible #101386.
Current use in FixIrreducible does not demonstrate this finer control over the
edges being rerouted. But in UnifyLoopExits, when only one successor of an
exiting block is an exit block, this refinement now reroutes only the relevant
control-flow through the edge; the non-exit successor is not rerouted. This
results in fewer branches and PHI nodes in the hub.
2024-08-22 12:18:01 +05:30
..
GlobalISel
AMDGPU: Handle folding frame indexes into s_add_i32 (#101694)
2024-08-22 09:16:37 +04:00
32-bit-local-address-space.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
aa-points-to-constant-memory.ll
…
abi-attribute-hints-undefined-behavior.ll
[SelectionDAG] Preserve volatile undef stores. (#99918)
2024-07-24 08:41:56 -04:00
abs_i16.ll
[AMDGPU] Fix lit failure (#95620)
2024-06-14 16:45:11 -07:00
acc-ldst.ll
[AMDGPU] Update LiveInterval def index for early-clobber (#79285)
2024-03-11 14:54:11 +09:00
accvgpr-copy.mir
AMDGPU: Regenerate baseline mir tests
2024-02-27 10:44:53 +05:30
accvgpr-spill-scc-clobber.mir
AMDGPU: Regenerate baseline mir tests
2024-02-27 10:44:53 +05:30
add3.ll
…
add_i1.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
add_i64.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
add_i128.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
add_shl.ll
…
add_sub_u64_pseudos.mir
[NewPM][CodeGen] Port finalize-isel to new pass manager (#94214)
2024-06-04 09:23:52 +08:00
add-debug.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
add.i16.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
add.ll
[AMDGPU] Codegen support for constrained multi-dword sloads (#96163)
2024-07-23 13:59:15 +05:30
add.v2i16.ll
[AMDGPU] Codegen support for constrained multi-dword sloads (#96163)
2024-07-23 13:59:15 +05:30
addrspacecast-captured.ll
…
addrspacecast-constantexpr.ll
AMDGPU: Infer no-agpr usage in AMDGPUAttributor (#85948)
2024-03-21 14:24:06 +05:30
addrspacecast-initializer-unsupported.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
addrspacecast-initializer.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
addrspacecast-known-non-null.ll
…
addrspacecast.gfx6.ll
[AMDGPU] Rename COV module flag to amdhsa_code_object_version (#79905)
2024-03-06 09:51:48 -05:00
addrspacecast.ll
[AMDGPU] Enable AAAddressSpace in AMDGPUAttributor (#101593)
2024-08-06 15:27:18 -04:00
addrspacecast.r600.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
adjust-writemask-cse.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
adjust-writemask-invalid-copy.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
adjust-writemask-vectorized.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
agpr-copy-no-free-registers.ll
Revert "StructurizeCFG: Optimize phi insertion during ssa reconstruction (#101301)"
2024-08-08 11:59:39 -04:00
agpr-copy-no-vgprs.mir
AMDGPU: Regenerate baseline mir tests
2024-02-27 10:44:53 +05:30
agpr-copy-propagation.mir
AMDGPU: Regenerate baseline mir tests
2024-02-27 10:44:53 +05:30
agpr-copy-reuse-writes.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
agpr-copy-sgpr-no-vgprs.mir
AMDGPU: Regenerate baseline mir tests
2024-02-27 10:44:53 +05:30
agpr-csr.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
agpr-register-count.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
agpr-remat.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
agpr-to-agpr-copy.mir
AMDGPU: Regenerate baseline mir tests
2024-02-27 10:44:53 +05:30
alignbit-pat.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
alloc-aligned-tuples-gfx90a.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
alloc-aligned-tuples-gfx908.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
alloc-all-regs-reserved-in-class.mir
…
alloca.ll
…
allow-check.ll
[CodeGen] Add default lowering for llvm.allow.{runtime,ubsan}.check() (#86049)
2024-03-31 22:19:33 -07:00
always-uniform.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
amd.endpgm.ll
[AMDGPU] Codegen support for constrained multi-dword sloads (#96163)
2024-07-23 13:59:15 +05:30
amdgcn-ieee.ll
…
amdgcn-load-offset-from-reg.ll
[AMDGPU] Codegen support for constrained multi-dword sloads (#96163)
2024-07-23 13:59:15 +05:30
amdgcn.bitcast.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
amdgcn.private-memory.ll
[test] Change llc -march= to -mtriple=
2023-09-11 14:42:37 -07:00
amdgpu-alias-analysis.ll
[AMDGPU] - Add address space for strided buffers (#74471)
2023-12-15 15:49:25 +01:00
amdgpu-attributor-no-agpr.ll
AMDGPU: Infer no-agpr usage in AMDGPUAttributor (#85948)
2024-03-21 14:24:06 +05:30
amdgpu-codegenprepare-break-large-phis-heuristics.ll
…
amdgpu-codegenprepare-break-large-phis.ll
[AMDGPU] Reland: Add IR LiveReg type-based optimization
2024-07-03 09:26:19 -07:00
amdgpu-codegenprepare-fdiv.ll
ValueTracking: Correct undef handling for constant FP vectors (#92557)
2024-05-19 20:56:21 +02:00
amdgpu-codegenprepare-fold-binop-select.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
amdgpu-codegenprepare-i16-to-i32.ll
…
amdgpu-codegenprepare-idiv.ll
Reapply "[AMDGPU] Always lower s/udiv64 by constant to MUL" (#101942)
2024-08-12 09:00:22 +02:00
amdgpu-codegenprepare-mul24.ll
[AMDGPU] Don't create mulhi_24 in CGP (#72983)
2023-11-30 08:26:45 +01:00
amdgpu-codegenprepare-sqrt.ll
AMDGPU: Avoid creating vector extracts if we aren't going to do anything
2023-09-13 09:45:34 +03:00
amdgpu-cs-chain-cc.ll
[AMDGPU] Don't fix the scavenge slot at offset 0 (#79136)
2024-02-09 09:20:25 +01:00
amdgpu-cs-chain-preserve-cc.ll
[AMDGPU] Don't fix the scavenge slot at offset 0 (#79136)
2024-02-09 09:20:25 +01:00
amdgpu-function-calls-option.ll
…
amdgpu-inline.ll
…
amdgpu-late-codegenprepare.ll
AMDGPU/NewPM: Port AMDGPULateCodeGenPrepare to new pass manager (#102806)
2024-08-12 15:09:12 +04:00
amdgpu-libcall-sincos-pass-ordering.ll
AMDGPU: Move libcall simplify into PeepholeEP (#88853)
2024-04-17 08:50:14 +02:00
amdgpu-mul24-knownbits.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
amdgpu-nsa-threshold.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
amdgpu-reloc-const.ll
[test] Remove immarg parameter attribute from calls (#97432)
2024-07-03 09:02:31 +01:00
amdgpu-shader-calling-convention.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
amdgpu-simplify-libcall-ceil.ll
[AMDGPU] - Add address space for strided buffers (#74471)
2023-12-15 15:49:25 +01:00
amdgpu-simplify-libcall-copysign.ll
[AMDGPU] - Add address space for strided buffers (#74471)
2023-12-15 15:49:25 +01:00
amdgpu-simplify-libcall-exp2.ll
[AMDGPU] - Add address space for strided buffers (#74471)
2023-12-15 15:49:25 +01:00
amdgpu-simplify-libcall-exp.ll
[AMDGPU] - Add address space for strided buffers (#74471)
2023-12-15 15:49:25 +01:00
amdgpu-simplify-libcall-fabs.ll
[AMDGPU] - Add address space for strided buffers (#74471)
2023-12-15 15:49:25 +01:00
amdgpu-simplify-libcall-floor.ll
[AMDGPU] - Add address space for strided buffers (#74471)
2023-12-15 15:49:25 +01:00
amdgpu-simplify-libcall-fma.ll
[AMDGPU] - Add address space for strided buffers (#74471)
2023-12-15 15:49:25 +01:00
amdgpu-simplify-libcall-fmax-splat.ll
[AMDGPU] - Add address space for strided buffers (#74471)
2023-12-15 15:49:25 +01:00
amdgpu-simplify-libcall-fmax.ll
[AMDGPU] - Add address space for strided buffers (#74471)
2023-12-15 15:49:25 +01:00
amdgpu-simplify-libcall-fmin-splat.ll
[AMDGPU] - Add address space for strided buffers (#74471)
2023-12-15 15:49:25 +01:00
amdgpu-simplify-libcall-fmin.ll
[AMDGPU] - Add address space for strided buffers (#74471)
2023-12-15 15:49:25 +01:00
amdgpu-simplify-libcall-ldexp-splat.ll
[AMDGPU] - Add address space for strided buffers (#74471)
2023-12-15 15:49:25 +01:00
amdgpu-simplify-libcall-ldexp.ll
[AMDGPU] - Add address space for strided buffers (#74471)
2023-12-15 15:49:25 +01:00
amdgpu-simplify-libcall-log2.ll
[AMDGPU] - Add address space for strided buffers (#74471)
2023-12-15 15:49:25 +01:00
amdgpu-simplify-libcall-log10.ll
[AMDGPU] - Add address space for strided buffers (#74471)
2023-12-15 15:49:25 +01:00
amdgpu-simplify-libcall-log.ll
[AMDGPU] - Add address space for strided buffers (#74471)
2023-12-15 15:49:25 +01:00
amdgpu-simplify-libcall-mad.ll
[AMDGPU] - Add address space for strided buffers (#74471)
2023-12-15 15:49:25 +01:00
amdgpu-simplify-libcall-pow-codegen.ll
[InstCombine] Remove some of the complexity-based canonicalization (#91185)
2024-08-21 12:02:54 +02:00
amdgpu-simplify-libcall-pow.ll
[InstCombine] Remove some of the complexity-based canonicalization (#91185)
2024-08-21 12:02:54 +02:00
amdgpu-simplify-libcall-pown.ll
[InstCombine] Remove some of the complexity-based canonicalization (#91185)
2024-08-21 12:02:54 +02:00
amdgpu-simplify-libcall-powr.ll
[InstCombine] Remove some of the complexity-based canonicalization (#91185)
2024-08-21 12:02:54 +02:00
amdgpu-simplify-libcall-rint.ll
[AMDGPU] - Add address space for strided buffers (#74471)
2023-12-15 15:49:25 +01:00
amdgpu-simplify-libcall-rootn.ll
AMDGPU: Emit 1/llvm.sqrt(x) instead of rsqrt calls in libcall handling (#92863)
2024-05-21 18:42:45 +02:00
amdgpu-simplify-libcall-round.ll
[AMDGPU] - Add address space for strided buffers (#74471)
2023-12-15 15:49:25 +01:00
amdgpu-simplify-libcall-sincos.defined.ll
[AMDGPU] - Add address space for strided buffers (#74471)
2023-12-15 15:49:25 +01:00
amdgpu-simplify-libcall-sincos.defined.nobuiltin.ll
[opt] Infer DataLayout from triple if not specified
2023-10-26 12:07:37 -07:00
amdgpu-simplify-libcall-sincos.defined.sin.cos.ll
[AMDGPU] - Add address space for strided buffers (#74471)
2023-12-15 15:49:25 +01:00
amdgpu-simplify-libcall-sincos.ll
Revert "[AMDGPU] Move AMDGPUAttributorPass to full LTO post link stage (#102086)"
2024-08-09 15:12:24 -04:00
amdgpu-simplify-libcall-sincos.nobuiltins.ll
[AMDGPU] - Add address space for strided buffers (#74471)
2023-12-15 15:49:25 +01:00
amdgpu-simplify-libcall-sincos.weak.ll
[AMDGPU] - Add address space for strided buffers (#74471)
2023-12-15 15:49:25 +01:00
amdgpu-simplify-libcall-sqrt.ll
AMDGPU: Replace sqrt OpenCL libcalls with llvm.sqrt (#74197)
2024-01-09 15:13:58 +07:00
amdgpu-simplify-libcall-trunc.ll
[AMDGPU] - Add address space for strided buffers (#74471)
2023-12-15 15:49:25 +01:00
amdgpu-unroll-threshold.ll
…
amdgpu.private-memory.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
amdgpu.work-item-intrinsics.deprecated.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
amdhsa-trap-num-sgprs.ll
…
amdpal_scratch_mergedshader.ll
…
amdpal-callable.ll
[MachineLICM] Hoist copies of constant physical register (#93285)
2024-05-29 14:10:01 +08:00
amdpal-chain-metadata.ll
[AMDGPU] Emit backend_stack_size PAL metadata (#72509)
2023-11-20 10:01:13 +01:00
amdpal-cs.ll
[Support][YamlTraits] Add quoting for keys in textual YAML representation (#88763)
2024-04-29 15:37:42 +02:00
amdpal-elf.ll
[AMDGPU] Remove -wavefrontsize32 and -wavefrontsize64 from GFX10+ tests (NFC) (#100711)
2024-07-26 00:42:24 -07:00
amdpal-es.ll
MCExpr-ify AMDGPU PALMetadata (#93236)
2024-06-13 13:59:31 +01:00
amdpal-gs.ll
MCExpr-ify AMDGPU PALMetadata (#93236)
2024-06-13 13:59:31 +01:00
amdpal-hs.ll
MCExpr-ify AMDGPU PALMetadata (#93236)
2024-06-13 13:59:31 +01:00
amdpal-ls.ll
MCExpr-ify AMDGPU PALMetadata (#93236)
2024-06-13 13:59:31 +01:00
amdpal-metadata-agpr-register-count.ll
…
amdpal-msgpack-cs.ll
[Support][YamlTraits] Add quoting for keys in textual YAML representation (#88763)
2024-04-29 15:37:42 +02:00
amdpal-msgpack-default.ll
[Support][YamlTraits] Add quoting for keys in textual YAML representation (#88763)
2024-04-29 15:37:42 +02:00
amdpal-msgpack-denormal.ll
[Support][YamlTraits] Add quoting for keys in textual YAML representation (#88763)
2024-04-29 15:37:42 +02:00
amdpal-msgpack-dx10-clamp.ll
[Support][YamlTraits] Add quoting for keys in textual YAML representation (#88763)
2024-04-29 15:37:42 +02:00
amdpal-msgpack-es.ll
[Support][YamlTraits] Add quoting for keys in textual YAML representation (#88763)
2024-04-29 15:37:42 +02:00
amdpal-msgpack-gs.ll
[Support][YamlTraits] Add quoting for keys in textual YAML representation (#88763)
2024-04-29 15:37:42 +02:00
amdpal-msgpack-hs.ll
[Support][YamlTraits] Add quoting for keys in textual YAML representation (#88763)
2024-04-29 15:37:42 +02:00
amdpal-msgpack-ieee.ll
[Support][YamlTraits] Add quoting for keys in textual YAML representation (#88763)
2024-04-29 15:37:42 +02:00
amdpal-msgpack-ls.ll
[Support][YamlTraits] Add quoting for keys in textual YAML representation (#88763)
2024-04-29 15:37:42 +02:00
amdpal-msgpack-ps.ll
[Support][YamlTraits] Add quoting for keys in textual YAML representation (#88763)
2024-04-29 15:37:42 +02:00
amdpal-msgpack-psenable.ll
[Support][YamlTraits] Add quoting for keys in textual YAML representation (#88763)
2024-04-29 15:37:42 +02:00
amdpal-msgpack-vs.ll
[Support][YamlTraits] Add quoting for keys in textual YAML representation (#88763)
2024-04-29 15:37:42 +02:00
amdpal-ps.ll
…
amdpal-psenable.ll
[Support][YamlTraits] Add quoting for keys in textual YAML representation (#88763)
2024-04-29 15:37:42 +02:00
amdpal-usersgpr-init.ll
[Support][YamlTraits] Add quoting for keys in textual YAML representation (#88763)
2024-04-29 15:37:42 +02:00
amdpal-vs.ll
MCExpr-ify AMDGPU PALMetadata (#93236)
2024-06-13 13:59:31 +01:00
amdpal.ll
…
and_or.ll
…
and-gcn.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
and.ll
[AMDGPU] Codegen support for constrained multi-dword sloads (#96163)
2024-07-23 13:59:15 +05:30
andorbitset.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
andorn2.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
andorxorinvimm.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
annotate-existing-abi-attributes.ll
AMDGPU: Port AMDGPUAttributor to new pass manager (#71349)
2023-11-07 15:40:40 +09:00
annotate-kernel-features-hsa-call.ll
AMDGPU: Infer no-agpr usage in AMDGPUAttributor (#85948)
2024-03-21 14:24:06 +05:30
annotate-kernel-features-hsa.ll
[AMDGPU] Enable AAAddressSpace in AMDGPUAttributor (#101593)
2024-08-06 15:27:18 -04:00
annotate-kernel-features.ll
AMDGPU: Infer no-agpr usage in AMDGPUAttributor (#85948)
2024-03-21 14:24:06 +05:30
annotate-noclobber.ll
AMDGPU/NewPM: Port AMDGPUAnnotateUniformValues to new pass manager (#102654)
2024-08-10 07:06:08 +04:00
anonymous-gv.ll
…
any_extend_vector_inreg.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
anyext.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
are-loads-from-same-base-ptr.ll
…
array-ptr-calc-i32.ll
[AMDGPU] Don't fix the scavenge slot at offset 0 (#79136)
2024-02-09 09:20:25 +01:00
array-ptr-calc-i64.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
artificial-terminators.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
ashr.v2i16.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
asm-printer-check-vcc.mir
…
assert-wrong-alloca-addrspace.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
at-least-one-def-value-assert.mir
…
atomic_cmp_swap_local.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
atomic_load_add.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
atomic_load_local.ll
AMDGPU: Add atomic bfloat load/store codegen tests
2024-04-25 16:08:11 +02:00
atomic_load_sub.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
atomic_optimization_split_dt_update.ll
[AMDGPU] Extend readlane, writelane and readfirstlane intrinsic lowering for generic types (#89217)
2024-06-25 14:35:19 +05:30
atomic_optimizations_buffer.ll
[AMDGPU] Remove -wavefrontsize32 and -wavefrontsize64 from GFX10+ tests (NFC) (#100711)
2024-07-26 00:42:24 -07:00
atomic_optimizations_global_pointer.ll
[AMDGPU] Remove -wavefrontsize32 and -wavefrontsize64 from GFX10+ tests (NFC) (#100711)
2024-07-26 00:42:24 -07:00
atomic_optimizations_local_pointer.ll
[AMDGPU] Remove -wavefrontsize32 and -wavefrontsize64 from GFX10+ tests (NFC) (#100711)
2024-07-26 00:42:24 -07:00
atomic_optimizations_pixelshader.ll
[AMDGPU] Remove -wavefrontsize32 and -wavefrontsize64 from GFX10+ tests (NFC) (#100711)
2024-07-26 00:42:24 -07:00
atomic_optimizations_raw_buffer.ll
[AMDGPU] Remove -wavefrontsize32 and -wavefrontsize64 from GFX10+ tests (NFC) (#100711)
2024-07-26 00:42:24 -07:00
atomic_optimizations_struct_buffer.ll
[AMDGPU] Remove -wavefrontsize32 and -wavefrontsize64 from GFX10+ tests (NFC) (#100711)
2024-07-26 00:42:24 -07:00
atomic_store_local.ll
AMDGPU: Add atomic bfloat load/store codegen tests
2024-04-25 16:08:11 +02:00
atomic-optimizer-strict-wqm.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
atomic-oversize.ll
[AMDGPU] Set MaxAtomicSizeInBitsSupported. (#75185)
2023-12-18 16:51:06 -05:00
atomicrmw-expand.ll
AMDGPU: Avoid creating unnecessary block split in atomic expansion (#102440)
2024-08-09 00:39:12 +04:00
atomicrmw-nand.ll
[AMDGPU][SIInsertWaitcnts] Do not add s_waitcnt when the counters are known to be 0 already (#72830)
2023-12-15 12:33:32 +01:00
atomics_cond_sub.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
atomics-cas-remarks-gfx90a.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
atomics-hw-remarks-gfx90a.ll
AMDGPU: Handle new atomicrmw metadata for fadd case (#96760)
2024-08-02 19:41:33 +04:00
attr-amdgpu-flat-work-group-size-vgpr-limit.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
attr-amdgpu-flat-work-group-size.ll
[AMDGPU] Rename COV module flag to amdhsa_code_object_version (#79905)
2024-03-06 09:51:48 -05:00
attr-amdgpu-num-sgpr.ll
…
attr-amdgpu-num-vgpr.ll
…
attr-amdgpu-num-workgroups_error_check.ll
[AMDGPU] Adding the amdgpu_num_work_groups function attribute (#79035)
2024-03-12 10:30:39 -07:00
attr-amdgpu-num-workgroups.ll
[AMDGPU] Adding the amdgpu_num_work_groups function attribute (#79035)
2024-03-12 10:30:39 -07:00
attr-amdgpu-waves-per-eu.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
attr-unparseable.ll
…
attributor-loop-issue-58639.ll
AMDGPU: Port AMDGPUAttributor to new pass manager (#71349)
2023-11-07 15:40:40 +09:00
attributor-noopt.ll
Revert "[AMDGPU] Move AMDGPUAttributorPass to full LTO post link stage (#102086)"
2024-08-09 15:12:24 -04:00
av_spill_cross_bb_usage.mir
[MachineFrameInfo] Refactoring around computeMaxcallFrameSize() (NFC) (#78001)
2024-03-18 10:37:59 -04:00
back-off-barrier-subtarget-feature.ll
[AMDGPU][SIInsertWaitcnts] Do not add s_waitcnt when the counters are known to be 0 already (#72830)
2023-12-15 12:33:32 +01:00
barrier-elimination.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
basic-branch.ll
[AMDGPU] Remove -wavefrontsize32 and -wavefrontsize64 from GFX10+ tests (NFC) (#100711)
2024-07-26 00:42:24 -07:00
basic-call-return.ll
…
basic-loop.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
bb-prolog-spill-during-regalloc.ll
[AMDGPU] Move WWM register pre-allocation to during regalloc (#70618)
2023-11-08 11:54:28 +09:00
bf16-conversions.ll
[AMDGPU] Make v2bf16 BUILD_VECTOR legal (#92022)
2024-05-13 14:53:26 -07:00
bf16-ops.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
bf16.ll
[AMDGPU][True16][CodeGen] Support AND/OR/XOR and LDEXP True16 format (#102620)
2024-08-13 12:23:39 -04:00
bfe_uint.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
bfe-combine.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
bfe-patterns.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
bfi_int.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
bfi_int.r600.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
bfi_nested.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
bfm.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
big_alu.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
bitcast-constant-to-vector.ll
…
bitcast-v4f16-v4i16.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
bitcast-vector-extract.ll
[SelectionDAG] Preserve volatile undef stores. (#99918)
2024-07-24 08:41:56 -04:00
bitreverse-inline-immediates.ll
AMDGPU: Materialize bitwise not of inline immediates (#95960)
2024-06-22 00:40:59 +02:00
bitreverse.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
blender-coalescer-verifier-error-empty-subrange.mir
AMDGPU: Regenerate baseline mir tests
2024-02-27 10:44:53 +05:30
blender-no-live-segment-at-def-implicit-def.ll
[AMDGPU] Rename COV module flag to amdhsa_code_object_version (#79905)
2024-03-06 09:51:48 -05:00
block-should-not-be-in-alive-blocks.mir
AMDGPU: Regenerate baseline mir tests
2024-02-27 10:44:53 +05:30
br_cc.f16.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
branch-condition-and.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
branch-folder-requires-no-phis.mir
…
branch-folding-implicit-def-subreg.ll
[AMDGPU] Codegen support for constrained multi-dword sloads (#96163)
2024-07-23 13:59:15 +05:30
branch-relax-bundle.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
branch-relax-indirect-branch.mir
[AMDGPU][True16] Remove the VGPR_LO/HI16 register classes. (#76500)
2023-12-29 12:13:24 +00:00
branch-relax-no-terminators.mir
[AMDGPU][True16] Remove the VGPR_LO/HI16 register classes. (#76500)
2023-12-29 12:13:24 +00:00
branch-relax-spill.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
branch-relaxation-debug-info.mir
[AMDGPU] Convert tests to opaque pointers (NFC)
2024-02-05 12:42:23 +01:00
branch-relaxation-gfx10-branch-offset-bug.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
branch-relaxation-inst-size-gfx10.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
branch-relaxation.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
branch-uniformity.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
break-smem-soft-clauses.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
break-vmem-soft-clauses.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
bswap.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
buffer-atomic-fadd.f32-no-rtn.ll
Reland "[NewPM][CodeGen] Port selection dag isel to new pass manager" (#94149)
2024-06-04 08:10:58 +08:00
buffer-atomic-fadd.f32-rtn.ll
Reland "[NewPM][CodeGen] Port selection dag isel to new pass manager" (#94149)
2024-06-04 08:10:58 +08:00
buffer-atomic-fadd.f64.ll
Reland "[NewPM][CodeGen] Port selection dag isel to new pass manager" (#94149)
2024-06-04 08:10:58 +08:00
buffer-atomic-fadd.v2f16-no-rtn.ll
Reland "[NewPM][CodeGen] Port selection dag isel to new pass manager" (#94149)
2024-06-04 08:10:58 +08:00
buffer-atomic-fadd.v2f16-rtn.ll
Reland "[NewPM][CodeGen] Port selection dag isel to new pass manager" (#94149)
2024-06-04 08:10:58 +08:00
buffer-fat-pointer-atomicrmw-fadd.ll
AMDGPU: Handle new atomicrmw metadata for fadd case (#96760)
2024-08-02 19:41:33 +04:00
buffer-fat-pointer-atomicrmw-fmax.ll
AMDGPU: Handle remote/fine-grained memory in atomicrmw fmin/fmax lowering (#96759)
2024-08-01 22:08:01 +04:00
buffer-fat-pointer-atomicrmw-fmin.ll
AMDGPU: Handle remote/fine-grained memory in atomicrmw fmin/fmax lowering (#96759)
2024-08-01 22:08:01 +04:00
buffer-intrinsic-mmo-type.ll
AMDGPU: Fix using wrong memory type for non-image resource intrinsics (#94911)
2024-06-13 11:10:28 +02:00
buffer-intrinsics-mmo-offsets.ll
[RFC][AMDGPU] Remove old llvm.amdgcn.buffer.* and tbuffer intrinsics (#93801)
2024-06-10 12:14:51 +01:00
buffer-rsrc-ptr-ops.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
buffer-schedule.ll
[RFC][AMDGPU] Remove old llvm.amdgcn.buffer.* and tbuffer intrinsics (#93801)
2024-06-10 12:14:51 +01:00
bug-cselect-b64.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
bug-deadlanes.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
bug-sdag-emitcopyfromreg.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
bug-sdag-scheduler-cycle.ll
…
bug-v4f64-subvector.ll
AMDGPU/NewPM: Fill out addPreISelPasses (#102814)
2024-08-14 20:57:00 +04:00
bug-vopc-commute.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
build_vector-r600.ll
[AMDGPU] Auto-generating lit test patterns (NFC) (#93837)
2024-06-07 09:02:18 +05:30
build_vector.ll
[AMDGPU][SILoadStoreOptimizer] Merge constrained sloads (#96162)
2024-07-23 13:50:42 +05:30
build-vector-insert-elt-infloop.ll
…
build-vector-packed-partial-undef.ll
…
bundle-latency.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
bypass-div.ll
[DAG] Always allow folding XOR patterns to ABS pre-legalization (#94601)
2024-06-07 11:02:50 +01:00
byval-frame-setup.ll
…
call_fs.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
call-alias-register-usage0.ll
[AMDGPU] Rename COV module flag to amdhsa_code_object_version (#79905)
2024-03-06 09:51:48 -05:00
call-alias-register-usage1.ll
[AMDGPU] Rename COV module flag to amdhsa_code_object_version (#79905)
2024-03-06 09:51:48 -05:00
call-alias-register-usage2.ll
[AMDGPU] Rename COV module flag to amdhsa_code_object_version (#79905)
2024-03-06 09:51:48 -05:00
call-alias-register-usage3.ll
[AMDGPU] Rename COV module flag to amdhsa_code_object_version (#79905)
2024-03-06 09:51:48 -05:00
call-alias-register-usage-agpr.ll
[AMDGPU] Rename COV module flag to amdhsa_code_object_version (#79905)
2024-03-06 09:51:48 -05:00
call-args-inreg.ll
[AMDGPU] Rename COV module flag to amdhsa_code_object_version (#79905)
2024-03-06 09:51:48 -05:00
call-argument-types.ll
[AMDGPU] Rename COV module flag to amdhsa_code_object_version (#79905)
2024-03-06 09:51:48 -05:00
call-c-function.ll
…
call-constant.ll
…
call-constexpr.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
call-defs-mode-register.ll
[ConstraintFP] Model rounding control registers for inline asm (#92846)
2024-05-23 22:50:39 +08:00
call-encoding.ll
…
call-graph-register-usage.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
call-preserved-registers.ll
…
call-reqd-group-size.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
call-return-types.ll
…
call-skip.ll
…
call-to-kernel-undefined.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
call-to-kernel.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
call-waitcnt.ll
[AMDGPU] Rename COV module flag to amdhsa_code_object_version (#79905)
2024-03-06 09:51:48 -05:00
call-waw-waitcnt.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
callee-frame-setup.ll
[AMDGPU] Pick available high VGPR for CSR SGPR spilling (#78669)
2024-01-24 07:08:43 +05:30
callee-special-input-sgprs-fixed-abi.ll
[AMDGPU] Enable AAAddressSpace in AMDGPUAttributor (#101593)
2024-08-06 15:27:18 -04:00
callee-special-input-vgprs-packed.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
callee-special-input-vgprs.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
calling-conventions.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
captured-frame-index.ll
[AMDGPU] Don't fix the scavenge slot at offset 0 (#79136)
2024-02-09 09:20:25 +01:00
carryout-selection.ll
[AMDGPU] Codegen support for constrained multi-dword sloads (#96163)
2024-07-23 13:59:15 +05:30
cayman-loop-bug.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
cc-sgpr-limit.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
cc-sgpr-over-limit.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
cc-update.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
cf_end.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
cf-loop-on-constant.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
cf-stack-bug.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
cgp-addressing-modes-flat.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
cgp-addressing-modes-gfx908.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
cgp-addressing-modes-gfx1030.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
cgp-addressing-modes-smem.ll
[AMDGPU] Disallow negative s_load offsets in isLegalAddressingMode (#91327)
2024-06-25 17:43:00 +01:00
cgp-addressing-modes.ll
[AMDGPU] Don't fix the scavenge slot at offset 0 (#79136)
2024-02-09 09:20:25 +01:00
cgp-bitfield-extract.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
chain-hi-to-lo.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
change-scc-to-vcc.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
check-subtarget-features.ll
[AMDGPU] Remove wavefrontsize feature from GFX10+ (#98400)
2024-07-16 01:02:25 -07:00
clamp-modifier.ll
[AMDGPU] Codegen support for constrained multi-dword sloads (#96163)
2024-07-23 13:59:15 +05:30
clamp-omod-special-case.mir
AMDGPU: Don't fold clamp/omod modifiers without nofpexcept (#95950)
2024-06-18 23:55:49 +02:00
clamp.ll
[AMDGPU] Codegen support for constrained multi-dword sloads (#96163)
2024-07-23 13:59:15 +05:30
cluster_stores.ll
[AMDGPU][SILoadStoreOptimizer] Merge constrained sloads (#96162)
2024-07-23 13:50:42 +05:30
cluster-flat-loads-postra.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
cluster-flat-loads.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
cmp_shrink.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
cndmask-no-def-vcc.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
coalesce-identity-copies-undef-subregs.mir
AMDGPU: Regenerate baseline mir tests
2024-02-27 10:44:53 +05:30
coalesce-into-dead-subreg-copies.mir
AMDGPU: Regenerate baseline mir tests
2024-02-27 10:44:53 +05:30
coalesce-liveout-undef-copy.mir
AMDGPU: Regenerate baseline mir tests
2024-02-27 10:44:53 +05:30
coalesce-vgpr-alignment.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
coalescer_distribute.ll
…
coalescer_remat.ll
[AMDGPU] Remove repeated -mtriple options from RUN lines (#66486)
2023-09-15 11:29:24 +01:00
coalescer-early-clobber-subreg.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
coalescer-extend-pruned-subrange.mir
…
coalescer-identical-values-undef.mir
…
coalescer-remat-dead-use.mir
AMDGPU: Regenerate baseline mir tests
2024-02-27 10:44:53 +05:30
coalescer-removepartial-extend-undef-subrange.mir
AMDGPU: Regenerate baseline mir tests
2024-02-27 10:44:53 +05:30
coalescer-subranges-another-copymi-not-live.mir
…
coalescer-subranges-another-prune-error.mir
…
coalescer-subranges-prune-kill-copy.mir
AMDGPU: Regenerate baseline mir tests
2024-02-27 10:44:53 +05:30
coalescer-subreg-join.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
coalescer-subregjoin-fullcopy.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
coalescer-with-subregs-bad-identical.mir
…
coalescing_makes_lanes_undef.mir
AMDGPU: Regenerate baseline mir tests
2024-02-27 10:44:53 +05:30
coalescing-subreg-was-undef-but-became-def.mir
AMDGPU: Regenerate baseline mir tests
2024-02-27 10:44:53 +05:30
coalescing-with-subregs-in-loop-bug.mir
…
code-object-v3.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
code-size-estimate.ll
[AMDGPU] Add some gfx1200 test coverage
2024-06-27 14:53:59 +01:00
code-size-estimate.mir
[AMDGPU] Fix code-size-estimate.mir test
2023-09-07 14:04:12 +02:00
codegen-internal-only-func.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
codegen-prepare-addrmode-sext.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
codegen-prepare-addrspacecast-non-null-vector.ll
[AMDGPU] Improve detection of non-null addrspacecast operands (#82311)
2024-03-01 14:01:10 +01:00
codegen-prepare-addrspacecast-non-null.ll
AMDGPU/GlobalISel: Permit mapping G_FRAME_INDEX to sgprs (#101325)
2024-08-01 09:42:04 +04:00
collapse-endcf2.mir
AMDGPU: Regenerate baseline mir tests
2024-02-27 10:44:53 +05:30
collapse-endcf-broken.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
collapse-endcf.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
collapse-endcf.mir
[MIRPrinter] Don't print line break when there is no instructions (NFC) (#80147)
2024-02-01 22:10:52 +08:00
combine_andor_with_cmps.ll
Revert "Update amdgpu_gfx functions to use s0-s3 for inreg SGPR arguments on targets using scratch instructions for stack #78226" (#86273)
2024-03-26 11:01:08 +01:00
combine_vloads.ll
[AMDGPU] Remove duplicate -mtriple options in tests (#91576)
2024-05-09 10:59:25 +01:00
combine-add-zext-xor.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
combine-and-sext-bool.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
combine-cond-add-sub.ll
[AMDGPU][SILoadStoreOptimizer] Merge constrained sloads (#96162)
2024-07-23 13:50:42 +05:30
combine-ftrunc.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
combine-reg-or-const.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
combine-sreg64-inits.mir
AMDGPU: Regenerate baseline mir tests
2024-02-27 10:44:53 +05:30
combine-vload-extract.ll
[AMDGPU] Codegen support for constrained multi-dword sloads (#96163)
2024-07-23 13:59:15 +05:30
comdat.ll
…
commute_modifiers.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
commute-compares-scalar-float.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
commute-compares.ll
[AMDGPU] Don't fix the scavenge slot at offset 0 (#79136)
2024-02-09 09:20:25 +01:00
commute-shifts.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
commute-vop3.mir
AMDGPU: Regenerate baseline mir tests
2024-02-27 10:44:53 +05:30
complex-folding.ll
…
computeKnownBits-scalar-to-vector-crash.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
computeNumSignBits-mul.ll
…
concat_vectors.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
constant-address-space-32bit.ll
[SeperateConstOffsetFromGEP] Handle or disjoint flags (#76997)
2024-01-26 09:56:06 -06:00
constant-fold-imm-immreg.mir
…
constant-fold-mi-operands.ll
…
constrained-shift.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
control-flow-fastregalloc.ll
[AMDGPU] Rename COV module flag to amdhsa_code_object_version (#79905)
2024-03-06 09:51:48 -05:00
control-flow-optnone.ll
…
convergence-laneops.ll
[AMDGPU] Extend readlane, writelane and readfirstlane intrinsic lowering for generic types (#89217)
2024-06-25 14:35:19 +05:30
convergence-tokens.ll
[AMDGPU] don't mark control-flow intrinsics as convergent (#90026)
2024-05-06 14:07:11 +05:30
convergent-inlineasm.ll
…
copy_phys_vgpr64.mir
AMDGPU: Regenerate baseline mir tests
2024-02-27 10:44:53 +05:30
copy_to_scc.ll
[AMDGPU] Codegen support for constrained multi-dword sloads (#96163)
2024-07-23 13:59:15 +05:30
copy-hoist-no-spills.ll
[MachineLICM] Hoist COPY instruction only when user can be hoisted (#81735)
2024-02-27 12:31:29 +00:00
copy-illegal-type.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
copy-overlap-sgpr-kill.mir
…
copy-overlap-vgpr-kill.mir
…
copy-phys-reg-implicit-operand-kills-subregs.mir
…
copy-to-reg-scc-clobber.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
copy-to-reg.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
copy-vgpr-clobber-spill-vgpr.mir
AMDGPU: Infer no-agpr usage in AMDGPUAttributor (#85948)
2024-03-21 14:24:06 +05:30
copyprop_regsequence_with_undef.mir
[CodeGen] Guard copy propagation in machine CSE against undefs (#97413)
2024-07-12 10:23:35 +05:30
copysign-simplify-demanded-bits.ll
AMDGPU: Add baseline test for copysign combine
2024-08-01 16:20:05 +04:00
couldnt-join-subrange-3.mir
AMDGPU: Regenerate baseline mir tests
2024-02-27 10:44:53 +05:30
cross-block-use-is-not-abi-copy.ll
[AMDGPU] Rename COV module flag to amdhsa_code_object_version (#79905)
2024-03-06 09:51:48 -05:00
cse-convergent.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
cse-phi-incoming-val.ll
[test] Remove immarg parameter attribute from calls (#97432)
2024-07-03 09:02:31 +01:00
csr-gfx10.ll
…
csr-sgpr-spill-live-ins.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
ctlz_zero_undef.ll
[GlobalIsel] Push cast through select. (#100539)
2024-07-25 19:21:28 +02:00
ctlz.ll
[GlobalIsel] Push cast through select. (#100539)
2024-07-25 19:21:28 +02:00
ctpop16.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
ctpop64.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
ctpop.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
cttz_zero_undef.ll
[AMDGPU][SILoadStoreOptimizer] Merge constrained sloads (#96162)
2024-07-23 13:50:42 +05:30
cttz.ll
[GlobalIsel] Push cast through select. (#100539)
2024-07-25 19:21:28 +02:00
cube.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
cvt_f32_ubyte.ll
[AMDGPU] Codegen support for constrained multi-dword sloads (#96163)
2024-07-23 13:59:15 +05:30
cvt_flr_i32_f32.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
cvt_rpi_i32_f32.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
dag-divergence-atomic.ll
[AMDGPU] Codegen support for constrained multi-dword sloads (#96163)
2024-07-23 13:59:15 +05:30
dag-divergence.ll
SelectionDAG: Do not propagate divergence through copy glue (#101210)
2024-07-31 00:04:58 +04:00
dagcomb-extract-vec-elt-different-sizes.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
dagcomb-mullohi.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
dagcomb-shuffle-vecextend-non2.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
dagcombine-fma-crash.ll
[SDAG] Intersect poison-generating flags after CSE (#97434)
2024-07-03 20:32:46 +08:00
dagcombine-fma-fmad.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
dagcombine-lshr-and-cmp.ll
[AMDGPU] Rename COV module flag to amdhsa_code_object_version (#79905)
2024-03-06 09:51:48 -05:00
dagcombine-reassociate-bug.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
dagcombine-select.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
dagcombine-setcc-select.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
dagcombine-v1i8-extractvecelt-crash.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
dagcombiner-bug-illegal-vec4-int-to-fp.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
dbg-value-ends-sched-region.mir
AMDGPU: Regenerate baseline mir tests
2024-02-27 10:44:53 +05:30
dce-disjoint-intervals.mir
…
dead_bundle.mir
[AMDGPU] Remove duplicate -mtriple options in tests (#91576)
2024-05-09 10:59:25 +01:00
dead_copy.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
dead-lane.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
dead-machine-elim-after-dead-lane.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
debug_frame.ll
…
debug-value2.ll
…
debug-value-scheduler-crash.mir
AMDGPU: Regenerate baseline mir tests
2024-02-27 10:44:53 +05:30
debug-value-scheduler-liveins.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
debug-value-scheduler.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
debug-value.ll
…
debug.ll
[test] Change llc -march= to -mtriple=
2023-09-11 14:42:37 -07:00
default-flat-work-group-size-overrides-waves-per-eu.ll
…
default-fp-mode.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
detect-dead-lanes.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
direct-indirect-call.ll
Reapply "[Attributor][AMDGPU] Enable AAIndirectCallInfo for AMDAttributor (#100952)"
2024-08-14 17:16:47 -04:00
directive-amdgcn-target.ll
[AMDGPU] Add a new target gfx1152 (#94534)
2024-06-06 12:16:11 -04:00
disable_form_clauses.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
disconnected-predset-break-bug.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
div_i128.ll
[DAGCombiner] Freeze maybe poison operands when folding select to logic (#84924)
2024-07-22 17:19:46 +02:00
div_v2i128.ll
[DAG] Always allow folding XOR patterns to ABS pre-legalization (#94601)
2024-06-07 11:02:50 +01:00
div-rem-by-constant-64.ll
Reapply "[AMDGPU] Always lower s/udiv64 by constant to MUL" (#101942)
2024-08-12 09:00:22 +02:00
diverge-extra-formal-args.ll
…
diverge-interp-mov-lower.ll
…
diverge-switch-default.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
divergence-at-use.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
divergence-driven-abs.ll
Reland "[NewPM][CodeGen] Port selection dag isel to new pass manager" (#94149)
2024-06-04 08:10:58 +08:00
divergence-driven-bfe-isel.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
divergence-driven-bitreverse.ll
Reland "[NewPM][CodeGen] Port selection dag isel to new pass manager" (#94149)
2024-06-04 08:10:58 +08:00
divergence-driven-buildvector.ll
[AMDGPU] Codegen support for constrained multi-dword sloads (#96163)
2024-07-23 13:59:15 +05:30
divergence-driven-ctlz-cttz.ll
Reland "[NewPM][CodeGen] Port selection dag isel to new pass manager" (#94149)
2024-06-04 08:10:58 +08:00
divergence-driven-ctpop.ll
Reland "[NewPM][CodeGen] Port selection dag isel to new pass manager" (#94149)
2024-06-04 08:10:58 +08:00
divergence-driven-min-max.ll
Reland "[NewPM][CodeGen] Port selection dag isel to new pass manager" (#94149)
2024-06-04 08:10:58 +08:00
divergence-driven-negsubinlineconst.ll
Reland "[NewPM][CodeGen] Port selection dag isel to new pass manager" (#94149)
2024-06-04 08:10:58 +08:00
divergence-driven-not-isel.ll
Reland "[NewPM][CodeGen] Port selection dag isel to new pass manager" (#94149)
2024-06-04 08:10:58 +08:00
divergence-driven-sext-inreg.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
divergence-driven-trunc-to-i1.ll
[DAGCombiner] Freeze maybe poison operands when folding select to logic (#84924)
2024-07-22 17:19:46 +02:00
divergence-driven-xnor.ll
Reland "[NewPM][CodeGen] Port selection dag isel to new pass manager" (#94149)
2024-06-04 08:10:58 +08:00
divergent-branch-uniform-condition.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
divrem24-assume.ll
…
dpp64_combine.ll
[AMDGPU][NFC] Use GFX940 prefix in dpp64_combine test (#100459)
2024-07-25 07:52:38 +02:00
dpp64_combine.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
dpp_combine_gfx11.mir
[AMDGPU] Fix filecheck annotation typos
2024-05-29 15:01:48 +01:00
dpp_combine.ll
[AMDGPU] Add a negative test for DPP combine into v_mul_lo_u32
2024-05-22 16:08:44 +01:00
dpp_combine.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
drop-mem-operand-move-smrd.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
ds_gws_align.ll
[TwoAddressInstruction] Recompute live intervals for partial defs (#74431)
2024-01-12 13:26:01 +09:00
ds_read2_offset_order.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
ds_read2_superreg.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
ds_read2.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
ds_read2st64.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
ds_write2.ll
[AMDGPU] Codegen support for constrained multi-dword sloads (#96163)
2024-07-23 13:59:15 +05:30
ds_write2st64.ll
[test] Change llc -march= to -mtriple=
2023-09-11 14:42:37 -07:00
ds-alignment.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
ds-combine-large-stride.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
ds-combine-with-dependence.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
ds-negative-offset-addressing-mode-loop.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
ds-sub-offset.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
ds-vectorization-alignment.ll
…
dual-source-blend-export.ll
[test] Remove immarg parameter attribute from calls (#97432)
2024-07-03 09:02:31 +01:00
duplicate-attribute-indirect.ll
Reapply "[Attributor][AMDGPU] Enable AAIndirectCallInfo for AMDAttributor (#100952)"
2024-08-14 17:16:47 -04:00
dwarf-multi-register-use-crash.ll
[AMDGPU] Rename COV module flag to amdhsa_code_object_version (#79905)
2024-03-06 09:51:48 -05:00
dynamic_stackalloc.ll
[AMDGPU] Remove duplicate -mtriple options in tests (#91576)
2024-05-09 10:59:25 +01:00
early-if-convert-cost.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
early-if-convert.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
early-inline-alias.ll
…
early-inline.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
early-lis-two-address-partial-def.mir
[CodeGen] Port two-address-instructions to new pass manager (#98632)
2024-07-15 15:11:06 +08:00
early-tailduplicator-nophis.mir
…
early-tailduplicator-terminator.mir
…
early-term.mir
[AMDGPU] Remove -wavefrontsize32 and -wavefrontsize64 from GFX10+ tests (NFC) (#100711)
2024-07-26 00:42:24 -07:00
eh_frame.ll
…
elf-header-flags-mach.ll
[AMDGPU] Add a new target gfx1152 (#94534)
2024-06-06 12:16:11 -04:00
elf-header-flags-sramecc.ll
[test] Change llc -march= to -mtriple=
2023-09-11 14:42:37 -07:00
elf-header-flags-xnack.ll
[test] Change llc -march= to -mtriple=
2023-09-11 14:42:37 -07:00
elf-header-osabi.ll
[AMDGPU] Introduce Code Object V6 (#76954)
2024-02-05 08:19:53 +01:00
elf-notes.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
elf.ll
[test] Change llc -march= to -mtriple=
2023-09-11 14:42:37 -07:00
elf.metadata.ll
[test] Change llc -march= to -mtriple=
2023-09-11 14:42:37 -07:00
elf.r600.ll
[test] Change llc -march= to -mtriple=
2023-09-11 14:42:37 -07:00
eliminate-frame-index-s-add-i32.mir
AMDGPU: Handle folding frame indexes into s_add_i32 (#101694)
2024-08-22 09:16:37 +04:00
eliminate-frame-index-s-mov-b32.mir
[AMDGPU] Optimize the register uses if offset inlinable (#101676)
2024-08-05 12:49:33 +05:30
eliminate-frame-index-scalar-bit-ops.mir
AMDGPU: Permit more frame index operands in verifier (#101691)
2024-08-05 21:34:58 +04:00
eliminate-frame-index-v-add-co-u32.mir
AMDGPU: Add more baseline tests for eliminateFrameIndex
2024-08-07 22:00:54 +04:00
eliminate-frame-index-v-add-u32.mir
AMDGPU: Add more baseline tests for eliminateFrameIndex
2024-08-07 22:00:54 +04:00
else.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
empty-function.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
enable-no-signed-zeros-fp-math.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
enable-scratch-only-dynamic-stack.ll
[AMDGPU] Rename COV module flag to amdhsa_code_object_version (#79905)
2024-03-06 09:51:48 -05:00
endcf-loop-header.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
endpgm-dce.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
enqueue-kernel.ll
…
exceed-max-sgprs.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
exec-mask-opt-cannot-create-empty-or-backward-segment.ll
[Transforms] Refactor CreateControlFlowHub (#103013)
2024-08-22 12:18:01 +05:30
expand-atomicrmw-syncscope.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
expand-scalar-carry-out-select-user.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
expand-si-indirect.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
expand-variadic-call.ll
[IRBuilder] Generate nuw GEPs for struct member accesses (#99538)
2024-08-09 13:25:04 +01:00
extend-bit-ops-i16.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
extend-phi-subrange-not-in-parent.mir
AMDGPU: Regenerate baseline mir tests
2024-02-27 10:44:53 +05:30
extend-wwm-virt-reg-liveness.mir
[AMDGPU] Add pseudo instructions for SGPR spill to VGPR (#69923)
2023-10-27 17:24:10 +05:30
extload-align.ll
[AMDGPU] Remove repeated -mtriple options from RUN lines (#66486)
2023-09-15 11:29:24 +01:00
extload-private.ll
[AMDGPU] Don't fix the scavenge slot at offset 0 (#79136)
2024-02-09 09:20:25 +01:00
extload.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
extra-lds-size.ll
[AMDGPU] Add some gfx1200 test coverage
2024-06-27 14:53:59 +01:00
extra-sroa-after-unroll.ll
…
extract_subvector_vec4_vec3.ll
Reland "[NewPM][CodeGen] Port selection dag isel to new pass manager" (#94149)
2024-06-04 08:10:58 +08:00
extract_vector_dynelt.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
extract_vector_elt-f16.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
extract_vector_elt-f64.ll
[AMDGPU] Remove repeated -mtriple options from RUN lines (#66486)
2023-09-15 11:29:24 +01:00
extract_vector_elt-i8.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
extract_vector_elt-i16.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
extract_vector_elt-i64.ll
[AMDGPU] Remove repeated -mtriple options from RUN lines (#66486)
2023-09-15 11:29:24 +01:00
extract-load-i1.ll
[LegalizeTypes] Handle non byte-sized elt types when splitting INSERT/EXTRACT_VECTOR_ELT (#93357)
2024-06-13 11:09:18 +02:00
extract-lowbits.ll
[AMDGPU] Remove repeated -mtriple options from RUN lines (#66486)
2023-09-15 11:29:24 +01:00
extract-subvector-16bit.ll
[AMDGPU] Reland: Add IR LiveReg type-based optimization
2024-07-03 09:26:19 -07:00
extract-subvector-equal-length.ll
[AMDGPU] Remove repeated -mtriple options from RUN lines (#66486)
2023-09-15 11:29:24 +01:00
extract-subvector.ll
[AMDGPU] Reland: Add IR LiveReg type-based optimization
2024-07-03 09:26:19 -07:00
extract-vector-elt-build-vector-combine.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
extractelt-to-trunc.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
fabs-r600.ll
[AMDGPU] Auto-generated some lit test patterns (NFC). (#94310)
2024-06-07 09:07:11 +05:30
fabs.f16.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
fabs.f64.ll
…
fabs.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
fadd64.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
fadd-fma-fmul-combine.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
fadd.f16.ll
[AMDGPU][True16][CodeGen] Support AND/OR/XOR and LDEXP True16 format (#102620)
2024-08-13 12:23:39 -04:00
fadd.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
fail.llvm.fptrunc.round.ll
AMDGPU: Add tonearest and towardzero roundings for intrinsic llvm.fptrunc.round (#104486)
2024-08-17 11:22:47 -07:00
fast-ra-kills-vcc.mir
[NewPM][CodeGen] Port regallocfast to new pass manager (#94426)
2024-06-07 12:22:42 +08:00
fast-regalloc-bundles.mir
[NewPM][CodeGen] Port regallocfast to new pass manager (#94426)
2024-06-07 12:22:42 +08:00
fast-unaligned-load-store.global.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
fast-unaligned-load-store.private.ll
[AMDGPU] CodeGen for GFX12 S_WAIT_* instructions (#77438)
2024-01-18 10:47:45 +00:00
fastregalloc-illegal-subreg-physreg.mir
[NewPM][CodeGen] Port regallocfast to new pass manager (#94426)
2024-06-07 12:22:42 +08:00
fastregalloc-self-loop-heuristic.mir
[NewPM][CodeGen] Port regallocfast to new pass manager (#94426)
2024-06-07 12:22:42 +08:00
fastregalloc-sgpr-only.mir
…
fcanonicalize-elimination.ll
[AMDGPU] Fix canonicalization of truncated values. (#83054)
2024-03-13 12:08:39 +00:00
fcanonicalize.f16.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
fcanonicalize.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
fceil64.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
fceil.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
fcmp64.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
fcmp-cnd.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
fcmp-cnde-int-args.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
fcmp.f16.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
fcmp.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
fconst64.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
fcopysign.f16.ll
[AMDGPU][SILoadStoreOptimizer] Merge constrained sloads (#96162)
2024-07-23 13:50:42 +05:30
fcopysign.f32.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
fcopysign.f32.r600.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
fcopysign.f64.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
fdiv32-to-rcp-folding.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
fdiv_flags.f32.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
fdiv-nofpexcept.ll
AMDGPU: Regenerate baseline mir tests
2024-02-27 10:44:53 +05:30
fdiv.f16.ll
[AMDGPU] Codegen support for constrained multi-dword sloads (#96163)
2024-07-23 13:59:15 +05:30
fdiv.f64.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
fdiv.ll
[AMDGPU][SILoadStoreOptimizer] Merge constrained sloads (#96162)
2024-07-23 13:50:42 +05:30
fdot2.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
fence-barrier.ll
[AMDGPU][SIInsertWaitcnts] Do not add s_waitcnt when the counters are known to be 0 already (#72830)
2023-12-15 12:33:32 +01:00
fence-lds-read2-write2.ll
[AMDGPU][SIInsertWaitcnts] Do not add s_waitcnt when the counters are known to be 0 already (#72830)
2023-12-15 12:33:32 +01:00
fetch-limits.r600.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
fetch-limits.r700+.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
ffloor.f64.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
ffloor.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
fix-frame-ptr-reg-copy-livein.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
fix-frame-reg-in-custom-csr-spills.ll
[AMDGPU] PromoteAlloca - bail always if load/store is volatile (#73228)
2023-11-28 12:01:35 +01:00
fix-sgpr-copies-f16.mir
[AMDGPU][True16] Support VOP3 source DPP operands. (#80892)
2024-02-08 16:23:00 +00:00
fix-sgpr-copies-nondeterminism.ll
[AMDGPU] Fix nondeterminism in SIFixSGPRCopies (#70644)
2023-10-31 11:47:42 +00:00
fix-sgpr-copies.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
fix-vgpr-copies.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
fix-wwm-vgpr-copy.ll
[AMDGPU] Reland generated test fix-wwm-vgpr-copy.ll (NFC)
2024-07-15 13:28:41 +09:00
flat_atomics_i32_system.ll
[AMDGPU][SILoadStoreOptimizer] Merge constrained sloads (#96162)
2024-07-23 13:50:42 +05:30
flat_atomics_i64_system.ll
[AMDGPU] Codegen support for constrained multi-dword sloads (#96163)
2024-07-23 13:59:15 +05:30
flat_atomics_i64.ll
[AMDGPU] Implement GFX12 Memory Model (#98591)
2024-07-16 10:53:06 +02:00
flat_atomics.ll
[AMDGPU] Codegen support for constrained multi-dword sloads (#96163)
2024-07-23 13:59:15 +05:30
flat-address-space.ll
…
flat-atomic-fadd.f32.ll
AMDGPU: Handle new atomicrmw metadata for fadd case (#96760)
2024-08-02 19:41:33 +04:00
flat-atomic-fadd.f64.ll
AMDGPU/NewPM: Port SIFixSGPRCopies to new pass manager (#102614)
2024-08-09 17:52:41 +04:00
flat-atomic-fadd.v2f16.ll
AMDGPU: Add more tests for vector typed atomicrmw fadd
2024-06-11 14:44:28 +02:00
flat-atomicrmw-fadd.ll
AMDGPU: Avoid creating unnecessary block split in atomic expansion (#102440)
2024-08-09 00:39:12 +04:00
flat-atomicrmw-fmax.ll
AMDGPU: Handle remote/fine-grained memory in atomicrmw fmin/fmax lowering (#96759)
2024-08-01 22:08:01 +04:00
flat-atomicrmw-fmin.ll
AMDGPU: Handle remote/fine-grained memory in atomicrmw fmin/fmax lowering (#96759)
2024-08-01 22:08:01 +04:00
flat-atomicrmw-fsub.ll
AMDGPU: Handle new atomicrmw metadata for fadd case (#96760)
2024-08-02 19:41:33 +04:00
flat-error-unsupported-gpu-hsa.ll
…
flat-for-global-subtarget-feature.ll
[AMDGPU] Rename COV module flag to amdhsa_code_object_version (#79905)
2024-03-06 09:51:48 -05:00
flat-load-clustering.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
flat-offset-bug.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
flat-scratch-fold-fi.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
flat-scratch-i8-i16.ll
[AMDGPU] CodeGen for GFX12 S_WAIT_* instructions (#77438)
2024-01-18 10:47:45 +00:00
flat-scratch-init.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
flat-scratch-reg.ll
[AMDGPU] Remove duplicate -mtriple options in tests (#91576)
2024-05-09 10:59:25 +01:00
flat-scratch-svs.ll
AMDGPU: Handle folding frame indexes into s_add_i32 (#101694)
2024-08-22 09:16:37 +04:00
flat-scratch.ll
AMDGPU: Handle folding frame indexes into s_add_i32 (#101694)
2024-08-22 09:16:37 +04:00
floor.ll
…
fma-combine.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
fma.f16.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
fma.f64.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
fma.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
fmac.sdwa.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
fmad-formation-fmul-distribute-denormal-mode.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
fmad.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
fmax3.f64.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
fmax3.ll
[AMDGPU] Codegen support for constrained multi-dword sloads (#96163)
2024-07-23 13:59:15 +05:30
fmax_legacy.f16.ll
…
fmax_legacy.f64.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
fmax_legacy.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
fmax.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
fmaximum3.ll
DAG: Improve fminimum/fmaximum vector expansion logic (#93579)
2024-06-06 19:01:39 +02:00
fmaximum.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
fmaxnum.f64.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
fmaxnum.ll
APFloat: Fix signed zero handling in minnum/maxnum (#83376)
2024-02-29 16:51:33 +05:30
fmaxnum.r600.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
fmed3-cast-combine.ll
[TargetLowering] Be more efficient in fp -> bf16 NaN conversions
2024-02-21 22:47:27 +00:00
fmed3.ll
[AMDGPU] Codegen support for constrained multi-dword sloads (#96163)
2024-07-23 13:59:15 +05:30
fmin3.ll
[AMDGPU] Codegen support for constrained multi-dword sloads (#96163)
2024-07-23 13:59:15 +05:30
fmin_fmax_legacy.amdgcn.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
fmin_legacy.f16.ll
…
fmin_legacy.f64.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
fmin_legacy.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
fmin.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
fminimum3.ll
DAG: Improve fminimum/fmaximum vector expansion logic (#93579)
2024-06-06 19:01:39 +02:00
fminimum.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
fminnum.f64.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
fminnum.ll
APFloat: Fix signed zero handling in minnum/maxnum (#83376)
2024-02-29 16:51:33 +05:30
fminnum.r600.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
fmul64.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
fmul-2-combine-multi-use.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
fmul-to-ldexp.ll
[GlobalISel] replace right identity X * -1.0 with fneg(x) (#80526)
2024-02-21 09:41:59 +00:00
fmul.f16.ll
[AMDGPU] Codegen support for constrained multi-dword sloads (#96163)
2024-07-23 13:59:15 +05:30
fmul.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
fmuladd.f16.ll
[AMDGPU] Codegen support for constrained multi-dword sloads (#96163)
2024-07-23 13:59:15 +05:30
fmuladd.f32.ll
…
fmuladd.f64.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
fmuladd.v2f16.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
fnearbyint.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
fneg-combines-gfx1200.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
fneg-combines.f16.ll
[AMDGPU] Fix canonicalization of truncated values. (#83054)
2024-03-13 12:08:39 +00:00
fneg-combines.legal.f16.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
fneg-combines.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
fneg-combines.new.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
fneg-combines.si.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
fneg-fabs-divergence-driven-isel.ll
Reland "[NewPM][CodeGen] Port selection dag isel to new pass manager" (#94149)
2024-06-04 08:10:58 +08:00
fneg-fabs-r600.ll
[AMDGPU] Auto-generated some lit test patterns (NFC). (#94310)
2024-06-07 09:07:11 +05:30
fneg-fabs.f16.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
fneg-fabs.f64.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
fneg-fabs.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
fneg-fold-legalize-dag-increase-insts.ll
…
fneg-modifier-casting.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
fneg.f16.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
fneg.f64.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
fneg.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
fold_acc_copy_into_valu.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
fold-agpr-phis.mir
[AMDGPU] Don't optimize agpr phis if the operand doesn't have subreg use (#91267)
2024-05-07 16:44:00 -04:00
fold-cndmask-wave32.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
fold-cndmask.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
fold-fabs.ll
ValueTracking: Treat poison more aggressively in computeKnownFPClass (#87990)
2024-04-15 12:51:29 +02:00
fold-fi-mubuf.mir
…
fold-fi-operand-shrink.mir
…
fold-fmaak-bug.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
fold-fmul-to-neg-abs.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
fold-imm-copy.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
fold-imm-f16-f32.mir
…
fold-immediate-operand-shrink-with-carry.mir
…
fold-immediate-operand-shrink.mir
[AMDGPU] Mark S_NOP as having side effects (#65745)
2023-09-08 14:05:56 +01:00
fold-immediate-output-mods.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
fold-implicit-operand.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
fold-int-pow2-with-fmul-or-fdiv.ll
[AMDGPU] Remove unused checks left over from X86
2024-06-10 10:12:05 +01:00
fold-multiple-commute.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
fold-multiple.mir
…
fold-operands-order.mir
…
fold-operands-remove-m0-redef.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
fold-operands-scalar-fmac.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
fold-over-exec.mir
…
fold-readlane.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
fold-reload-into-exec.mir
…
fold-reload-into-m0.mir
…
fold-restore-undef-use.mir
Reapply "Move assertion for AdjustsStack from PEI to MachineVerifier (#85698)"
2024-03-21 20:24:57 -04:00
fold-sgpr-copy.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
fold-sgpr-multi-imm.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
fold-short-64-bit-literals.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
fold-vgpr-copy.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
fold-vgpr-phyreg.mir
…
fold-zero-high-bits-clear-kill-flags.mir
AMDGPU: Clear kill flags after FoldZeroHighBits (#99582)
2024-07-19 00:46:37 -07:00
folding-of-i32-as-i64.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
force-alwaysinline-lds-global-address-codegen.ll
…
force-alwaysinline-lds-global-address.ll
[IR] Remove support for icmp and fcmp constant expressions (#93038)
2024-06-04 08:31:03 +02:00
fp16_to_fp32.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
fp16_to_fp64.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
fp32_to_fp16.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
fp64-atomics-gfx90a.ll
AMDGPU: Handle new atomicrmw metadata for fadd case (#96760)
2024-08-02 19:41:33 +04:00
fp64-min-max-buffer-atomics.ll
[AMDGPU][SILoadStoreOptimizer] Merge constrained sloads (#96162)
2024-07-23 13:50:42 +05:30
fp64-min-max-buffer-ptr-atomics.ll
[AMDGPU][SILoadStoreOptimizer] Merge constrained sloads (#96162)
2024-07-23 13:50:42 +05:30
fp_to_sint.f64.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
fp_to_sint.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
fp_to_uint.f64.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
fp_to_uint.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
fp_trunc_store_fp32_to_bf16.ll
[AMDGPU][ISel] Add more trunc store actions regarding bf16 (#90493)
2024-04-29 18:27:52 -04:00
fp_trunc_store_fp64_to_bf16.ll
[AMDGPU][ISel] Add more trunc store actions regarding bf16 (#90493)
2024-04-29 18:27:52 -04:00
fp-atomic-to-s_denormmode.mir
AMDGPU: Create pseudo to real mapping for flat/buffer atomic fmin/fmax (#95591)
2024-06-18 10:34:09 +02:00
fp-atomics-gfx940.ll
AMDGPU: Remove flat/global atomic fadd v2bf16 intrinsics (#97050)
2024-08-21 14:26:42 +04:00
fp-atomics-gfx1200.ll
AMDGPU: Remove flat/global atomic fadd v2bf16 intrinsics (#97050)
2024-08-21 14:26:42 +04:00
fp-classify.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
fp-min-max-buffer-atomics.ll
[AMDGPU][SILoadStoreOptimizer] Merge constrained sloads (#96162)
2024-07-23 13:50:42 +05:30
fp-min-max-buffer-ptr-atomics.ll
[AMDGPU][SILoadStoreOptimizer] Merge constrained sloads (#96162)
2024-07-23 13:50:42 +05:30
fp-min-max-flat-atomics-f64.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
fp-min-max-flat-atomics.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
fp-min-max-global-atomics-f64.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
fp-min-max-global-atomics.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
fp-min-max-image-atomics.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
fp-min-max-num-flat-atomics.ll
[AMDGPU] CodeGen for GFX12 S_WAIT_* instructions (#77438)
2024-01-18 10:47:45 +00:00
fp-min-max-num-global-atomics.ll
[AMDGPU] CodeGen for GFX12 S_WAIT_* instructions (#77438)
2024-01-18 10:47:45 +00:00
fpenv.ll
[AMDGPU] Implement 'llvm.get.fpenv' and 'llvm.set.fpenv' (#83906)
2024-03-06 08:11:54 -06:00
fpext-free.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
fpext.f16.ll
[AMDGPU] Codegen support for constrained multi-dword sloads (#96163)
2024-07-23 13:59:15 +05:30
fpext.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
fpow.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
fptoi.i128.ll
[DAGCombiner] Freeze maybe poison operands when folding select to logic (#84924)
2024-07-22 17:19:46 +02:00
fptosi.f16.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
fptoui.f16.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
fptrunc.f16.ll
[AMDGPU] Codegen support for constrained multi-dword sloads (#96163)
2024-07-23 13:59:15 +05:30
fptrunc.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
fract-match.ll
[AMDGPU] Adding multiple use analysis to SIPeepholeSDWA (#94800)
2024-06-14 19:14:19 +02:00
fract.f64.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
fract.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
frame-index-elimination-tied-operand.mir
[AMDGPU] Don't fix the scavenge slot at offset 0 (#79136)
2024-02-09 09:20:25 +01:00
frame-index-elimination.ll
AMDGPU/GlobalISel: Partially move constant selection to patterns (#100786)
2024-07-30 18:18:16 +04:00
frame-index.mir
AMDGPU: Handle folding frame indexes into s_add_i32 (#101694)
2024-08-22 09:16:37 +04:00
frame-lowering-entry-all-sgpr-used.mir
…
frame-lowering-fp-adjusted.mir
…
frame-setup-without-sgpr-to-vgpr-spills.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
frem.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
frexp-constant-fold.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
fshl.ll
[AMDGPU][SILoadStoreOptimizer] Merge constrained sloads (#96162)
2024-07-23 13:50:42 +05:30
fshr.ll
Revert "[AMDGPU] Always lower s/udiv64 by constant to MUL (#100723)"
2024-08-02 14:43:36 -07:00
fsqrt.f32.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
fsqrt.f64.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
fsqrt.r600.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
fsub64.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
fsub-as-fneg-src-modifier.ll
[FPEnv][AMDGPU] Correct strictfp tests.
2024-02-05 09:29:31 -05:00
fsub.f16.ll
[AMDGPU] Codegen support for constrained multi-dword sloads (#96163)
2024-07-23 13:59:15 +05:30
fsub.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
ftrunc.f64.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
ftrunc.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
function-args-inreg.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
function-args.ll
[AMDGPU] Combine or remove redundant waitcnts at the end of each MBB (#87539)
2024-04-04 10:14:16 +01:00
function-call-relocs.ll
…
function-returns.ll
[DAG] Preserve NUW when reassociating (#87621)
2024-04-04 16:47:25 +02:00
fused-bitlogic.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
gds-allocation.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
gds-atomic.ll
[AMDGPU] Introduce GFX9/10.1/10.3/11 Generic Targets (#76955)
2024-02-12 10:18:20 +01:00
gds-unsupported.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
generic-targets-require-v6.ll
AMDGPU: Add gfx12-generic target (#93875)
2024-05-31 12:46:44 -04:00
gep-address-space.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
gep-const-address-space.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
gfx10-twoaddr-fma.mir
[AMDGPU] Remove some invalid tests (#98796)
2024-07-15 19:49:18 +08:00
gfx10-vop-literal.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
gfx11-twoaddr-fma.mir
[CodeGen] Port two-address-instructions to new pass manager (#98632)
2024-07-15 15:11:06 +08:00
gfx11-user-sgpr-init16-bug.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
gfx12_scalar_subword_loads.ll
[AMDGPU] Fix negative immediate offset for unbuffered smem loads (#89165)
2024-06-24 14:18:23 -07:00
gfx90a-enc.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
gfx902-without-xnack.ll
[AMDGPU] Rename COV module flag to amdhsa_code_object_version (#79905)
2024-03-06 09:51:48 -05:00
gfx940-hazards.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
gfx-call-non-gfx-func.ll
AMDGPU: Allocate special SGPRs before user SGPR arguments (#78234)
2024-01-17 21:41:50 +07:00
gfx-callable-argument-types.ll
[AMDGPU][DAG] Enable ganging up of memcpy loads/stores for AMDGPU (#96185)
2024-07-03 08:32:35 +02:00
gfx-callable-preserved-registers.ll
[AMDGPU] Pick available high VGPR for CSR SGPR spilling (#78669)
2024-01-24 07:08:43 +05:30
gfx-callable-return-types.ll
[DAG] Preserve NUW when reassociating (#87621)
2024-04-04 16:47:25 +02:00
global_atomic_optimizer_fp_rtn.ll
AMDGPU: Handle new atomicrmw metadata for fadd case (#96760)
2024-08-02 19:41:33 +04:00
global_atomics_i32_system.ll
[AMDGPU][SILoadStoreOptimizer] Merge constrained sloads (#96162)
2024-07-23 13:50:42 +05:30
global_atomics_i64_system.ll
[AMDGPU] Codegen support for constrained multi-dword sloads (#96163)
2024-07-23 13:59:15 +05:30
global_atomics_i64.ll
[AMDGPU] Codegen support for constrained multi-dword sloads (#96163)
2024-07-23 13:59:15 +05:30
global_atomics_iterative_scan_fp.ll
[AMDGPU] Cleanup bitcast spam in atomic optimizer (#96933)
2024-07-08 10:53:16 +05:30
global_atomics_iterative_scan.ll
[AMDGPU] Extend readlane, writelane and readfirstlane intrinsic lowering for generic types (#89217)
2024-06-25 14:35:19 +05:30
global_atomics_optimizer_fp_no_rtn.ll
AMDGPU: Handle new atomicrmw metadata for fadd case (#96760)
2024-08-02 19:41:33 +04:00
global_atomics_scan_fadd.ll
AMDGPU: Stop handling legacy amdgpu-unsafe-fp-atomics attribute (#101699)
2024-08-13 22:02:25 +04:00
global_atomics_scan_fmax.ll
AMDGPU: Stop handling legacy amdgpu-unsafe-fp-atomics attribute (#101699)
2024-08-13 22:02:25 +04:00
global_atomics_scan_fmin.ll
AMDGPU: Stop handling legacy amdgpu-unsafe-fp-atomics attribute (#101699)
2024-08-13 22:02:25 +04:00
global_atomics_scan_fsub.ll
AMDGPU: Handle new atomicrmw metadata for fadd case (#96760)
2024-08-02 19:41:33 +04:00
global_atomics.ll
[AMDGPU] Codegen support for constrained multi-dword sloads (#96163)
2024-07-23 13:59:15 +05:30
global_smrd_cfg.ll
…
global_smrd.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
global-alias.ll
[AMDGPU] Fix resource analysis crash on alias-to-alias function (#99034)
2024-07-16 08:34:18 -05:00
global-atomic-fadd.f32-no-rtn.ll
AMDGPU: Handle new atomicrmw metadata for fadd case (#96760)
2024-08-02 19:41:33 +04:00
global-atomic-fadd.f32-rtn.ll
AMDGPU: Handle new atomicrmw metadata for fadd case (#96760)
2024-08-02 19:41:33 +04:00
global-atomic-fadd.f64.ll
AMDGPU: Handle new atomicrmw metadata for fadd case (#96760)
2024-08-02 19:41:33 +04:00
global-atomic-fadd.v2f16-no-rtn.ll
Reland "[NewPM][CodeGen] Port selection dag isel to new pass manager" (#94149)
2024-06-04 08:10:58 +08:00
global-atomic-fadd.v2f16-rtn.ll
Reland "[NewPM][CodeGen] Port selection dag isel to new pass manager" (#94149)
2024-06-04 08:10:58 +08:00
global-atomic-scan.ll
[AMDGPU] Extend readlane, writelane and readfirstlane intrinsic lowering for generic types (#89217)
2024-06-25 14:35:19 +05:30
global-atomicrmw-fadd-wrong-subtarget.ll
AMDGPU: Handle new atomicrmw metadata for fadd case (#96760)
2024-08-02 19:41:33 +04:00
global-atomicrmw-fadd.ll
AMDGPU: Handle new atomicrmw metadata for fadd case (#96760)
2024-08-02 19:41:33 +04:00
global-atomicrmw-fmax.ll
AMDGPU: Handle remote/fine-grained memory in atomicrmw fmin/fmax lowering (#96759)
2024-08-01 22:08:01 +04:00
global-atomicrmw-fmin.ll
AMDGPU: Handle remote/fine-grained memory in atomicrmw fmin/fmax lowering (#96759)
2024-08-01 22:08:01 +04:00
global-atomicrmw-fsub.ll
AMDGPU: Handle new atomicrmw metadata for fadd case (#96760)
2024-08-02 19:41:33 +04:00
global-atomics-fp-wrong-subtarget.ll
AMDGPU: Handle new atomicrmw metadata for fadd case (#96760)
2024-08-02 19:41:33 +04:00
global-constant.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
global-directive.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
global-extload-i16.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
global-i16-load-store.ll
[AMDGPU] Codegen support for constrained multi-dword sloads (#96163)
2024-07-23 13:59:15 +05:30
global-load-saddr-to-vaddr.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
global-saddr-atomics-min-max-system.ll
[AMDGPU][SIMemoryLegalizer] Fix order of GL0/1_INV on GFX10/11 (#81450)
2024-02-13 09:07:51 +01:00
global-saddr-atomics.gfx908.ll
…
global-saddr-atomics.gfx1030.ll
…
global-saddr-atomics.ll
[AMDGPU][SIMemoryLegalizer] Fix order of GL0/1_INV on GFX10/11 (#81450)
2024-02-13 09:07:51 +01:00
global-saddr-load.ll
[AMDGPU] Implement GFX12 Memory Model (#98591)
2024-07-16 10:53:06 +02:00
global-saddr-store.ll
[AMDGPU] Implement GFX12 Memory Model (#98591)
2024-07-16 10:53:06 +02:00
global-smrd-unknown.ll
…
global-variable-relocs.ll
…
greedy-alloc-fail-sgpr1024-spill.mir
Reapply "Move assertion for AdjustsStack from PEI to MachineVerifier (#85698)"
2024-03-21 20:24:57 -04:00
greedy-broken-ssa-verifier-error.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
greedy-global-heuristic.mir
Typos: 'maxium', 'minium'
2023-10-23 10:42:28 +02:00
greedy-instruction-split-subrange.mir
AMDGPU: Regenerate baseline mir tests
2024-02-27 10:44:53 +05:30
greedy-liverange-priority.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
greedy-remark-crash-unassigned-reg.mir
…
greedy-reverse-local-assignment.ll
…
gv-const-addrspace.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
gv-offset-folding.ll
…
gws-hazards.mir
AMDGPU: Regenerate baseline mir tests
2024-02-27 10:44:53 +05:30
half-alloca-promotion.ll
[AMDGPU] Fix a potential wrong return value indicating whether a pass modifies a function (#88197)
2024-04-12 09:34:46 -04:00
half.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
hard-clauses-img-gfx10.mir
[AMDGPU] Fix hard clausing for image instructions on gfx12 (#90221)
2024-04-29 11:42:36 +01:00
hard-clauses-img-gfx11.mir
[AMDGPU] Fix hard clausing for image instructions on gfx12 (#90221)
2024-04-29 11:42:36 +01:00
hard-clauses-img-gfx12.mir
[AMDGPU] Fix hard clausing for image instructions on gfx12 (#90221)
2024-04-29 11:42:36 +01:00
hard-clauses.mir
[AMDGPU] Fix hard clausing for image instructions on gfx12 (#90221)
2024-04-29 11:42:36 +01:00
hazard-buffer-store-v-interp.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
hazard-hidden-bundle.mir
[AMDGPU] Remove -wavefrontsize32 and -wavefrontsize64 from GFX10+ tests (NFC) (#100711)
2024-07-26 00:42:24 -07:00
hazard-in-bundle.mir
[AMDGPU] Remove -wavefrontsize32 and -wavefrontsize64 from GFX10+ tests (NFC) (#100711)
2024-07-26 00:42:24 -07:00
hazard-inlineasm.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
hazard-kill.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
hazard-lds-addtid.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
hazard-pass-ordering.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
hazard-pseudo-machineinstrs.mir
…
hazard-recognizer-meta-insts.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
hazard-shift64.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
hazard.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
high-bits-zeroed-16-bit-ops.mir
AMDGPU: Regenerate baseline mir tests
2024-02-27 10:44:53 +05:30
high-RP-reschedule.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
hip.extern.shared.array.ll
…
hoist-cond.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
hsa-default-device.ll
[AMDGPU] Rename COV module flag to amdhsa_code_object_version (#79905)
2024-03-06 09:51:48 -05:00
hsa-fp-mode.ll
[AMDGPU] Rename COV module flag to amdhsa_code_object_version (#79905)
2024-03-06 09:51:48 -05:00
hsa-func-align.ll
…
hsa-func.ll
[AMDGPU] Rename COV module flag to amdhsa_code_object_version (#79905)
2024-03-06 09:51:48 -05:00
hsa-generic-target-features.ll
[AMDGPU] Remove -wavefrontsize32 and -wavefrontsize64 from GFX10+ tests (NFC) (#100711)
2024-07-26 00:42:24 -07:00
hsa-globals.ll
[AMDGPU][MC] Use normal ELF syntax for section switching (#77267)
2024-01-09 14:13:42 -05:00
hsa-group-segment.ll
…
hsa-metadata-agpr-register-count.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
hsa-metadata-agpr-small.ll
…
hsa-metadata-deduced-arg-attr.ll
[AMDGPU] Emit .actual_access metadata
2023-08-23 12:57:29 -07:00
hsa-metadata-dynlds-func-hidden-args-v5.ll
[AMDGPU] Rename COV module flag to amdhsa_code_object_version (#79905)
2024-03-06 09:51:48 -05:00
hsa-metadata-dynlds-funcarg-hidden-args-v5.ll
[AMDGPU] Rename COV module flag to amdhsa_code_object_version (#79905)
2024-03-06 09:51:48 -05:00
hsa-metadata-dynlds-kernarg-hidden-args-v5.ll
[AMDGPU] Rename COV module flag to amdhsa_code_object_version (#79905)
2024-03-06 09:51:48 -05:00
hsa-metadata-enqueue-kernel-.ll
[AMDGPU] Rename COV module flag to amdhsa_code_object_version (#79905)
2024-03-06 09:51:48 -05:00
hsa-metadata-from-llvm-ctor-dtor-list.ll
[AMDGPU] Rename COV module flag to amdhsa_code_object_version (#79905)
2024-03-06 09:51:48 -05:00
hsa-metadata-from-llvm-ir-full.ll
[AMDGPU] Rename COV module flag to amdhsa_code_object_version (#79905)
2024-03-06 09:51:48 -05:00
hsa-metadata-heap-v5.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
hsa-metadata-hidden-args-v4.ll
[AMDGPU] Rename COV module flag to amdhsa_code_object_version (#79905)
2024-03-06 09:51:48 -05:00
hsa-metadata-hidden-args-v5.ll
[AMDGPU] Rename COV module flag to amdhsa_code_object_version (#79905)
2024-03-06 09:51:48 -05:00
hsa-metadata-hostcall-present-asan.ll
[AMDGPU] Rename COV module flag to amdhsa_code_object_version (#79905)
2024-03-06 09:51:48 -05:00
hsa-metadata-hostcall-v4.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
hsa-metadata-hostcall-v5.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
hsa-metadata-images.ll
[AMDGPU] Rename COV module flag to amdhsa_code_object_version (#79905)
2024-03-06 09:51:48 -05:00
hsa-metadata-invalid-ocl-version-1.ll
[AMDGPU] Rename COV module flag to amdhsa_code_object_version (#79905)
2024-03-06 09:51:48 -05:00
hsa-metadata-invalid-ocl-version-3.ll
[AMDGPU] Rename COV module flag to amdhsa_code_object_version (#79905)
2024-03-06 09:51:48 -05:00
hsa-metadata-kernel-code-props.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
hsa-metadata-multigrid-sync-arg-v5.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
hsa-metadata-queue-ptr-v5.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
hsa-metadata-queueptr-v5.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
hsa-metadata-resource-usage-function-ordering.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
hsa-metadata-uniform-workgroup-size-v5.ll
[AMDGPU] Rename COV module flag to amdhsa_code_object_version (#79905)
2024-03-06 09:51:48 -05:00
hsa-metadata-wavefrontsize.ll
[AMDGPU] Remove -wavefrontsize32 and -wavefrontsize64 from GFX10+ tests (NFC) (#100711)
2024-07-26 00:42:24 -07:00
hsa-metadata-workgroup-processor-mode-v5.ll
[AMDGPU] Rename COV module flag to amdhsa_code_object_version (#79905)
2024-03-06 09:51:48 -05:00
hsa-note-no-func.ll
[AMDGPU] Rename COV module flag to amdhsa_code_object_version (#79905)
2024-03-06 09:51:48 -05:00
hsa.ll
[AMDGPU] Remove -wavefrontsize32 and -wavefrontsize64 from GFX10+ tests (NFC) (#100711)
2024-07-26 00:42:24 -07:00
huge-number-operand-folds.mir
…
huge-private-buffer.ll
[AMDGPU] Remove -wavefrontsize32 and -wavefrontsize64 from GFX10+ tests (NFC) (#100711)
2024-07-26 00:42:24 -07:00
i1_copy_phi_with_phi_incoming_value.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
i1-copies-rpo.mir
…
i1-copy-from-loop.ll
…
i1-copy-implicit-def.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
i1-copy-phi-uniform-branch.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
i1-copy-phi.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
i8-to-double-to-float.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
icmp64.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
icmp-select-sete-reverse-args.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
icmp.i16.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
idemponent-atomics.ll
AMDGPU: Add more tests for atomicrmw handling
2024-05-03 11:50:59 +02:00
identical-subrange-spill-infloop.ll
[AMDGPU] Codegen support for constrained multi-dword sloads (#96163)
2024-07-23 13:59:15 +05:30
idiv-licm.ll
[AMDGPU] Codegen support for constrained multi-dword sloads (#96163)
2024-07-23 13:59:15 +05:30
idot2.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
idot4s.ll
[AMDGPU] Codegen support for constrained multi-dword sloads (#96163)
2024-07-23 13:59:15 +05:30
idot4u.ll
[AMDGPU] Codegen support for constrained multi-dword sloads (#96163)
2024-07-23 13:59:15 +05:30
idot8s.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
idot8u.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
iglp.opt.reentry.ll
[AMDGPU] Do not attempt to fallback to default mutations (#83208)
2024-02-27 18:04:59 -08:00
illegal-eviction-assert.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
illegal-sgpr-to-vgpr-copy.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
image-attributes.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
image-load-d16-tfe.ll
…
image-resource-id.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
image-sample-waterfall.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
image-schedule.ll
…
img-nouse-adjust.ll
Reland "[NewPM][CodeGen] Port selection dag isel to new pass manager" (#94149)
2024-06-04 08:10:58 +08:00
imm16.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
imm.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
immv216.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
implicit-arg-v5-opt.ll
[AMDGPU] Rename COV module flag to amdhsa_code_object_version (#79905)
2024-03-06 09:51:48 -05:00
implicit-def-muse.ll
Reland "[NewPM][CodeGen] Port selection dag isel to new pass manager" (#94149)
2024-06-04 08:10:58 +08:00
implicit-kernarg-backend-usage.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
implicit-kernel-argument-alignment.ll
[AMDGPU] Rename COV module flag to amdhsa_code_object_version (#79905)
2024-03-06 09:51:48 -05:00
implicitarg-attributes.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
implicitarg-offset-attributes.ll
AMDGPU: Infer no-agpr usage in AMDGPUAttributor (#85948)
2024-03-21 14:24:06 +05:30
indirect-addressing-si-gfx9.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
indirect-addressing-si-noopt.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
indirect-addressing-si-pregfx9.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
indirect-addressing-si.ll
[AMDGPU] Fix indirect dst bug for non-sgpr index (#98907)
2024-07-16 09:12:39 +01:00
indirect-addressing-term.ll
[AMDGPU] Codegen support for constrained multi-dword sloads (#96163)
2024-07-23 13:59:15 +05:30
indirect-call-known-callees.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
indirect-call-set-from-other-function.ll
[Attributor] Fix an issue that an access is skipped by mistake (#101862)
2024-08-06 21:29:39 -04:00
indirect-call.ll
[MachineLICM] Work-around Incomplete RegUnits (#95926)
2024-06-20 10:59:00 +02:00
indirect-private-64.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
infer-addrpace-pipeline.ll
…
infer-uniform-load-shader.ll
…
infinite-loop-evergreen.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
infinite-loop.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
infloop-subrange-spill-inspect-subrange.mir
AMDGPU: Add a MIR test to catch infinite loop
2023-12-06 15:58:32 +07:00
infloop-subrange-spill.mir
AMDGPU: Add infinite looping testcase after subrange spilling change
2023-10-27 17:42:14 +09:00
inline-asm-reserved-regs.ll
…
inline-asm.i128.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
inline-asm.ll
SelectionDAG: Do not propagate divergence through copy glue (#101210)
2024-07-31 00:04:58 +04:00
inline-attr.ll
Revert "[AMDGPU] Move AMDGPUAttributorPass to full LTO post link stage (#102086)"
2024-08-09 15:12:24 -04:00
inline-calls.ll
…
inline-constraints.ll
[AMDGPU] Replace isInlinableLiteral16 with specific version (#84402)
2024-03-08 14:49:52 -05:00
inline-maxbb.ll
…
inlineasm-16.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
inlineasm-illegal-type.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
inlineasm-packed.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
inlineasm-v16.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
InlineAsmCrash.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
input-mods.r600.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
insert_subreg.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
insert_vector_dynelt.ll
AMDGPU/GlobalISel: Partially move constant selection to patterns (#100786)
2024-07-30 18:18:16 +04:00
insert_vector_elt.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
insert_vector_elt.v2bf16.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
insert_vector_elt.v2i16.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
insert_vector_elt.v2i16.subtest-nosaddr.ll
…
insert_vector_elt.v2i16.subtest-saddr.ll
…
insert_waitcnt_for_precise_memory.ll
AMDGPU: Handle new atomicrmw metadata for fadd case (#96760)
2024-08-02 19:41:33 +04:00
insert-branch-w32.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
insert-delay-alu-bug.ll
[AMDGPU] Rename COV module flag to amdhsa_code_object_version (#79905)
2024-03-06 09:51:48 -05:00
insert-delay-alu-literal.mir
[AMDGPU] Remove -wavefrontsize32 and -wavefrontsize64 from GFX10+ tests (NFC) (#100711)
2024-07-26 00:42:24 -07:00
insert-delay-alu-parse.mir
[AMDGPU] Remove -wavefrontsize32 and -wavefrontsize64 from GFX10+ tests (NFC) (#100711)
2024-07-26 00:42:24 -07:00
insert-delay-alu.mir
[AMDGPU] Remove -wavefrontsize32 and -wavefrontsize64 from GFX10+ tests (NFC) (#100711)
2024-07-26 00:42:24 -07:00
insert-singleuse-vdst.mir
[AMDGPU] Exclude certain opcodes from being marked as single use (#91802)
2024-06-12 10:43:23 +01:00
insert-skip-from-vcc.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
insert-skips-flat-vmem-ds.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
insert-skips-gfx10.mir
[AMDGPU] Update hasUnwantedEffectsWhenEXECEmpty (#97982)
2024-07-17 11:30:44 +09:00
insert-skips-gfx12.mir
[AMDGPU] Update hasUnwantedEffectsWhenEXECEmpty (#97982)
2024-07-17 11:30:44 +09:00
insert-skips-gws.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
insert-skips-ignored-insts.mir
…
insert-subvector-unused-scratch.ll
…
insert-waitcnts-callee.mir
…
insert-waitcnts-crash.ll
[AMDGPU][SIMemoryLegalizer] Fix order of GL0/1_INV on GFX10/11 (#81450)
2024-02-13 09:07:51 +01:00
insert-waitcnts-exp.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
insert-waitcnts-hang.mir
[AMDGPU,test] Change llc -march= to -mtriple=
2024-03-07 19:09:18 -08:00
inserted-wait-states.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
integer-mad-patterns.ll
[AMDGPU] Add some gfx1200 test coverage
2024-06-27 14:53:59 +01:00
internalize.ll
…
invalid-addrspacecast.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
invalid-inline-asm-constraint-crash.ll
DAG: Fix asserting on invalid inline asm constraints (#95935)
2024-06-18 18:51:29 +02:00
invariant-image-load.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
invariant-load-no-alias-store.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
invert-br-undef-vcc.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
ipra-regmask.ll
…
ipra-return-address-save-restore.ll
[AMDGPU] Select 64-bit imm moves if can be encoded as 32 bit operand (#70395)
2023-10-30 08:12:28 -07:00
ipra.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
isel-amdgcn-cs-chain-intrinsic-w32.ll
[AMDGPU] Remove -wavefrontsize32 and -wavefrontsize64 from GFX10+ tests (NFC) (#100711)
2024-07-26 00:42:24 -07:00
isel-amdgcn-cs-chain-intrinsic-w64.ll
[AMDGPU] Remove -wavefrontsize32 and -wavefrontsize64 from GFX10+ tests (NFC) (#100711)
2024-07-26 00:42:24 -07:00
isel-amdgpu-cs-chain-cc.ll
[AMDGPU] Remove -wavefrontsize32 and -wavefrontsize64 from GFX10+ tests (NFC) (#100711)
2024-07-26 00:42:24 -07:00
isel-amdgpu-cs-chain-preserve-cc.ll
[AMDGPU] Remove -wavefrontsize32 and -wavefrontsize64 from GFX10+ tests (NFC) (#100711)
2024-07-26 00:42:24 -07:00
issue48473.mir
…
issue92561-restore-undef-scc-verifier-error.ll
AMDGPU: Remove arbitrary SCC liveness scan threshold (#94097)
2024-06-01 14:19:38 +02:00
itofp.i128.bf.ll
[DAG] Always allow folding XOR patterns to ABS pre-legalization (#94601)
2024-06-07 11:02:50 +01:00
itofp.i128.ll
[DAG] Always allow folding XOR patterns to ABS pre-legalization (#94601)
2024-06-07 11:02:50 +01:00
jump-address.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
kcache-fold.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
kernarg-size.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
kernarg-stack-alignment.ll
[AMDGPU] Don't fix the scavenge slot at offset 0 (#79136)
2024-02-09 09:20:25 +01:00
kernel_code_t_recurse.ll
MCExpr-ify amd_kernel_code_t (#91587)
2024-05-22 13:45:45 +01:00
kernel-args.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
kernel-argument-dag-lowering.ll
AMDGPU: Fix asserting in DAG kernel argument lowering on v6i32 (#100528)
2024-07-25 14:03:28 +04:00
kernel-mubuf-with-voffset.mir
…
kernel-vgpr-spill-mubuf-with-voffset.ll
[AMDGPU] change order of fp and sp in kernel prologue (#90626)
2024-05-01 08:16:55 -07:00
kill-infinite-loop.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
known-never-nan.ll
…
known-never-snan.ll
AMDGPU: Fix handling of -0 in round lowering (#65761)
2023-09-19 09:14:17 +03:00
knownbits-recursion.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
large-alloca-compute.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
large-alloca-graphics.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
large-constant-initializer.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
large-work-group-promote-alloca.ll
…
lcssa-optnone.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
lds-alignment.ll
[AMDGPU] Rename COV module flag to amdhsa_code_object_version (#79905)
2024-03-06 09:51:48 -05:00
lds-bounds.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
lds-branch-vmem-hazard.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
lds-direct-hazards-gfx11.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
lds-direct-hazards-gfx12.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
lds-dma-hazards.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
lds-dma-waitcnt.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
lds-dma-waits.ll
[AMDGPU] Use alias info to relax waitcounts for LDS DMA (#74537)
2024-01-17 23:44:15 -08:00
lds-frame-extern.ll
AMDGPU/GlobalISel: Partially move constant selection to patterns (#100786)
2024-07-30 18:18:16 +04:00
lds-global-non-entry-func.ll
[SelectionDAG] Preserve volatile undef stores. (#99918)
2024-07-24 08:41:56 -04:00
lds-initializer.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
lds-m0-init-in-loop.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
lds-misaligned-bug.ll
[LiveIntervals] repairIntervalsInRange: recompute width changes (#78564)
2024-03-11 15:24:17 +09:00
lds-mixed-absolute-addresses-unused.ll
[AMDGPU][LowerModuleLDS] Refactor partially lowered module detection (#85793)
2024-03-21 11:28:35 +01:00
lds-mixed-absolute-dynlds.ll
[AMDGPU] Fix DynLDS causing crash when LowerLDS is run at fullLTO pipeline (#96038)
2024-06-28 21:05:48 -05:00
lds-oqap-crash.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
lds-output-queue.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
lds-reject-anonymous-kernels.ll
…
lds-reject-mixed-absolute-addresses.ll
[AMDGPU][LowerModuleLDS] Refactor partially lowered module detection (#85793)
2024-03-21 11:28:35 +01:00
lds-relocs.ll
[AMDGPU] Use absolute relocations when compiling for AMDPAL and Mesa3D (#67791)
2023-10-10 09:22:02 +02:00
lds-run-twice-absolute-md.ll
[AIX][tests] Disable failing tests on AIX
2024-03-12 12:11:18 -04:00
lds-run-twice.ll
[AMDGPU] Fix DynLDS causing crash when LowerLDS is run at fullLTO pipeline (#96038)
2024-06-28 21:05:48 -05:00
lds-size.ll
[AMDGPU] Rename COV module flag to amdhsa_code_object_version (#79905)
2024-03-06 09:51:48 -05:00
lds-zero-initializer.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
legalize-amdgcn.raw.buffer.load.format.f16.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
legalize-amdgcn.raw.buffer.load.format.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
legalize-amdgcn.raw.buffer.load.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
legalize-amdgcn.raw.buffer.store.format.f16.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
legalize-amdgcn.raw.buffer.store.format.f32.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
legalize-amdgcn.raw.buffer.store.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
legalize-amdgcn.raw.ptr.buffer.load.format.f16.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
legalize-amdgcn.raw.ptr.buffer.load.format.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
legalize-amdgcn.raw.ptr.buffer.load.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
legalize-amdgcn.raw.ptr.buffer.store.format.f16.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
legalize-amdgcn.raw.ptr.buffer.store.format.f32.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
legalize-amdgcn.raw.ptr.buffer.store.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
legalize-amdgcn.raw.ptr.tbuffer.load.f16.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
legalize-amdgcn.raw.ptr.tbuffer.load.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
legalize-amdgcn.raw.ptr.tbuffer.store.f16.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
legalize-amdgcn.raw.ptr.tbuffer.store.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
legalize-amdgcn.raw.tbuffer.load.f16.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
legalize-amdgcn.raw.tbuffer.load.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
legalize-amdgcn.raw.tbuffer.store.f16.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
legalize-amdgcn.raw.tbuffer.store.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
legalize-fp-load-invariant.ll
Reland "[NewPM][CodeGen] Port selection dag isel to new pass manager" (#94149)
2024-06-04 08:10:58 +08:00
legalize-soffset-mbuf.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
legalizedag-bug-expand-setcc.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
licm-regpressure.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
licm-valu.mir
…
limit-coalesce.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
limit-soft-clause-reg-pressure.mir
…
lit.local.cfg
…
literal-constant-like-operand-instruction-size.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
literals.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
live-interval-bug-in-rename-independent-subregs.mir
RenameIndependentSubregs: Add missing sub-range for new IMPLICIT_DEFs (#89050)
2024-04-23 12:38:00 +02:00
liveness.mir
[CodeGen][NewPM] Port LiveIntervals to new pass manager (#98118)
2024-07-10 19:34:48 +08:00
liveout-implicit-def-subreg-redef-blender-verifier-error.mir
AMDGPU: Regenerate baseline mir tests
2024-02-27 10:44:53 +05:30
llc-pipeline.ll
[LTO] Run ObjCARCContractPass according to the callgraph (#103034)
2024-08-13 12:57:13 +01:00
llvm.amdgcn.addrspacecast.nonnull.ll
[AMDGPU] Improve detection of non-null addrspacecast operands (#82311)
2024-03-01 14:01:10 +01:00
llvm.amdgcn.alignbyte.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.atomic.cond.sub.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
llvm.amdgcn.atomic.dec.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.atomic.inc.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.ballot.i32.ll
[AMDGPU] Remove -wavefrontsize32 and -wavefrontsize64 from GFX10+ tests (NFC) (#100711)
2024-07-26 00:42:24 -07:00
llvm.amdgcn.ballot.i64.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
llvm.amdgcn.ballot.i64.wave32.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.bitreplicate.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.buffer.load-last-use.ll
[AMDGPU] Update tests for last-use in global/scratch/flat/buffer load… (#94975)
2024-06-11 06:30:13 +02:00
llvm.amdgcn.buffer.load.dwordx3.ll
[RFC][AMDGPU] Remove old llvm.amdgcn.buffer.* and tbuffer intrinsics (#93801)
2024-06-10 12:14:51 +01:00
llvm.amdgcn.buffer.store.dwordx3.ll
[RFC][AMDGPU] Remove old llvm.amdgcn.buffer.* and tbuffer intrinsics (#93801)
2024-06-10 12:14:51 +01:00
llvm.amdgcn.class.f16.ll
…
llvm.amdgcn.class.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.cos.f16.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.cos.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.cubeid.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.cubema.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.cubesc.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.cubetc.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.cvt.fp8.dpp.ll
[AMDGPU] Support byte_sel modifier for v_cvt_f32_fp8 and v_cvt_f32_bf8 (#90887)
2024-05-02 12:03:51 -07:00
llvm.amdgcn.cvt.fp8.dpp.mir
[AMDGPU] Support byte_sel modifier for v_cvt_f32_fp8 and v_cvt_f32_bf8 (#90887)
2024-05-02 12:03:51 -07:00
llvm.amdgcn.cvt.fp8.ll
[AMDGPU] Support byte_sel modifier for v_cvt_f32_fp8 and v_cvt_f32_bf8 (#90887)
2024-05-02 12:03:51 -07:00
llvm.amdgcn.cvt.pk.i16.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
llvm.amdgcn.cvt.pk.u16.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
llvm.amdgcn.cvt.pknorm.i16.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
llvm.amdgcn.cvt.pknorm.u16.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
llvm.amdgcn.cvt.pkrtz.ll
[AMDGPU] Codegen support for constrained multi-dword sloads (#96163)
2024-07-23 13:59:15 +05:30
llvm.amdgcn.dispatch.id.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
llvm.amdgcn.dispatch.ptr.ll
[AMDGPU] Rename COV module flag to amdhsa_code_object_version (#79905)
2024-03-06 09:51:48 -05:00
llvm.amdgcn.div.fixup.f16.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.div.fixup.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.div.fmas.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.div.scale.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.dot4.f32.ll
[AMDGPU,test] Change llc -march= to -mtriple=
2024-03-07 19:09:18 -08:00
llvm.amdgcn.ds.add.gs.reg.rtn.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.ds.append.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.ds.bpermute.ll
…
llvm.amdgcn.ds.bvh.stack.rtn.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.ds.consume.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.ds.gws.barrier-fastregalloc.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
llvm.amdgcn.ds.gws.barrier.ll
[AMDGPU][SIInsertWaitcnts] Do not add s_waitcnt when the counters are known to be 0 already (#72830)
2023-12-15 12:33:32 +01:00
llvm.amdgcn.ds.gws.init.ll
…
llvm.amdgcn.ds.gws.sema.br.ll
…
llvm.amdgcn.ds.gws.sema.p.ll
…
llvm.amdgcn.ds.gws.sema.release.all.ll
…
llvm.amdgcn.ds.gws.sema.v.ll
…
llvm.amdgcn.ds.ordered.add.gfx10.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.ds.ordered.add.gfx11.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.ds.ordered.add.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.ds.ordered.swap.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.ds.permute.ll
…
llvm.amdgcn.ds.sub.gs.reg.rtn.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.ds.swizzle.ll
…
llvm.amdgcn.exp2.ll
…
llvm.amdgcn.exp.compr.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.exp.ll
[AMDGPU] Add GFX12 test coverage for export instructions (#100415)
2024-07-25 10:55:07 +01:00
llvm.amdgcn.exp.prim.ll
[AMDGPU] Add GFX12 test coverage for export instructions (#100415)
2024-07-25 10:55:07 +01:00
llvm.amdgcn.exp.row.ll
[AMDGPU] Add GFX12 test coverage for export instructions (#100415)
2024-07-25 10:55:07 +01:00
llvm.amdgcn.fcmp.w32.ll
[AMDGPU] Codegen support for constrained multi-dword sloads (#96163)
2024-07-23 13:59:15 +05:30
llvm.amdgcn.fcmp.w64.ll
[AMDGPU] Codegen support for constrained multi-dword sloads (#96163)
2024-07-23 13:59:15 +05:30
llvm.amdgcn.fdiv.fast.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.fdot2.bf16.bf16.ll
[AMDGPU] Codegen support for constrained multi-dword sloads (#96163)
2024-07-23 13:59:15 +05:30
llvm.amdgcn.fdot2.f16.f16.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
llvm.amdgcn.fdot2.f32.bf16.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
llvm.amdgcn.fdot2.ll
[AMDGPU] Do not emit V_DOT2C_F32_F16_e32 on GFX12 (#78709)
2024-01-19 14:36:27 +00:00
llvm.amdgcn.fma.legacy.ll
…
llvm.amdgcn.fmad.ftz.f16.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.fmad.ftz.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.fmed3.f16.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.fmed3.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.fmul.legacy.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
llvm.amdgcn.fract.f16.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.fract.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.frexp.exp.f16.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.frexp.exp.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.frexp.mant.f16.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.frexp.mant.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.global.atomic.csub.ll
[AMDGPU][SILoadStoreOptimizer] Merge constrained sloads (#96162)
2024-07-23 13:50:42 +05:30
llvm.amdgcn.global.atomic.fadd.gfx90a.ll
[AMDGPU] Restore non-buffer atomic tests lost in #93801 (#94978)
2024-06-10 15:49:18 +01:00
llvm.amdgcn.global.atomic.fadd.ll
[AMDGPU] Restore non-buffer atomic tests lost in #93801 (#94978)
2024-06-10 15:49:18 +01:00
llvm.amdgcn.global.atomic.ordered.add.b64.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
llvm.amdgcn.global.load.lds.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.global.load.tr-w32.ll
[AMDGPU] Remove -wavefrontsize32 and -wavefrontsize64 from GFX10+ tests (NFC) (#100711)
2024-07-26 00:42:24 -07:00
llvm.amdgcn.global.load.tr-w64.ll
[AMDGPU] Remove -wavefrontsize32 and -wavefrontsize64 from GFX10+ tests (NFC) (#100711)
2024-07-26 00:42:24 -07:00
llvm.amdgcn.groupstaticsize.ll
[test] Change llc -march= to -mtriple=
2023-09-11 14:42:37 -07:00
llvm.amdgcn.icmp.w32.ll
[AMDGPU] Codegen support for constrained multi-dword sloads (#96163)
2024-07-23 13:59:15 +05:30
llvm.amdgcn.icmp.w64.ll
[AMDGPU] Codegen support for constrained multi-dword sloads (#96163)
2024-07-23 13:59:15 +05:30
llvm.amdgcn.iglp.opt.exp.large.mir
[AMDGPU] Introduce iglp_opt(2): Generalized exp/mfma interleaving for select kernels (#81342)
2024-02-23 17:13:20 -08:00
llvm.amdgcn.iglp.opt.exp.small.mir
[AMDGPU] Introduce iglp_opt(2): Generalized exp/mfma interleaving for select kernels (#81342)
2024-02-23 17:13:20 -08:00
llvm.amdgcn.iglp.opt.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
llvm.amdgcn.iglp.opt.single.2b.mir
[AMDGPU] Use correct VGPR threshold for flagging ExcessRP regions in unified register file case (#85860)
2024-03-25 13:11:58 -07:00
llvm.amdgcn.iglp.opt.single.2c.mir
[AMDGPU] Convert tests to opaque pointers (NFC)
2024-02-05 12:42:23 +01:00
llvm.amdgcn.image.a16.dim.ll
[AMDGPU] CodeGen for GFX12 S_WAIT_* instructions (#77438)
2024-01-18 10:47:45 +00:00
llvm.amdgcn.image.a16.encode.ll
[AMDGPU] CodeGen for GFX12 S_WAIT_* instructions (#77438)
2024-01-18 10:47:45 +00:00
llvm.amdgcn.image.atomic.dim.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.image.atomic.flt.ll
[AMDGPU] CodeGen for GFX12 S_WAIT_* instructions (#77438)
2024-01-18 10:47:45 +00:00
llvm.amdgcn.image.atomic.pk.add.ll
[AMDGPU] Regenerate tests for #77892 after #77438
2024-01-18 13:50:59 +00:00
llvm.amdgcn.image.d16.dim.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.image.dim.gfx90a.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.image.dim.ll
[AMDGPU] CodeGen for GFX12 S_WAIT_* instructions (#77438)
2024-01-18 10:47:45 +00:00
llvm.amdgcn.image.gather4.a16.dim.ll
[AMDGPU] CodeGen for GFX12 S_WAIT_* instructions (#77438)
2024-01-18 10:47:45 +00:00
llvm.amdgcn.image.gather4.d16.dim.ll
[AMDGPU] Replace '.' with '-' in generic target names (#81718)
2024-02-14 15:19:04 +01:00
llvm.amdgcn.image.gather4.dim.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.image.gather4.o.dim.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.image.getlod.dim.ll
[AMDGPU] CodeGen for GFX12 S_WAIT_* instructions (#77438)
2024-01-18 10:47:45 +00:00
llvm.amdgcn.image.load.2dmsaa.ll
[AMDGPU] Fix image intrinsic optimizer on loads from different resources (#69355)
2023-10-18 11:08:01 +01:00
llvm.amdgcn.image.load.a16.d16.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.image.load.a16.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.image.msaa.load.ll
[AMDGPU] Fix gfx12 waitcnt type for image_msaa_load (#90201)
2024-04-30 10:41:51 +01:00
llvm.amdgcn.image.msaa.load.x.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.image.nsa.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.image.sample.a16.dim.ll
[AMDGPU] CodeGen for GFX12 S_WAIT_* instructions (#77438)
2024-01-18 10:47:45 +00:00
llvm.amdgcn.image.sample.cd.a16.dim.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.image.sample.cd.dim.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.image.sample.cd.g16.encode.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.image.sample.cd.g16.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.image.sample.d16.dim.ll
[AMDGPU] CodeGen for GFX12 S_WAIT_* instructions (#77438)
2024-01-18 10:47:45 +00:00
llvm.amdgcn.image.sample.dim.gfx90a.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.image.sample.dim.ll
[AMDGPU] Replace '.' with '-' in generic target names (#81718)
2024-02-14 15:19:04 +01:00
llvm.amdgcn.image.sample.g16.a16.dim.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.image.sample.g16.encode.ll
[AMDGPU] CodeGen for GFX12 S_WAIT_* instructions (#77438)
2024-01-18 10:47:45 +00:00
llvm.amdgcn.image.sample.g16.ll
[AMDGPU] CodeGen for GFX12 S_WAIT_* instructions (#77438)
2024-01-18 10:47:45 +00:00
llvm.amdgcn.image.sample.noret.ll
[AMDGPU] Add no return image_sample intrinsics and instructions (#97542)
2024-07-20 17:26:58 +09:00
llvm.amdgcn.image.sample.o.dim.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.image.store.a16.d16.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.image.store.a16.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.implicit.ptr.buffer.hsa.ll
…
llvm.amdgcn.implicit.ptr.buffer.ll
[AMDGPU] Don't fix the scavenge slot at offset 0 (#79136)
2024-02-09 09:20:25 +01:00
llvm.amdgcn.implicitarg.ptr.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
llvm.amdgcn.init.exec.ll
[AMDGPU] Remove -wavefrontsize32 and -wavefrontsize64 from GFX10+ tests (NFC) (#100711)
2024-07-26 00:42:24 -07:00
llvm.amdgcn.init.exec.wave32.ll
[AMDGPU] Remove -wavefrontsize32 and -wavefrontsize64 from GFX10+ tests (NFC) (#100711)
2024-07-26 00:42:24 -07:00
llvm.amdgcn.interp.f16.ll
…
llvm.amdgcn.interp.inreg.ll
[AMDGPU] Expose RTZ version of f16 interpolation for gfx11+ (#86614)
2024-04-01 09:48:37 +08:00
llvm.amdgcn.interp.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.intersect_ray.ll
[AMDGPU] Codegen support for constrained multi-dword sloads (#96163)
2024-07-23 13:59:15 +05:30
llvm.amdgcn.inverse.ballot.i32.ll
[AMDGPU] Do not select llvm.amdgcn.inverse.ballot with wrong wave size (#99470)
2024-07-18 13:53:22 +01:00
llvm.amdgcn.inverse.ballot.i64.ll
[AMDGPU] Do not select llvm.amdgcn.inverse.ballot with wrong wave size (#99470)
2024-07-18 13:53:22 +01:00
llvm.amdgcn.is.private.ll
[AMDGPU] Generate checks for llvm.amdgcn.is.private/shared (#103859)
2024-08-14 13:23:33 +01:00
llvm.amdgcn.is.shared.ll
[AMDGPU] Generate checks for llvm.amdgcn.is.private/shared (#103859)
2024-08-14 13:23:33 +01:00
llvm.amdgcn.kernarg.segment.ptr.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
llvm.amdgcn.kill.ll
[AMDGPU] Remove -wavefrontsize32 and -wavefrontsize64 from GFX10+ tests (NFC) (#100711)
2024-07-26 00:42:24 -07:00
llvm.amdgcn.lds.direct.load.ll
[AMDGPU] CodeGen for GFX12 S_WAIT_* instructions (#77438)
2024-01-18 10:47:45 +00:00
llvm.amdgcn.lds.kernel.id.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
llvm.amdgcn.lds.param.load.ll
[AMDGPU] CodeGen for GFX12 S_WAIT_* instructions (#77438)
2024-01-18 10:47:45 +00:00
llvm.amdgcn.lerp.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.log.clamp.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.log.ll
…
llvm.amdgcn.make.buffer.rsrc.ll
Reland "[NewPM][CodeGen] Port selection dag isel to new pass manager" (#94149)
2024-06-04 08:10:58 +08:00
llvm.amdgcn.mbcnt.ll
[AMDGPU] Simplify, fix and improve known bits for mbcnt (#104768)
2024-08-19 18:22:06 +01:00
llvm.amdgcn.mfma.bf16.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.mfma.gfx90a.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.mfma.gfx940.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.mfma.i8.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.mfma.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.mov.dpp8.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.mov.dpp.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.mqsad.pk.u16.u8.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.mqsad.u32.u8.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.msad.u8.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.mul.i24.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.mul.u24.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.mulhi.i24.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.mulhi.u24.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.perm.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.permlane16.var.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
llvm.amdgcn.permlane64.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
llvm.amdgcn.permlane64.ptr.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
llvm.amdgcn.permlane.ll
[AMDGPU][SILoadStoreOptimizer] Merge constrained sloads (#96162)
2024-07-23 13:50:42 +05:30
llvm.amdgcn.permlane.ptr.ll
[AMDGPU] Extend permlane16, permlanex16 and permlane64 intrinsic lowering for generic types (#92725)
2024-06-26 09:24:09 +05:30
llvm.amdgcn.pops.exiting.wave.id.ll
[AMDGPU] Handle llvm.amdgcn.pops.exiting.wave.id with calls (#98614)
2024-07-12 21:00:26 +01:00
llvm.amdgcn.ps.live.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.ptr.buffer.atomic.fadd_rtn_errors.ll
AMDGPU: Remove .v2bf16 buffer atomic fadd intrinsics (#95783)
2024-06-17 21:44:52 +02:00
llvm.amdgcn.qsad.pk.u16.u8.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.quadmask.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.queue.ptr.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
llvm.amdgcn.raw.atomic.buffer.load.ll
[AMDGPU] Fix build failure in raw.atomic.buffer.load tests (#99912)
2024-07-22 14:28:20 -04:00
llvm.amdgcn.raw.buffer.atomic.fadd.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
llvm.amdgcn.raw.buffer.atomic.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.raw.buffer.load.format.d16.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.raw.buffer.load.format.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.raw.buffer.load.lds.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.raw.buffer.load.ll
[AMDGPU] CodeGen for GFX12 S_WAIT_* instructions (#77438)
2024-01-18 10:47:45 +00:00
llvm.amdgcn.raw.buffer.load.tfe.ll
[AMDGPU] Legalize and select raw/struct_buffer_load with tfe (#93310)
2024-05-27 14:09:17 +02:00
llvm.amdgcn.raw.buffer.store.format.d16.ll
…
llvm.amdgcn.raw.buffer.store.format.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.raw.buffer.store.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.raw.ptr.atomic.buffer.load.ll
[AMDGPU] Fix build failure in raw.atomic.buffer.load tests (#99912)
2024-07-22 14:28:20 -04:00
llvm.amdgcn.raw.ptr.buffer.atomic.fadd_nortn.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
llvm.amdgcn.raw.ptr.buffer.atomic.fadd_rtn.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
llvm.amdgcn.raw.ptr.buffer.atomic.fadd.v2bf16.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
llvm.amdgcn.raw.ptr.buffer.atomic.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.raw.ptr.buffer.load.bf16.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
llvm.amdgcn.raw.ptr.buffer.load.bf16.xfail.ll
AMDGPU: Do not assert on v6x16 buffer load intrinsics (#94966)
2024-06-10 16:38:06 +02:00
llvm.amdgcn.raw.ptr.buffer.load.format.d16.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.raw.ptr.buffer.load.format.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.raw.ptr.buffer.load.lds.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.raw.ptr.buffer.load.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
llvm.amdgcn.raw.ptr.buffer.store.bf16.ll
AMDGPU: Fix buffer intrinsic store of bfloat (#95377)
2024-06-13 13:13:04 +02:00
llvm.amdgcn.raw.ptr.buffer.store.bf16.xfail.ll
AMDGPU: Do not assert on v6x16 buffer load intrinsics (#94966)
2024-06-10 16:38:06 +02:00
llvm.amdgcn.raw.ptr.buffer.store.format.d16.ll
…
llvm.amdgcn.raw.ptr.buffer.store.format.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.raw.ptr.buffer.store.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
llvm.amdgcn.raw.ptr.tbuffer.load.d16.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.raw.ptr.tbuffer.load.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.raw.ptr.tbuffer.store.d16.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
llvm.amdgcn.raw.ptr.tbuffer.store.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.raw.tbuffer.load.d16.ll
[AMDGPU] CodeGen for GFX12 S_WAIT_* instructions (#77438)
2024-01-18 10:47:45 +00:00
llvm.amdgcn.raw.tbuffer.load.ll
[AMDGPU] CodeGen for GFX12 S_WAIT_* instructions (#77438)
2024-01-18 10:47:45 +00:00
llvm.amdgcn.raw.tbuffer.store.d16.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
llvm.amdgcn.raw.tbuffer.store.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.rcp.f16.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.rcp.legacy.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.rcp.ll
[AMDGPU] Convert tests to opaque pointers (NFC)
2024-02-05 12:42:23 +01:00
llvm.amdgcn.readfirstlane.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
llvm.amdgcn.readfirstlane.ptr.ll
[AMDGPU] Extend readlane, writelane and readfirstlane intrinsic lowering for generic types (#89217)
2024-06-25 14:35:19 +05:30
llvm.amdgcn.readlane.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
llvm.amdgcn.readlane.ptr.ll
[AMDGPU] Extend readlane, writelane and readfirstlane intrinsic lowering for generic types (#89217)
2024-06-25 14:35:19 +05:30
llvm.amdgcn.reduce.umax.ll
[AMDGPU] Codegen support for constrained multi-dword sloads (#96163)
2024-07-23 13:59:15 +05:30
llvm.amdgcn.reduce.umin.ll
[AMDGPU] Codegen support for constrained multi-dword sloads (#96163)
2024-07-23 13:59:15 +05:30
llvm.amdgcn.rsq.clamp.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.rsq.f16.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.rsq.legacy.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.rsq.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.s.barrier.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
llvm.amdgcn.s.barrier.wait.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
llvm.amdgcn.s.buffer.load.ll
[AMDGPU][SILoadStoreOptimizer] Include constrained buffer load variants (#101619)
2024-08-06 11:27:04 +05:30
llvm.amdgcn.s.dcache.inv.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.s.dcache.inv.vol.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.s.dcache.wb.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.s.dcache.wb.vol.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.s.decperflevel.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.s.get.waveid.in.workgroup.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.s.getpc.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.s.getreg.ll
[test] Change llc -march= to -mtriple=
2023-09-11 14:42:37 -07:00
llvm.amdgcn.s.incperflevel.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.s.memrealtime.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.s.memtime.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.s.nop.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.s.sethalt.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.s.setprio.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.s.setreg.ll
[AMDGPU] Reapply 'Sign extend simm16 in setreg intrinsic' (#78492)
2024-01-17 17:23:46 -08:00
llvm.amdgcn.s.sleep.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.s.sleep.var.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
llvm.amdgcn.s.ttracedata.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.s.wait.event.ll
[AMDGPU] Fix GFX12 encoding of s_wait_event export_ready (#89622)
2024-04-23 14:38:45 +01:00
llvm.amdgcn.s.wait.gfx12.ll
[AMDGPU,test] Change llc -march= to -mtriple=
2024-03-07 19:09:18 -08:00
llvm.amdgcn.s.waitcnt.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.sad.hi.u8.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.sad.u8.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.sad.u16.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.sbfe.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.sched.barrier.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.sched.group.barrier.gfx11.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
llvm.amdgcn.sched.group.barrier.gfx12.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
llvm.amdgcn.sched.group.barrier.ll
[AMDGPU][SILoadStoreOptimizer] Merge constrained sloads (#96162)
2024-07-23 13:50:42 +05:30
llvm.amdgcn.sdot2.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.sdot4.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.sdot8.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.sendmsg.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.sendmsg.rtn.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
llvm.amdgcn.set.inactive.chain.arg.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.set.inactive.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
llvm.amdgcn.sffbh.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.sin.f16.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.sin.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.softwqm.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.sqrt.f16.ll
…
llvm.amdgcn.sqrt.ll
…
llvm.amdgcn.struct.atomic.buffer.load.ll
[AMDGPU] Add intrinsics for atomic struct buffer loads (#100140)
2024-07-24 11:05:28 +02:00
llvm.amdgcn.struct.buffer.atomic.fadd.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
llvm.amdgcn.struct.buffer.atomic.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.struct.buffer.load.format.d16.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.struct.buffer.load.format.ll
[AMDGPU] Extend zero initialization of return values for TFE (#85759)
2024-03-25 09:01:46 +00:00
llvm.amdgcn.struct.buffer.load.format.v3f16.ll
[AMDGPU] CodeGen for GFX12 S_WAIT_* instructions (#77438)
2024-01-18 10:47:45 +00:00
llvm.amdgcn.struct.buffer.load.lds.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.struct.buffer.load.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.struct.buffer.load.tfe.ll
[AMDGPU] Legalize and select raw/struct_buffer_load with tfe (#93310)
2024-05-27 14:09:17 +02:00
llvm.amdgcn.struct.buffer.store.format.d16.ll
…
llvm.amdgcn.struct.buffer.store.format.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.struct.buffer.store.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.struct.ptr.atomic.buffer.load.ll
[AMDGPU] Add intrinsics for atomic struct buffer loads (#100140)
2024-07-24 11:05:28 +02:00
llvm.amdgcn.struct.ptr.buffer.atomic.fadd_nortn.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
llvm.amdgcn.struct.ptr.buffer.atomic.fadd_rtn.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
llvm.amdgcn.struct.ptr.buffer.atomic.fadd.v2bf16.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
llvm.amdgcn.struct.ptr.buffer.atomic.fmax.f32.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
llvm.amdgcn.struct.ptr.buffer.atomic.fmax.f64.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
llvm.amdgcn.struct.ptr.buffer.atomic.fmin.f32.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
llvm.amdgcn.struct.ptr.buffer.atomic.fmin.f64.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
llvm.amdgcn.struct.ptr.buffer.atomic.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.struct.ptr.buffer.load.format.d16.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.struct.ptr.buffer.load.format.ll
[AMDGPU] Extend zero initialization of return values for TFE (#85759)
2024-03-25 09:01:46 +00:00
llvm.amdgcn.struct.ptr.buffer.load.format.v3f16.ll
…
llvm.amdgcn.struct.ptr.buffer.load.lds.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.struct.ptr.buffer.load.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.struct.ptr.buffer.store.format.d16.ll
…
llvm.amdgcn.struct.ptr.buffer.store.format.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.struct.ptr.buffer.store.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.struct.ptr.tbuffer.load.d16.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.struct.ptr.tbuffer.load.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.struct.ptr.tbuffer.store.d16.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
llvm.amdgcn.struct.ptr.tbuffer.store.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.struct.tbuffer.load.d16.ll
[AMDGPU] CodeGen for GFX12 S_WAIT_* instructions (#77438)
2024-01-18 10:47:45 +00:00
llvm.amdgcn.struct.tbuffer.load.ll
[AMDGPU] CodeGen for GFX12 S_WAIT_* instructions (#77438)
2024-01-18 10:47:45 +00:00
llvm.amdgcn.struct.tbuffer.store.d16.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
llvm.amdgcn.struct.tbuffer.store.ll
[RFC][AMDGPU] Remove old llvm.amdgcn.buffer.* and tbuffer intrinsics (#93801)
2024-06-10 12:14:51 +01:00
llvm.amdgcn.sudot4.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.sudot8.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.tbuffer.load.dwordx3.ll
[RFC][AMDGPU] Remove old llvm.amdgcn.buffer.* and tbuffer intrinsics (#93801)
2024-06-10 12:14:51 +01:00
llvm.amdgcn.tbuffer.store.dwordx3.ll
[RFC][AMDGPU] Remove old llvm.amdgcn.buffer.* and tbuffer intrinsics (#93801)
2024-06-10 12:14:51 +01:00
llvm.amdgcn.trig.preop.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.ubfe.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
llvm.amdgcn.udot2.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.udot4.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.udot8.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.unreachable.ll
[test] Change llc -march= to -mtriple=
2023-09-11 14:42:37 -07:00
llvm.amdgcn.update.dpp.ll
[AMDGPU] Simplify printing row/bank_mask modifiers. (#100575)
2024-07-25 16:44:44 +01:00
llvm.amdgcn.wave.barrier.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.wave.id.ll
[AMDGPU] New llvm.amdgcn.wave.id intrinsic (#79325)
2024-01-25 07:48:06 +00:00
llvm.amdgcn.wave.reduce.umax.mir
[NewPM][CodeGen] Port finalize-isel to new pass manager (#94214)
2024-06-04 09:23:52 +08:00
llvm.amdgcn.wave.reduce.umin.mir
[NewPM][CodeGen] Port finalize-isel to new pass manager (#94214)
2024-06-04 09:23:52 +08:00
llvm.amdgcn.wavefrontsize.ll
[AMDGPU] Remove wavefrontsize feature from GFX10+ (#98400)
2024-07-16 01:02:25 -07:00
llvm.amdgcn.wmma_32.ll
[AMDGPU] Remove -wavefrontsize32 and -wavefrontsize64 from GFX10+ tests (NFC) (#100711)
2024-07-26 00:42:24 -07:00
llvm.amdgcn.wmma_64.ll
[AMDGPU] Remove -wavefrontsize32 and -wavefrontsize64 from GFX10+ tests (NFC) (#100711)
2024-07-26 00:42:24 -07:00
llvm.amdgcn.workgroup.id.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
llvm.amdgcn.workitem.id.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
llvm.amdgcn.wqm.demote.ll
[AMDGPU] Remove -wavefrontsize32 and -wavefrontsize64 from GFX10+ tests (NFC) (#100711)
2024-07-26 00:42:24 -07:00
llvm.amdgcn.wqm.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.wqm.vote.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.amdgcn.writelane.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
llvm.amdgcn.writelane.ptr.ll
[AMDGPU] Extend readlane, writelane and readfirstlane intrinsic lowering for generic types (#89217)
2024-06-25 14:35:19 +05:30
llvm.ceil.f16.ll
[AMDGPU][True16][CodeGen] Support AND/OR/XOR and LDEXP True16 format (#102620)
2024-08-13 12:23:39 -04:00
llvm.cos.f16.ll
[AMDGPU] Codegen support for constrained multi-dword sloads (#96163)
2024-07-23 13:59:15 +05:30
llvm.cos.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.dbg.value.ll
[AMDGPU] Rename COV module flag to amdhsa_code_object_version (#79905)
2024-03-06 09:51:48 -05:00
llvm.exp2.ll
[AMDGPU] Codegen support for constrained multi-dword sloads (#96163)
2024-07-23 13:59:15 +05:30
llvm.exp10.ll
[AMDGPU][SILoadStoreOptimizer] Merge constrained sloads (#96162)
2024-07-23 13:50:42 +05:30
llvm.exp.ll
[AMDGPU][SILoadStoreOptimizer] Merge constrained sloads (#96162)
2024-07-23 13:50:42 +05:30
llvm.floor.f16.ll
[AMDGPU][True16][CodeGen] Support AND/OR/XOR and LDEXP True16 format (#102620)
2024-08-13 12:23:39 -04:00
llvm.fma.f16.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.fmuladd.f16.ll
[AMDGPU] Codegen support for constrained multi-dword sloads (#96163)
2024-07-23 13:59:15 +05:30
llvm.fptrunc.round.ll
AMDGPU: Add tonearest and towardzero roundings for intrinsic llvm.fptrunc.round (#104486)
2024-08-17 11:22:47 -07:00
llvm.frexp.ll
[AMDGPU] Adding multiple use analysis to SIPeepholeSDWA (#94800)
2024-06-14 19:14:19 +02:00
llvm.get.fpmode.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
llvm.get.rounding.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.is.fpclass.bf16.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
llvm.is.fpclass.f16.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
llvm.is.fpclass.ll
[AMDGPU] Codegen support for constrained multi-dword sloads (#96163)
2024-07-23 13:59:15 +05:30
llvm.ldexp.ll
[AMDGPU][True16][CodeGen] Support AND/OR/XOR and LDEXP True16 format (#102620)
2024-08-13 12:23:39 -04:00
llvm.log2.ll
[AMDGPU] Codegen support for constrained multi-dword sloads (#96163)
2024-07-23 13:59:15 +05:30
llvm.log10.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
llvm.log.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
llvm.maximum.f16.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
llvm.maximum.f32.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
llvm.maximum.f64.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
llvm.maxnum.f16.ll
[AMDGPU] Codegen support for constrained multi-dword sloads (#96163)
2024-07-23 13:59:15 +05:30
llvm.memcpy.ll
[AMDGPU] Stop combining arbitrary offsets into PAL relocs (#80034)
2024-01-31 10:28:23 +00:00
llvm.minimum.f16.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
llvm.minimum.f32.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
llvm.minimum.f64.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
llvm.minnum.f16.ll
[AMDGPU] Codegen support for constrained multi-dword sloads (#96163)
2024-07-23 13:59:15 +05:30
llvm.mulo.ll
[AMDGPU] Codegen support for constrained multi-dword sloads (#96163)
2024-07-23 13:59:15 +05:30
llvm.pow-gfx9.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.pow.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.powi.ll
…
llvm.prefetch.ll
[AMDGPU] Fix negative immediate offset for unbuffered smem loads (#89165)
2024-06-24 14:18:23 -07:00
llvm.r600.cube.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.r600.dot4.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.r600.group.barrier.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.r600.read.local.size.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
llvm.r600.recipsqrt.clamped.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.r600.recipsqrt.ieee.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.r600.tex.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.rint.f16.ll
[AMDGPU] Codegen support for constrained multi-dword sloads (#96163)
2024-07-23 13:59:15 +05:30
llvm.rint.f64.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.rint.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.round.f64.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
llvm.round.ll
[AMDGPU] Codegen support for constrained multi-dword sloads (#96163)
2024-07-23 13:59:15 +05:30
llvm.set.rounding.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
llvm.sin.f16.ll
[AMDGPU] Codegen support for constrained multi-dword sloads (#96163)
2024-07-23 13:59:15 +05:30
llvm.sin.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
llvm.sqrt.f16.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
llvm.trunc.f16.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
lo16-hi16-illegal-copy.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
lo16-hi16-physreg-copy.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
lo16-lo16-physreg-copy-agpr.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
lo16-lo16-physreg-copy-sgpr.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
load-constant-f32.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
load-constant-f64.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
load-constant-i1.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
load-constant-i8.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
load-constant-i16.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
load-constant-i32.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
load-constant-i64.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
load-global-f32.ll
[AMDGPU] Convert tests to opaque pointers (NFC)
2024-02-05 12:42:23 +01:00
load-global-f64.ll
[test] Change llc -march= to -mtriple=
2023-09-11 14:42:37 -07:00
load-global-i1.ll
[AMDGPU] Remove duplicate -mtriple options in tests (#91576)
2024-05-09 10:59:25 +01:00
load-global-i8.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
load-global-i16.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
load-global-i32.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
load-global-i64.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
load-hi16.ll
[AMDGPU] Accept arbitrary sized sources in CalculateByteProvider (#70240)
2024-02-07 11:34:50 -08:00
load-input-fold.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
load-lo16.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
load-local-f32-no-ds128.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
load-local-f32.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
load-local-f64.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
load-local-i1.ll
[AMDGPU] Remove duplicate -mtriple options in tests (#91576)
2024-05-09 10:59:25 +01:00
load-local-i8.ll
[AMDGPU] Remove duplicate -mtriple options in tests (#91576)
2024-05-09 10:59:25 +01:00
load-local-i16.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
load-local-i32.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
load-local-i64.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
load-local-redundant-copies.ll
[test] Remove immarg parameter attribute from calls (#97432)
2024-07-03 09:02:31 +01:00
load-local.96.ll
…
load-local.128.ll
…
load-range-metadata-assert.ll
…
load-range-metadata-sign-bits.ll
GlobalISel: ComputeNumSignBits from load range metadata
2024-07-01 15:26:50 +02:00
load-select-ptr.ll
…
load-store-opt-addc0.mir
[AMDGPU] Fix crash in the SILoadStoreOptimizer (#93862)
2024-05-30 14:27:33 -07:00
load-store-opt-dlc.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
load-store-opt-scc.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
load-weird-sizes.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
local-64.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
local-atomicrmw-fadd.ll
[Transforms] Refactor CreateControlFlowHub (#103013)
2024-08-22 12:18:01 +05:30
local-atomicrmw-fmax.ll
[AMDGPU] Implement GFX12 Memory Model (#98591)
2024-07-16 10:53:06 +02:00
local-atomicrmw-fmin.ll
[AMDGPU] Implement GFX12 Memory Model (#98591)
2024-07-16 10:53:06 +02:00
local-atomicrmw-fsub.ll
[AMDGPU] Implement GFX12 Memory Model (#98591)
2024-07-16 10:53:06 +02:00
local-atomics64.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
local-atomics.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
local-memory.amdgcn.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
local-memory.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
local-memory.r600.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
local-stack-alloc-add-references.gfx8.mir
AMDGPU: Support VALU add instructions in localstackalloc (#101692)
2024-08-08 23:22:48 +04:00
local-stack-alloc-add-references.gfx9.mir
AMDGPU: Support VALU add instructions in localstackalloc (#101692)
2024-08-08 23:22:48 +04:00
local-stack-alloc-add-references.gfx10.mir
AMDGPU: Support VALU add instructions in localstackalloc (#101692)
2024-08-08 23:22:48 +04:00
local-stack-alloc-block-sp-reference.ll
AMDGPU: Handle folding frame indexes into s_add_i32 (#101694)
2024-08-22 09:16:37 +04:00
local-stack-slot-offset.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
long-branch-reserve-register.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
loop_break.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
loop_exit_with_xor.ll
…
loop_header_nopred.mir
AMDGPU: Regenerate baseline mir tests
2024-02-27 10:44:53 +05:30
loop-address.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
loop-idiom.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
loop-live-out-copy-undef-subrange.ll
[AMDGPU] Enable GCNRewritePartialRegUses pass by default. (#72975)
2023-12-14 14:10:27 +01:00
loop-on-function-argument.ll
…
loop-prefetch-data.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
loop-prefetch.ll
[test] Change llc -march= to -mtriple=
2023-09-11 14:42:37 -07:00
lower-buffer-fat-pointers-calls.ll
[AMDGPU] Add IR-level pass to rewrite away address space 7 (#77952)
2024-03-06 09:49:58 -06:00
lower-buffer-fat-pointers-constants.ll
[IR] Mark shl constant expression as undesirable (#95940)
2024-06-19 09:10:28 +02:00
lower-buffer-fat-pointers-control-flow.ll
[AMDGPU] Add IR-level pass to rewrite away address space 7 (#77952)
2024-03-06 09:49:58 -06:00
lower-buffer-fat-pointers-memops.ll
[AMDGPU] Add intrinsic for raw atomic buffer loads (#97707)
2024-07-22 18:04:49 +02:00
lower-buffer-fat-pointers-p7-in-memory.ll
[AMDGPU] Add IR-level pass to rewrite away address space 7 (#77952)
2024-03-06 09:49:58 -06:00
lower-buffer-fat-pointers-pointer-ops.ll
[AMDGPULowerBufferFatPointers] Fix offset-only ptrtoint (#95543)
2024-06-14 16:38:57 +02:00
lower-buffer-fat-pointers-unoptimized-debug-data.ll
[RemoveDIs] Print IR with debug records by default (#91724)
2024-06-14 15:07:27 +01:00
lower-control-flow-live-intervals.mir
AMDGPU: Regenerate baseline mir tests
2024-02-27 10:44:53 +05:30
lower-control-flow-live-variables-update.mir
AMDGPU: Regenerate baseline mir tests
2024-02-27 10:44:53 +05:30
lower-control-flow-live-variables-update.xfail.mir
…
lower-control-flow-other-terminators.mir
AMDGPU: Regenerate baseline mir tests
2024-02-27 10:44:53 +05:30
lower-ctor-dtor-constexpr-alias.ll
Reapply [IR] Avoid creating icmp/fcmp constant expressions (#92885)
2024-05-31 08:55:59 +02:00
lower-ctor-dtor-declaration.ll
…
lower-ctor-dtor-existing.ll
…
lower-ctor-dtor.ll
Reapply [IR] Avoid creating icmp/fcmp constant expressions (#92885)
2024-05-31 08:55:59 +02:00
lower-empty-ctor-dtor.ll
…
lower-i1-copies-clear-kills.mir
[AMDGPU] SILowerI1Copies: clear kill flags on COPY (#65883)
2023-09-11 12:30:08 +09:00
lower-i1-copies-implicit-def-unstructured-loop.mir
…
lower-kernargs.ll
[AMDGPU] Strengthen preload intrinsics to noundef and nonnull (#92801)
2024-06-03 16:37:08 -05:00
lower-kernel-and-module-lds.ll
[opt] Infer DataLayout from triple if not specified
2023-10-26 12:07:37 -07:00
lower-kernel-lds-constexpr.ll
AMDGPU: Use poison instead of undef in module lds pass
2023-09-02 11:33:26 -04:00
lower-kernel-lds-super-align.ll
[opt] Infer DataLayout from triple if not specified
2023-10-26 12:07:37 -07:00
lower-kernel-lds.ll
[opt] Infer DataLayout from triple if not specified
2023-10-26 12:07:37 -07:00
lower-lds-struct-aa-memcpy.ll
AMDGPU/GlobalISel: Partially move constant selection to patterns (#100786)
2024-07-30 18:18:16 +04:00
lower-lds-struct-aa-merge.ll
[opt] Infer DataLayout from triple if not specified
2023-10-26 12:07:37 -07:00
lower-lds-struct-aa.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
lower-mem-intrinsics-threshold.ll
[Pass] Add pre-isel-intrinsic-lowering to pass registry (#90851)
2024-05-02 21:57:46 +08:00
lower-mem-intrinsics.ll
[LowerMemIntrinsics] Lower llvm.memmove to wide memory accesses (#100122)
2024-07-26 08:43:30 +02:00
lower-module-lds-all-indirect-accesses.ll
…
lower-module-lds-check-metadata.ll
…
lower-module-lds-constantexpr-phi.ll
…
lower-module-lds-constantexpr.ll
AMDGPU: Use poison instead of undef in module lds pass
2023-09-02 11:33:26 -04:00
lower-module-lds-inactive.ll
…
lower-module-lds-indirect-extern-uses-max-reachable-alignment.ll
[AMDGPU] Strengthen preload intrinsics to noundef and nonnull (#92801)
2024-06-03 16:37:08 -05:00
lower-module-lds-offsets.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
lower-module-lds-single-var-ambiguous.ll
…
lower-module-lds-single-var-unambiguous.ll
…
lower-module-lds-used-list.ll
[opt] Infer DataLayout from triple if not specified
2023-10-26 12:07:37 -07:00
lower-module-lds-via-hybrid.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
lower-module-lds-via-table.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
lower-module-lds-zero-size-arr.ll
[AMDGPU] Allow any linkage for dynlds (#84742)
2024-04-19 10:58:35 +02:00
lower-module-lds.ll
AMDGPU: Use poison instead of undef in module lds pass
2023-09-02 11:33:26 -04:00
lower-multiple-ctor-dtor.ll
Reapply [IR] Avoid creating icmp/fcmp constant expressions (#92885)
2024-05-31 08:55:59 +02:00
lower-range-metadata-intrinsic-call.ll
[AMDGPU] Remove repeated -mtriple options from RUN lines (#66486)
2023-09-15 11:29:24 +01:00
lower-term-opcodes.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
lower-work-group-id-intrinsics-hsa.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
lower-work-group-id-intrinsics-pal.ll
[SelectionDAG] Preserve volatile undef stores. (#99918)
2024-07-24 08:41:56 -04:00
lrint.ll
[AMDGPU] Implement llvm.lrint intrinsic lowering (#98931)
2024-07-24 23:34:31 +04:00
lround.ll
Scalarize the vector inputs to llvm.lround intrinsic by default. (#101054)
2024-08-21 12:13:56 -05:00
lshl64-to-32.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
lshl-add-u64.ll
[AMDGPU] Codegen support for constrained multi-dword sloads (#96163)
2024-07-23 13:59:15 +05:30
lshr.v2i16.ll
[AMDGPU] Codegen support for constrained multi-dword sloads (#96163)
2024-07-23 13:59:15 +05:30
lto-lower-module-lds.ll
(Reland) [AMDGPU] Run LowerLDS at the end of the fullLTO pipeline (#85626)
2024-03-21 11:44:47 +01:00
machine-cse-commute-target-flags.mir
…
machine-cse-ssa.mir
…
machine-scheduler-sink-trivial-remats-debug.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
machine-scheduler-sink-trivial-remats.mir
AMDGPU: Regenerate baseline mir tests
2024-02-27 10:44:53 +05:30
machine-sink-ignorable-exec-use.mir
AMDGPU: Regenerate baseline mir tests
2024-02-27 10:44:53 +05:30
machine-sink-lane-mask.mir
AMDGPU: Add test for temporal divergence introduced by machine-sink
2023-10-06 15:00:08 +02:00
machine-sink-loop-var-out-of-divergent-loop-swdev407790.ll
Revert "MachineSink: Fix sinking VGPR def out of a divergent loop"
2023-10-06 15:00:08 +02:00
machine-sink-loop-var-out-of-divergent-loop-swdev407790.mir
Revert "MachineSink: Fix sinking VGPR def out of a divergent loop"
2023-10-06 15:00:08 +02:00
machine-sink-temporal-divergence-swdev407790.ll
[AMDGPU] Adding multiple use analysis to SIPeepholeSDWA (#94800)
2024-06-14 19:14:19 +02:00
machine-sink-temporal-divergence-swdev407790.mir
AMDGPU: Fix temporal divergence introduced by machine-sink (#67456)
2023-10-06 15:00:08 +02:00
machinelicm-convergent.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
machinelicm-copy-like-instrs.mir
MachineLICM: Allow hoisting REG_SEQUENCE (#90638)
2024-05-01 16:52:04 +02:00
machinelicm-undef-use.mir
[MachineLoopInfo] Fix assertion failure on undef use operands (#100137)
2024-07-24 14:27:12 +01:00
macro-fusion-cluster-vcc-uses.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
mad24-get-global-id.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
mad_64_32.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
mad_int24.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
mad_u64_u32.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
mad_uint24.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
mad-combine.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
mad-mix-hi.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
mad-mix-lo.ll
[AMDGPU] Fix canonicalization of truncated values. (#83054)
2024-03-13 12:08:39 +00:00
mad-mix.ll
[AMDGPU] Introduce GFX9/10.1/10.3/11 Generic Targets (#76955)
2024-02-12 10:18:20 +01:00
mad.u16.ll
[AMDGPU] Codegen support for constrained multi-dword sloads (#96163)
2024-07-23 13:59:15 +05:30
madak-inline-constant.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
madak.ll
[AMDGPU][SILoadStoreOptimizer] Merge constrained sloads (#96162)
2024-07-23 13:50:42 +05:30
madmk.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
mai-hazards-gfx90a.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
mai-hazards-gfx940.mir
AMDGPU: Add some more mfma hazard recognizer tests (#84727)
2024-03-12 22:05:47 +05:30
mai-hazards.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
mai-inline.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
make-buffer-rsrc-lds-fails.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
match-perm-extract-vector-elt-bug.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
materialize-frame-index-sgpr.gfx10.ll
AMDGPU: Add testcase for materializing sgpr frame indexes (#101306)
2024-07-31 23:10:15 +04:00
materialize-frame-index-sgpr.ll
[AMDGPU] Optimize the register uses if offset inlinable (#101676)
2024-08-05 12:49:33 +05:30
max3.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
max-hard-clause-length.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
max-literals.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
max-sgprs.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
max.i16.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
max.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
mcp-aligned-vgprs.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
mcp-implicit-clobber.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
mcp-overlap-after-propagation.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
mcp-use-before-def.mir
…
mdt-preserving-crash.ll
[AMDGPU] - Add address space for strided buffers (#74471)
2023-12-15 15:49:25 +01:00
med3-knownbits.ll
AMDGPU: Materialize bitwise not of inline immediates (#95960)
2024-06-22 00:40:59 +02:00
med3-no-simplify.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
mem-builtins.ll
[SelectionDAG] Preserve volatile undef stores. (#99918)
2024-07-24 08:41:56 -04:00
memcpy-crash-issue63986.ll
[LowerMemIntrinsics] Avoid udiv/urem when type size is a power of 2 (#81238)
2024-02-12 10:01:22 +01:00
memcpy-fixed-align.ll
[AMDGPU][DAG] Enable ganging up of memcpy loads/stores for AMDGPU (#96185)
2024-07-03 08:32:35 +02:00
memcpy-inline-fails.ll
…
memcpy-libcall.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
memcpy-param-combinations.ll
[AMDGPU][DAG] Enable ganging up of memcpy loads/stores for AMDGPU (#96185)
2024-07-03 08:32:35 +02:00
memcpy-scalar-load.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
memcpy-scoped-aa.ll
…
memmove-param-combinations.ll
[AMDGPU][DAG] Enable ganging up of memcpy loads/stores for AMDGPU (#96185)
2024-07-03 08:32:35 +02:00
memmove-scalar-load.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
memory_clause.ll
[AMDGPU][SILoadStoreOptimizer] Merge constrained sloads (#96162)
2024-07-23 13:50:42 +05:30
memory_clause.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
memory-legalizer-atomic-insert-end.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
memory-legalizer-fence-mmra-global.ll
[AMDGPU] Implement GFX12 Memory Model (#98591)
2024-07-16 10:53:06 +02:00
memory-legalizer-fence-mmra-local.ll
[AMDGPU] Implement GFX12 Memory Model (#98591)
2024-07-16 10:53:06 +02:00
memory-legalizer-fence.ll
[AMDGPU] Implement GFX12 Memory Model (#98591)
2024-07-16 10:53:06 +02:00
memory-legalizer-flat-agent.ll
[AMDGPU] Implement GFX12 Memory Model (#98591)
2024-07-16 10:53:06 +02:00
memory-legalizer-flat-lastuse.ll
[AMDGPU] Update tests for last-use in global/scratch/flat/buffer load… (#94975)
2024-06-11 06:30:13 +02:00
memory-legalizer-flat-nontemporal.ll
[AMDGPU] Do not optimize away pre-existing waitcnt instructions at -O0 (#90716)
2024-05-01 11:29:11 +01:00
memory-legalizer-flat-singlethread.ll
[AMDGPU] Do not optimize away pre-existing waitcnt instructions at -O0 (#90716)
2024-05-01 11:29:11 +01:00
memory-legalizer-flat-system.ll
[AMDGPU] Implement GFX12 Memory Model (#98591)
2024-07-16 10:53:06 +02:00
memory-legalizer-flat-volatile.ll
[AMDGPU] Implement GFX12 Memory Model (#98591)
2024-07-16 10:53:06 +02:00
memory-legalizer-flat-wavefront.ll
[AMDGPU] Do not optimize away pre-existing waitcnt instructions at -O0 (#90716)
2024-05-01 11:29:11 +01:00
memory-legalizer-flat-workgroup.ll
[AMDGPU] Implement GFX12 Memory Model (#98591)
2024-07-16 10:53:06 +02:00
memory-legalizer-global-agent.ll
[AMDGPU] Implement GFX12 Memory Model (#98591)
2024-07-16 10:53:06 +02:00
memory-legalizer-global-lastuse.ll
[AMDGPU] Update tests for last-use in global/scratch/flat/buffer load… (#94975)
2024-06-11 06:30:13 +02:00
memory-legalizer-global-nontemporal.ll
[AMDGPU] Do not optimize away pre-existing waitcnt instructions at -O0 (#90716)
2024-05-01 11:29:11 +01:00
memory-legalizer-global-singlethread.ll
[AMDGPU] Do not optimize away pre-existing waitcnt instructions at -O0 (#90716)
2024-05-01 11:29:11 +01:00
memory-legalizer-global-system.ll
[AMDGPU] Implement GFX12 Memory Model (#98591)
2024-07-16 10:53:06 +02:00
memory-legalizer-global-volatile.ll
[AMDGPU] Implement GFX12 Memory Model (#98591)
2024-07-16 10:53:06 +02:00
memory-legalizer-global-wavefront.ll
[AMDGPU] Do not optimize away pre-existing waitcnt instructions at -O0 (#90716)
2024-05-01 11:29:11 +01:00
memory-legalizer-global-workgroup.ll
[AMDGPU] Implement GFX12 Memory Model (#98591)
2024-07-16 10:53:06 +02:00
memory-legalizer-invalid-addrspace.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
memory-legalizer-invalid-syncscope.ll
[AMDGPU] Drop verify from SIMemoryLegalizer tests (#78697)
2024-01-22 10:31:37 +01:00
memory-legalizer-local-agent.ll
[AMDGPU] Implement GFX12 Memory Model (#98591)
2024-07-16 10:53:06 +02:00
memory-legalizer-local-nontemporal.ll
[AMDGPU] Do not optimize away pre-existing waitcnt instructions at -O0 (#90716)
2024-05-01 11:29:11 +01:00
memory-legalizer-local-singlethread.ll
[AMDGPU] Do not optimize away pre-existing waitcnt instructions at -O0 (#90716)
2024-05-01 11:29:11 +01:00
memory-legalizer-local-system.ll
[AMDGPU] Implement GFX12 Memory Model (#98591)
2024-07-16 10:53:06 +02:00
memory-legalizer-local-volatile.ll
[AMDGPU] Implement GFX12 Memory Model (#98591)
2024-07-16 10:53:06 +02:00
memory-legalizer-local-wavefront.ll
[AMDGPU] Do not optimize away pre-existing waitcnt instructions at -O0 (#90716)
2024-05-01 11:29:11 +01:00
memory-legalizer-local-workgroup.ll
[AMDGPU] Implement GFX12 Memory Model (#98591)
2024-07-16 10:53:06 +02:00
memory-legalizer-local.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
memory-legalizer-multiple-mem-operands-atomics.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
memory-legalizer-multiple-mem-operands-nontemporal-1.mir
[AMDGPU] Convert tests to opaque pointers (NFC)
2024-02-05 12:42:23 +01:00
memory-legalizer-multiple-mem-operands-nontemporal-2.mir
[AMDGPU] Convert tests to opaque pointers (NFC)
2024-02-05 12:42:23 +01:00
memory-legalizer-private-lastuse.ll
[AMDGPU] Update tests for last-use in global/scratch/flat/buffer load… (#94975)
2024-06-11 06:30:13 +02:00
memory-legalizer-private-nontemporal.ll
[AMDGPU] Do not optimize away pre-existing waitcnt instructions at -O0 (#90716)
2024-05-01 11:29:11 +01:00
memory-legalizer-private-volatile.ll
[AMDGPU] Do not optimize away pre-existing waitcnt instructions at -O0 (#90716)
2024-05-01 11:29:11 +01:00
memory-legalizer-region.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
memory-legalizer-store-infinite-loop.ll
[AMDGPU] Drop verify from SIMemoryLegalizer tests (#78697)
2024-01-22 10:31:37 +01:00
merge-buffer-gfx12.mir
[AMDPU] Add support for idxen and bothen buffer load/store merging in SILoadStoreOptimizer (#86285)
2024-03-25 14:44:22 +00:00
merge-buffer.mir
[AMDPU] Add support for idxen and bothen buffer load/store merging in SILoadStoreOptimizer (#86285)
2024-03-25 14:44:22 +00:00
merge-flat-load-store.mir
[AMDGPU] Convert tests to opaque pointers (NFC)
2024-02-05 12:42:23 +01:00
merge-flat-with-global-load-store.mir
[AMDGPU] Convert tests to opaque pointers (NFC)
2024-02-05 12:42:23 +01:00
merge-global-load-store.mir
[AMDGPU] Convert tests to opaque pointers (NFC)
2024-02-05 12:42:23 +01:00
merge-image-load-gfx10.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
merge-image-load-gfx11.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
merge-image-load-gfx12.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
merge-image-load.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
merge-image-sample-gfx10.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
merge-image-sample-gfx11.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
merge-image-sample-gfx12.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
merge-image-sample.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
merge-load-store-agpr.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
merge-load-store-physreg.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
merge-load-store-vreg.mir
[AMDGPU] Convert tests to opaque pointers (NFC)
2024-02-05 12:42:23 +01:00
merge-load-store.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
merge-m0.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
merge-out-of-order-ldst.ll
…
merge-out-of-order-ldst.mir
…
merge-s-load.mir
[AMDGPU][SILoadStoreOptimizer] Merge constrained sloads (#96162)
2024-07-23 13:50:42 +05:30
merge-sbuffer-load.mir
[AMDGPU][SILoadStoreOptimizer] Include constrained buffer load variants (#101619)
2024-08-06 11:27:04 +05:30
merge-store-crash.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
merge-store-usedef.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
merge-stores.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
merge-tbuffer-gfx12.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
merge-tbuffer.mir
[AMDPU] Add support for idxen and bothen buffer load/store merging in SILoadStoreOptimizer (#86285)
2024-03-25 14:44:22 +00:00
mesa3d.ll
…
mesa_regression.ll
…
mfma-bf16-vgpr-cd-select.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
mfma-cd-select.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
mfma-loop.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
mfma-no-register-aliasing.ll
[AMDGPU] Update LiveInterval def index for early-clobber (#79285)
2024-03-11 14:54:11 +09:00
mfma-vgpr-cd-select-gfx940.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
mfma-vgpr-cd-select.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
min3.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
min-waves-per-eu-not-respected.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
min.ll
[AMDGPU] Codegen support for constrained multi-dword sloads (#96163)
2024-07-23 13:59:15 +05:30
minimummaximum.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
minmax.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
mir-print-dead-csr-fi.mir
…
misched-killflags.mir
…
missing-store.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
mixed_wave32_wave64.ll
…
mixed-wave32-wave64.ll
…
mmo-target-flags-folding.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
mmra.ll
AMDGPU/GlobalISel: Partially move constant selection to patterns (#100786)
2024-07-30 18:18:16 +04:00
mode-register-fpconstrain.ll
[AMDGPU] Fix mode register pass for constrained FP operations (#90085)
2024-05-03 19:47:15 +02:00
mode-register-fptrunc.mir
AMDGPU: Add tonearest and towardzero roundings for intrinsic llvm.fptrunc.round (#104486)
2024-08-17 11:22:47 -07:00
mode-register.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
module-lds-false-sharing.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
move-addr64-rsrc-dead-subreg-writes.ll
[AMDGPU] Remove repeated -mtriple options from RUN lines (#66486)
2023-09-15 11:29:24 +01:00
move-load-addr-to-valu.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
move-to-valu-addsubu64.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
move-to-valu-atomicrmw-system.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
move-to-valu-atomicrmw.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
move-to-valu-ctlz-cttz.ll
[AMDGPU][SILoadStoreOptimizer] Merge constrained sloads (#96162)
2024-07-23 13:50:42 +05:30
move-to-valu-lshlrev.mir
AMDGPU: Regenerate baseline mir tests
2024-02-27 10:44:53 +05:30
move-to-valu-pseudo-scalar-trans.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
move-to-valu-vimage-vsample.ll
AMDGPU: Regenerate baseline mir tests
2024-02-27 10:44:53 +05:30
move-to-valu-worklist.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
movreld-bug.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
movrels-bug.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
mubuf-legalize-operands-non-ptr-intrinsics.ll
[AMDGPU] Remove -wavefrontsize32 and -wavefrontsize64 from GFX10+ tests (NFC) (#100711)
2024-07-26 00:42:24 -07:00
mubuf-legalize-operands.ll
[AMDGPU] Remove -wavefrontsize32 and -wavefrontsize64 from GFX10+ tests (NFC) (#100711)
2024-07-26 00:42:24 -07:00
mubuf-legalize-operands.mir
[AMDGPU] Remove -wavefrontsize32 and -wavefrontsize64 from GFX10+ tests (NFC) (#100711)
2024-07-26 00:42:24 -07:00
mubuf-offset-private.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
mubuf-shader-vgpr-non-ptr-intrinsics.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
mubuf-shader-vgpr.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
mubuf.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
mul24-pass-ordering.ll
[AMDGPU] Pick available high VGPR for CSR SGPR spilling (#78669)
2024-01-24 07:08:43 +05:30
mul_int24.ll
[AMDGPU][SILoadStoreOptimizer] Merge constrained sloads (#96162)
2024-07-23 13:50:42 +05:30
mul_uint24-amdgcn.ll
[AMDGPU] Codegen support for constrained multi-dword sloads (#96163)
2024-07-23 13:59:15 +05:30
mul_uint24-r600.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
mul.i16.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
mul.ll
[AMDGPU] Codegen support for constrained multi-dword sloads (#96163)
2024-07-23 13:59:15 +05:30
multi-divergent-exit-region.ll
[AMDGPU] Remove -wavefrontsize32 and -wavefrontsize64 from GFX10+ tests (NFC) (#100711)
2024-07-26 00:42:24 -07:00
multi-dword-vgpr-spill.ll
…
multilevel-break.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
nand.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
need-fp-from-vgpr-spills.ll
[AMDGPU] Use glue for convergence tokens at call-like operations (#86766)
2024-04-01 10:51:13 +05:30
neighboring-mfma-padding.mir
[AMDGPU] Extend MFMA padding option to gfx90a+ (#86768)
2024-03-31 10:46:05 -07:00
nested-calls.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
nested-loop-conditions.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
no-bundle-asm.ll
…
no-corresponding-integer-type.ll
[SelectionDAG] Use EVT::getIntegerVT in getBitcastedAnyExtOrTrunc (#96658)
2024-07-01 15:10:57 -04:00
no-dup-inst-prefetch.ll
[AMDGPU] CodeGen for GFX12 S_WAIT_* instructions (#77438)
2024-01-18 10:47:45 +00:00
no-hsa-graphics-shaders.ll
[AMDGPU] Rename COV module flag to amdhsa_code_object_version (#79905)
2024-03-06 09:51:48 -05:00
no-initializer-constant-addrspace.ll
…
no-remat-indirect-mov.mir
AMDGPU: Regenerate baseline mir tests
2024-02-27 10:44:53 +05:30
no-shrink-extloads.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
no-source-locations-in-prologue.ll
[AMDGPU] Use glue for convergence tokens at call-like operations (#86766)
2024-04-01 10:51:13 +05:30
noclobber-barrier.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
non-entry-alloca.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
noop-shader-O0.ll
…
nop-data.ll
[AMDGPU] Rename COV module flag to amdhsa_code_object_version (#79905)
2024-03-06 09:51:48 -05:00
nor.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
not-scalarize-volatile-load.ll
…
nsa-reassign.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
nsa-reassign.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
nsa-vmem-hazard.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
nullptr-long-address-spaces.ll
[AMDGPU] Remove duplicate -mtriple options in tests (#91576)
2024-05-09 10:59:25 +01:00
nullptr.ll
[AMDGPU] Remove duplicate -mtriple options in tests (#91576)
2024-05-09 10:59:25 +01:00
occupancy-levels.ll
[AMDGPU] Set total VGPRs to 1536 for gfx12 (#96272)
2024-06-24 13:26:03 +02:00
offset-split-flat.ll
AMDGPU/GlobalISel: Partially move constant selection to patterns (#100786)
2024-07-30 18:18:16 +04:00
offset-split-global.ll
AMDGPU/GlobalISel: Partially move constant selection to patterns (#100786)
2024-07-30 18:18:16 +04:00
omod-nsz-flag.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
omod.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
opencl-image-metadata.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
opencl-printf-and-hostcall.ll
…
opencl-printf-pipeline.ll
…
opencl-printf-unsupported.ll
[AMDGPU] Convert tests to opaque pointers (NFC)
2024-02-05 12:42:23 +01:00
opencl-printf.ll
[ConstantFold] Remove notional over-indexing fold (#93697)
2024-05-30 08:36:44 +02:00
operand-folding.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
operand-spacing.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
opt_exec_copy_fold.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
opt-exec-masking-pre-ra-update-liveness-wave32.mir
AMDGPU: Regenerate baseline mir tests
2024-02-27 10:44:53 +05:30
opt-exec-masking-pre-ra-update-liveness.mir
AMDGPU: Regenerate baseline mir tests
2024-02-27 10:44:53 +05:30
opt-sgpr-to-vgpr-copy.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
opt-vgpr-live-range-verifier-error.mir
…
optimize-compare.ll
[AMDGPU] Codegen support for constrained multi-dword sloads (#96163)
2024-07-23 13:59:15 +05:30
optimize-compare.mir
[MIRPrinter] Don't print line break when there is no instructions (NFC) (#80147)
2024-02-01 22:10:52 +08:00
optimize-exec-copies-extra-insts-after-copy.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
optimize-exec-mask-pre-ra-alloc-failure.mir
…
optimize-exec-mask-pre-ra-def-after-use.mir
[MIRPrinter] Don't print line break when there is no instructions (NFC) (#80147)
2024-02-01 22:10:52 +08:00
optimize-exec-mask-pre-ra-loop-phi.mir
AMDGPU: Regenerate baseline mir tests
2024-02-27 10:44:53 +05:30
optimize-exec-mask-pre-ra-non-empty-but-used-interval.mir
[AMDGPU] Fix implicit $vcc operands after parsing MIR (#87781)
2024-04-09 09:10:45 +01:00
optimize-exec-masking-pre-ra.mir
AMDGPU: Regenerate baseline mir tests
2024-02-27 10:44:53 +05:30
optimize-exec-masking-strip-terminator-bits.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
optimize-if-exec-masking.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
optimize-negated-cond-exec-masking-wave32.mir
[AMDGPU] Fix implicit $vcc operands after parsing MIR (#87781)
2024-04-09 09:10:45 +01:00
optimize-negated-cond-exec-masking.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
optimize-negated-cond.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
or3.ll
…
or.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
overlapping-tuple-copy-implicit-op-failure.ll
…
pack.v2f16.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
pack.v2i16.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
packed-fp32.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
packed-op-sel.ll
[AMDGPU] Codegen support for constrained multi-dword sloads (#96163)
2024-07-23 13:59:15 +05:30
packetizer.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
pal-metadata-3.0-callable.ll
Reapply "[AMDGPU] Add pal metadata 3.0 support to callable pal funcs (#67104)"
2024-03-14 10:56:43 +09:00
pal-metadata-3.0.ll
[AMDGPU] Always emit lds_size in PAL ELF Metadata 3.0 (#87222)
2024-05-03 17:01:03 +09:00
pal-simple-indirect-call.ll
AMDGPU: Port AMDGPUAttributor to new pass manager (#71349)
2023-11-07 15:40:40 +09:00
pal-userdata-regs.ll
[Support][YamlTraits] Add quoting for keys in textual YAML representation (#88763)
2024-04-29 15:37:42 +02:00
parallelandifcollapse.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
parallelorifcollapse.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
partial-forwarding-hazards.mir
AMDGPU: Regenerate baseline mir tests
2024-02-27 10:44:53 +05:30
partial-regcopy-and-spill-missed-at-regalloc.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
partial-sgpr-to-vgpr-spills.ll
[AMDGPU] Rename COV module flag to amdhsa_code_object_version (#79905)
2024-03-06 09:51:48 -05:00
partial-shift-shrink.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
partially-dead-super-register-immediate.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
peephole-fold-imm.mir
[AMDGPU][True16] Remove the VGPR_LO/HI16 register classes. (#76500)
2023-12-29 12:13:24 +00:00
peephole-opt-regseq-removal.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
pei-amdgpu-cs-chain-preserve.mir
[AMDGPU] Don't fix the scavenge slot at offset 0 (#79136)
2024-02-09 09:20:25 +01:00
pei-amdgpu-cs-chain.mir
[AMDGPU] Don't fix the scavenge slot at offset 0 (#79136)
2024-02-09 09:20:25 +01:00
pei-build-av-spill.mir
AMDGPU: Regenerate baseline mir tests
2024-02-27 10:44:53 +05:30
pei-build-spill-partial-agpr.mir
AMDGPU: Regenerate baseline mir tests
2024-02-27 10:44:53 +05:30
pei-build-spill.mir
AMDGPU: Regenerate baseline mir tests
2024-02-27 10:44:53 +05:30
pei-reg-scavenger-position.mir
…
pei-scavenge-sgpr-carry-out.mir
[AMDGPU] Add pseudo instructions for SGPR spill to VGPR (#69923)
2023-10-27 17:24:10 +05:30
pei-scavenge-sgpr-gfx9.mir
[AMDGPU] Add pseudo instructions for SGPR spill to VGPR (#69923)
2023-10-27 17:24:10 +05:30
pei-scavenge-sgpr.mir
[AMDGPU] Add pseudo instructions for SGPR spill to VGPR (#69923)
2023-10-27 17:24:10 +05:30
pei-scavenge-vgpr-spill.mir
[AMDGPU] Add pseudo instructions for SGPR spill to VGPR (#69923)
2023-10-27 17:24:10 +05:30
perfhint.ll
NewPM/AMDGPU: Port AMDGPUPerfHintAnalysis to new pass manager (#102645)
2024-08-11 15:11:10 +04:00
permlane16_opsel.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
permlane16_var-op-sel.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
permlane-op-sel.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
permute_i8.ll
[TargetLowering][AMDGPU][ARM][RISCV][X86] Teach SimplifyDemandedBits to combine (srl (sra X, C1), ShAmt) -> sra(X, C1+ShAmt) (#101751)
2024-08-14 08:44:57 -07:00
permute.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
phi-elimination-assertion.mir
[CodeGen][NewPM] Port phi-node-elimination to new pass manager (#98867)
2024-07-17 11:26:56 +08:00
phi-elimination-end-cf.mir
[CodeGen][NewPM] Port phi-node-elimination to new pass manager (#98867)
2024-07-17 11:26:56 +08:00
phi-vgpr-input-moveimm.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
phys-partial-liveness.mir
[CodeGen][NewPM] Port LiveIntervals to new pass manager (#98118)
2024-07-10 19:34:48 +08:00
pk_max_f16_literal.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
post-ra-sched-kill-bundle-use-inst.mir
…
post-ra-sched-reset.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
post-ra-soft-clause-dbg-info.ll
[AMDGPU] Codegen support for constrained multi-dword sloads (#96163)
2024-07-23 13:59:15 +05:30
postra-bundle-memops.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
postra-machine-sink.mir
[CodeGen] Simplify updateLiveIn in MachineSink (#79831)
2024-02-15 10:39:05 +00:00
postra-norename.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
power-sched-no-cycle.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
power-sched-no-instr-sunit.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
pr51516.mir
Revert "[CodeGen] Really renumber slot indexes before register allocation (#67038)"
2023-10-09 12:31:32 +01:00
predicate-dp4.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
predicates.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
preload-kernarg-header.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
preload-kernargs-inreg-hints.ll
AMDGPU: Infer no-agpr usage in AMDGPUAttributor (#85948)
2024-03-21 14:24:06 +05:30
preload-kernargs-IR-lowering.ll
[AMDGPU] Strengthen preload intrinsics to noundef and nonnull (#92801)
2024-06-03 16:37:08 -05:00
preload-kernargs.ll
[AMDGPU][NFC] Fix preload-kernarg.ll test after attributor move (#98840)
2024-08-18 17:04:27 -07:00
preserve-hi16.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
preserve-only-inactive-lane.mir
[AMDGPU] Add pseudo instructions for SGPR spill to VGPR (#69923)
2023-10-27 17:24:10 +05:30
preserve-user-waitcnt.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
preserve-wwm-copy-dst-reg.ll
Revert "[AMDGPU]Optimize SGPR spills (#93668)"
2024-06-24 12:36:36 +05:30
print-pipeline-passes.ll
[AMDGPU] Enable AMDGPUAttributorPass in full LTO (#102673)
2024-08-12 13:39:23 -04:00
printf_builtin.ll
[AMDGPU] Respect nobuiltin when converting printf
2023-08-22 12:48:16 -05:00
printf_nobuiltin.ll
[AMDGPU] Respect nobuiltin when converting printf
2023-08-22 12:48:16 -05:00
printf-defined.ll
…
printf-existing-format-strings.ll
…
private-access-no-objects.ll
…
private-memory-atomics.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
private-memory-r600.ll
[AMDGPU] Swap range metadata to attribute for workitem id. (#94871)
2024-06-09 10:29:50 -04:00
prologue-epilogue-markers.ll
…
promote-alloca-addrspacecast.ll
AMDGPU: Stop promoting allocas with addrspacecast users (#104051)
2024-08-14 21:53:38 +04:00
promote-alloca-array-aggregate.ll
[AMDGPU] Convert tests to opaque pointers (NFC)
2024-02-05 12:42:23 +01:00
promote-alloca-array-allocation.ll
…
promote-alloca-bitcast-function.ll
…
promote-alloca-budget-exhausted.ll
[AMDGPU][PromoteAlloca] Don't stop when an alloca is too big to promote (#93466)
2024-05-28 08:05:50 +02:00
promote-alloca-calling-conv.ll
[AMDGPU] Rename COV module flag to amdhsa_code_object_version (#79905)
2024-03-06 09:51:48 -05:00
promote-alloca-globals.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
promote-alloca-invariant-markers.ll
[AMDGPU] Remove repeated -mtriple options from RUN lines (#66486)
2023-09-15 11:29:24 +01:00
promote-alloca-lifetime.ll
…
promote-alloca-loadstores.ll
[AMDGPU] PromoteAlloca: Handle load/store subvectors using non-constant indexes (#71505)
2023-11-07 15:29:41 +01:00
promote-alloca-mem-intrinsics.ll
[AMDGPU] Handle object size and bail if assume-like intrinsic is used in PromoteAllocaToVector (#68744)
2023-12-20 07:47:49 +01:00
promote-alloca-memset.ll
[AMDGPU][PromoteAlloca] Support memsets to ptr allocas (#80678)
2024-02-05 14:36:15 +01:00
promote-alloca-no-opts.ll
[AMDGPU] Rename COV module flag to amdhsa_code_object_version (#79905)
2024-03-06 09:51:48 -05:00
promote-alloca-non-constant-index.ll
SSAUpdater: use poison instead of undef in phi entries for unreachable predecessors
2024-06-30 11:51:30 +01:00
promote-alloca-padding-size-estimate.ll
[AMDGPU] Rename COV module flag to amdhsa_code_object_version (#79905)
2024-03-06 09:51:48 -05:00
promote-alloca-pointer-array.ll
[IRBuilder] Migrate most casts to folding API
2023-09-29 12:40:38 +02:00
promote-alloca-scoring.ll
[AMDGPU][PromoteAlloca] Whole-function alloca promotion to vector (#84735)
2024-03-19 11:49:22 +01:00
promote-alloca-stored-pointer-value.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
promote-alloca-strip-abi-opt-attributes.ll
[AMDGPU] Swap range metadata to attribute for workitem id. (#94871)
2024-06-09 10:29:50 -04:00
promote-alloca-subvecs.ll
[AMDGPU] Fix PromoteAlloca size check of alloca for store (#72528)
2023-11-20 07:57:48 -06:00
promote-alloca-to-lds-constantexpr-use.ll
…
promote-alloca-to-lds-icmp.ll
[AMDGPU] Swap range metadata to attribute for workitem id. (#94871)
2024-06-09 10:29:50 -04:00
promote-alloca-to-lds-phi.ll
…
promote-alloca-to-lds-select.ll
…
promote-alloca-unhandled-intrinsic.ll
…
promote-alloca-vector-to-vector.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
promote-alloca-volatile.ll
[AMDGPU] PromoteAlloca - bail always if load/store is volatile (#73228)
2023-11-28 12:01:35 +01:00
promote-constOffset-to-imm-gfx10.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
promote-constOffset-to-imm-gfx90a.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
promote-constOffset-to-imm.ll
[AMDGPU] add missing checks in processBaseWithConstOffset (#102310)
2024-08-12 11:54:02 +04:00
promote-constOffset-to-imm.mir
[AMDGPU] add missing checks in processBaseWithConstOffset (#102310)
2024-08-12 11:54:02 +04:00
promote-kernel-arguments.ll
AMDGPU: Regenerate baseline test checks
2024-08-05 21:27:40 +04:00
promote-vect3-load.ll
[AMDGPU] Codegen support for constrained multi-dword sloads (#96163)
2024-07-23 13:59:15 +05:30
propagate-attributes-bitcast-function.ll
…
propagate-flat-work-group-size.ll
AMDGPU: Infer no-agpr usage in AMDGPUAttributor (#85948)
2024-03-21 14:24:06 +05:30
propagate-waves-per-eu.ll
AMDGPU: Infer no-agpr usage in AMDGPUAttributor (#85948)
2024-03-21 14:24:06 +05:30
ps-shader-arg-count.ll
…
pseudo-scalar-transcendental.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
pseudo-scalar-transcendental.mir
[AMDGPU] Disable inline constants for pseudo scalar transcendentals (#104395)
2024-08-17 16:52:38 +09:00
ptr-arg-dbg-value.ll
[AMDGPU] NFC. Run auto-update on a few tests
2023-11-21 13:52:02 -05:00
ptr-buffer-alias-scheduling.ll
[AMDGPU] Codegen support for constrained multi-dword sloads (#96163)
2024-07-23 13:59:15 +05:30
ptrmask.ll
AtomicExpand: Fix creating invalid ptrmask for fat pointers (#94955)
2024-06-12 10:45:42 +02:00
pv-packing.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
pv.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
r600-constant-array-fixup.ll
…
r600-encoding.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
r600-export-fix.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
r600-infinite-loop-bug-while-reorganizing-vector.ll
…
r600-legalize-umax-bug.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
r600.add.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
r600.alu-limits.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
r600.amdgpu-alias-analysis.ll
…
r600.bitcast.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
r600.extract-lowbits.ll
…
r600.func-alignment.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
r600.global_atomics.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
r600.private-memory.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
r600.sub.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
r600.work-item-intrinsics.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
r600cfg.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
ra-inserted-scalar-instructions.mir
[MIRPrinter] Don't print line break when there is no instructions (NFC) (#80147)
2024-02-01 22:10:52 +08:00
ran-out-of-sgprs-allocation-failure.mir
Reapply "Move assertion for AdjustsStack from PEI to MachineVerifier (#85698)"
2024-03-21 20:24:57 -04:00
rcp_iflag.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
rcp-pattern.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
read_register.ll
…
read-register-invalid-subtarget.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
read-register-invalid-type-i32.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
read-register-invalid-type-i64.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
readcyclecounter.ll
[AMDGPU] Prefer s_memtime for readcyclecounter on GFX10 (#80211)
2024-02-01 07:19:57 -06:00
readlane_exec0.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
README
…
readsteadycounter.ll
[LLVM] Add __builtin_readsteadycounter intrinsic and builtin for realtime clocks (#81331)
2024-02-13 10:06:25 -06:00
reassoc-mul-add-1-to-mad.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
reassoc-scalar.ll
…
recursion.ll
[AMDGPU] Rename COV module flag to amdhsa_code_object_version (#79905)
2024-03-06 09:51:48 -05:00
recursive_global_initializer.ll
AMDGPU: Infer no-agpr usage in AMDGPUAttributor (#85948)
2024-03-21 14:24:06 +05:30
reduce-build-vec-ext-to-ext-build-vec.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
reduce-load-width-alignment.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
reduce-saveexec.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
reduce-store-width-alignment.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
reduction.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
reg-coalescer-sched-crash.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
regalloc-fail-unsatisfiable-overlapping-tuple-hints.mir
…
regalloc-failure-overlapping-insert-assert.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
regalloc-fast-dont-drop-subreg-index-issue61134.mir
AMDGPU: Regenerate baseline mir tests
2024-02-27 10:44:53 +05:30
regalloc-illegal-eviction-assert.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
regalloc-introduces-copy-sgpr-to-agpr.mir
[AMDGPU] Don't fix the scavenge slot at offset 0 (#79136)
2024-02-09 09:20:25 +01:00
regcoal-subrange-join-seg.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
regcoal-subrange-join.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
regcoalesce-cannot-join-failures.mir
AMDGPU: Regenerate baseline mir tests
2024-02-27 10:44:53 +05:30
regcoalesce-dbg.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
regcoalesce-keep-valid-lanes-implicit-def-bug39602.mir
AMDGPU: Regenerate baseline mir tests
2024-02-27 10:44:53 +05:30
regcoalesce-prune.mir
…
regcoalescer-resolve-lane-conflict-by-subranges.mir
AMDGPU: Regenerate baseline mir tests
2024-02-27 10:44:53 +05:30
regcoalescing-remove-partial-redundancy-assert.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
register-count-comments.ll
[AMDGPU] Remove repeated -mtriple options from RUN lines (#66486)
2023-09-15 11:29:24 +01:00
regpressure_printer.mir
[AMDGPU] Fix GCNUpwardRPTracker: max register pressure on defs. (#74422)
2023-12-08 11:27:08 +01:00
reject-agpr-usage-before-gfx908.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
rel32.ll
[AMDGPU] Stop combining arbitrary offsets into PAL relocs (#80034)
2024-01-31 10:28:23 +00:00
release-vgprs-dbg-loc.mir
[AMDGPU] Fix debug line table for MSG_DEALLOC_VGPRS optimization (#88924)
2024-04-18 09:29:32 -04:00
release-vgprs.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
rem_i128.ll
[DAGCombiner] Freeze maybe poison operands when folding select to logic (#84924)
2024-07-22 17:19:46 +02:00
remaining-virtual-register-operands.ll
…
remat-dead-subreg.mir
AMDGPU: Regenerate baseline mir tests
2024-02-27 10:44:53 +05:30
remat-fp64-constants.ll
[MachineLICM][AArch64] Hoist COPY instructions with other uses in the loop (#71403)
2023-11-20 10:01:04 +00:00
remat-smrd.mir
[AMDGPU] Rematerialize scalar loads (#68778)
2023-10-26 11:34:33 +02:00
remat-sop.mir
[AMDGPU] Work around s_getpc_b64 zero extending on GFX12 (#78186)
2024-01-18 10:23:27 +00:00
remat-vop.mir
…
remove-incompatible-extended-image-insts.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
remove-incompatible-functions.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
remove-incompatible-gws.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
remove-incompatible-s-time.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
remove-incompatible-wave32-feature.ll
RFC: [AMDGPU] Check subtarget features for consistency (#86957)
2024-05-09 11:37:28 +01:00
remove-no-kernel-id-attribute.ll
AMDGPU: Infer no-agpr usage in AMDGPUAttributor (#85948)
2024-03-21 14:24:06 +05:30
remove-short-exec-branches-gpr-idx-mode.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
remove-short-exec-branches-special-instructions.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
rename-disconnected-bug.ll
…
rename-independent-subregs-mac-operands.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
rename-independent-subregs.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
reorder-stores.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
repeated-divisor.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
replace-store-of-insert-load.ll
…
reqd-work-group-size.ll
[AMDGPU] Rename COV module flag to amdhsa_code_object_version (#79905)
2024-03-06 09:51:48 -05:00
required-export-priority.ll
[AMDGPU] Implement workaround for GFX11.5 export priority (#99273)
2024-07-23 17:03:21 +09:00
required-export-priority.mir
[AMDGPU] Implement workaround for GFX11.5 export priority (#99273)
2024-07-23 17:03:21 +09:00
reserved-reg-in-clause.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
resource-optimization-remarks.ll
[AMDGPU] Do not print kernel-resource-usage information on non-kernels (#99720)
2024-07-22 07:07:51 -05:00
resource-usage-crash-unhandled-reg.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
resource-usage-dead-function.ll
[AMDGPU] Rename COV module flag to amdhsa_code_object_version (#79905)
2024-03-06 09:51:48 -05:00
resource-usage-pal.ll
…
ret_jump.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
ret.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
return-with-successors.mir
[CodeGen][NewPM] Port LiveIntervals to new pass manager (#98118)
2024-07-10 19:34:48 +08:00
returnaddress.ll
…
rewrite-out-arguments-address-space.ll
…
rewrite-out-arguments.ll
[opt] Infer DataLayout from triple if not specified
2023-10-26 12:07:37 -07:00
rewrite-partial-reg-uses-dbg.mir
[AMDGPU] Update rewrite-partial-reg-uses tests. NFC. (#72499)
2023-11-16 11:48:39 +01:00
rewrite-partial-reg-uses-gen.mir
[AMDGPU] Fix GCNRewritePartialRegUses pass: vector regclass is selected instead of scalar. (#69957)
2023-11-16 16:56:46 +01:00
rewrite-partial-reg-uses.mir
[AMDGPU] Fix GCNRewritePartialRegUses pass: vector regclass is selected instead of scalar. (#69957)
2023-11-16 16:56:46 +01:00
rewrite-undef-for-phi.ll
[AMDGPU] Port AMDGPURewriteUndefForPHI to new pass manager (#66008)
2023-09-12 13:32:02 -07:00
rotl.i64.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
rotl.ll
[AMDGPU][SILoadStoreOptimizer] Merge constrained sloads (#96162)
2024-07-23 13:50:42 +05:30
rotr.i64.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
rotr.ll
[AMDGPU][SILoadStoreOptimizer] Merge constrained sloads (#96162)
2024-07-23 13:50:42 +05:30
roundeven.ll
AMDGPU/GlobalISel: Partially move constant selection to patterns (#100786)
2024-07-30 18:18:16 +04:00
rsq.f32.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
rsq.f64.ll
[GlobalISel] replace right identity X * -1.0 with fneg(x) (#80526)
2024-02-21 09:41:59 +00:00
rv7x0_count3.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
s_add_co_pseudo_lowering.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
s_addk_i32.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
s_code_end.ll
…
s_movk_i32.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
s_mulk_i32.ll
…
s_or_saveexec_xor_combine.mir
[AMDGPU] Remove -wavefrontsize32 and -wavefrontsize64 from GFX10+ tests (NFC) (#100711)
2024-07-26 00:42:24 -07:00
s-getpc-b64-remat.ll
[AMDGPU] Pick available high VGPR for CSR SGPR spilling (#78669)
2024-01-24 07:08:43 +05:30
sad.ll
[DAG] Add select_cc -> abd folds (#102137)
2024-08-21 12:07:40 +01:00
saddo.ll
[AMDGPU] Codegen support for constrained multi-dword sloads (#96163)
2024-07-23 13:59:15 +05:30
saddsat.ll
…
salu-to-valu.ll
[AMDGPU] Select 64-bit imm moves if can be encoded as 32 bit operand (#70395)
2023-10-30 08:12:28 -07:00
same-slot-agpr-sgpr.mir
[AMDGPU] Add pseudo instructions for SGPR spill to VGPR (#69923)
2023-10-27 17:24:10 +05:30
sampler-resource-id.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
save-fp.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
scalar_to_vector_v2x16.ll
AMDGPU/GlobalISel: Partially move constant selection to patterns (#100786)
2024-07-30 18:18:16 +04:00
scalar_to_vector.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
scalar_to_vector.v8i16.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
scalar-branch-missing-and-exec.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
scalar-float-sop1.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
scalar-float-sop2.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
scalar-float-sopc.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
scalar-store-cache-flush.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
scalarize-insert-subvector.ll
[LegalizeTypes][AMDGPU]: Allow for scalarization of insert_subvector (#104236)
2024-08-15 08:07:05 -07:00
scc-clobbered-sgpr-to-vmem-spill.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
sched-assert-dead-def-subreg-use-other-subreg.mir
AMDGPU: Regenerate baseline mir tests
2024-02-27 10:44:53 +05:30
sched-assert-onlydbg-value-empty-region.mir
AMDGPU: Regenerate baseline mir tests
2024-02-27 10:44:53 +05:30
sched-barrier-hang-weak-dep.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
sched-barrier-post-RA.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
sched-barrier-pre-RA.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
sched-crash-dbg-value.mir
Reapply "Move assertion for AdjustsStack from PEI to MachineVerifier (#85698)"
2024-03-21 20:24:57 -04:00
sched-group-barrier-pipeline-solver.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
sched-group-barrier-pre-RA.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
sched-handleMoveUp-subreg-def-across-subreg-def.mir
AMDGPU: Regenerate baseline mir tests
2024-02-27 10:44:53 +05:30
sched-prefer-non-mfma.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
sched-setprio.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
sched.barrier.inverted.mask.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
schedule-addrspaces.ll
Revert "Update amdgpu_gfx functions to use s0-s3 for inreg SGPR arguments on targets using scratch instructions for stack #78226" (#86273)
2024-03-26 11:01:08 +01:00
schedule-avoid-spills.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
schedule-barrier-fpmode.mir
AMDGPU: Regenerate baseline mir tests
2024-02-27 10:44:53 +05:30
schedule-barrier.mir
AMDGPU: Regenerate baseline mir tests
2024-02-27 10:44:53 +05:30
schedule-fs-loop-nested-if.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
schedule-fs-loop-nested.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
schedule-fs-loop.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
schedule-global-loads.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
schedule-if-2.ll
…
schedule-if.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
schedule-ilp-liveness-tracking.mir
…
schedule-ilp.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
schedule-ilp.mir
…
schedule-kernel-arg-loads.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
schedule-physregdeps.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
schedule-regpressure-ilp-metric-spills.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
schedule-regpressure-lds.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
schedule-regpressure-limit2.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
schedule-regpressure-limit3.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
schedule-regpressure-limit-clustering.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
schedule-regpressure-limit.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
schedule-regpressure-misched-max-waves.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
schedule-regpressure.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
schedule-relaxed-occupancy.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
schedule-vs-if-nested-loop-failure.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
schedule-vs-if-nested-loop.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
schedule-xdl-resource.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
scheduler-handle-move-bundle.mir
…
scheduler-rp-calc-one-successor-two-predecessors-bug.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
scheduler-subrange-crash.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
scratch-buffer.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
scratch-pointer-sink.ll
Revert "Update amdgpu_gfx functions to use s0-s3 for inreg SGPR arguments on targets using scratch instructions for stack #78226" (#86273)
2024-03-26 11:01:08 +01:00
scratch-simple.ll
[AMDGPU] Don't fix the scavenge slot at offset 0 (#79136)
2024-02-09 09:20:25 +01:00
sdag-print-divergence.ll
SelectionDAG: Do not propagate divergence through copy glue (#101210)
2024-07-31 00:04:58 +04:00
sdiv64.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
sdiv.ll
[AMDGPU] Codegen support for constrained multi-dword sloads (#96163)
2024-07-23 13:59:15 +05:30
sdivrem24.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
sdivrem64.r600.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
sdwa-gfx9.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
sdwa-op64-test.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
sdwa-ops.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
sdwa-peephole-instr-gfx10.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
sdwa-peephole-instr.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
sdwa-peephole.ll
[AMDGPU] Codegen support for constrained multi-dword sloads (#96163)
2024-07-23 13:59:15 +05:30
sdwa-preserve.mir
[AMDGPU] Reset kill flags for multiple uses of SDWAInst Ops
2024-07-01 09:14:02 -07:00
sdwa-scalar-ops.mir
[AMDGPU] Convert tests to opaque pointers (NFC)
2024-02-05 12:42:23 +01:00
sdwa-stack.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
sdwa-vop2-64bit.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
select64.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
select-constant-cttz.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
select-constant-xor.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
select-fabs-fneg-extract-legacy.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
select-fabs-fneg-extract.f16.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
select-fabs-fneg-extract.legal.f16.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
select-fabs-fneg-extract.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
select-fabs-fneg-extract.v2f16.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
select-flags-to-fmin-fmax.ll
DAG: Use flags in isLegalToCombineMinNumMaxNum (#93555)
2024-05-28 18:57:38 +02:00
select-i1.ll
…
select-opt.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
select-phi-s16-fp.ll
[SDISel][Combine] Constant fold FP16_TO_FP (#94790)
2024-06-08 11:31:13 +02:00
select-undef.ll
AMDGPU: Make v4bf16 a legal type (#76217)
2024-01-05 08:35:07 +07:00
select-vectors.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
select.f16.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
select.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
selectcc-cnd.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
selectcc-cnde-int.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
selectcc-icmp-select-float.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
selectcc-opt.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
selectcc.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
sendmsg-m0-hazard.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
set-dx10.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
set-gpr-idx-peephole.mir
AMDGPU: Regenerate baseline mir tests
2024-02-27 10:44:53 +05:30
set-inactive-wwm-overwrite.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
set-wave-priority.ll
…
setcc64.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
setcc-equivalent.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
setcc-fneg-constant.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
setcc-limit-load-shrink.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
setcc-multiple-use.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
setcc-opt.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
setcc-sext.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
setcc.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
seto.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
setuo.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
sext-divergence-driven-isel.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
sext-eliminate.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
sext-in-reg-failure-r600.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
sext-in-reg.ll
[AMDGPU] Remove duplicate -mtriple options in tests (#91576)
2024-05-09 10:59:25 +01:00
sgpr-control-flow.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
sgpr-copy-duplicate-operand.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
sgpr-copy-local-cse.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
sgpr-copy.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
sgpr-phys-copy.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
sgpr-regalloc-flags.ll
Revert "[AMDGPU]Optimize SGPR spills (#93668)"
2024-06-24 12:36:36 +05:30
sgpr-spill-dead-frame-in-dbg-value.mir
[AMDGPU] Add pseudo instructions for SGPR spill to VGPR (#69923)
2023-10-27 17:24:10 +05:30
sgpr-spill-fi-skip-processing-stack-arg-dbg-value.mir
…
sgpr-spill-incorrect-fi-bookkeeping-bug.ll
…
sgpr-spill-no-vgprs.ll
[AMDGPU] Rename COV module flag to amdhsa_code_object_version (#79905)
2024-03-06 09:51:48 -05:00
sgpr-spill-overlap-wwm-reserve.mir
[AMDGPU] Stop reserving $vcc_hi in wave32 mode (#87783)
2024-04-16 10:15:00 +01:00
sgpr-spill-partially-undef.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
sgpr-spill-to-vmem-scc-clobber-unhandled.mir
…
sgpr-spill-to-vmem-scc-clobber.mir
[AMDGPU] Add pseudo instructions for SGPR spill to VGPR (#69923)
2023-10-27 17:24:10 +05:30
sgpr-spill-update-only-slot-indexes.ll
[AMDGPU] Rename COV module flag to amdhsa_code_object_version (#79905)
2024-03-06 09:51:48 -05:00
sgpr-spill-vmem-large-frame.mir
[AMDGPU] Add pseudo instructions for SGPR spill to VGPR (#69923)
2023-10-27 17:24:10 +05:30
sgpr-spill-wrong-stack-id.mir
Reapply "Move assertion for AdjustsStack from PEI to MachineVerifier (#85698)"
2024-03-21 20:24:57 -04:00
sgpr-spill.mir
[AMDGPU] Remove -wavefrontsize32 and -wavefrontsize64 from GFX10+ tests (NFC) (#100711)
2024-07-26 00:42:24 -07:00
sgpr-spills-empty-prolog-block.mir
[AMDGPU] Fix end() iterator dereference in SILowerSGPRSpills (#88828)
2024-04-18 09:34:27 -05:00
sgpr-spills-split-regalloc.ll
[AMDGPU] Use glue for convergence tokens at call-like operations (#86766)
2024-04-01 10:51:13 +05:30
sgprcopies.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
shader-addr64-nonuniform.ll
…
shared-op-cycle.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
shift-and-i64-ubfe.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
shift-and-i128-ubfe.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
shift-i64-opts.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
shift-i128.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
shift-select.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
shl_add_constant.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
shl_add_ptr_csub.ll
…
shl_add_ptr_global.ll
[AMDGPU][SIInsertWaitcnts] Do not add s_waitcnt when the counters are known to be 0 already (#72830)
2023-12-15 12:33:32 +01:00
shl_add_ptr.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
shl_add.ll
…
shl_or.ll
…
shl-add-to-add-shl.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
shl.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
shl.v2i16.ll
[AMDGPU] Codegen support for constrained multi-dword sloads (#96163)
2024-07-23 13:59:15 +05:30
should-not-hoist-set-inactive.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
shrink-add-sub-constant.ll
[AMDGPU] Codegen support for constrained multi-dword sloads (#96163)
2024-07-23 13:59:15 +05:30
shrink-carry.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
shrink-i32-kimm.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
shrink-instructions-flags.mir
AMDGPU: Regenerate baseline mir tests
2024-02-27 10:44:53 +05:30
shrink-instructions-illegal-fold.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
shrink-instructions-implicit-vcclo.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
shrink-insts-scalar-bit-ops.mir
AMDGPU: Materialize bitwise not of inline immediates (#95960)
2024-06-22 00:40:59 +02:00
shrink-mad-fma.mir
AMDGPU: Regenerate baseline mir tests
2024-02-27 10:44:53 +05:30
shrink-true16.mir
[AMDGPU][True16] fix a bug in codeGen causing e64 with wrong vgpr type to shrink (#102942)
2024-08-12 17:03:05 -04:00
shrink-vop3-carry-out.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
si-annotate-cf-kill.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
si-annotate-cf-noloop.ll
AMDGPU/NewPM: Port SIAnnotateControlFlow to new pass manager (#102653)
2024-08-10 07:02:21 +04:00
si-annotate-cf-unreachable.ll
AMDGPU/NewPM: Port SIAnnotateControlFlow to new pass manager (#102653)
2024-08-10 07:02:21 +04:00
si-annotate-cf.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
si-annotate-cfg-loop-assert.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
si-annotate-dbg-info.ll
[RemoveDIs] Print IR with debug records by default (#91724)
2024-06-14 15:07:27 +01:00
si-annotate-nested-control-flows.ll
…
si-annotatecfg-multiple-backedges.ll
…
si-fix-sgpr-copies-copy-to-sgpr.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
si-fix-sgpr-copies.mir
AMDGPU/NewPM: Port SIFixSGPRCopies to new pass manager (#102614)
2024-08-09 17:52:41 +04:00
si-fold-aligned-agprs.mir
…
si-fold-aligned-vgprs.mir
AMDGPU: Regenerate baseline mir tests
2024-02-27 10:44:53 +05:30
si-fold-copy-kills.mir
…
si-fold-kimm.mir
…
si-fold-reg-sequence.mir
[AMDGPU] Prevent hang in SIFoldOperands by caching uses (#82099)
2024-02-27 09:13:59 -06:00
si-fold-scalar-clamp.mir
[AMDGPU] Fix folding clamp into pseudo scalar instructions (#100568)
2024-07-25 18:19:26 +02:00
si-i1-copies.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
si-instr-info-correct-implicit-operands.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
si-lower-control-flow-kill.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
si-lower-control-flow-unreachable-block.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
si-lower-control-flow.mir
AMDGPU: Regenerate baseline mir tests
2024-02-27 10:44:53 +05:30
si-lower-i1-copies-order-of-phi-incomings.mir
[AMDGPU] Fix implicit $vcc operands after parsing MIR (#87781)
2024-04-09 09:10:45 +01:00
si-lower-i1-copies.mir
AMDGPU/NewPM: Port SILowerI1Copies to new pass manager (#102663)
2024-08-10 07:08:22 +04:00
si-lower-sgpr-spills-vgpr-lanes-usage.mir
Revert "[AMDGPU]Optimize SGPR spills (#93668)"
2024-06-24 12:36:36 +05:30
si-lower-sgpr-spills.mir
[AMDGPU] Add pseudo instructions for SGPR spill to VGPR (#69923)
2023-10-27 17:24:10 +05:30
si-opt-vgpr-liverange-bug-deadlanes.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
si-optimize-vgpr-live-range-dbg-instr.ll
…
si-optimize-vgpr-live-range-dbg-instr.mir
…
si-scheduler-exports.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
si-scheduler.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
si-sgpr-spill.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
si-spill-cf.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
si-spill-sgpr-stack.ll
[AMDGPU] Don't fix the scavenge slot at offset 0 (#79136)
2024-02-09 09:20:25 +01:00
si-triv-disjoint-mem-access.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
si-unify-exit-multiple-unreachables.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
si-unify-exit-return-unreachable.ll
[LowerSwitch] Don't let pass manager handle the dependency (#68662)
2023-10-25 09:24:36 +08:00
si-vector-hang.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
sibling-call.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
sign_extend.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
simple-indirect-call-2.ll
Reapply "[Attributor][AMDGPU] Enable AAIndirectCallInfo for AMDAttributor (#100952)"
2024-08-14 17:16:47 -04:00
simple-indirect-call.ll
Reapply "[Attributor][AMDGPU] Enable AAIndirectCallInfo for AMDAttributor (#100952)"
2024-08-14 17:16:47 -04:00
simplify-libcall-nobuiltin-def.ll
…
simplify-libcalls2.ll
…
simplify-libcalls.ll
Revert "[AMDGPU] Move AMDGPUAttributorPass to full LTO post link stage (#102086)"
2024-08-09 15:12:24 -04:00
simplifydemandedbits-recursion.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
sink-after-control-flow-postra.mir
[AMDGPU] Remove -wavefrontsize32 and -wavefrontsize64 from GFX10+ tests (NFC) (#100711)
2024-07-26 00:42:24 -07:00
sink-after-control-flow.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
sink-image-sample.ll
…
sint_to_fp.f64.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
sint_to_fp.i64.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
sint_to_fp.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
sitofp.f16.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
skip-branch-taildup-ret.mir
…
skip-branch-trap.ll
…
skip-fold-regsequence.mir
…
skip-if-dead.ll
[AMDGPU] Remove -wavefrontsize32 and -wavefrontsize64 from GFX10+ tests (NFC) (#100711)
2024-07-26 00:42:24 -07:00
skip-promote-alloca-vector-users.ll
…
smed3.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
smem-no-clause-coalesced.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
smem-war-hazard.mir
[AMDGPU] Remove -wavefrontsize32 and -wavefrontsize64 from GFX10+ tests (NFC) (#100711)
2024-07-26 00:42:24 -07:00
smfmac_no_agprs.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
sminmax.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
sminmax.v2i16.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
smrd_vmem_war.ll
…
smrd-fold-offset.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
smrd-gfx10.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
smrd-vccz-bug.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
smrd.ll
[AMDGPU] Codegen support for constrained multi-dword sloads (#96163)
2024-07-23 13:59:15 +05:30
snippet-copy-bundle-regression.mir
Reapply "Move assertion for AdjustsStack from PEI to MachineVerifier (#85698)"
2024-03-21 20:24:57 -04:00
soft-clause-dbg-value.mir
…
soft-clause-exceeds-register-budget.ll
…
sopk-compares.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
sopk-no-literal.ll
[AMDGPU] Rename COV module flag to amdhsa_code_object_version (#79905)
2024-03-06 09:51:48 -05:00
speculative-execution-freecasts.ll
…
spill192.mir
[NewPM][CodeGen] Port regallocfast to new pass manager (#94426)
2024-06-07 12:22:42 +08:00
spill224.mir
[NewPM][CodeGen] Port regallocfast to new pass manager (#94426)
2024-06-07 12:22:42 +08:00
spill288.mir
[NewPM][CodeGen] Port regallocfast to new pass manager (#94426)
2024-06-07 12:22:42 +08:00
spill320.mir
[NewPM][CodeGen] Port regallocfast to new pass manager (#94426)
2024-06-07 12:22:42 +08:00
spill352.mir
[NewPM][CodeGen] Port regallocfast to new pass manager (#94426)
2024-06-07 12:22:42 +08:00
spill384.mir
[NewPM][CodeGen] Port regallocfast to new pass manager (#94426)
2024-06-07 12:22:42 +08:00
spill_more_than_wavesize_csr_sgprs.ll
[AMDGPU] Pick available high VGPR for CSR SGPR spilling (#78669)
2024-01-24 07:08:43 +05:30
spill-agpr-partially-undef.mir
…
spill-agpr.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
spill-agpr.mir
[NewPM][CodeGen] Port regallocfast to new pass manager (#94426)
2024-06-07 12:22:42 +08:00
spill-alloc-sgpr-init-bug.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
spill-before-exec.mir
…
spill-cfg-position.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
spill-csr-frame-ptr-reg-copy.ll
…
spill-empty-live-interval.mir
AMDGPU: Regenerate baseline mir tests
2024-02-27 10:44:53 +05:30
spill-m0.ll
[AMDGPU] Rename COV module flag to amdhsa_code_object_version (#79905)
2024-03-06 09:51:48 -05:00
spill-offset-calculation.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
spill-reg-tuple-super-reg-use.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
spill-regpressure-less.mir
[AMDGPU,test] Change llc -march= to -mtriple=
2024-03-07 19:09:18 -08:00
spill-scavenge-offset.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
spill-sgpr-csr-live-ins.mir
[AMDGPU] Pick available high VGPR for CSR SGPR spilling (#78669)
2024-01-24 07:08:43 +05:30
spill-sgpr-stack-no-sgpr.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
spill-sgpr-to-virtual-vgpr.mir
[AMDGPU] Pick available high VGPR for CSR SGPR spilling (#78669)
2024-01-24 07:08:43 +05:30
spill-sgpr-used-for-exec-copy.mir
[AMDGPU] Insert spill codes for the SGPRs used for EXEC copy (#79428)
2024-02-05 18:32:23 +05:30
spill-special-sgpr.mir
[AMDGPU] Remove -wavefrontsize32 and -wavefrontsize64 from GFX10+ tests (NFC) (#100711)
2024-07-26 00:42:24 -07:00
spill-to-agpr-partial.mir
…
spill-vector-superclass.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
spill-vgpr-to-agpr-update-regscavenger.ll
[AMDGPU] Introduce AMDGPU::SGPR_SPILL asm comment flag (#67091)
2023-09-29 11:15:01 +05:30
spill-vgpr-to-agpr.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
spill-vgpr.ll
[AMDGPU] Fix GFX90x check prefixes in tests (#92254)
2024-05-15 15:13:53 +01:00
spill-wide-sgpr.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
spill-writelane-vgprs.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
split-arg-dbg-value.ll
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split-liverange-overlapping-copies.mir
AMDGPU: Regenerate baseline mir tests
2024-02-27 10:44:53 +05:30
split-mbb-lis-subrange.mir
[CodeGen][NewPM] Port phi-node-elimination to new pass manager (#98867)
2024-07-17 11:26:56 +08:00
split-scalar-i64-add.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
split-smrd.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
split-vector-memoperand-offsets.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
splitkit-copy-bundle.mir
AMDGPU: Regenerate baseline mir tests
2024-02-27 10:44:53 +05:30
splitkit-copy-live-lanes.mir
AMDGPU: Regenerate baseline mir tests
2024-02-27 10:44:53 +05:30
splitkit-getsubrangeformask.ll
[SeparateConstOffsetFromGEP] Reland: Reorder trivial GEP chains to separate constants (#81671)
2024-02-13 17:10:23 -08:00
splitkit-nolivesubranges.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
splitkit.mir
…
sra.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
sram-ecc-default.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
sramecc-subtarget-feature-any.ll
[AMDGPU] Split GCNSubtarget into its own file. NFC. (#105525)
2024-08-21 19:11:02 +01:00
sramecc-subtarget-feature-disabled.ll
[AMDGPU] Split GCNSubtarget into its own file. NFC. (#105525)
2024-08-21 19:11:02 +01:00
sramecc-subtarget-feature-enabled.ll
[AMDGPU] Split GCNSubtarget into its own file. NFC. (#105525)
2024-08-21 19:11:02 +01:00
srem64.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
srem-seteq-illegal-types.ll
[TargetLowering][AMDGPU][ARM][RISCV][X86] Teach SimplifyDemandedBits to combine (srl (sra X, C1), ShAmt) -> sra(X, C1+ShAmt) (#101751)
2024-08-14 08:44:57 -07:00
srem.ll
[AMDGPU] Codegen support for constrained multi-dword sloads (#96163)
2024-07-23 13:59:15 +05:30
srl.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
sroa-before-unroll.ll
…
SRSRC-GIT-clobber-check.mir
…
ssubo.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
ssubsat.ll
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stack-pointer-offset-relative-frameindex.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
stack-realign-kernel.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
stack-realign.ll
[AMDGPU] Convert PrologEpilogSGPRSpills from DenseMap to sorted vector (#90957)
2024-05-03 13:42:40 +01:00
stack-size-overflow.ll
[AMDGPU] Don't fix the scavenge slot at offset 0 (#79136)
2024-02-09 09:20:25 +01:00
stack-slot-color-sgpr-vgpr-spills.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
stacksave_stackrestore.invalid.ll
…
stacksave_stackrestore.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
stale-livevar-in-twoaddr-pass.mir
[CodeGen][NewPM] Port phi-node-elimination to new pass manager (#98867)
2024-07-17 11:26:56 +08:00
stop-tail-duplicate-cfg-intrinsic.mir
…
store_typed.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
store-barrier.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
store-clobbers-load.ll
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store-global.ll
[AMDGPU] Remove duplicate -mtriple options in tests (#91576)
2024-05-09 10:59:25 +01:00
store-hi16.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
store-local.96.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
store-local.128.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
store-local.ll
[AMDGPU] Remove duplicate -mtriple options in tests (#91576)
2024-05-09 10:59:25 +01:00
store-private.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
store-to-constant-error.ll
…
store-v3i64.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
store-vector-ptrs.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
store-weird-sizes.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
stress-calls.ll
…
strict_fadd.f16.ll
…
strict_fadd.f32.ll
…
strict_fadd.f64.ll
…
strict_fma.f16.ll
…
strict_fma.f32.ll
…
strict_fma.f64.ll
…
strict_fmul.f16.ll
…
strict_fmul.f32.ll
…
strict_fmul.f64.ll
…
strict_fpext.ll
DAG: Fix ABI lowering with FP promote in strictfp functions (#74405)
2024-01-18 10:57:53 +07:00
strict_fptrunc.ll
[FPEnv][AMDGPU] Correct strictfp tests.
2024-02-05 09:29:31 -05:00
strict_fsub.f16.ll
…
strict_fsub.f32.ll
…
strict_fsub.f64.ll
…
strict_ldexp.f16.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
strict_ldexp.f32.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
strict_ldexp.f64.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
strictfp_f16_abi_promote.ll
[FPEnv][AMDGPU] Correct strictfp tests.
2024-02-05 09:29:31 -05:00
structurize1.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
structurize.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
sub_i1.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
sub-zext-cc-zext-cc.ll
…
sub.i16.ll
…
sub.ll
[AMDGPU] Codegen support for constrained multi-dword sloads (#96163)
2024-07-23 13:59:15 +05:30
sub.v2i16.ll
[AMDGPU] Codegen support for constrained multi-dword sloads (#96163)
2024-07-23 13:59:15 +05:30
subreg_interference.mir
…
subreg-coalescer-crash.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
subreg-coalescer-undef-use.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
subreg-eliminate-dead.ll
…
subreg-intervals.mir
[CodeGen][NewPM] Port LiveIntervals to new pass manager (#98118)
2024-07-10 19:34:48 +08:00
subreg-split-live-in-error.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
subreg-undef-def-with-other-subreg-defs.mir
AMDGPU: Regenerate baseline mir tests
2024-02-27 10:44:53 +05:30
subvector-test.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
swdev282079.ll
…
swdev282079.mir
…
swdev373493.ll
Revert "[CodeGen] Really renumber slot indexes before register allocation (#67038)"
2023-10-09 12:31:32 +01:00
swdev380865.ll
[AMDGPU] Select 64-bit imm moves if can be encoded as 32 bit operand (#70395)
2023-10-30 08:12:28 -07:00
switch-default-block-unreachable.ll
…
switch-unreachable.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
swizzle-export.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
syncscopes.ll
…
tail-call-amdgpu-gfx.ll
[AMDGPU] Use absolute relocations when compiling for AMDPAL and Mesa3D (#67791)
2023-10-10 09:22:02 +02:00
tail-call-cgp.ll
…
tail-dup-bundle.mir
[MIRPrinter] Don't print line break when there is no instructions (NFC) (#80147)
2024-02-01 22:10:52 +08:00
tail-duplication-convergent.ll
…
target-cpu.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
target-mem-intrinsic-metadata.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
tex-clause-antidep.ll
[test] Change llc -march= to -mtriple=
2023-09-11 14:42:37 -07:00
texture-input-merge.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
tgsplit.ll
…
threeaddr-wmma.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
tid-kd-xnack-any.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
tid-kd-xnack-off.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
tid-kd-xnack-on.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
tid-mul-func-xnack-all-any.ll
[AMDGPU] Rename COV module flag to amdhsa_code_object_version (#79905)
2024-03-06 09:51:48 -05:00
tid-mul-func-xnack-all-not-supported.ll
[AMDGPU] Rename COV module flag to amdhsa_code_object_version (#79905)
2024-03-06 09:51:48 -05:00
tid-mul-func-xnack-all-off.ll
[AMDGPU] Rename COV module flag to amdhsa_code_object_version (#79905)
2024-03-06 09:51:48 -05:00
tid-mul-func-xnack-all-on.ll
[AMDGPU] Rename COV module flag to amdhsa_code_object_version (#79905)
2024-03-06 09:51:48 -05:00
tid-mul-func-xnack-any-off-1.ll
[AMDGPU] Rename COV module flag to amdhsa_code_object_version (#79905)
2024-03-06 09:51:48 -05:00
tid-mul-func-xnack-any-off-2.ll
[AMDGPU] Rename COV module flag to amdhsa_code_object_version (#79905)
2024-03-06 09:51:48 -05:00
tid-mul-func-xnack-any-on-1.ll
[AMDGPU] Rename COV module flag to amdhsa_code_object_version (#79905)
2024-03-06 09:51:48 -05:00
tid-mul-func-xnack-any-on-2.ll
[AMDGPU] Rename COV module flag to amdhsa_code_object_version (#79905)
2024-03-06 09:51:48 -05:00
tid-mul-func-xnack-invalid-any-off-on.ll
[AMDGPU] Rename COV module flag to amdhsa_code_object_version (#79905)
2024-03-06 09:51:48 -05:00
tid-one-func-xnack-any.ll
[AMDGPU] Rename COV module flag to amdhsa_code_object_version (#79905)
2024-03-06 09:51:48 -05:00
tid-one-func-xnack-not-supported.ll
[AMDGPU] Rename COV module flag to amdhsa_code_object_version (#79905)
2024-03-06 09:51:48 -05:00
tid-one-func-xnack-off.ll
[AMDGPU] Rename COV module flag to amdhsa_code_object_version (#79905)
2024-03-06 09:51:48 -05:00
tid-one-func-xnack-on.ll
[AMDGPU] Rename COV module flag to amdhsa_code_object_version (#79905)
2024-03-06 09:51:48 -05:00
tied-op-for-wwm-scratch-reg-spill-restore.mir
[AMDGPU] Add pseudo instructions for SGPR spill to VGPR (#69923)
2023-10-27 17:24:10 +05:30
token-factor-inline-limit-test.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
track-spilled-vgpr-liveness.mir
[AMDGPU] Add pseudo instructions for SGPR spill to VGPR (#69923)
2023-10-27 17:24:10 +05:30
trans-forwarding-hazards.mir
AMDGPU: Regenerate baseline mir tests
2024-02-27 10:44:53 +05:30
transform-block-with-return-to-epilog.ll
[AMDGPU] Combine or remove redundant waitcnts at the end of each MBB (#87539)
2024-04-04 10:14:16 +01:00
trap-abis.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
trap.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
triv-disjoint-mem-access-neg-offset.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
true16-ra-pre-gfx11-regression-test.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
trunc-bitcast-vector.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
trunc-cmp-constant.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
trunc-combine.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
trunc-store-f64-to-f16.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
trunc-store-i1.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
trunc-store-i64.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
trunc-store-vec-i16-to-i8.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
trunc-store.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
trunc-vector-store-assertion-failure.ll
[AMDGPU] Remove duplicate -mtriple options in tests (#91576)
2024-05-09 10:59:25 +01:00
trunc.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
tti-unroll-prefs.ll
…
tuple-allocation-failure.ll
[AMDGPU] Rename COV module flag to amdhsa_code_object_version (#79905)
2024-03-06 09:51:48 -05:00
twoaddr-constrain.ll
[AMDGPU] Codegen support for constrained multi-dword sloads (#96163)
2024-07-23 13:59:15 +05:30
twoaddr-fma-f64.mir
[AMDGPU] Remove some invalid tests (#98796)
2024-07-15 19:49:18 +08:00
twoaddr-fma.mir
[AMDGPU] Remove some invalid tests (#98796)
2024-07-15 19:49:18 +08:00
twoaddr-mad.mir
[AMDGPU] Remove some invalid tests (#98796)
2024-07-15 19:49:18 +08:00
twoaddr-regsequence.mir
AMDGPU: Regenerate baseline mir tests
2024-02-27 10:44:53 +05:30
twoaddr-wmma.mir
[AMDGPU] Remove some invalid tests (#98796)
2024-07-15 19:49:18 +08:00
uaddo.ll
[AMDGPU] Codegen support for constrained multi-dword sloads (#96163)
2024-07-23 13:59:15 +05:30
uaddsat.ll
…
udiv64.ll
Reapply "[AMDGPU] Always lower s/udiv64 by constant to MUL" (#101942)
2024-08-12 09:00:22 +02:00
udiv.ll
Reapply "[AMDGPU] Always lower s/udiv64 by constant to MUL" (#101942)
2024-08-12 09:00:22 +02:00
udivrem24.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
udivrem64.r600.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
udivrem.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
uint_to_fp.f64.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
uint_to_fp.i64.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
uint_to_fp.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
uitofp.f16.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
umed3.ll
[SDAG] Turn umin into smin if the saturation pattern is broken (#88505)
2024-04-16 01:28:28 +08:00
unaligned-load-store.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
unallocatable-bundle-regression.mir
…
undef-build-vector.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
undef-copy-propagation.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
undef-subreg-use-after-coalesce.mir
AMDGPU: Regenerate baseline mir tests
2024-02-27 10:44:53 +05:30
undefined-physreg-sgpr-spill.mir
…
undefined-subreg-liverange.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
unexpected-reg-unit-state.mir
[NewPM][CodeGen] Port regallocfast to new pass manager (#94426)
2024-06-07 12:22:42 +08:00
unhandled-loop-condition-assertion.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
uniform-branch-intrinsic-cond.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
uniform-cfg.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
uniform-crash.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
uniform-load-from-tid.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
uniform-loop-inside-nonuniform.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
uniform-phi-with-undef.ll
[DAG] Fold fdiv X, c2 -> fmul X, 1/c2 without AllowReciprocal if exact (#93882)
2024-06-09 12:28:20 +01:00
uniform-select.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
uniform-work-group-attribute-missing.ll
AMDGPU: Infer no-agpr usage in AMDGPUAttributor (#85948)
2024-03-21 14:24:06 +05:30
uniform-work-group-multistep.ll
AMDGPU: Infer no-agpr usage in AMDGPUAttributor (#85948)
2024-03-21 14:24:06 +05:30
uniform-work-group-nested-function-calls.ll
AMDGPU: Infer no-agpr usage in AMDGPUAttributor (#85948)
2024-03-21 14:24:06 +05:30
uniform-work-group-prevent-attribute-propagation.ll
AMDGPU: Infer no-agpr usage in AMDGPUAttributor (#85948)
2024-03-21 14:24:06 +05:30
uniform-work-group-propagate-attribute.ll
AMDGPU: Infer no-agpr usage in AMDGPUAttributor (#85948)
2024-03-21 14:24:06 +05:30
uniform-work-group-recursion-test.ll
AMDGPU: Infer no-agpr usage in AMDGPUAttributor (#85948)
2024-03-21 14:24:06 +05:30
uniform-work-group-test.ll
AMDGPU: Infer no-agpr usage in AMDGPUAttributor (#85948)
2024-03-21 14:24:06 +05:30
unify-metadata.ll
…
unigine-liveness-crash.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
unknown-processor.ll
[AMDGPU] Remove wavefrontsize feature from GFX10+ (#98400)
2024-07-16 01:02:25 -07:00
unpack-half.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
unroll.ll
…
unstructured-cfg-def-use-issue.ll
[AMDGPU] Rename COV module flag to amdhsa_code_object_version (#79905)
2024-03-06 09:51:48 -05:00
unsupported-atomics.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
unsupported-calls.ll
[AMDGPU] Implement variadic functions by IR lowering (#93362)
2024-06-06 10:44:53 +01:00
unsupported-cc.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
unsupported-code-object-version.ll
[AMDGPU] Rename COV module flag to amdhsa_code_object_version (#79905)
2024-03-06 09:51:48 -05:00
unsupported-image-a16.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
unsupported-image-g16.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
unsupported-image-sample.ll
[AMDGPU] Introduce GFX9/10.1/10.3/11 Generic Targets (#76955)
2024-02-12 10:18:20 +01:00
update-lds-alignment.ll
AMDGPU: Use poison instead of undef in module lds pass
2023-09-02 11:33:26 -04:00
update-phi.ll
…
urem64.ll
Reapply "[AMDGPU] Always lower s/udiv64 by constant to MUL" (#101942)
2024-08-12 09:00:22 +02:00
urem-seteq-illegal-types.ll
…
urem.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
use_restore_frame_reg.mir
[AMDGPU] Add pseudo instructions for SGPR spill to VGPR (#69923)
2023-10-27 17:24:10 +05:30
use-sgpr-multiple-times.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
usubo.ll
[AMDGPU] Codegen support for constrained multi-dword sloads (#96163)
2024-07-23 13:59:15 +05:30
usubsat.ll
…
v1i64-kernel-arg.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
v1024.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
v_add_u64_pseudo_sdwa.ll
[AMDGPU] Codegen support for constrained multi-dword sloads (#96163)
2024-07-23 13:59:15 +05:30
v_cmp_gfx11.ll
[AMDGPU] Remove -wavefrontsize32 and -wavefrontsize64 from GFX10+ tests (NFC) (#100711)
2024-07-26 00:42:24 -07:00
v_cndmask.ll
[AMDGPU][SILoadStoreOptimizer] Merge constrained sloads (#96162)
2024-07-23 13:50:42 +05:30
v_cvt_pk_u8_f32.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
v_mac_f16.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
v_mac.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
v_madak_f16.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
v_mov_b64_expand_and_shrink.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
v_mov_b64_expansion.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
v_pack.ll
[AMDGPU] Codegen support for constrained multi-dword sloads (#96163)
2024-07-23 13:59:15 +05:30
v_sat_pk_u8_i16.ll
[AMDGPU][SILoadStoreOptimizer] Merge constrained sloads (#96162)
2024-07-23 13:50:42 +05:30
v_sub_u64_pseudo_sdwa.ll
[AMDGPU] Codegen support for constrained multi-dword sloads (#96163)
2024-07-23 13:59:15 +05:30
v_swap_b16.ll
[AMDGPU][True16][CodeGen] support v_mov_b16 and v_swap_b16 in true16 format (#102198)
2024-08-08 16:52:59 -04:00
v_swap_b32.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
valu-i1.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
valu-mask-write-hazard.mir
AMDGPU: Regenerate baseline mir tests
2024-02-27 10:44:53 +05:30
vccz-corrupt-bug-workaround.mir
[AMDGPU] Remove -wavefrontsize32 and -wavefrontsize64 from GFX10+ tests (NFC) (#100711)
2024-07-26 00:42:24 -07:00
vcmp-saveexec-to-vcmpx-set-kill.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
vcmp-saveexec-to-vcmpx-wrong-kill-flags.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
vcmp-saveexec-to-vcmpx.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
vcmp-saveexec-to-vcmpx.mir
[AMDGPU] Remove -wavefrontsize32 and -wavefrontsize64 from GFX10+ tests (NFC) (#100711)
2024-07-26 00:42:24 -07:00
vcmpx-exec-war-hazard.mir
[AMDGPU] Remove -wavefrontsize32 and -wavefrontsize64 from GFX10+ tests (NFC) (#100711)
2024-07-26 00:42:24 -07:00
vcmpx-permlane16var-hazard.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
vcmpx-permlane-hazard-sdwa.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
vcmpx-permlane-hazard.mir
[AMDGPU] Handle V_PERMLANE64_B32 in fixVcmpxPermlaneHazards (#79125)
2024-01-23 13:10:58 +01:00
vector_rebroadcast.ll
[AMDGPU] Add tests for vector rebroadcast. (#91322)
2024-05-13 19:39:26 +01:00
vector_shuffle.packed.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
vector-alloca-addrspacecast.ll
…
vector-alloca-atomic.ll
…
vector-alloca-bitcast.ll
[AMDGPU] Fix typos in GCN-PROMOTE check prefix
2024-06-10 10:24:23 +01:00
vector-alloca-limits.ll
…
vector-alloca.ll
[AMDGPU] Remove duplicate -mtriple options in tests (#91576)
2024-05-09 10:59:25 +01:00
vector-extract-insert.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
vector-legalizer-divergence.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
vector-spill-restore-to-other-vector-type.mir
…
vectorize-buffer-fat-pointer.ll
[AMDGPU] - Add address space for strided buffers (#74471)
2023-12-15 15:49:25 +01:00
vectorize-global-local.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
vectorize-loads.ll
…
vectorize-unroll-metadata.ll
…
verifier-sdwa-cvt.mir
[CodeGen][NewPM] Port MachineVerifier to new pass manager (#98628)
2024-07-15 12:42:44 +08:00
verify-constant-bus-violations.mir
[AMDGPU] Remove -wavefrontsize32 and -wavefrontsize64 from GFX10+ tests (NFC) (#100711)
2024-07-26 00:42:24 -07:00
verify-ds-gws-align.mir
[CodeGen][NewPM] Port MachineVerifier to new pass manager (#98628)
2024-07-15 12:42:44 +08:00
verify-duplicate-literal.mir
[CodeGen][NewPM] Port MachineVerifier to new pass manager (#98628)
2024-07-15 12:42:44 +08:00
verify-gfx12-gds.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
verify-gfx90a-aligned-vgprs.mir
[CodeGen][NewPM] Port MachineVerifier to new pass manager (#98628)
2024-07-15 12:42:44 +08:00
verify-image-vaddr-align.mir
[CodeGen][NewPM] Port MachineVerifier to new pass manager (#98628)
2024-07-15 12:42:44 +08:00
verify-image.mir
[CodeGen][NewPM] Port MachineVerifier to new pass manager (#98628)
2024-07-15 12:42:44 +08:00
verify-scalar-store.mir
[CodeGen][NewPM] Port MachineVerifier to new pass manager (#98628)
2024-07-15 12:42:44 +08:00
verify-sop.mir
[CodeGen][NewPM] Port MachineVerifier to new pass manager (#98628)
2024-07-15 12:42:44 +08:00
verify-vimage-vsample.mir
[CodeGen][NewPM] Port MachineVerifier to new pass manager (#98628)
2024-07-15 12:42:44 +08:00
verify-vopd-gfx12.mir
[AMDGPU] Remove -wavefrontsize32 and -wavefrontsize64 from GFX10+ tests (NFC) (#100711)
2024-07-26 00:42:24 -07:00
verify-vopd.mir
[AMDGPU] Remove -wavefrontsize32 and -wavefrontsize64 from GFX10+ tests (NFC) (#100711)
2024-07-26 00:42:24 -07:00
vertex-fetch-encoding.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
vgpr_constant64_to_sgpr.mir
…
vgpr_constant_to_sgpr.ll
[AMDGPU] Use glue for convergence tokens at call-like operations (#86766)
2024-04-01 10:51:13 +05:30
vgpr-agpr-limit-gfx90a.ll
AMDGPU: Infer no-agpr usage in AMDGPUAttributor (#85948)
2024-03-21 14:24:06 +05:30
vgpr-descriptor-waterfall-loop-idom-update.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
vgpr-large-tuple-alloc-error.ll
[AMDGPU] Pick available high VGPR for CSR SGPR spilling (#78669)
2024-01-24 07:08:43 +05:30
vgpr-liverange-ir.ll
[AMDGPU] Codegen support for constrained multi-dword sloads (#96163)
2024-07-23 13:59:15 +05:30
vgpr-liverange.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
vgpr-mark-last-scratch-load.ll
AMDGPU/GFX12: Insert waitcnts before stores with scope_sys (#82996)
2024-02-28 16:18:04 +01:00
vgpr-mark-last-scratch-load.mir
[AMDGPU] Fix test for expensive-checks build (#78687)
2024-01-19 11:32:02 +01:00
vgpr-remat.mir
AMDGPU: Regenerate baseline mir tests
2024-02-27 10:44:53 +05:30
vgpr-spill-dead-frame-in-dbg-value.mir
…
vgpr-spill-emergency-stack-slot-compute.ll
[AMDGPU] Remove repeated -mtriple options from RUN lines (#66486)
2023-09-15 11:29:24 +01:00
vgpr-spill-emergency-stack-slot.ll
[AMDGPU] Don't fix the scavenge slot at offset 0 (#79136)
2024-02-09 09:20:25 +01:00
vgpr-spill-fi-skip-processing-stack-arg-dbg-value.mir
…
vgpr-spill-placement-issue61083.ll
AMDGPU/GlobalISel: Partially move constant selection to patterns (#100786)
2024-07-30 18:18:16 +04:00
vgpr-spill-scc-clobber.mir
AMDGPU: Regenerate baseline mir tests
2024-02-27 10:44:53 +05:30
vgpr-spill.mir
…
vgpr-tuple-allocation.ll
[AMDGPU] Pick available high VGPR for CSR SGPR spilling (#78669)
2024-01-24 07:08:43 +05:30
vi-removed-intrinsics.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
virtregrewrite-undef-identity-copy.mir
Reapply "Move assertion for AdjustsStack from PEI to MachineVerifier (#85698)"
2024-03-21 20:24:57 -04:00
visit-physreg-vgpr-imm-folding-bug.ll
…
vmem-to-salu-hazard.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
vmem-vcc-hazard.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
vni8-across-blocks.ll
[AMDGPU] Codegen support for constrained multi-dword sloads (#96163)
2024-07-23 13:59:15 +05:30
vni8-live-reg-opt.ll
[AMDGPU] Reland: Do not use original PHIs in coercion chains
2024-07-19 09:02:28 -07:00
vop-shrink-frame-index.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
vop-shrink-non-ssa.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
vop-shrink.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
vopc_dpp.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
vopc_dpp.mir
[AMDGPU] Fix implicit $vcc operands after parsing MIR (#87781)
2024-04-09 09:10:45 +01:00
vopd-combine.mir
[AMDGPU] Add VOPD combine dependency tests. NFC. (#104841)
2024-08-19 15:43:27 -07:00
vopd-src2acc-delay.mir
[AMDGPU] Introduce a pseudo mnemonic for S_DELAY_ALU in MIR. (#96004)
2024-06-20 15:59:08 -04:00
vselect64.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
vselect.ll
[AMDGPU] Regenerate vselect.ll
2024-07-31 10:27:33 +01:00
vtx-fetch-branch.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
vtx-schedule.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
wait-before-stores-with-scope_sys.ll
[AMDGPU,test] Change llc -march= to -mtriple=
2024-03-07 19:09:18 -08:00
wait-before-stores-with-scope_sys.mir
AMDGPU/GFX12: Insert waitcnts before stores with scope_sys (#82996)
2024-02-28 16:18:04 +01:00
wait.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
waitcnt-agpr.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
waitcnt-back-edge-loop.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
waitcnt-bvh.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
waitcnt-debug.mir
[DebugCounter] Add support for non-continous ranges. (#89470)
2024-05-28 12:40:39 +02:00
waitcnt-flat.ll
…
waitcnt-global-inv-wb.mir
[AMDGPU] CodeGen for GFX12 S_WAIT_* instructions (#77438)
2024-01-18 10:47:45 +00:00
waitcnt-loop-irreducible.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
waitcnt-loop-single-basic-block.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
waitcnt-looptest.ll
…
waitcnt-meta-instructions.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
waitcnt-multiple-funcs.mir
[AMDGPU] Clear load addresses between functions (#102515)
2024-08-08 21:26:17 +02:00
waitcnt-no-redundant.mir
[AMDGPU][SIInsertWaitcnts] Do not add s_waitcnt when the counters are known to be 0 already (#72830)
2023-12-15 12:33:32 +01:00
waitcnt-overflow.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
waitcnt-permute.mir
…
waitcnt-preexisting-vscnt.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
waitcnt-preexisting.mir
AMDGPU/gfx12: avoid crashing on legacy waitcnt intrinsics (#92306)
2024-05-15 22:23:18 +02:00
waitcnt-sample-waw.mir
[AMDGPU] Fix image_msaa_load waitcnt insertion for pre-gfx12 (#90710)
2024-05-01 11:37:57 +01:00
waitcnt-skip-meta.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
waitcnt-vinterp.mir
AMDGPU: Regenerate baseline mir tests
2024-02-27 10:44:53 +05:30
waitcnt-vmcnt-loop.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
waitcnt-vmem-waw.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
waitcnt-vscnt.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
waitcnt-vscnt.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
waitcnt.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
waterfall_kills_scc.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
wave32.ll
[AMDGPU] Codegen support for constrained multi-dword sloads (#96163)
2024-07-23 13:59:15 +05:30
wave_dispatch_regs.ll
[Support][YamlTraits] Add quoting for keys in textual YAML representation (#88763)
2024-04-29 15:37:42 +02:00
while-break.ll
Revert "StructurizeCFG: Optimize phi insertion during ssa reconstruction (#101301)"
2024-08-08 11:59:39 -04:00
whole-wave-register-copy.ll
[AMDGPU] Convert PrologEpilogSGPRSpills from DenseMap to sorted vector (#90957)
2024-05-03 13:42:40 +01:00
whole-wave-register-spill.ll
[AMDGPU] Convert PrologEpilogSGPRSpills from DenseMap to sorted vector (#90957)
2024-05-03 13:42:40 +01:00
widen_extending_scalar_loads.ll
…
widen-smrd-loads.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
widen-vselect-and-mask.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
wmma_modifiers.ll
[AMDGPU] Remove -wavefrontsize32 and -wavefrontsize64 from GFX10+ tests (NFC) (#100711)
2024-07-26 00:42:24 -07:00
wmma_multiple_32.ll
[AMDGPU] Remove -wavefrontsize32 and -wavefrontsize64 from GFX10+ tests (NFC) (#100711)
2024-07-26 00:42:24 -07:00
wmma_multiple_64.ll
[AMDGPU] Remove -wavefrontsize32 and -wavefrontsize64 from GFX10+ tests (NFC) (#100711)
2024-07-26 00:42:24 -07:00
wmma-gfx12-w32-f16-f32-matrix-modifiers.ll
[AMDGPU,test] Change llc -march= to -mtriple=
2024-03-07 19:09:18 -08:00
wmma-gfx12-w32-imm.ll
[AMDGPU] Replace isInlinableLiteral16 with specific version (#84402)
2024-03-08 14:49:52 -05:00
wmma-gfx12-w32-iu-modifiers.ll
[AMDGPU,test] Change llc -march= to -mtriple=
2024-03-07 19:09:18 -08:00
wmma-gfx12-w32-swmmac-index_key.ll
[AMDGPU,test] Change llc -march= to -mtriple=
2024-03-07 19:09:18 -08:00
wmma-gfx12-w32.ll
[AMDGPU,test] Change llc -march= to -mtriple=
2024-03-07 19:09:18 -08:00
wmma-gfx12-w64-f16-f32-matrix-modifiers.ll
[AMDGPU] Remove -wavefrontsize32 and -wavefrontsize64 from GFX10+ tests (NFC) (#100711)
2024-07-26 00:42:24 -07:00
wmma-gfx12-w64-imm.ll
[AMDGPU] Remove -wavefrontsize32 and -wavefrontsize64 from GFX10+ tests (NFC) (#100711)
2024-07-26 00:42:24 -07:00
wmma-gfx12-w64-iu-modifiers.ll
[AMDGPU] Remove -wavefrontsize32 and -wavefrontsize64 from GFX10+ tests (NFC) (#100711)
2024-07-26 00:42:24 -07:00
wmma-gfx12-w64-swmmac-index_key.ll
[AMDGPU] Remove -wavefrontsize32 and -wavefrontsize64 from GFX10+ tests (NFC) (#100711)
2024-07-26 00:42:24 -07:00
wmma-gfx12-w64.ll
[AMDGPU] Remove -wavefrontsize32 and -wavefrontsize64 from GFX10+ tests (NFC) (#100711)
2024-07-26 00:42:24 -07:00
wmma-hazards-gfx12-w32.mir
[AMDGPU,test] Change llc -march= to -mtriple=
2024-03-07 19:09:18 -08:00
wmma-hazards-gfx12-w64.mir
[AMDGPU] Remove -wavefrontsize32 and -wavefrontsize64 from GFX10+ tests (NFC) (#100711)
2024-07-26 00:42:24 -07:00
wmma-hazards.mir
AMDGPU: update GFX11 wmma hazards (#76143)
2024-01-24 12:00:35 +01:00
workgroup-id-in-arch-sgprs.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
wqm-gfx11.ll
[test] Remove immarg parameter attribute from calls (#97432)
2024-07-03 09:02:31 +01:00
wqm-terminators.mir
AMDGPU: Regenerate baseline mir tests
2024-02-27 10:44:53 +05:30
wqm.ll
[AMDGPU] SIWholeQuadMode: avoid execz effects in exact regions (#101157)
2024-08-01 18:46:36 +09:00
wqm.mir
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
write_register.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
write-register-vgpr-into-sgpr.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
wrong-transalu-pos-fix.ll
[AMDGPU] Remove duplicate -mtriple options in tests (#91576)
2024-05-09 10:59:25 +01:00
wwm-reserved-spill.ll
[AMDGPU] Use glue for convergence tokens at call-like operations (#86766)
2024-04-01 10:51:13 +05:30
wwm-reserved.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
wwm-spill-superclass-pseudo.mir
[AMDGPU] Support wwm-reg AV spill pseudos
2023-08-17 20:04:18 +05:30
xfail.r600.bitcast.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
xnack-subtarget-feature-any.ll
[AMDGPU] Split GCNSubtarget into its own file. NFC. (#105525)
2024-08-21 19:11:02 +01:00
xnack-subtarget-feature-disabled.ll
[AMDGPU] Split GCNSubtarget into its own file. NFC. (#105525)
2024-08-21 19:11:02 +01:00
xnack-subtarget-feature-enabled.ll
[AMDGPU] Split GCNSubtarget into its own file. NFC. (#105525)
2024-08-21 19:11:02 +01:00
xnor.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
xor3-i1-const.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
xor3.ll
…
xor_add.ll
…
xor-r600.ll
[AMDGPU] Auto-generated some lit test patterns (NFC). (#94310)
2024-06-07 09:07:11 +05:30
xor.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
zero_extend.ll
[AMDGPU] Codegen support for constrained multi-dword sloads (#96163)
2024-07-23 13:59:15 +05:30
zext-divergence-driven-isel.ll
Reapply "AMDGPU: Move attributor into optimization pipeline (#83131)" and follow up commit "clang/AMDGPU: Defeat attribute optimization in attribute test" (#98851)
2024-07-15 11:51:44 +04:00
zext-i64-bit-operand.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00
zext-lid.ll
[AMDGPU,test] Change llc -march= to -mtriple= (#75982)
2024-01-16 21:54:58 -08:00

README 

+==============================================================================+
| How to organize the lit tests                                                |
+==============================================================================+

- If you write a test for matching a single DAG opcode or intrinsic, it should
  go in a file called {opcode_name,intrinsic_name}.ll (e.g. fadd.ll)

- If you write a test that matches several DAG opcodes and checks for a single
  ISA instruction, then that test should go in a file called {ISA_name}.ll (e.g.
  bfi_int.ll

- For all other tests, use your best judgement for organizing tests and naming
  the files.

+==============================================================================+
| Naming conventions                                                           |
+==============================================================================+

- Use dash '-' and not underscore '_' to separate words in file names, unless
  the file is named after a DAG opcode or ISA instruction that has an
  underscore '_' in its name.