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llvm-project/llvm/test/CodeGen/X86
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Simon Pilgrim c96d0da62b
[X86] lowerShuffleAsLanePermuteAndPermute - ensure we've simplified the demanded shuffle mask elts before testing for a matching shuffle (#153554) 
When lowering using sublane shuffles, we can sometimes end up with the
same mask as we started with. We already bail in these occasions, but we
weren't fully simplifying the new shuffle mask before testing if it
matched.

Fixes #153457
2025-08-14 10:47:11 +01:00
..
AMX
MC: Centralize X86 PC-relative fixup adjustment in MCAssembler
2025-07-08 09:22:30 -07:00
apx
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
avx512-shuffles
[X86] shuffle-blend.ll - regenerate test checks
2025-06-15 17:43:58 +01:00
GC
[CodeGen] Clean up tests that depend on implicit .text in MCAsmStreamer
2024-12-22 21:11:32 -08:00
GlobalISel
[IR] Introduce the ptrtoaddr instruction
2025-08-08 10:12:39 -07:00
Inputs
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3addr-16bit.ll
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3addr-or.ll
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4char-promote.ll
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8bit_cmov_of_trunc_promotion.ll
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64-bit-shift-by-32-minus-y.ll
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2003-08-03-CallArgLiveRanges.ll
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2003-08-23-DeadBlockTest.ll
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2003-11-03-GlobalBool.ll
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2004-02-13-FrameReturnAddress.ll
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2004-02-14-InefficientStackPointer.ll
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2004-02-22-Casts.ll
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2004-03-30-Select-Max.ll
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2004-04-13-FPCMOV-Crash.ll
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2004-06-10-StackifierCrash.ll
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2004-10-08-SelectSetCCFold.ll
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2005-01-17-CycleInDAG.ll
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2005-02-14-IllegalAssembler.ll
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2005-05-08-FPStackifierPHI.ll
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2006-01-19-ISelFoldingBug.ll
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2006-03-01-InstrSchedBug.ll
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2006-03-02-InstrSchedBug.ll
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2006-04-04-CrossBlockCrash.ll
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2006-04-27-ISelFoldingBug.ll
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2006-05-01-SchedCausingSpills.ll
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2006-05-02-InstrSched1.ll
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2006-05-02-InstrSched2.ll
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2006-05-08-CoalesceSubRegClass.ll
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2006-05-08-InstrSched.ll
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2006-05-11-InstrSched.ll
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2006-05-17-VectorArg.ll
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2006-05-22-FPSetEQ.ll
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2006-05-25-CycleInDAG.ll
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2006-07-10-InlineAsmAConstraint.ll
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2006-07-12-InlineAsmQConstraint.ll
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2006-07-20-InlineAsm.ll
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2006-07-28-AsmPrint-Long-As-Pointer.ll
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2006-07-31-SingleRegClass.ll
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2006-08-07-CycleInDAG.ll
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2006-08-16-CycleInDAG.ll
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2006-08-21-ExtraMovInst.ll
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2006-09-01-CycleInDAG.ll
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2006-10-02-BoolRetCrash.ll
[test] Change llc -march= to -mtriple=
2024-12-15 13:08:02 -08:00
2006-10-09-CycleInDAG.ll
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2006-10-10-FindModifiedNodeSlotBug.ll
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2006-10-12-CycleInDAG.ll
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2006-10-13-CycleInDAG.ll
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2006-10-19-SwitchUnnecessaryBranching.ll
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2006-11-12-CSRetCC.ll
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2006-11-17-IllegalMove.ll
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2006-11-27-SelectLegalize.ll
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2006-12-16-InlineAsmCrash.ll
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2006-12-19-IntelSyntax.ll
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2007-01-08-InstrSched.ll
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2007-01-08-X86-64-Pointer.ll
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2007-01-13-StackPtrIndex.ll
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2007-01-29-InlineAsm-ir.ll
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2007-02-04-OrAddrMode.ll
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2007-02-16-BranchFold.ll
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2007-02-19-LiveIntervalAssert.ll
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2007-02-23-DAGCombine-Miscompile.ll
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2007-02-25-FastCCStack.ll
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2007-03-01-SpillerCrash.ll
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2007-03-15-GEP-Idx-Sink.ll
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2007-03-16-InlineAsm.ll
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2007-03-18-LiveIntervalAssert.ll
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2007-03-24-InlineAsmMultiRegConstraint.ll
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2007-03-24-InlineAsmPModifier.ll
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2007-03-24-InlineAsmVectorOp.ll
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2007-03-24-InlineAsmXConstraint.ll
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2007-03-26-CoalescerBug.ll
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2007-04-08-InlineAsmCrash.ll
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2007-04-11-InlineAsmVectorResult.ll
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2007-04-17-LiveIntervalAssert.ll
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2007-04-24-Huge-Stack.ll
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2007-04-24-VectorCrash.ll
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2007-04-27-InlineAsm-IntMemInput.ll
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2007-05-05-Personality.ll
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2007-05-05-VecCastExpand.ll
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2007-05-14-LiveIntervalAssert.ll
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2007-05-15-maskmovq.ll
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2007-05-17-ShuffleISelBug.ll
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2007-06-04-X86-64-CtorAsmBugs.ll
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2007-06-28-X86-64-isel.ll
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2007-06-29-DAGCombinerBug.ll
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2007-06-29-VecFPConstantCSEBug.ll
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2007-07-03-GR64ToVR64.ll
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2007-07-10-StackerAssert.ll
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2007-07-18-Vector-Extract.ll
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2007-08-01-LiveVariablesBug.ll
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2007-08-09-IllegalX86-64Asm.ll
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2007-08-10-SignExtSubreg.ll
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2007-09-05-InvalidAsm.ll
…
2007-09-06-ExtWeakAliasee.ll
Introduce MCAsmInfo::UsesSetToEquateSymbol and prefer = to .set
2025-06-11 22:19:31 -07:00
2007-09-27-LDIntrinsics.ll
properly align long double on i386 darwin (#148102)
2025-07-11 12:17:43 +08:00
2007-10-04-AvoidEFLAGSCopy.ll
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2007-10-12-CoalesceExtSubReg.ll
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2007-10-12-SpillerUnfold1.ll
…
2007-10-12-SpillerUnfold2.ll
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2007-10-14-CoalescerCrash.ll
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2007-10-15-CoalescerCrash.ll
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2007-10-16-CoalescerCrash.ll
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2007-10-19-SpillerUnfold.ll
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2007-10-29-ExtendSetCC.ll
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2007-10-30-LSRCrash.ll
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2007-10-31-extractelement-i64.ll
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2007-11-01-ISelCrash.ll
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2007-11-03-x86-64-q-constraint.ll
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2007-11-04-LiveIntervalCrash.ll
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2007-11-04-LiveVariablesBug.ll
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2007-11-04-rip-immediate-constant.ll
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2007-11-06-InstrSched.ll
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2007-11-07-MulBy4.ll
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2007-11-30-LoadFolding-Bug.ll
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2007-12-16-BURRSchedCrash.ll
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2007-12-18-LoadCSEBug.ll
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2008-01-08-IllegalCMP.ll
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2008-01-08-SchedulerCrash.ll
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2008-01-09-LongDoubleSin.ll
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2008-01-16-FPStackifierAssert.ll
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2008-01-16-InvalidDAGCombineXform.ll
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2008-02-05-ISelCrash.ll
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2008-02-06-LoadFoldingBug.ll
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2008-02-14-BitMiscompile.ll
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2008-02-18-TailMergingBug.ll
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2008-02-20-InlineAsmClobber.ll
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2008-02-22-LocalRegAllocBug.ll
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2008-02-25-InlineAsmBug.ll
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2008-02-25-X86-64-CoalescerBug.ll
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2008-02-26-AsmDirectMemOp.ll
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2008-02-27-DeadSlotElimBug.ll
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2008-02-27-PEICrash.ll
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2008-03-06-frem-fpstack.ll
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2008-03-07-APIntBug.ll
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2008-03-10-RegAllocInfLoop.ll
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2008-03-12-ThreadLocalAlias.ll
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2008-03-13-TwoAddrPassCrash.ll
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2008-03-14-SpillerCrash.ll
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2008-03-19-DAGCombinerBug.ll
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2008-03-23-DarwinAsmComments.ll
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2008-03-25-TwoAddrPassBug.ll
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2008-03-31-SpillerFoldingBug.ll
…
2008-04-02-unnamedEH.ll
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2008-04-08-CoalescerCrash.ll
…
2008-04-09-BranchFolding.ll
…
2008-04-15-LiveVariableBug.ll
…
2008-04-16-CoalescerBug.ll
…
2008-04-16-ReMatBug.ll
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2008-04-17-CoalescerBug.ll
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2008-04-24-MemCpyBug.ll
…
2008-04-24-pblendw-fold-crash.ll
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2008-04-26-Asm-Optimize-Imm.ll
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2008-04-28-CoalescerBug.ll
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2008-04-28-CyclicSchedUnit.ll
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2008-05-01-InvalidOrdCompare.ll
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2008-05-09-PHIElimBug.ll
…
2008-05-09-ShuffleLoweringBug.ll
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2008-05-12-tailmerge-5.ll
…
2008-05-21-CoalescerBug.ll
…
2008-05-22-FoldUnalignedLoad.ll
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2008-05-28-CoalescerBug.ll
…
2008-05-28-LocalRegAllocBug.ll
…
2008-06-13-NotVolatileLoadStore.ll
…
2008-06-13-VolatileLoadStore.ll
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2008-06-16-SubregsBug.ll
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2008-06-25-VecISelBug.ll
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2008-07-07-DanglingDeadInsts.ll
…
2008-07-09-ELFSectionAttributes.ll
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2008-07-11-SHLBy1.ll
…
2008-07-16-CoalescerCrash.ll
…
2008-07-19-movups-spills.ll
…
2008-07-22-CombinerCrash.ll
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2008-07-23-VSetCC.ll
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2008-08-06-CmpStride.ll
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2008-08-06-RewriterBug.ll
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2008-08-17-UComiCodeGenBug.ll
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2008-08-23-64Bit-maskmovq.ll
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2008-08-31-EH_RETURN32.ll
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2008-08-31-EH_RETURN64.ll
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2008-09-05-sinttofp-2xi32.ll
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2008-09-09-LinearScanBug.ll
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2008-09-11-CoalescerBug2.ll
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2008-09-11-CoalescerBug.ll
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2008-09-17-inline-asm-1.ll
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2008-09-18-inline-asm-2.ll
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2008-09-19-RegAllocBug.ll
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2008-09-25-sseregparm-1.ll
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2008-09-26-FrameAddrBug.ll
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2008-09-29-ReMatBug.ll
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2008-09-29-VolatileBug.ll
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2008-10-06-x87ld-nan-1.ll
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2008-10-06-x87ld-nan-2.ll
…
2008-10-07-SSEISelBug.ll
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2008-10-11-CallCrash.ll
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2008-10-13-CoalescerBug.ll
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2008-10-16-VecUnaryOp.ll
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2008-10-17-Asm64bitRConstraint.ll
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2008-10-20-AsmDoubleInI32.ll
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2008-10-24-FlippedCompare.ll
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2008-10-27-CoalescerBug.ll
…
2008-10-29-ExpandVAARG.ll
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2008-11-03-F80VAARG.ll
…
2008-11-06-testb.ll
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2008-11-13-inlineasm-3.ll
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2008-11-29-ULT-Sign.ll
…
2008-12-01-loop-iv-used-outside-loop.ll
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2008-12-01-SpillerAssert.ll
…
2008-12-02-dagcombine-1.ll
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2008-12-02-dagcombine-2.ll
…
2008-12-02-dagcombine-3.ll
…
2008-12-02-IllegalResultType.ll
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2008-12-16-dagcombine-4.ll
…
2008-12-19-EarlyClobberBug.ll
…
2008-12-22-dagcombine-5.ll
…
2008-12-23-crazy-address.ll
…
2008-12-23-dagcombine-6.ll
…
2009-01-13-DoubleUpdate.ll
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2009-01-16-SchedulerBug.ll
…
2009-01-16-UIntToFP.ll
…
2009-01-18-ConstantExprCrash.ll
…
2009-01-25-NoSSE.ll
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2009-01-26-WrongCheck.ll
…
2009-01-27-NullStrings.ll
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2009-01-31-BigShift2.ll
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2009-01-31-BigShift3.ll
…
2009-01-31-BigShift.ll
…
2009-02-01-LargeMask.ll
…
2009-02-03-AnalyzedTwice.ll
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2009-02-04-sext-i64-gep.ll
…
2009-02-08-CoalescerBug.ll
…
2009-02-09-ivs-different-sizes.ll
…
2009-02-11-codegenprepare-reuse.ll
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2009-02-12-DebugInfoVLA.ll
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2009-02-12-InlineAsm-nieZ-constraints.ll
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2009-02-12-SpillerBug.ll
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2009-02-21-ExtWeakInitializer.ll
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2009-02-25-CommuteBug.ll
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2009-02-26-MachineLICMBug.ll
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2009-03-03-BitcastLongDouble.ll
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2009-03-03-BTHang.ll
…
2009-03-05-burr-list-crash.ll
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2009-03-09-APIntCrash.ll
…
2009-03-09-SpillerBug.ll
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2009-03-10-CoalescerBug.ll
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2009-03-12-CPAlignBug.ll
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2009-03-13-PHIElimBug.ll
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2009-03-16-PHIElimInLPad.ll
…
2009-03-23-LinearScanBug.ll
…
2009-03-23-MultiUseSched.ll
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2009-03-25-TestBug.ll
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2009-03-26-NoImplicitFPBug.ll
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2009-04-12-FastIselOverflowCrash.ll
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2009-04-12-picrel.ll
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2009-04-13-2AddrAssert-2.ll
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2009-04-13-2AddrAssert.ll
…
2009-04-14-IllegalRegs.ll
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2009-04-16-SpillerUnfold.ll
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2009-04-24.ll
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2009-04-25-CoalescerBug.ll
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2009-04-27-CoalescerAssert.ll
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2009-04-27-LiveIntervalsAssert2.ll
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2009-04-27-LiveIntervalsAssert.ll
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2009-04-29-IndirectDestOperands.ll
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2009-04-29-LinearScanBug.ll
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2009-04-29-RegAllocAssert.ll
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2009-04-scale.ll
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2009-05-08-InlineAsmIOffset.ll
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2009-05-11-tailmerge-crash.ll
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2009-05-19-SingleElementExtractElement.ll
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2009-05-23-available_externally.ll
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2009-05-23-dagcombine-shifts.ll
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2009-05-28-DAGCombineCrash.ll
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2009-05-30-ISelBug.ll
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2009-06-02-RewriterBug.ll
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2009-06-03-Win64DisableRedZone.ll
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2009-06-03-Win64SpillXMM.ll
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2009-06-04-VirtualLiveIn.ll
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2009-06-05-sitofpCrash.ll
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2009-06-05-VariableIndexInsert.ll
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2009-06-05-VZextByteShort.ll
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2009-06-06-ConcatVectors.ll
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2009-06-12-x86_64-tail-call-conv-out-of-sync-bug.ll
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2009-06-15-not-a-tail-call.ll
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2009-06-18-movlp-shuffle-register.ll
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2009-07-06-TwoAddrAssert.ll
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2009-07-07-SplitICmp.ll
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2009-07-09-ExtractBoolFromVector.ll
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2009-07-15-CoalescerBug.ll
…
2009-07-16-CoalescerBug.ll
…
2009-07-19-AsmExtraOperands.ll
…
2009-07-20-CoalescerBug.ll
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2009-07-20-DAGCombineBug.ll
…
2009-08-06-branchfolder-crash.ll
…
2009-08-06-inlineasm.ll
…
2009-08-08-CastError.ll
…
2009-08-12-badswitch.ll
Introduce MCAsmInfo::UsesSetToEquateSymbol and prefer = to .set
2025-06-11 22:19:31 -07:00
2009-08-14-Win64MemoryIndirectArg.ll
…
2009-08-19-LoadNarrowingMiscompile.ll
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2009-08-23-SubRegReuseUndo.ll
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2009-09-10-LoadFoldingBug.ll
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2009-09-10-SpillComments.ll
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2009-09-16-CoalescerBug.ll
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2009-09-19-earlyclobber.ll
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2009-09-21-NoSpillLoopCount.ll
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2009-09-22-CoalescerBug.ll
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2009-09-23-LiveVariablesBug.ll
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2009-10-14-LiveVariablesBug.ll
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2009-10-16-Scope.ll
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2009-10-19-atomic-cmp-eflags.ll
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2009-10-19-EmergencySpill.ll
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2009-10-25-RewriterBug.ll
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2009-11-04-SubregCoalescingBug.ll
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2009-11-13-VirtRegRewriterBug.ll
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2009-11-16-MachineLICM.ll
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2009-11-16-UnfoldMemOpBug.ll
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2009-11-17-UpdateTerminator.ll
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2009-11-18-TwoAddrKill.ll
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2009-11-25-ImpDefBug.ll
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2009-12-01-EarlyClobberBug.ll
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2009-12-11-TLSNoRedZone.ll
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2010-01-05-ZExt-Shl.ll
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2010-01-07-ISelBug.ll
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2010-01-08-Atomic64Bug.ll
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2010-01-11-ExtraPHIArg.ll
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2010-01-13-OptExtBug.ll
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2010-01-15-SelectionDAGCycle.ll
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2010-01-18-DbgValue.ll
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2010-01-19-OptExtBug.ll
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2010-02-01-DbgValueCrash.ll
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2010-02-01-TaillCallCrash.ll
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2010-02-03-DualUndef.ll
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2010-02-04-SchedulerBug.ll
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2010-02-11-NonTemporal.ll
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2010-02-12-CoalescerBug-Impdef.ll
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2010-02-15-ImplicitDefBug.ll
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2010-02-19-TailCallRetAddrBug.ll
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2010-02-23-DAGCombineBug.ll
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2010-02-23-DIV8rDefinesAX.ll
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2010-02-23-RematImplicitSubreg.ll
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2010-02-23-SingleDefPhiJoin.ll
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2010-03-04-Mul8Bug.ll
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2010-03-05-ConstantFoldCFG.ll
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2010-03-05-EFLAGS-Redef.ll
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2010-03-17-ISelBug.ll
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2010-04-06-SSEDomainFixCrash.ll
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2010-04-08-CoalescerBug.ll
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2010-04-13-AnalyzeBranchCrash.ll
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2010-04-21-CoalescerBug.ll
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2010-04-29-CoalescerCrash.ll
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2010-04-30-LocalAlloc-LandingPad.ll
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2010-05-03-CoalescerSubRegClobber.ll
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2010-05-05-LocalAllocEarlyClobber.ll
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2010-05-06-LocalInlineAsmClobber.ll
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2010-05-07-ldconvert.ll
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2010-05-10-DAGCombinerBug.ll
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2010-05-12-FastAllocKills.ll
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2010-05-16-nosseconversion.ll
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2010-05-25-DotDebugLoc.ll
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2010-05-26-DotDebugLoc.ll
Introduce MCAsmInfo::UsesSetToEquateSymbol and prefer = to .set
2025-06-11 22:19:31 -07:00
2010-05-26-FP_TO_INT-crash.ll
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2010-05-28-Crash.ll
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2010-06-01-DeadArg-DbgInfo.ll
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2010-06-09-FastAllocRegisters.ll
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2010-06-14-fast-isel-fs-load.ll
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2010-06-15-FastAllocEarlyCLobber.ll
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2010-06-24-g-constraint-crash.ll
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2010-06-25-asm-RA-crash.ll
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2010-06-25-CoalescerSubRegDefDead.ll
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2010-06-28-FastAllocTiedOperand.ll
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2010-06-28-matched-g-constraint.ll
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2010-07-02-asm-alignstack.ll
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2010-07-02-UnfoldBug.ll
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2010-07-06-DbgCrash.ll
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2010-07-11-FPStackLoneUse.ll
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2010-07-13-indirectXconstraint.ll
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2010-07-15-Crash.ll
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2010-07-29-SetccSimplify.ll
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2010-08-04-MaskedSignedCompare.ll
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2010-08-04-MingWCrash.ll
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2010-08-04-StackVariable.ll
[RemoveDIs] Remove "try-debuginfo-iterators..." test flags (#130298)
2025-03-14 15:50:49 +00:00
2010-09-01-RemoveCopyByCommutingDef.ll
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2010-09-16-asmcrash.ll
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2010-09-16-EmptyFilename.ll
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2010-09-17-SideEffectsInChain.ll
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2010-09-30-CMOV-JumpTable-PHI.ll
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2010-10-08-cmpxchg8b.ll
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2010-11-02-DbgParameter.ll
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2010-11-09-MOVLPS.ll
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2010-11-18-SelectOfExtload.ll
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2011-01-07-LegalizeTypesCrash.ll
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2011-01-10-DagCombineHang.ll
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2011-01-24-DbgValue-Before-Use.ll
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2011-02-04-FastRegallocNoFP.ll
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2011-02-12-shuffle.ll
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2011-02-21-VirtRegRewriter-KillSubReg.ll
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2011-02-23-UnfoldBug.ll
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2011-02-27-Fpextend.ll
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2011-03-02-DAGCombiner.ll
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2011-03-08-Sched-crash.ll
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2011-03-09-Physreg-Coalescing.ll
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2011-03-30-CreateFixedObjCrash.ll
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2011-04-13-SchedCmpJmp.ll
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2011-04-19-sclr-bb.ll
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2011-05-09-loaduse.ll
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2011-05-26-UnreachableBlockElim.ll
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2011-05-27-CrossClassCoalescing.ll
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2011-06-01-fildll.ll
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2011-06-03-x87chain.ll
[llvm] Remove br i1 undef from CodeGen/X86 tests (#121733)
2025-01-06 08:43:39 +00:00
2011-06-06-fgetsign80bit.ll
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2011-06-12-FastAllocSpill.ll
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2011-06-14-mmx-inlineasm.ll
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2011-06-14-PreschedRegalias.ll
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2011-06-19-QuicksortCoalescerBug.ll
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2011-07-13-BadFrameIndexDisplacement.ll
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2011-08-23-PerformSubCombine128.ll
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2011-08-23-Trampoline.ll
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2011-08-29-BlockConstant.ll
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2011-08-29-InitOrder.ll
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2011-09-14-valcoalesce.ll
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2011-09-18-sse2cmp.ll
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2011-09-21-setcc-bug.ll
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2011-10-11-SpillDead.ll
…
2011-10-11-srl.ll
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2011-10-12-MachineCSE.ll
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2011-10-18-FastISel-VectorParams.ll
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2011-10-19-LegelizeLoad.ll
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2011-10-19-widen_vselect.ll
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2011-10-21-widen-cmp.ll
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2011-10-27-tstore.ll
[X86] 2011-10-27-tstore.ll - regenerate checks
2025-02-12 17:19:19 +00:00
2011-10-30-padd.ll
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2011-11-07-LegalizeBuildVector.ll
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2011-11-22-AVX2-Domains.ll
…
2011-11-30-or.ll
…
2011-12-8-bitcastintprom.ll
…
2011-12-06-AVXVectorExtractCombine.ll
…
2011-12-06-BitcastVectorGlobal.ll
…
2011-12-08-AVXISelBugs.ll
…
2011-12-15-vec_shift.ll
…
2011-12-26-extractelement-duplicate-load.ll
…
2011-12-28-vselecti8.ll
…
2011-20-21-zext-ui2fp.ll
…
2012-1-10-buildvector.ll
…
2012-01-10-UndefExceptionEdge.ll
[PHIElimination] Revert #131837 #146320 #146337 (#146850)
2025-07-03 07:48:08 -04:00
2012-01-11-split-cv.ll
…
2012-01-12-extract-sv.ll
[X86] Use X86FixupInstTunings to select between (V)MOVSS/D and (V)BLENDPS/D (#143895)
2025-06-12 18:08:07 +01:00
2012-01-16-mfence-nosse-flags.ll
…
2012-01-18-vbitcast.ll
…
2012-02-12-dagco.ll
…
2012-02-14-scalar.ll
…
2012-02-23-mmx-inlineasm.ll
…
2012-02-29-CoalescerBug.ll
…
2012-03-15-build_vector_wl.ll
…
2012-03-26-PostRALICMBug.ll
…
2012-04-09-TwoAddrPassBug.ll
…
2012-04-26-sdglue.ll
…
2012-05-17-TwoAddressBug.ll
…
2012-05-19-CoalescerCrash.ll
…
2012-07-10-extload64.ll
…
2012-07-10-shufnorm.ll
…
2012-07-15-broadcastfold.ll
…
2012-07-15-BuildVectorPromote.ll
…
2012-07-15-tconst_shl.ll
…
2012-07-15-vshl.ll
…
2012-07-16-fp2ui-i1.ll
…
2012-07-16-LeaUndef.ll
…
2012-07-17-vtrunc.ll
…
2012-07-23-select_cc.ll
…
2012-08-07-CmpISelBug.ll
…
2012-08-16-setcc.ll
…
2012-08-17-legalizer-crash.ll
…
2012-08-28-UnsafeMathCrash.ll
…
2012-09-13-dagco-fneg.ll
…
2012-09-28-CGPBug.ll
…
2012-10-02-DAGCycle.ll
…
2012-10-03-DAGCycle.ll
…
2012-10-18-crash-dagco.ll
…
2012-11-28-merge-store-alias.ll
…
2012-12-1-merge-multiple.ll
…
2012-12-12-DAGCombineCrash.ll
…
2012-12-14-v8fp80-crash.ll
…
2012-12-19-NoImplicitFloat.ll
…
2013-01-09-DAGCombineBug.ll
…
2013-03-13-VEX-DestReg.ll
…
2013-05-06-ConactVectorCrash.ll
…
2013-10-14-FastISel-incorrect-vreg.ll
…
2014-05-29-factorial.ll
…
2014-08-29-CompactUnwind.ll
…
2020_12_02_decrementing_loop.ll
[llvm] Remove br i1 undef from CodeGen/X86 tests (#121733)
2025-01-06 08:43:39 +00:00
2023-02-22-combineMinNumMaxNum.ll
…
9601.ll
…
20090313-signext.ll
…
20210831-inlineasm.ll
…
abds-neg.ll
[DAG] visitFREEZE - limit freezing of multiple operands (#149797)
2025-07-22 15:40:55 +01:00
abds-vector-128.ll
[X86] abds-vector-128.ll - regenerate VPTERNLOG asm comment
2025-06-26 18:54:27 +01:00
abds-vector-256.ll
…
abds-vector-512.ll
…
abds.ll
[X86] Align f128 and i128 to 16 bytes when passing on x86-32 (#138092)
2025-07-17 11:30:36 +02:00
abdu-neg.ll
[X86] Align f128 and i128 to 16 bytes when passing on x86-32 (#138092)
2025-07-17 11:30:36 +02:00
abdu-vector-128.ll
…
abdu-vector-256.ll
…
abdu-vector-512.ll
…
abdu.ll
[X86] Align f128 and i128 to 16 bytes when passing on x86-32 (#138092)
2025-07-17 11:30:36 +02:00
abi-isel.ll
[MC] Simplify MCBinaryExpr/MCUnaryExpr printing by reducing parentheses (#133674)
2025-03-30 22:03:14 -07:00
abs.ll
[X86] Align f128 and i128 to 16 bytes when passing on x86-32 (#138092)
2025-07-17 11:30:36 +02:00
absolute-bit-mask-fastisel.ll
…
absolute-bit-mask.ll
…
absolute-bt.ll
…
absolute-cmp.ll
MC: Centralize X86 PC-relative fixup adjustment in MCAssembler
2025-07-08 09:22:30 -07:00
absolute-constant.ll
…
absolute-rotate.ll
…
add32ri8.ll
…
add_shl_constant.ll
…
add-and-not.ll
…
add-cmov.ll
…
add-ext.ll
…
add-i64.ll
…
add-of-carry.ll
…
add-of-mul.ll
…
add-sub-bool.ll
[X86] Align f128 and i128 to 16 bytes when passing on x86-32 (#138092)
2025-07-17 11:30:36 +02:00
add-sub-nsw-nuw.ll
…
add.ll
…
addcarry2.ll
…
addcarry.ll
[X86] Fix ABI for passing after i128 (#124134)
2025-01-24 15:31:53 +01:00
addr-label-difference.ll
…
addr-mode-matcher-2.ll
…
addr-mode-matcher-3.ll
[X86] combineAdd - fold (add (sub (shl x, c), y), z) -> (sub (add (shl x, c), z), y) (#142734)
2025-06-05 08:20:44 +01:00
addr-mode-matcher-4.ll
…
addr-mode-matcher.ll
…
addr-of-ret-addr.ll
…
address-type-promotion-constantexpr.ll
…
addrsig.ll
…
addsub-constant-folding.ll
…
adx-intrinsics-upgrade.ll
…
adx-intrinsics.ll
…
aes_intrinsics.ll
…
alias-gep.ll
Introduce MCAsmInfo::UsesSetToEquateSymbol and prefer = to .set
2025-06-11 22:19:31 -07:00
alias-static-alloca.ll
…
aliases.ll
Introduce MCAsmInfo::UsesSetToEquateSymbol and prefer = to .set
2025-06-11 22:19:31 -07:00
align-basic-block-sections.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
align-branch-boundary-default.ll
…
align-branch-boundary-noautopadding.ll
…
align-branch-boundary-suppressions-tls.ll
…
align-branch-boundary-suppressions.ll
…
align-down-const.ll
…
align-down.ll
[DAGCombiner] Add hasOneUse checks for folding (not (add X, -1)) to (neg X) (#126667)
2025-02-12 12:24:29 +08:00
aligned-comm.ll
…
aligned-variadic.ll
…
alignment-2.ll
…
alignment.ll
…
all-ones-vector.ll
…
alldiv-divdi3.ll
…
alloca-align-rounding-32.ll
…
alloca-align-rounding.ll
…
alloca-overaligned.ll
…
allow-check.ll
…
allrem-moddi3.ll
…
amx_fp8_intrinsics.ll
…
amx_fp16_intrinsics.ll
…
amx_movrs_intrinsics.ll
[X86][APX] Support APX + AMX-MOVRS/AMX-TRANSPOSE (#123267)
2025-01-17 17:51:42 +08:00
amx_movrs_transpose_intrinsics.ll
[X86][APX] Support APX + AMX-MOVRS/AMX-TRANSPOSE (#123267)
2025-01-17 17:51:42 +08:00
amx_tile_pair_configure_O0.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
amx_tile_pair_configure_O2.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
amx_tile_pair_copy.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
amx_tile_pair_lower_type_O0.ll
…
amx_tile_pair_lower_type_O2.ll
…
amx_tile_pair_O2_to_O0.ll
…
amx_tile_pair_preconfigure_O0.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
amx_tile_pair_preconfigure_O2.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
amx_transpose_intrinsics.ll
[X86][APX] Support APX + AMX-MOVRS/AMX-TRANSPOSE (#123267)
2025-01-17 17:51:42 +08:00
amx-across-func-tilemovrow.ll
…
amx-avx512-intrinsics.ll
[X86][AMX-AVX512][NFC] Remove P from intrinsic and instruction name (#123270)
2025-01-17 22:21:19 +08:00
amx-fp8-internal.ll
[X86][AMX] Fix handling of AMX-FP8 internal intrinsics (#123540)
2025-01-21 10:11:29 +08:00
amx-tf32-internal.ll
…
amx-tf32-intrinsics.ll
…
amx-tile-avx512-internals.ll
[X86][AMX-AVX512][NFC] Remove P from intrinsic and instruction name (#123270)
2025-01-17 22:21:19 +08:00
and-encoding.ll
…
and-load-fold.ll
…
and-or-fold.ll
…
and-or-setcc.ll
[X86] SimplifyDemandedVectorEltsForTargetNode - replace packed fcmp node with scalar fcmp node if only element0 is demanded (#140563)
2025-05-20 09:33:28 +01:00
and-shift.ll
…
and-sink.ll
…
and-su.ll
…
and-with-overflow.ll
…
andimm8.ll
…
andnot-blsmsk.ll
[X86] Fold AND(Y, XOR(X, SUB(0, X))) to ANDN(Y, BLSMSK(X)) (#128348)
2025-02-25 17:11:00 +00:00
andnot-patterns.ll
…
any_extend_vector_inreg_of_broadcast_from_memory.ll
[X86] VPTERNLOG comments - use "mem" just for full width loads and "m32bcst" / "m64bcst" for broadcast loads (#143721)
2025-06-12 15:21:05 +01:00
any_extend_vector_inreg_of_broadcast.ll
[X86] VPTERNLOG comments - use "mem" just for full width loads and "m32bcst" / "m64bcst" for broadcast loads (#143721)
2025-06-12 15:21:05 +01:00
anyext.ll
…
anyregcc-crash.ll
RegAlloc: Use DiagnosticInfo to report register allocation failures (#119492)
2024-12-16 10:49:08 +09:00
anyregcc.ll
…
apm.ll
…
AppendingLinkage.ll
AsmPrinter: Do not use report_fatal_error for unknown appending linkage (#145269)
2025-06-23 16:26:27 +09:00
apple-simulator-compact-unwind.ll
…
apple-version-min.ll
…
arg_returned_bitcast.ll
…
arg-cast.ll
…
arg-copy-elide-win64.ll
…
arg-copy-elide.ll
[X86] Align f128 and i128 to 16 bytes when passing on x86-32 (#138092)
2025-07-17 11:30:36 +02:00
arithmetic_fence2.ll
…
arithmetic_fence.ll
…
asan-check-memaccess-add.ll
…
asan-check-memaccess-or.ll
…
asm-block-labels2.ll
…
asm-block-labels.ll
[IR] Don't allow label arguments (#137799)
2025-04-30 09:11:36 +02:00
asm-dialect-module.ll
…
asm-dialect.ll
…
asm-global-imm.ll
…
asm-indirect-mem.ll
…
asm-invalid-register-class-crasher.ll
…
asm-label2.ll
…
asm-label.ll
[llvm] Remove br i1 undef from CodeGen/X86 tests (#121733)
2025-01-06 08:43:39 +00:00
asm-mismatched-types.ll
…
asm-modifier2.ll
…
asm-modifier-32.ll
…
asm-modifier-error.ll
…
asm-modifier-macho.ll
X86,test: Improve asm modifier tests
2025-05-08 00:22:10 -07:00
asm-modifier-P.ll
…
asm-modifier-pic.ll
X86: Add asm modifier tests for 64-bit PIC
2025-05-08 00:35:59 -07:00
asm-modifier.ll
[X86] Asm modifier %a: add (%rip) for 64-bit static relocation model
2025-05-09 11:54:01 +08:00
asm-reg-type-mismatch-avx512.ll
…
asm-reg-type-mismatch.ll
…
asm-reject-reg-type-mismatch-avx.ll
…
asm-reject-reg-type-mismatch.ll
…
asm-reject-rex.ll
…
asm-reject-vk32-vk64.ll
…
asm-reject-x87-int.ll
…
asm-reject-xmm16.ll
…
assertzext-demanded.ll
…
atom-call-reg-indirect-foldedreload32.ll
…
atom-call-reg-indirect-foldedreload64.ll
…
atom-call-reg-indirect.ll
…
atom-cmpb.ll
…
atom-fixup-lea1.ll
…
atom-fixup-lea2.ll
…
atom-fixup-lea3.ll
…
atom-fixup-lea4.ll
…
atom-lea-addw-bug.ll
…
atom-lea-sp.ll
…
atom-pad-short-functions.ll
…
atom-sched.ll
…
atom-shuf.ll
…
atomic8.ll
…
atomic16.ll
…
atomic32.ll
[PHIElimination] Revert #131837 #146320 #146337 (#146850)
2025-07-03 07:48:08 -04:00
atomic64.ll
[PHIElimination] Revert #131837 #146320 #146337 (#146850)
2025-07-03 07:48:08 -04:00
atomic128.ll
…
atomic6432.ll
[PHIElimination] Revert #131837 #146320 #146337 (#146850)
2025-07-03 07:48:08 -04:00
atomic-add.ll
…
atomic-bit-test.ll
…
atomic-dagsched.ll
…
atomic-eflags-reuse.ll
…
atomic-flags.ll
…
atomic-fp.ll
…
atomic-idempotent-syncscope.ll
[X86] Use fence(seq_cst) in IdempotentRMWIntoFencedLoad (#126521)
2025-03-07 06:39:03 +01:00
atomic-idempotent.ll
[AtomicExpandPass] Match isIdempotentRMW with InstcombineRMW (#142277)
2025-06-08 11:32:20 +01:00
atomic-load-store-wide.ll
…
atomic-load-store.ll
[X86] atomic-load-store.ll - add SSE/AVX level coverage for future vector atomic memory operations
2025-05-12 10:35:12 +01:00
atomic-mi.ll
…
atomic-minmax-i6432.ll
[MC] Simplify MCBinaryExpr/MCUnaryExpr printing by reducing parentheses (#133674)
2025-03-30 22:03:14 -07:00
atomic-monotonic.ll
…
atomic-nocx16.ll
…
atomic-non-integer-fp128.ll
…
atomic-non-integer.ll
…
atomic-op.ll
…
atomic-ops-ancient-64.ll
…
atomic-or.ll
…
atomic-oversize.ll
…
atomic-pointer.ll
…
atomic-rm-bit-test-64.ll
…
atomic-rm-bit-test.ll
…
atomic-unaligned.ll
…
atomic-unordered.ll
[X86] Prefer lock or over mfence (#106555)
2025-03-11 16:12:23 +01:00
atomic-xor.ll
…
atomicrmw-cond-sub-clamp.ll
…
atomicrmw-fadd-fp-vector.ll
…
atomicrmw-uinc-udec-wrap.ll
…
Atomics-64.ll
…
attr-dontcall.ll
[win][arm64ec] Fix duplicate errors with the dontcall attribute (#152810)
2025-08-12 11:05:07 -07:00
attr-function-return.ll
…
attr-function-return.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
attribute-sections.ll
…
avg-mask.ll
[DAG] combineVSelectWithAllOnesOrZeros - missing freeze (#150388)
2025-08-04 15:55:12 +01:00
avg.ll
[DAG] visitFREEZE - limit freezing of multiple operands (#149797)
2025-07-22 15:40:55 +01:00
avgceils-scalar.ll
…
avgceils.ll
[X86] X86FixupVectorConstantsPass - use scheduler model to avoid regressions (#140028)
2025-05-28 11:02:37 +01:00
avgceilu-scalar.ll
…
avgceilu.ll
…
avgfloors-scalar.ll
[X86] add additional avgfloor 'add(shift(x,1),shift(y,1),and(x,y,1))' patterns
2025-04-10 13:32:54 +01:00
avgfloors.ll
[X86] VPTERNLOG comments - use "mem" just for full width loads and "m32bcst" / "m64bcst" for broadcast loads (#143721)
2025-06-12 15:21:05 +01:00
avgflooru-i128.ll
[X86] Fix ABI for passing after i128 (#124134)
2025-01-24 15:31:53 +01:00
avgflooru-scalar.ll
[X86] add additional avgfloor 'add(shift(x,1),shift(y,1),and(x,y,1))' patterns
2025-04-10 13:32:54 +01:00
avgflooru.ll
…
avoid_complex_am.ll
…
avoid-lea-scale2.ll
…
avoid-loop-align-2.ll
…
avoid-loop-align.ll
…
avoid-sfb-g-no-change2.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
avoid-sfb-g-no-change3.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
avoid-sfb-g-no-change.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
avoid-sfb-kill-flags.mir
…
avoid-sfb-offset.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
avoid-sfb-overlaps.ll
…
avoid-sfb.ll
…
avx1-logical-load-folding.ll
…
avx2-arith.ll
[X86] Handle multiple use freeze(undef) in LowerAVXCONCAT_VECTORS as zero vectors (#128830)
2025-02-26 18:53:08 +08:00
avx2-cmp.ll
…
avx2-conversions.ll
…
avx2-fma-fneg-combine.ll
…
avx2-gather.ll
…
avx2-intrinsics-canonical.ll
…
avx2-intrinsics-fast-isel.ll
…
avx2-intrinsics-x86-upgrade.ll
…
avx2-intrinsics-x86.ll
MC: Centralize X86 PC-relative fixup adjustment in MCAssembler
2025-07-08 09:22:30 -07:00
avx2-logic.ll
…
avx2-masked-gather.ll
…
avx2-nontemporal.ll
…
avx2-phaddsub.ll
…
avx2-pmovxrm.ll
…
avx2-shift.ll
…
avx2-vbroadcast.ll
…
avx2-vbroadcasti128.ll
…
avx2-vector-shifts.ll
…
avx2-vperm.ll
…
avx10_2_512bf16-arith.ll
[SelectionDAG] Add ISD::VSELECT to SelectionDAG::canCreateUndefOrPoison. (#143760)
2025-06-11 13:06:22 -07:00
avx10_2_512bf16-intrinsics.ll
[X86][AVX10.2] Include changes for COMX and VGETEXP from rev. 2 (#132824)
2025-03-25 13:26:13 +01:00
avx10_2_512convert-intrinsics.ll
[AVX10.2] Update convert chapter intrinsic and mnemonics names (#123656)
2025-01-23 22:23:56 +08:00
avx10_2_512fptosi_satcvtds.ll
[X86][AVX10.2] Map vector saturated converts to public intrinsics (#121483)
2025-01-05 10:23:37 +08:00
avx10_2_512minmax-intrinsics.ll
[X86][AVX10.2-MINMAX][NFC] Remove NE[P] from intrinsic and instruction (#123272)
2025-01-21 19:55:09 +08:00
avx10_2_512ni-intrinsics.ll
[X86][AVX10.2] Fix unexpected larger scope (#130767)
2025-03-11 21:20:27 +08:00
avx10_2_512satcvt-intrinsics.ll
[X86][AVX10.2-SATCVT][NFC] Remove NE from intrinsic and instruction name (#123275)
2025-01-22 22:53:47 +08:00
avx10_2_512satcvtds-intrinsics.ll
…
avx10_2-cmp.ll
[X86][AVX10] Fix assertion with strict fcmp (#139500)
2025-05-12 20:56:34 +08:00
avx10_2bf16-arith.ll
[SelectionDAG] Add ISD::VSELECT to SelectionDAG::canCreateUndefOrPoison. (#143760)
2025-06-11 13:06:22 -07:00
avx10_2bf16-intrinsics.ll
[X86][AVX10.2] Include changes for COMX and VGETEXP from rev. 2 (#132824)
2025-03-25 13:26:13 +01:00
avx10_2convert-intrinsics.ll
[X86][AVX10.2] Remove YMM rounding from VCVT2PS2PHX (#132397)
2025-03-21 22:51:51 +08:00
avx10_2fptosi_satcvtds.ll
[X86][AVX10.2] Map vector saturated converts to public intrinsics (#121483)
2025-01-05 10:23:37 +08:00
avx10_2minmax-intrinsics.ll
[X86][AVX10.2] Remove YMM rounding from VMINMAXP[H,S,D] (#132405)
2025-03-22 00:56:23 +08:00
avx10_2ni-intrinsics.ll
Revert "[X86][AVX10.2] Support YMM rounding new instructions (#101825)" (#132362)
2025-03-21 20:12:57 +08:00
avx10_2satcvt-intrinsics.ll
[X86][AVX10.2] Remove YMM rounding from VCVT[,T]PS2I[,U]BS (#132426)
2025-03-22 08:42:22 +08:00
avx10_2satcvtds-intrinsics.ll
[X86][AVX10.2] Remove YMM rounding from VCVTTP.*QS (#132414)
2025-03-22 01:10:39 +08:00
avx10_2satcvtds-x64-intrinsics.ll
…
avx10.2-fma-commute.ll
[X86][AVX10.2-BF16] Remove [NE]P from intrinsic and instruction name (#123335)
2025-01-24 15:49:28 +08:00
avx512-adc-sbb.ll
…
avx512-any_extend_load.ll
…
avx512-arith.ll
[X86] avx512-arith.ll - regenerate VPTERNLOG comments
2025-02-06 18:30:54 +00:00
avx512-broadcast-arith.ll
[X86] avx512-broadcast-arith.ll - regenerate VPTERNLOG comments
2025-02-04 14:21:09 +00:00
avx512-broadcast-unfold.ll
[DAG] Combine store + vselect to masked_store (#145176)
2025-08-04 19:05:36 +05:30
avx512-bugfix-23634.ll
…
avx512-bugfix-25270.ll
…
avx512-bugfix-26264.ll
[X86] combineKSHIFT - fold kshiftr(kshiftr/extract_subvector(X,C1),C2) --> kshiftr(X,C1+C2) (#115528)
2024-12-18 09:48:38 +00:00
avx512-build-vector.ll
[X86] X86FixupVectorConstantsPass - use scheduler model to avoid regressions (#140028)
2025-05-28 11:02:37 +01:00
avx512-calling-conv.ll
[X86] avx512-calling-conv.ll - regenerate VPTERNLOG comments
2025-02-04 14:21:10 +00:00
avx512-cmp-kor-sequence.ll
…
avx512-cmp-mask.ll
…
avx512-cmp.ll
[X86] avx512-cmp.ll - regenerate VPTERNLOG comments
2025-02-04 14:21:10 +00:00
avx512-cvt.ll
[X86] VPTERNLOG comments - use "mem" just for full width loads and "m32bcst" / "m64bcst" for broadcast loads (#143721)
2025-06-12 15:21:05 +01:00
avx512-cvttp2i.ll
…
avx512-ext.ll
[DAG] combineVSelectWithAllOnesOrZeros - missing freeze (#150388)
2025-08-04 15:55:12 +01:00
avx512-extract-subvector-load-store.ll
[X86] avx512-extract-subvector-load-store.ll - regenerate VPTERNLOG comments
2025-02-04 14:21:10 +00:00
avx512-extract-subvector.ll
…
avx512-f16c-v16f16-fadd.ll
…
avx512-fma-commute.ll
…
avx512-fma-intrinsics-upgrade.ll
…
avx512-fma-intrinsics.ll
…
avx512-fma.ll
…
avx512-fsel.ll
…
avx512-gather-scatter-intrin-deprecated.ll
…
avx512-gather-scatter-intrin.ll
…
avx512-gfni-intrinsics.ll
…
avx512-hadd-hsub.ll
…
avx512-i1test.ll
[X86] avx512-i1test.ll - regenerate to remove whitespace changes. NFC.
2025-05-13 17:03:54 +01:00
avx512-inc-dec.ll
…
avx512-insert-extract_i1.ll
…
avx512-insert-extract.ll
[X86] Avoid zero extend i16 when inserting fp16 (#126194)
2025-04-27 09:51:13 +08:00
avx512-intel-ocl.ll
[llvm] Win x64 Unwind V2 1/n: Mark beginning and end of epilogs (#110024)
2025-01-30 13:51:30 -08:00
avx512-intrinsics-canonical.ll
…
avx512-intrinsics-fast-isel.ll
[X86] Use X86FixupInstTunings to select between (V)MOVSS/D and (V)BLENDPS/D (#143895)
2025-06-12 18:08:07 +01:00
avx512-intrinsics-upgrade.ll
MC: Centralize X86 PC-relative fixup adjustment in MCAssembler
2025-07-08 09:22:30 -07:00
avx512-intrinsics-x86_64.ll
…
avx512-intrinsics.ll
[X86] Use X86FixupInstTunings to select between (V)MOVSS/D and (V)BLENDPS/D (#143895)
2025-06-12 18:08:07 +01:00
avx512-load-store.ll
[X86] avx512-load-store.ll - regenerate VMOVSD/VMOVSS comments
2025-02-04 14:25:07 +00:00
avx512-load-trunc-store-i1.ll
…
avx512-logic.ll
[X86] VPTERNLOG comments - use "mem" just for full width loads and "m32bcst" / "m64bcst" for broadcast loads (#143721)
2025-06-12 15:21:05 +01:00
avx512-mask-op.ll
[X86] X86FixupVectorConstantsPass - use VPMOVSX/ZX extensions for PS/PD domain moves (#122601)
2025-01-12 15:59:05 +00:00
avx512-mask-spills.ll
…
avx512-mask-zext-bugfix.ll
…
avx512-masked_memop-16-8.ll
…
avx512-masked-memop-64-32.ll
[X86] combineKSHIFT - fold kshiftr(kshiftr/extract_subvector(X,C1),C2) --> kshiftr(X,C1+C2) (#115528)
2024-12-18 09:48:38 +00:00
avx512-memfold.ll
…
avx512-mov.ll
…
avx512-movmsk.ll
…
avx512-nontemporal.ll
…
avx512-pmovxrm.ll
…
avx512-regcall-Mask.ll
[llvm] Win x64 Unwind V2 1/n: Mark beginning and end of epilogs (#110024)
2025-01-30 13:51:30 -08:00
avx512-regcall-NoMask.ll
[X86][BreakFalseDeps] Using reverse order for undef register selection (#137569)
2025-06-11 22:08:20 +08:00
avx512-rndscale.ll
…
avx512-rotate.ll
…
avx512-scalar_mask.ll
[X86] avx512-scalar_mask.ll - remove old FIXME comments
2025-06-09 14:07:15 +01:00
avx512-scalar.ll
…
avx512-scalarIntrinsics.ll
…
avx512-select.ll
[X86] avx512-select.ll - regenerate VPTERNLOG comments
2025-02-04 14:21:11 +00:00
avx512-shift.ll
…
avx512-skx-insert-subvec.ll
…
avx512-skx-v32f16-fadd.ll
…
avx512-trunc.ll
…
avx512-unsafe-fp-math.ll
…
avx512-vbroadcast.ll
[X86] avx512-vbroadcast.ll - regenerate VPTERNLOG asm comment
2025-06-26 11:38:25 +01:00
avx512-vbroadcasti128.ll
[X86] combineEXTRACT_SUBVECTOR - generalize extract_subvector(broadcast(x),c) fold with IsElementEquivalent (#141963)
2025-05-30 08:34:13 +01:00
avx512-vbroadcasti256.ll
…
avx512-vec3-crash.ll
…
avx512-vec-cmp.ll
MC: Centralize X86 PC-relative fixup adjustment in MCAssembler
2025-07-08 09:22:30 -07:00
avx512-vpclmulqdq.ll
…
avx512-vpermv3-commute.ll
…
avx512-vpternlog-commute.ll
…
avx512-vselect-crash.ll
…
avx512-vselect.ll
[X86] avx512-vselect.ll - regenerate VPTERNLOG comments
2025-04-01 15:50:07 +01:00
avx512bf16-intrinsics-upgrade.ll
…
avx512bf16-intrinsics.ll
…
avx512bf16-mov.ll
…
avx512bf16-vl-intrinsics-upgrade.ll
…
avx512bf16-vl-intrinsics.ll
MC: Centralize X86 PC-relative fixup adjustment in MCAssembler
2025-07-08 09:22:30 -07:00
avx512bw-arith.ll
…
avx512bw-intrinsics-canonical.ll
…
avx512bw-intrinsics-fast-isel.ll
…
avx512bw-intrinsics-upgrade.ll
…
avx512bw-intrinsics.ll
MC: Centralize X86 PC-relative fixup adjustment in MCAssembler
2025-07-08 09:22:30 -07:00
avx512bw-mask-op.ll
…
avx512bw-mov.ll
…
avx512bw-vec-cmp.ll
…
avx512bw-vec-test-testn.ll
…
avx512bwvl-arith.ll
…
avx512bwvl-intrinsics-canonical.ll
…
avx512bwvl-intrinsics-fast-isel.ll
…
avx512bwvl-intrinsics-upgrade.ll
…
avx512bwvl-intrinsics.ll
MC: Centralize X86 PC-relative fixup adjustment in MCAssembler
2025-07-08 09:22:30 -07:00
avx512bwvl-mov.ll
…
avx512bwvl-vec-cmp.ll
…
avx512bwvl-vec-test-testn.ll
…
avx512cd-intrinsics-fast-isel.ll
…
avx512cd-intrinsics-upgrade.ll
…
avx512cd-intrinsics.ll
…
avx512cdvl-intrinsics-upgrade.ll
…
avx512cdvl-intrinsics.ll
…
avx512cfma-intrinsics.ll
…
avx512cfmul-intrinsics.ll
…
avx512cfmulsh-instrinsics.ll
…
avx512copy-intrinsics.ll
[X86] Use X86FixupInstTunings to select between (V)MOVSS/D and (V)BLENDPS/D (#143895)
2025-06-12 18:08:07 +01:00
avx512dq-intrinsics-fast-isel.ll
…
avx512dq-intrinsics-upgrade.ll
…
avx512dq-intrinsics.ll
…
avx512dq-mask-op.ll
…
avx512dqvl-intrinsics-fast-isel.ll
…
avx512dqvl-intrinsics-upgrade.ll
…
avx512dqvl-intrinsics.ll
…
avx512f-256-set0.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
avx512f-large-stack.ll
Reapply "[X86] Correct 32-bit immediate assertion and fix 64-bit lowering for huge frame offsets" (#152239)
2025-08-11 21:23:44 +05:30
avx512f-vec-test-testn.ll
…
avx512fp16-arith-intrinsics.ll
…
avx512fp16-arith-vl-intrinsics.ll
…
avx512fp16-arith.ll
[X86] VPTERNLOG comments - use "mem" just for full width loads and "m32bcst" / "m64bcst" for broadcast loads (#143721)
2025-06-12 15:21:05 +01:00
avx512fp16-combine-shuffle-fma.ll
[X86] Remove UnsafeFPMath uses (#151667)
2025-08-05 08:24:52 +08:00
avx512fp16-combine-vfmac-fadd.ll
[X86][AVX512FP16] Decouple AVX512VL and AVX512DQ from AVX512FP16 (#137450)
2025-04-27 14:01:37 +08:00
avx512fp16-combine-vfmulc-fadd.ll
[X86][AVX512FP16] Decouple AVX512VL and AVX512DQ from AVX512FP16 (#137450)
2025-04-27 14:01:37 +08:00
avx512fp16-combine-xor-vfmulc-fadd.ll
[X86][AVX512FP16] Decouple AVX512VL and AVX512DQ from AVX512FP16 (#137450)
2025-04-27 14:01:37 +08:00
avx512fp16-combine-xor-vfmulc.ll
[X86][AVX512FP16] Decouple AVX512VL and AVX512DQ from AVX512FP16 (#137450)
2025-04-27 14:01:37 +08:00
avx512fp16-cvt-ph-w-intrinsics.ll
…
avx512fp16-cvt-ph-w-vl-intrinsics.ll
[X86][AVX512FP16] Decouple AVX512VL and AVX512DQ from AVX512FP16 (#137450)
2025-04-27 14:01:37 +08:00
avx512fp16-cvt.ll
[X86] Align f128 and i128 to 16 bytes when passing on x86-32 (#138092)
2025-07-17 11:30:36 +02:00
avx512fp16-fma-commute.ll
…
avx512fp16-fma-intrinsics.ll
[X86][AVX512FP16] Decouple AVX512VL and AVX512DQ from AVX512FP16 (#137450)
2025-04-27 14:01:37 +08:00
avx512fp16-fmaxnum.ll
MC: Centralize X86 PC-relative fixup adjustment in MCAssembler
2025-07-08 09:22:30 -07:00
avx512fp16-fminimum-fmaximum.ll
[X86][AVX512FP16] Decouple AVX512VL and AVX512DQ from AVX512FP16 (#137450)
2025-04-27 14:01:37 +08:00
avx512fp16-fminnum.ll
MC: Centralize X86 PC-relative fixup adjustment in MCAssembler
2025-07-08 09:22:30 -07:00
avx512fp16-fold-load-binops.ll
…
avx512fp16-fold-xmm-zero.ll
…
avx512fp16-fp-logic.ll
[X86][AVX512FP16] Decouple AVX512VL and AVX512DQ from AVX512FP16 (#137450)
2025-04-27 14:01:37 +08:00
avx512fp16-frem.ll
[X86][AVX512FP16] Decouple AVX512VL and AVX512DQ from AVX512FP16 (#137450)
2025-04-27 14:01:37 +08:00
avx512fp16-insert-extract.ll
…
avx512fp16-intrinsics.ll
[X86][AVX512FP16] Decouple AVX512VL and AVX512DQ from AVX512FP16 (#137450)
2025-04-27 14:01:37 +08:00
avx512fp16-machine-combiner.ll
[X86][AVX512FP16] Decouple AVX512VL and AVX512DQ from AVX512FP16 (#137450)
2025-04-27 14:01:37 +08:00
avx512fp16-mov.ll
[X86][FP16] Customize MLOAD/MSTORE(vXf16) if VLX is not enabled (#142331)
2025-06-02 15:44:51 +08:00
avx512fp16-mscatter.ll
…
avx512fp16-novl.ll
[X86][BreakFalseDeps] Using reverse order for undef register selection (#137569)
2025-06-11 22:08:20 +08:00
avx512fp16-rndscale.ll
[X86][AVX512FP16] Decouple AVX512VL and AVX512DQ from AVX512FP16 (#137450)
2025-04-27 14:01:37 +08:00
avx512fp16-scalar.ll
…
avx512fp16-subv-broadcast-fp16.ll
…
avx512fp16-unsafe-fp-math.ll
[X86][AVX512FP16] Decouple AVX512VL and AVX512DQ from AVX512FP16 (#137450)
2025-04-27 14:01:37 +08:00
avx512fp16vl-fma-intrinsics.ll
[X86][AVX512FP16] Decouple AVX512VL and AVX512DQ from AVX512FP16 (#137450)
2025-04-27 14:01:37 +08:00
avx512fp16vl-intrinsics.ll
[X86] Regenerate VFPCLASS assembly comments. NFC.
2025-01-17 15:10:52 +00:00
avx512ifma-intrinsics-fast-isel.ll
…
avx512ifma-intrinsics-upgrade.ll
…
avx512ifma-intrinsics.ll
…
avx512ifmavl-intrinsics-fast-isel.ll
…
avx512ifmavl-intrinsics-upgrade.ll
…
avx512ifmavl-intrinsics.ll
…
avx512vbmi2-funnel-shifts.ll
…
avx512vbmi2-intrinsics-fast-isel.ll
…
avx512vbmi2-intrinsics-upgrade.ll
…
avx512vbmi2-intrinsics.ll
…
avx512vbmi2vl-funnel-shifts.ll
…
avx512vbmi2vl-intrinsics-fast-isel.ll
…
avx512vbmi2vl-intrinsics-upgrade.ll
…
avx512vbmi2vl-intrinsics.ll
…
avx512vbmi-intrinsics-fast-isel.ll
…
avx512vbmi-intrinsics-upgrade.ll
…
avx512vbmi-intrinsics.ll
…
avx512vbmivl-intrinsics-fast-isel.ll
…
avx512vbmivl-intrinsics-upgrade.ll
…
avx512vbmivl-intrinsics.ll
…
avx512vl_vnni-intrinsics-upgrade.ll
…
avx512vl_vnni-intrinsics.ll
…
avx512vl-arith.ll
MC: Centralize X86 PC-relative fixup adjustment in MCAssembler
2025-07-08 09:22:30 -07:00
avx512vl-intrinsics-canonical.ll
…
avx512vl-intrinsics-fast-isel.ll
[X86] avx512 intrinsics tests - regenerate VPTERNLOG comments
2025-01-22 17:23:37 +00:00
avx512vl-intrinsics-upgrade.ll
MC: Centralize X86 PC-relative fixup adjustment in MCAssembler
2025-07-08 09:22:30 -07:00
avx512vl-intrinsics.ll
MC: Centralize X86 PC-relative fixup adjustment in MCAssembler
2025-07-08 09:22:30 -07:00
avx512vl-logic.ll
[X86] VPTERNLOG comments - use "mem" just for full width loads and "m32bcst" / "m64bcst" for broadcast loads (#143721)
2025-06-12 15:21:05 +01:00
avx512vl-mov.ll
…
avx512vl-nontemporal.ll
…
avx512vl-vbroadcast.ll
…
avx512vl-vec-cmp.ll
…
avx512vl-vec-masked-cmp.ll
…
avx512vl-vec-test-testn.ll
…
avx512vl-vpclmulqdq.ll
…
avx512vlcd-intrinsics-fast-isel.ll
…
avx512vlvp2intersect-intrinsics.ll
…
avx512vnni-combine.ll
…
avx512vnni-intrinsics-upgrade.ll
…
avx512vnni-intrinsics.ll
…
avx512vnni.ll
…
avx512vp2intersect-intrinsics.ll
…
avx512vpopcntdq-intrinsics.ll
…
avx_vnni-intrinsics.ll
…
avx-arith.ll
…
avx-basic.ll
…
avx-bitcast.ll
…
avx-brcond.ll
…
avx-cast.ll
…
avx-cmp.ll
[InlineSpiller] Check rematerialization before folding operand (#134015)
2025-04-28 09:52:03 -07:00
avx-cvt-2.ll
…
avx-cvt-3.ll
[DAG] visitINSERT_VECTOR_ELT - convert to or mask if all insertions are -1 (#138213)
2025-05-13 17:10:54 +01:00
avx-cvt.ll
[X86][BreakFalseDeps] Using reverse order for undef register selection (#137569)
2025-06-11 22:08:20 +08:00
avx-cvttp2si.ll
…
avx-fp2int.ll
…
avx-gfni-intrinsics.ll
…
avx-ifma-intrinsics.ll
…
avx-insertelt.ll
[X86] X86FixupInstTuning - fold BLENDPS -> MOVSD (#144029)
2025-06-13 11:05:57 +01:00
avx-intel-ocl.ll
…
avx-intrinsics-fast-isel.ll
[X86] lowerV8I16GeneralSingleInputShuffle - for splat PSHUFW+PSHUFD patterns, widen the splats to encourage combines (#129854)
2025-03-06 14:25:57 +00:00
avx-intrinsics-x86_64.ll
…
avx-intrinsics-x86-upgrade.ll
MC: Centralize X86 PC-relative fixup adjustment in MCAssembler
2025-07-08 09:22:30 -07:00
avx-intrinsics-x86.ll
…
avx-isa-check.ll
…
avx-load-store.ll
…
avx-logic.ll
…
avx-minmax.ll
…
avx-select.ll
[llvm] Remove br i1 undef from CodeGen/X86 tests (#121733)
2025-01-06 08:43:39 +00:00
avx-shift.ll
[X86] combineConcatVectorOps - add support for AVX1 and/or/xor/andnp concatenation (#130645)
2025-03-11 09:54:44 +00:00
avx-shuffle-x86_32.ll
…
avx-splat.ll
[X86] lowerV8I16GeneralSingleInputShuffle - for splat PSHUFW+PSHUFD patterns, widen the splats to encourage combines (#129854)
2025-03-06 14:25:57 +00:00
avx-trunc.ll
…
avx-unpack.ll
…
avx-varargs-x86_64.ll
…
avx-vbroadcast.ll
…
avx-vbroadcastf128.ll
…
avx-vextractf128.ll
…
avx-vinsertf128.ll
…
avx-vpclmulqdq.ll
…
avx-vperm2x128.ll
…
avx-vzeroupper.ll
…
avx-win64-args.ll
…
avx-win64.ll
…
avx.ll
…
avxneconvert-intrinsics-shared.ll
…
avxneconvert-intrinsics.ll
…
avxvnni-combine.ll
…
avxvnni.ll
…
avxvnniint8-intrinsics.ll
…
avxvnniint16-intrinsics.ll
…
backpropmask.ll
…
bad-tls-fold.mir
…
barrier-sse.ll
…
barrier.ll
…
base-pointer-and-cmpxchg.ll
[X86] When expanding LCMPXCHG16B_SAVE_RBX, substitute RBX in base (#134109)
2025-04-03 15:56:53 +02:00
base-pointer-and-mwaitx.ll
[RegAlloc] Sort CopyHint by IsCSR (#131046)
2025-04-14 09:58:46 -04:00
basic-block-address-map-empty-block.ll
…
basic-block-address-map-empty-function.ll
[SHT_LLVM_BB_ADDR_MAP] Emit callsite offsets in the SHT_LLVM_BB_ADDR_MAP section. (#146563)
2025-07-09 11:11:15 -07:00
basic-block-address-map-function-sections.ll
[SHT_LLVM_BB_ADDR_MAP] Emit callsite offsets in the SHT_LLVM_BB_ADDR_MAP section. (#146563)
2025-07-09 11:11:15 -07:00
basic-block-address-map-mir-parse.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
basic-block-address-map-pgo-features.ll
[SHT_LLVM_BB_ADDR_MAP] Emit callsite offsets in the SHT_LLVM_BB_ADDR_MAP section. (#146563)
2025-07-09 11:11:15 -07:00
basic-block-address-map-with-basic-block-sections.ll
[SHT_LLVM_BB_ADDR_MAP] Emit callsite offsets in the SHT_LLVM_BB_ADDR_MAP section. (#146563)
2025-07-09 11:11:15 -07:00
basic-block-address-map-with-mfs.ll
[SHT_LLVM_BB_ADDR_MAP] Emit callsite offsets in the SHT_LLVM_BB_ADDR_MAP section. (#146563)
2025-07-09 11:11:15 -07:00
basic-block-address-map.ll
[SHT_LLVM_BB_ADDR_MAP] Emit callsite offsets in the SHT_LLVM_BB_ADDR_MAP section. (#146563)
2025-07-09 11:11:15 -07:00
basic-block-sections_2.ll
…
basic-block-sections-blockaddress-taken.ll
[CodeGen] Clean up tests that depend on implicit .text in MCAsmStreamer
2024-12-22 21:11:32 -08:00
basic-block-sections-cloning-1.ll
…
basic-block-sections-cloning-2.ll
…
basic-block-sections-cloning-indirect-invalid.ll
…
basic-block-sections-cloning-indirect.ll
…
basic-block-sections-cloning-invalid.ll
[ARM,AArch64] Don't put BTI at asm goto branch targets (#141562)
2025-06-03 08:44:13 +01:00
basic-block-sections-clusters-branches.ll
…
basic-block-sections-clusters-eh.ll
…
basic-block-sections-clusters-error.ll
…
basic-block-sections-clusters.ll
…
basic-block-sections-cold.ll
…
basic-block-sections-directjumps.ll
…
basic-block-sections-eh.ll
…
basic-block-sections-entryblock.ll
…
basic-block-sections-list.ll
…
basic-block-sections-listbb.ll
…
basic-block-sections-mir-parse.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
basic-block-sections-mir-print.ll
…
basic-block-sections-module1.ll
…
basic-block-sections-module2.ll
…
basic-block-sections-named-section.ll
…
basic-block-sections-pragma-sections.ll
…
basic-block-sections-source-drift.ll
…
basic-block-sections-unreachable.ll
…
basic-block-sections.ll
…
basic-promote-integers.ll
…
bb_rotate.ll
…
bc-extract.ll
…
bfloat-calling-conv-no-sse2.ll
…
bfloat-calling-conv.ll
[X86] Add missing vNbf16 handling in X86CallingConv.td file (#127102)
2025-02-19 11:04:10 +08:00
bfloat-constrained.ll
…
bfloat.ll
Reland [SelectionDAG] Folding ZERO-EXTEND/SIGN_EXTEND poison to Poison value in getNode (#136701)
2025-04-22 17:36:41 -04:00
big-array-init.ll
…
bigstructret2.ll
…
bigstructret.ll
…
bit_ceil.ll
[X86] Handle BSF/BSR "zero-input pass through" behaviour (#123623)
2025-01-23 12:59:59 +00:00
bit-piece-comment.ll
…
bit-test-shift.ll
…
bitcast2.ll
…
bitcast-and-setcc-128.ll
…
bitcast-and-setcc-256.ll
…
bitcast-and-setcc-512.ll
…
bitcast-i256.ll
…
bitcast-int-to-vector-bool-sext.ll
[X86] lowerV8I16GeneralSingleInputShuffle - for splat PSHUFW+PSHUFD patterns, widen the splats to encourage combines (#129854)
2025-03-06 14:25:57 +00:00
bitcast-int-to-vector-bool-zext.ll
[X86] lowerV8I16GeneralSingleInputShuffle - for splat PSHUFW+PSHUFD patterns, widen the splats to encourage combines (#129854)
2025-03-06 14:25:57 +00:00
bitcast-int-to-vector-bool.ll
[X86] lowerV8I16GeneralSingleInputShuffle - for splat PSHUFW+PSHUFD patterns, widen the splats to encourage combines (#129854)
2025-03-06 14:25:57 +00:00
bitcast-int-to-vector.ll
…
bitcast-mmx.ll
…
bitcast-setcc-128.ll
…
bitcast-setcc-256.ll
…
bitcast-setcc-512.ll
…
bitcast-vector-bool.ll
[DAG] getNode - convert scalar i1 arithmetic calls to bitwise instructions (#125486)
2025-02-03 16:36:01 +00:00
bitcast.ll
…
bitcnt-false-dep.ll
…
bitreverse.ll
…
bitselect.ll
[X86] Align f128 and i128 to 16 bytes when passing on x86-32 (#138092)
2025-07-17 11:30:36 +02:00
bittest-intrin.ll
…
blend-of-shift.ll
…
block_set.ll
…
block-placement.ll
[llvm] Remove br i1 undef from CodeGen/X86 tests (#121733)
2025-01-06 08:43:39 +00:00
block-placement.mir
[CodeGen][NPM] Port MachineBlockPlacement to NPM (#129828)
2025-03-14 10:31:53 +05:30
bmi2-x86_64.ll
…
bmi2.ll
…
bmi-intrinsics-fast-isel-x86_64.ll
…
bmi-intrinsics-fast-isel.ll
…
bmi-out-of-order.ll
…
bmi-select-distrib.ll
[X86] bmi-select-distrib.ll - remove unused check prefixes and pull out PR comments above tests. NFC
2025-06-11 08:30:09 +01:00
bmi-x86_64.ll
…
bmi.ll
MC: Centralize X86 PC-relative fixup adjustment in MCAssembler
2025-07-08 09:22:30 -07:00
bool-ext-inc.ll
…
bool-math.ll
…
bool-simplify.ll
…
bool-vector.ll
…
bool-zext.ll
…
br-fold.ll
…
branch-hint.ll
…
branchfolding-catchpads.ll
…
branchfolding-debug-invariant.mir
…
branchfolding-debugloc.ll
…
branchfolding-ehpad.mir
[CodeGen][NPM] Port BranchFolder to NPM (#128858)
2025-03-13 13:41:28 +05:30
branchfolding-landingpad-cfg.mir
…
branchfolding-landingpads.ll
…
branchfolding-undef.mir
…
brcc.ll
…
brcond.ll
…
break-anti-dependencies.ll
…
break-false-dep-crash.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
break-false-dep.ll
[X86][BreakFalseDeps] Using reverse order for undef register selection (#137569)
2025-06-11 22:08:20 +08:00
broadcast-elm-cross-splat-vec.ll
…
broadcastm-lowering.ll
…
bsf.ll
[X86] Align f128 and i128 to 16 bytes when passing on x86-32 (#138092)
2025-07-17 11:30:36 +02:00
bsr.ll
[X86] Align f128 and i128 to 16 bytes when passing on x86-32 (#138092)
2025-07-17 11:30:36 +02:00
bss_pagealigned.ll
…
bswap_tree2.ll
…
bswap_tree.ll
…
bswap-inline-asm.ll
…
bswap-rotate.ll
…
bswap-vector.ll
…
bswap-wide-int.ll
[X86] Align f128 and i128 to 16 bytes when passing on x86-32 (#138092)
2025-07-17 11:30:36 +02:00
bswap.ll
…
bt.ll
…
btc_bts_btr.ll
…
btq.ll
…
bug37521.ll
…
bug47278-eflags-error.mir
…
bug47278.mir
…
bug80500.ll
…
build_fp16_constant_vector.ll
…
build-vector-128.ll
[X86] Add build vector test patterns with only 2 unique scalars
2025-04-24 11:47:09 +01:00
build-vector-256.ll
[X86][AVX] Match v4f64 blend from shuffle of scalar values. (#135753)
2025-05-06 14:27:27 +01:00
build-vector-512.ll
[X86] Use X86FixupInstTunings to select between (V)MOVSS/D and (V)BLENDPS/D (#143895)
2025-06-12 18:08:07 +01:00
buildvec-bitcast.ll
…
buildvec-extract.ll
[X86] Use X86FixupInstTunings to select between (V)MOVSS/D and (V)BLENDPS/D (#143895)
2025-06-12 18:08:07 +01:00
buildvec-insertvec.ll
…
buildvec-widen-dotproduct.ll
[X86] combineAdd - fold (add (sub (shl x, c), y), z) -> (sub (add (shl x, c), z), y) (#142734)
2025-06-05 08:20:44 +01:00
bypass-slow-division-32.ll
…
bypass-slow-division-64.ll
…
bypass-slow-division-tune.ll
…
byref.ll
…
byval2.ll
…
byval3.ll
…
byval4.ll
…
byval5.ll
…
byval6.ll
…
byval7.ll
…
byval-align.ll
…
byval-callee-cleanup.ll
…
byval.ll
…
cache-intrinsic.ll
…
call-graph-section-assembly.ll
[llvm][AsmPrinter] Emit call graph section
2025-07-31 13:38:20 -07:00
call-graph-section-tailcall.ll
[llvm][AsmPrinter] Emit call graph section
2025-07-31 13:38:20 -07:00
call-graph-section.ll
[llvm][AsmPrinter] Emit call graph section
2025-07-31 13:38:20 -07:00
call-imm.ll
…
call-push.ll
…
call-rv-marker.ll
…
call-site-info-output.ll
…
call-structfp.ll
…
callbr-asm-bb-exports.ll
…
callbr-asm-blockplacement.ll
[ARM,AArch64] Don't put BTI at asm goto branch targets (#141562)
2025-06-03 08:44:13 +01:00
callbr-asm-branch-folding.ll
[PHIElimination] Revert #131837 #146320 #146337 (#146850)
2025-07-03 07:48:08 -04:00
callbr-asm-destinations.ll
[ARM,AArch64] Don't put BTI at asm goto branch targets (#141562)
2025-06-03 08:44:13 +01:00
callbr-asm-endbr.ll
[X86] Don't emit ENDBR for asm goto branch targets (#143439)
2025-06-11 09:57:23 -07:00
callbr-asm-instr-scheduling.ll
[MC] Simplify MCBinaryExpr/MCUnaryExpr printing by reducing parentheses (#133674)
2025-03-30 22:03:14 -07:00
callbr-asm-kill.mir
[PHIElimination] Revert #131837 #146320 #146337 (#146850)
2025-07-03 07:48:08 -04:00
callbr-asm-label-addr.ll
[ARM,AArch64] Don't put BTI at asm goto branch targets (#141562)
2025-06-03 08:44:13 +01:00
callbr-asm-loop.ll
[BranchFolding] Avoid moving blocks to fall through to an indirect target (#152916)
2025-08-14 16:18:36 +09:00
callbr-asm-obj-file.ll
…
callbr-asm-outputs-indirect-isel-m32.ll
[ARM,AArch64] Don't put BTI at asm goto branch targets (#141562)
2025-06-03 08:44:13 +01:00
callbr-asm-outputs-indirect-isel.ll
[ARM,AArch64] Don't put BTI at asm goto branch targets (#141562)
2025-06-03 08:44:13 +01:00
callbr-asm-outputs-pred-succ.ll
[ARM,AArch64] Don't put BTI at asm goto branch targets (#141562)
2025-06-03 08:44:13 +01:00
callbr-asm-outputs-regallocfast.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
callbr-asm-outputs.ll
[ARM,AArch64] Don't put BTI at asm goto branch targets (#141562)
2025-06-03 08:44:13 +01:00
callbr-asm-phi-placement.ll
[ARM,AArch64] Don't put BTI at asm goto branch targets (#141562)
2025-06-03 08:44:13 +01:00
callbr-asm-sink.ll
[ARM,AArch64] Don't put BTI at asm goto branch targets (#141562)
2025-06-03 08:44:13 +01:00
callbr-asm.ll
[ARM,AArch64] Don't put BTI at asm goto branch targets (#141562)
2025-06-03 08:44:13 +01:00
callbr-codegenprepare.ll
…
calleetypeid-directcall-mismatched.ll
[llvm] Extract and propagate callee_type metadata
2025-07-30 14:56:39 -07:00
callsite-emit-calleetypeid-tailcall.ll
[llvm] Extract and propagate callee_type metadata
2025-07-30 14:56:39 -07:00
callsite-emit-calleetypeid.ll
[llvm] Extract and propagate callee_type metadata
2025-07-30 14:56:39 -07:00
canonicalize-vars-f16-type.ll
[X86] Use X86FixupInstTunings to select between (V)MOVSS/D and (V)BLENDPS/D (#143895)
2025-06-12 18:08:07 +01:00
canonicalize-vars.ll
X86: Support FCANONICALIZE on f64/f80 for i686 with SSE2 or AVX (#123917)
2025-01-27 07:27:26 +08:00
cas.ll
…
cast-vsel.ll
[X86] lowerV8I16GeneralSingleInputShuffle - for splat PSHUFW+PSHUFD patterns, widen the splats to encourage combines (#129854)
2025-03-06 14:25:57 +00:00
catch.ll
…
catchpad-dynamic-alloca.ll
…
catchpad-lifetime.ll
…
catchpad-realign-savexmm.ll
[llvm] Win x64 Unwind V2 1/n: Mark beginning and end of epilogs (#110024)
2025-01-30 13:51:30 -08:00
catchpad-regmask.ll
…
catchpad-reuse.ll
[MC] Don't print () around $ names
2025-03-30 16:38:16 -07:00
catchpad-weight.ll
…
catchret-empty-fallthrough.ll
Fix Windows EH IP2State tables (remove +1 bias) (#144745)
2025-07-22 09:18:13 -07:00
catchret-fallthrough.ll
…
catchret-regmask.ll
…
cet_endbr_imm_enhance.ll
…
cf-opt-memops.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
cfguard-checks-funclet.ll
…
cfguard-checks.ll
…
cfguard-module-flag.ll
…
cfguard-x86-64-vectorcall.ll
[IR] Don't allow values of opaque type (#137625)
2025-04-30 15:01:00 +02:00
cfguard-x86-vectorcall.ll
[IR] Don't allow values of opaque type (#137625)
2025-04-30 15:01:00 +02:00
cfi-basic-block-sections-1.ll
…
cfi-epilogue-with-return.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
cfi-epilogue-without-return.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
cfi-inserter-basic-block-sections-callee-save-registers.ll
…
cfi-inserter-callee-save-register-2.mir
…
cfi-inserter-callee-save-register.mir
…
cfi-inserter-cfg-with-merge.mir
…
cfi-inserter-check-order.ll
…
cfi-inserter-noreturnblock.mir
…
cfi-inserter-verify-inconsistent-csr.mir
…
cfi-inserter-verify-inconsistent-loc.mir
…
cfi-inserter-verify-inconsistent-offset.mir
…
cfi-inserter-verify-inconsistent-register.mir
…
cfi-xmm.ll
…
cfi.ll
…
cfstring.ll
…
cgp-usubo.ll
…
chain_order.ll
…
change-compare-stride-1.ll
…
change-compare-stride-trickiness-0.ll
…
change-compare-stride-trickiness-1.ll
…
change-compare-stride-trickiness-2.ll
…
change-unsafe-fp-math.ll
[DAGCombiner] Remove UnsafeFPMath usage in visitFSUBForFMACombine etc. (#145637)
2025-06-30 08:41:23 +08:00
clang-section-coff.ll
[clang] Implement #pragma clang section on COFF targets (#112714)
2025-01-21 16:12:58 -08:00
cldemote-intrinsic.ll
…
cleanuppad-inalloca.ll
…
cleanuppad-large-codemodel.ll
…
cleanuppad-realign.ll
[llvm] Win x64 Unwind V2 1/n: Mark beginning and end of epilogs (#110024)
2025-01-30 13:51:30 -08:00
clear_upper_vector_element_bits.ll
…
clear-bitfield.ll
…
clear-highbits.ll
…
clear-lowbits.ll
…
clflush.ll
…
clflushopt.ll
…
clobber_base_ptr.ll
…
clobber_frame_ptr2.ll
…
clobber_frame_ptr_x32.ll
…
clobber_frame_ptr.ll
Reland [SelectionDAG] Folding ZERO-EXTEND/SIGN_EXTEND poison to Poison value in getNode (#136701)
2025-04-22 17:36:41 -04:00
clwb.ll
…
clzero.ll
…
cmov-double.ll
…
cmov-fp.ll
…
cmov-into-branch.ll
…
cmov-promotion.ll
…
cmov.ll
…
cmovcmov.ll
…
cmp16.ll
…
cmp-bool.ll
…
cmp-concat.ll
…
cmp-fast-isel.ll
…
cmp-merge.ll
…
cmp-shiftX-maskX.ll
…
cmp-xor.ll
[X86] EmitCmp - use existing XOR node to check for equality (#125506)
2025-02-04 09:14:37 +00:00
cmp.ll
[X86] Try to shrink i64 compares if the input has enough sign bits (#149719)
2025-08-02 18:01:33 +01:00
cmpccxadd-intrinsics.ll
…
cmpf-avx.ll
…
cmpxchg8b_alloca_regalloc_handling.ll
…
cmpxchg8b.ll
…
cmpxchg-clobber-flags.ll
…
cmpxchg-i1.ll
…
cmpxchg-i128-i1.ll
…
coal-sections.ll
…
coalesce_commute_movsd.ll
[X86] X86FixupInstTuning - fold BLENDPS -> MOVSD (#144029)
2025-06-13 11:05:57 +01:00
coalesce_commute_subreg.ll
…
coalesce-commutative-implicit-def.mir
[CodeGen] Do not use subsituteRegister to update implicit def (#148068)
2025-07-11 11:28:14 -07:00
coalesce-dbg-value-subreg-rewrite.mir
…
coalesce-dead-lanes.mir
[CodeGen][NewPM] Port RegisterCoalescer to NPM (#124698)
2025-02-03 13:41:51 +07:00
coalesce-esp.ll
…
coalesce-implicitdef.ll
…
coalescer-add-implicit-def-subreg-to-reg-regression.ll
…
coalescer-breaks-subreg-to-reg-liveness-reduced.ll
[PHIElimination] Revert #131837 #146320 #146337 (#146850)
2025-07-03 07:48:08 -04:00
coalescer-commute1.ll
[X86][BreakFalseDeps] Using reverse order for undef register selection (#137569)
2025-06-11 22:08:20 +08:00
coalescer-commute2.ll
…
coalescer-commute3.ll
…
coalescer-commute4.ll
…
coalescer-commute5.ll
…
coalescer-cross.ll
…
coalescer-dce2.ll
…
coalescer-dce.ll
…
coalescer-dead-flag-verifier-error.ll
…
coalescer-identity.ll
…
coalescer-implicit-def-regression-imp-operand-assert.mir
Revert "Reland "RegisterCoalescer: Add implicit-def of super register when coalescing SUBREG_TO_REG" (#134408)"
2025-08-04 12:07:30 +00:00
coalescer-implicit-def-regression.ll
…
coalescer-implicit-def-regression.mir
…
coalescer-partial-redundancy-clear-dead-flag-undef-copy.mir
…
coalescer-remat-with-undef-implicit-def-operand.mir
…
coalescer-remat.ll
…
coalescer-subreg.ll
[llvm] Remove br i1 undef in some llvm/test/CodeGen tests (#126811)
2025-02-12 09:19:00 +00:00
coalescer-win64.ll
…
code_placement_align_all.ll
…
code_placement_cold_loop_blocks.ll
…
code_placement_eh.ll
[llvm] Remove br i1 undef in some llvm/test/CodeGen tests (#126811)
2025-02-12 09:19:00 +00:00
code_placement_ext_tsp_large.ll
…
code_placement_ext_tsp_size.ll
…
code_placement_ext_tsp.ll
…
code_placement_ignore_succ_in_inner_loop.ll
…
code_placement_loop_rotation2.ll
…
code_placement_loop_rotation3.ll
…
code_placement_loop_rotation.ll
…
code_placement_no_header_change.ll
…
code_placement.ll
…
code-align-loops.ll
[CodeGen][MachineLoop] Fix getLoopID (#137820)
2025-05-24 08:52:51 +02:00
code-model-elf-memset.ll
…
code-model-elf-merge-sections.ll
…
code-model-elf-sections.ll
Target: Stop assigning RELRO sections to .ldata.rel.ro.
2025-04-29 12:40:43 -07:00
code-model-elf-text-sections.ll
…
code-model-elf.ll
Target: Stop assigning RELRO sections to .ldata.rel.ro.
2025-04-29 12:40:43 -07:00
code-model-kernel.ll
…
codegen-no-uselist-constantdata.ll
[X86] combineTargetShuffle - fold (vzmovl (shift x, y)) -> (shift (vzmovl x), y) (#141579)
2025-05-27 16:21:12 +01:00
codegen-prepare-addrmode-sext.ll
[CodeGenPrepare] Replace deleted ext instr with the promoted value. (#71058)
2025-01-30 08:58:23 +08:00
codegen-prepare-addrmode-tls.ll
…
codegen-prepare-cast.ll
[llvm] Remove br i1 undef in some llvm/test/CodeGen tests (#126811)
2025-02-12 09:19:00 +00:00
codegen-prepare-collapse.ll
…
codegen-prepare-crash.ll
…
codegen-prepare-extload.ll
…
codegen-prepare-oob-shl.ll
…
codegen-prepare-replacephi2.mir
[llvm] Remove br i1 undef from CodeGen/X86 tests (#121733)
2025-01-06 08:43:39 +00:00
codegen-prepare-replacephi.mir
[llvm] Remove br i1 undef from CodeGen/X86 tests (#121733)
2025-01-06 08:43:39 +00:00
codegen-prepare-uaddo.ll
…
codegen-prepare.ll
…
codemodel.ll
X86: Use reportFatalUsageError for tiny code model error (#145279)
2025-06-24 13:52:30 +09:00
coff-alias-type.ll
Introduce MCAsmInfo::UsesSetToEquateSymbol and prefer = to .set
2025-06-11 22:19:31 -07:00
coff-comdat2.ll
…
coff-comdat3.ll
…
coff-comdat.ll
Introduce MCAsmInfo::UsesSetToEquateSymbol and prefer = to .set
2025-06-11 22:19:31 -07:00
coff-exclude.ll
…
coff-feat00.ll
Introduce MCAsmInfo::UsesSetToEquateSymbol and prefer = to .set
2025-06-11 22:19:31 -07:00
coff-fp-section-name.ll
…
coff-linkonce.ll
…
coff-no-dead-strip.ll
…
coff-weak.ll
…
coldcc64.ll
…
combine-64bit-vec-binop.ll
…
combine-abs.ll
…
combine-adc.ll
…
combine-add-ssat.ll
[LLVM][SelectionDAG] Align poison/undef binop folds with IR. (#149334)
2025-07-30 11:20:30 +01:00
combine-add-usat.ll
[LLVM][SelectionDAG] Align poison/undef binop folds with IR. (#149334)
2025-07-30 11:20:30 +01:00
combine-add.ll
[DAG] getNode - convert scalar i1 arithmetic calls to bitwise instructions (#125486)
2025-02-03 16:36:01 +00:00
combine-addo.ll
…
combine-adx.ll
…
combine-and.ll
[X86] X86FixupInstTuning - fold BLENDPS -> MOVSD (#144029)
2025-06-13 11:05:57 +01:00
combine-andintoload.ll
…
combine-avx2-intrinsics.ll
…
combine-avx-intrinsics.ll
…
combine-bextr.ll
…
combine-bitreverse.ll
…
combine-bitselect.ll
[X86] VPTERNLOG comments - use "mem" just for full width loads and "m32bcst" / "m64bcst" for broadcast loads (#143721)
2025-06-12 15:21:05 +01:00
combine-bswap.ll
…
combine-concatvectors.ll
[llvm] Remove br i1 undef from CodeGen/X86 tests (#121733)
2025-01-06 08:43:39 +00:00
combine-fabs.ll
…
combine-fcopysign.ll
[X86] Add test coverage for #136368
2025-04-21 13:24:20 +01:00
combine-fma-negate.ll
[X86][ISel][FMA] Get a handle on operand nodes when negating FMA (#130176)
2025-03-17 16:07:33 +00:00
combine-fneg.ll
…
combine-i64-trunc-srl-add.ll
[X86] Extend combinei64TruncSrlAdd to handle patterns with or and xor (#128435)
2025-03-01 18:05:49 +08:00
combine-lds.ll
…
combine-mask-with-shuffle.ll
[X86] combineSelect - attempt to combine with shuffles (#143753)
2025-06-12 09:29:41 +01:00
combine-movmsk-avx.ll
[X86] SimplifyDemandedBitsForTargetNode - add X86ISD::BLENDI handling (#133102)
2025-03-27 09:32:40 +00:00
combine-movmsk.ll
…
combine-mul.ll
…
combine-mulo.ll
…
combine-multiplies.ll
…
combine-or-shuffle.ll
[X86] X86FixupInstTuning - prefer VPBLENDD to VPBLENDW shuffles on AVX2+ targets (#144269)
2025-06-16 10:31:24 +01:00
combine-or.ll
[X86] X86FixupVectorConstantsPass - use scheduler model to avoid regressions (#140028)
2025-05-28 11:02:37 +01:00
combine-pavg.ll
[X86] lowerV8I16GeneralSingleInputShuffle - for splat PSHUFW+PSHUFD patterns, widen the splats to encourage combines (#129854)
2025-03-06 14:25:57 +00:00
combine-pmadd.ll
[X86] combineConcatVectorOps - convert PSHUFB/PSADBW/VPMADDUBSW/VPMADDUBSW concatenation to use combineConcatVectorOps recursion (#130592)
2025-03-10 13:36:58 +00:00
combine-pmuldq.ll
[PHIElimination] Revert #131837 #146320 #146337 (#146850)
2025-07-03 07:48:08 -04:00
combine-ptest-256.ll
…
combine-ptest.ll
[X86] combinePTESTCC - fold PTESTC(PCMPEQ(X,0),-1) == PTESTZ(X,X) (#123466)
2025-01-19 13:09:17 +00:00
combine-rotates.ll
…
combine-sbb.ll
…
combine-sdiv.ll
[DAG] visitFREEZE - replace multiple frozen/unfrozen uses of an SDValue with just the frozen node (#150017)
2025-08-05 09:24:09 +01:00
combine-select.ll
…
combine-sext-in-reg.ll
…
combine-shl.ll
…
combine-smax.ll
…
combine-smin.ll
…
combine-sra-load.ll
…
combine-sra.ll
…
combine-srem.ll
…
combine-srl.ll
…
combine-sse41-intrinsics.ll
…
combine-storetomstore.ll
[DAG] Combine store + vselect to masked_store (#145176)
2025-08-04 19:05:36 +05:30
combine-sub-ssat.ll
[LLVM][SelectionDAG] Align poison/undef binop folds with IR. (#149334)
2025-07-30 11:20:30 +01:00
combine-sub-usat.ll
[LLVM][SelectionDAG] Align poison/undef binop folds with IR. (#149334)
2025-07-30 11:20:30 +01:00
combine-sub.ll
…
combine-subo.ll
…
combine-testm-and.ll
…
combine-testpd.ll
…
combine-testps.ll
…
combine-udiv.ll
…
combine-umax.ll
…
combine-umin.ll
…
combine-undef-index-mscatter.ll
…
combine-urem.ll
…
combineIncDecVector-crash.ll
…
comi-flags.ll
…
commandline-metadata.ll
…
commute-blend-avx2.ll
…
commute-blend-sse41.ll
[X86] X86FixupInstTuning - fold BLENDPS -> MOVSD (#144029)
2025-06-13 11:05:57 +01:00
commute-clmul.ll
…
commute-fcmp.ll
…
commute-intrinsic.ll
…
commute-two-addr.ll
…
commute-vpclmulqdq-avx512.ll
…
commute-vpclmulqdq-avx.ll
…
commute-xop.ll
…
commuted-blend-mask.ll
…
compact-unwind.ll
…
compare_folding.ll
…
compare-add.ll
…
compare-global.ll
…
compare-inf.ll
…
compiler_used.ll
…
complex-asm.ll
…
complex-fastmath.ll
…
complex-fca.ll
…
compress-undef-float-passthrough.ll
…
computeKnownBits_urem.ll
…
concat-cast.ll
…
concat-fpext-v2bf16.ll
Reland [SelectionDAG] Folding ZERO-EXTEND/SIGN_EXTEND poison to Poison value in getNode (#136701)
2025-04-22 17:36:41 -04:00
conditional-indecrement.ll
…
conditional-tailcall-pgso.ll
Fix Windows EH IP2State tables (remove +1 bias) (#144745)
2025-07-22 09:18:13 -07:00
conditional-tailcall-samedest.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
conditional-tailcall.ll
Fix Windows EH IP2State tables (remove +1 bias) (#144745)
2025-07-22 09:18:13 -07:00
consecutive-load-shuffle.ll
…
const-base-addr.ll
…
const-shift-of-constmasked.ll
…
constant-combines.ll
…
constant-hoisting-and.ll
…
constant-hoisting-bfi.ll
…
constant-hoisting-cmp.ll
[X86] constant-hoisting-cmp.ll - regenerate test checks
2025-06-04 17:28:05 +01:00
constant-hoisting-optnone.ll
…
constant-hoisting-shift-immediate.ll
…
constant-pool-partition.ll
[ELF][AsmPrinter] Emit trailing dot for constant pool section when it has a hotness prefix (#150859)
2025-07-29 17:04:59 -07:00
constant-pool-remat-0.ll
…
constant-pool-sharing.ll
[X86] X86FixupVectorConstantsPass - use scheduler model to avoid regressions (#140028)
2025-05-28 11:02:37 +01:00
constpool.ll
…
constrained-fp80-trunc-ext.ll
…
constructor.ll
Remove Native Client support (#133661)
2025-07-15 13:22:33 -04:00
convert-2-addr-3-addr-inc64.ll
…
convertphitype.ll
…
copy-eflags-liveinlists.mir
…
copy-eflags.ll
…
copy-low-subvec-elt-to-high-subvec-elt.ll
[X86] IsElementEquivalent - add handling for X86ISD::VPERMI nodes. (#142767)
2025-06-04 13:47:44 +01:00
copy-propagation.ll
…
copysign-constant-magnitude.ll
…
cov-sections.ll
…
cpus-amd-no-x86_64.ll
Mips/X86: Use reportFatalUsageError for subtarget construction errors (#142028)
2025-05-30 08:03:50 +02:00
cpus-amd.ll
…
cpus-intel-no-x86_64.ll
Mips/X86: Use reportFatalUsageError for subtarget construction errors (#142028)
2025-05-30 08:03:50 +02:00
cpus-intel.ll
…
cpus-no-x86_64.ll
Mips/X86: Use reportFatalUsageError for subtarget construction errors (#142028)
2025-05-30 08:03:50 +02:00
cpus-other.ll
…
crash-lre-eliminate-dead-def.ll
…
crash-nosse.ll
…
crash-O0.ll
…
crash.ll
[llvm] Remove br i1 undef from CodeGen/X86 tests (#121733)
2025-01-06 08:43:39 +00:00
crc32-intrinsics-fast-isel-x86_64.ll
…
crc32-intrinsics-fast-isel-x86.ll
…
crc32-intrinsics-x86_64.ll
…
crc32-intrinsics-x86.ll
…
crc32-target-feature.ll
…
critical-anti-dep-breaker.ll
…
cse-add-with-overflow.ll
…
cse-two-preds.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
csr-split.ll
…
cstring.ll
…
ctlo.ll
[CGP] Despeculate ctlz/cttz with "illegal" integer types (#137197)
2025-04-29 22:33:40 +03:00
ctlz.ll
[CGP] Despeculate ctlz/cttz with "illegal" integer types (#137197)
2025-04-29 22:33:40 +03:00
ctor-priority-coff.ll
[COFF] Preserve UniqueID used to create MCSectionCOFF (#123869)
2025-04-28 13:39:40 +08:00
ctpop-combine.ll
…
ctpop-mask.ll
…
cttz.ll
[CGP] Despeculate ctlz/cttz with "illegal" integer types (#137197)
2025-04-29 22:33:40 +03:00
cvt16-2.ll
[X86] Regenerate VMOVSH assembly comments. NFC.
2025-01-17 15:10:52 +00:00
cvt16.ll
[CodeGen] Use __extendhfsf2 and __truncsfhf2 by default (#126880)
2025-02-19 10:16:57 +01:00
cvtv2f32.ll
…
cxx_tlscc64.ll
…
cycle-info.mir
[CodeGen][NewPM] Port MachineCycleInfo to NPM (#114745)
2025-03-03 11:26:17 +05:30
dag-combine-counter.ll
…
dag-combiner-fma-folding.ll
[SelectionDAG] Fix NaN regression in fma dag-combine. (#146592)
2025-07-01 18:10:30 -04:00
dag-fmf-cse.ll
…
dag-large-offset.ll
[X86] Don't fold very large offsets into addr displacements during ISel (#121678)
2025-01-17 20:09:00 +07:00
dag-merge-fast-accesses.ll
…
dag-optnone.ll
…
dag-rauw-cse.ll
…
dag-update-nodetomatch.ll
…
dagcombine-and-setcc.ll
…
dagcombine-buildvector.ll
…
dagcombine-cse.ll
…
dagcombine-dead-store.ll
…
dagcombine-select.ll
…
dagcombine-shifts.ll
…
dagcombine-tokenfactor-limit-crash.ll
…
dagcombine-unsafe-math.ll
…
darwin-bzero.ll
…
darwin-no-dead-strip.ll
…
darwin-preemption.ll
…
darwin-quote.ll
…
darwin-tls.ll
…
data-section-prefix.ll
[COFF] Preserve UniqueID used to create MCSectionCOFF (#123869)
2025-04-28 13:39:40 +08:00
dbg-baseptr.ll
…
dbg-changes-codegen-branch-folding2.mir
…
dbg-changes-codegen-branch-folding.ll
…
dbg-changes-codegen.ll
…
dbg-combine.ll
[RemoveDIs] Remove "try-debuginfo-iterators..." test flags (#130298)
2025-03-14 15:50:49 +00:00
dbg-distringtype-uint.ll
…
dbg-line-0-no-discriminator.ll
…
dbg-list-dependencies.ll
…
dbg-value-func-arg.ll
…
dbg-value-superreg-copy2.mir
…
dbg-value-superreg-copy.mir
…
dbg-value-swift-async-non-entry-block.ll
…
dbg-value-swift-async.ll
…
DbgValueOtherTargets.test
[RemoveDIs] Remove "try-debuginfo-iterators..." test flags (#130298)
2025-03-14 15:50:49 +00:00
debug-loclists-lto.ll
…
debug-loclists.ll
…
debug-nodebug-crash.ll
…
debug-spilled-snippet.ll
…
debug-spilled-snippet.mir
…
debuginfo-locations-dce.ll
…
debugloc-argsize.ll
…
debugloc-no-line-0.ll
…
delete-dead-instrs-with-live-uses.mir
…
deopt-bundles.ll
…
deopt-intrinsic.ll
…
disable-shrink-store.ll
…
disable-tail-calls.ll
…
discontiguous-loops.ll
[llvm] Remove br i1 undef in some llvm/test/CodeGen tests (#126811)
2025-02-12 09:19:00 +00:00
discriminate-mem-ops-missing-info.ll
…
discriminate-mem-ops-skip-pfetch.ll
…
discriminate-mem-ops.ll
…
distancemap.mir
…
div8.ll
…
div-rem-pair-recomposition-signed.ll
[DAG] visitFREEZE - limit freezing of multiple operands (#149797)
2025-07-22 15:40:55 +01:00
div-rem-pair-recomposition-unsigned.ll
[DAG] visitFREEZE - limit freezing of multiple operands (#149797)
2025-07-22 15:40:55 +01:00
div-rem-simplify.ll
…
divide-by-constant.ll
…
divide-windows-itanium.ll
…
divmod128.ll
…
divrem8_ext.ll
…
divrem-by-select.ll
…
divrem.ll
…
dllexport-x86_64.ll
Introduce MCAsmInfo::UsesSetToEquateSymbol and prefer = to .set
2025-06-11 22:19:31 -07:00
dllexport.ll
Introduce MCAsmInfo::UsesSetToEquateSymbol and prefer = to .set
2025-06-11 22:19:31 -07:00
dllimport-x86_64.ll
…
dllimport.ll
…
dollar-name-asm.ll
X86: Support dollar symbol for AT&T syntax and add output-asm-variant to llc
2025-07-11 20:51:48 -07:00
dollar-name.ll
X86: Support dollar symbol for AT&T syntax and add output-asm-variant to llc
2025-07-11 20:51:48 -07:00
domain-reassignment-implicit-def.ll
…
domain-reassignment-test.ll
[llvm] Remove br i1 undef from CodeGen/X86 tests (#121733)
2025-01-06 08:43:39 +00:00
domain-reassignment.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
dont-remove-empty-preheader.ll
…
dont-trunc-store-double-to-float.ll
…
dpbusd_const.ll
[X86] X86FixupInstTuning - prefer VPBLENDD to VPBLENDW shuffles on AVX2+ targets (#144269)
2025-06-16 10:31:24 +01:00
dpbusd_i4.ll
[x86] dpbusd_i4.ll - regenerate VPTERNLOGD asm comment
2025-06-12 18:40:34 +01:00
dpbusd.ll
[X86] X86FixupInstTuning - prefer VPBLENDD to VPBLENDW shuffles on AVX2+ targets (#144269)
2025-06-16 10:31:24 +01:00
dropped_constructor.ll
…
dso_local_equivalent_errors.ll
…
dso_local_equivalent.ll
AsmPrinter: Remove ELF's special lowerRelativeReference for unnamed_addr function; use lowerDSOLocalEquivalent in more cases
2025-04-08 10:11:20 -07:00
dtor-priority-coff.ll
[COFF] Preserve UniqueID used to create MCSectionCOFF (#123869)
2025-04-28 13:39:40 +08:00
dup-cost.ll
…
dwarf_eh_resume.ll
…
dwarf-aranges-available-externally.ll
…
dwarf-aranges-zero-size.ll
…
dwarf-comp-dir.ll
…
dwarf-eh-prepare-dbg.ll
…
dwarf-eh-prepare.ll
…
dwarf-headers.ll
…
dwarf-headers.o
…
dwarf-split-line-1.ll
…
dwarf-split-line-2.ll
…
dwo-stats.ll
[llvm][ELF] Separate out .dwo bytes written in stats (#126165)
2025-02-07 10:34:16 -08:00
dyn_alloca_aligned.ll
…
dyn-stackalloc.ll
…
dynamic-alloca-in-entry.ll
…
dynamic-alloca-lifetime.ll
…
dynamic-allocas-VLAs-stack-align.ll
…
dynamic-allocas-VLAs.ll
…
dynamic-regmask-preserve-all.ll
…
dynamic-regmask-preserve-most.ll
…
dynamic-regmask-preserve-none.ll
…
dynamic-regmask.ll
…
DynamicCalleeSavedRegisters.ll
…
early-cfi-sections.ll
…
early-ifcvt-crash.ll
[llvm] Remove br i1 undef in some llvm/test/CodeGen tests (#126811)
2025-02-12 09:19:00 +00:00
early-ifcvt-remarks.ll
…
early-ifcvt.ll
…
early-tail-dup-computed-goto.mir
[TailDup] Delay aggressive computed-goto taildup to after RegAlloc. (#150911)
2025-07-31 19:20:05 +01:00
eh_frame.ll
…
eh-frame-unreachable.ll
…
eh-label.ll
…
eh-nolandingpads.ll
…
eh-null-personality.ll
…
eh-unknown.ll
…
ehcontguard.ll
Introduce MCAsmInfo::UsesSetToEquateSymbol and prefer = to .set
2025-06-11 22:19:31 -07:00
eip-addressing-i386.ll
…
element-wise-atomic-memory-intrinsics.ll
…
elementwise-store-of-scalar-splat.ll
…
elf-associated-discarded.ll
…
elf-associated.ll
…
elf-comdat2.ll
…
elf-comdat.ll
…
elf-exclude.ll
…
elf-group.ll
…
elf-retain.ll
…
elf-separate-named-sections.ll
…
elf-unique-sections-by-flags.ll
[CodeGen] Clean up tests that depend on implicit .text in MCAsmStreamer
2024-12-22 21:11:32 -08:00
embed-bitcode.ll
[COFF] Set .llvmbc and .llvmcmd to metadata section (#150879)
2025-07-28 15:25:13 +08:00
emit-big-cst.ll
…
empty-function.ll
…
empty-functions.ll
…
empty-struct-return-type.ll
…
emutls_generic.ll
…
emutls-pic.ll
…
emutls-pie.ll
…
emutls.ll
…
enqcmd-intrinsics.ll
…
epilogue-cfi-fp.ll
…
epilogue-cfi-no-fp.ll
…
epilogue.ll
…
eq-or-eq-range-of-2.ll
[InlineSpiller] Check rematerialization before folding operand (#134015)
2025-04-28 09:52:03 -07:00
equiv_with_fndef.ll
MC,AsmPrinter: Report redefinition error instead of crashing in more cases
2025-06-23 23:00:03 -07:00
equiv_with_vardef.ll
…
evex512-mem.ll
…
evex-to-vex-compress.mir
…
exception-label.ll
…
execstack.ll
…
exedeps-movq.ll
…
exedepsfix-broadcast.ll
…
exp10-libcall-names.ll
RuntimeLibcalls: Stop opting out of exp10 (#148604)
2025-08-04 00:08:46 +09:00
exp10-libcall.ll
[Test] Mark a number of libcall tests nounwind (#148329)
2025-07-12 11:57:28 +02:00
exp10l-libcall-names.ll
RuntimeLibcalls: Stop opting out of exp10 (#148604)
2025-08-04 00:08:46 +09:00
expand-call-rvmarker.mir
…
expand-integer-x86_64-intrinsic-error.ll
…
expand-opaque-const.ll
…
expand-post-ra-pseudo.mir
…
expand-vp-cast-intrinsics.ll
[X86] IsElementEquivalent - add handling for ISD::BITCASTS from smaller vector elements (#139741)
2025-05-23 09:12:29 +01:00
expand-vp-fp-intrinsics.ll
…
expand-vp-int-intrinsics.ll
[VP] IR expansion to Int Func Call (#122867)
2025-01-16 10:12:29 +08:00
expand-vr64-gr64-copy.mir
…
explicit-section-mergeable.ll
…
extend-set-cc-uses-dbg.ll
…
extend.ll
…
extended-fma-contraction.ll
…
extern_weak.ll
…
extmul64.ll
…
extmul128.ll
…
extract-bits.ll
…
extract-combine.ll
…
extract-concat.ll
[X86] X86FixupVectorConstantsPass - use VPMOVSX/ZX extensions for PS/PD domain moves (#122601)
2025-01-12 15:59:05 +00:00
extract-extract.ll
…
extract-fp.ll
…
extract-insert.ll
…
extract-lowbits.ll
…
extract-store.ll
…
extract-vselect-setcc.ll
[X86] SimplifyDemandedVectorEltsForTargetNode - replace packed fcmp node with scalar fcmp node if only element0 is demanded (#140563)
2025-05-20 09:33:28 +01:00
extractelement-fp.ll
[X86] SimplifyDemandedVectorEltsForTargetNode - replace packed fcmp node with scalar fcmp node if only element0 is demanded (#140563)
2025-05-20 09:33:28 +01:00
extractelement-from-arg.ll
…
extractelement-index.ll
…
extractelement-legalization-cycle.ll
…
extractelement-legalization-store-ordering.ll
…
extractelement-load.ll
[X86][Combine] Ensure single use chain in extract-load combine (#136520)
2025-04-24 16:16:50 +02:00
extractps.ll
…
f16c-intrinsics-fast-isel.ll
…
f16c-intrinsics-upgrade.ll
…
f16c-intrinsics.ll
…
fabs.ll
…
fadd-combines.ll
…
fake-use-hpfloat.ll
…
fake-use-ld.ll
…
fake-use-remove-loads.mir
[CodeGen][NPM] Port RemoveLoadsIntoFakeUses to NPM (#130068)
2025-04-14 12:58:03 +05:30
fake-use-scheduler.mir
[MachineScheduler] Optional scheduling of single-MI regions (#129704)
2025-03-04 17:46:44 +01:00
fake-use-simple-tail-call.ll
[Clang] Cleanup docs and comments relating to -fextend-variable-liveness (#124767)
2025-01-28 18:25:32 +00:00
fake-use-suppress-load.ll
…
fake-use-tailcall.ll
…
fake-use-vector2.ll
…
fake-use-vector.ll
…
fake-use-zero-length.ll
[Clang] Cleanup docs and comments relating to -fextend-variable-liveness (#124767)
2025-01-28 18:25:32 +00:00
fast-cc-callee-pops.ll
…
fast-cc-merge-stack-adj.ll
…
fast-cc-pass-in-regs.ll
…
fast-isel-abort-warm.ll
…
fast-isel-agg-constant.ll
…
fast-isel-args-fail2.ll
CodeGen: Convert some assorted errors to use reportFatalUsageError (#142031)
2025-05-30 08:06:53 +02:00
fast-isel-args-fail.ll
…
fast-isel-args.ll
…
fast-isel-atomic.ll
…
fast-isel-avoid-unnecessary-pic-base.ll
…
fast-isel-bail.ll
…
fast-isel-bc.ll
…
fast-isel-bitcast-crash.ll
…
fast-isel-bitcasts-avx512.ll
…
fast-isel-bitcasts-avx.ll
…
fast-isel-bitcasts.ll
…
fast-isel-branch_weights.ll
…
fast-isel-call-bool.ll
…
fast-isel-call-cleanup.ll
…
fast-isel-call.ll
…
fast-isel-cmp-branch.ll
[llvm] Remove br i1 undef from CodeGen/X86 tests (#121733)
2025-01-06 08:43:39 +00:00
fast-isel-constpool.ll
…
fast-isel-constrain-store-indexreg.ll
…
fast-isel-dbg-value-alloca.ll
[RemoveDIs] Remove "try-debuginfo-iterators..." test flags (#130298)
2025-03-14 15:50:49 +00:00
fast-isel-deadcode.ll
…
fast-isel-disable-tail-calls.ll
…
fast-isel-divrem-x86-64.ll
…
fast-isel-divrem.ll
…
fast-isel-double-half-convertion.ll
…
fast-isel-emutls.ll
…
fast-isel-expect.ll
…
fast-isel-extract.ll
…
fast-isel-fcmp.ll
…
fast-isel-float-half-convertion.ll
…
fast-isel-fneg.ll
…
fast-isel-fold-mem.ll
…
fast-isel-fptrunc-fpext.ll
[X86][BreakFalseDeps] Using reverse order for undef register selection (#137569)
2025-06-11 22:08:20 +08:00
fast-isel-freeze.ll
…
fast-isel-gc-intrinsics.ll
…
fast-isel-gep.ll
…
fast-isel-gv.ll
…
fast-isel-i1.ll
…
fast-isel-int-float-conversion-x86-64.ll
[X86][BreakFalseDeps] Using reverse order for undef register selection (#137569)
2025-06-11 22:08:20 +08:00
fast-isel-int-float-conversion.ll
[X86][BreakFalseDeps] Using reverse order for undef register selection (#137569)
2025-06-11 22:08:20 +08:00
fast-isel-large-object.ll
…
fast-isel-load-bitcast-fold.ll
…
fast-isel-load-i1.ll
…
fast-isel-medium-code-model.ll
…
fast-isel-mem.ll
…
fast-isel-movsbl-indexreg.ll
…
fast-isel-nontemporal.ll
…
fast-isel-noplt-pic.ll
…
fast-isel-prolog-dbgloc.ll
…
fast-isel-ret-ext.ll
…
fast-isel-select-cmov2.ll
…
fast-isel-select-cmp.ll
…
fast-isel-select-pseudo-cmov.ll
…
fast-isel-select-sse.ll
…
fast-isel-select.ll
[DAG] getNode - convert scalar i1 arithmetic calls to bitwise instructions (#125486)
2025-02-03 16:36:01 +00:00
fast-isel-sext-zext.ll
…
fast-isel-sext.ll
…
fast-isel-sse12-fptoint.ll
…
fast-isel-stackcheck.ll
[llvm] Remove br i1 undef in some llvm/test/CodeGen tests (#126811)
2025-02-12 09:19:00 +00:00
fast-isel-store.ll
…
fast-isel-tailcall.ll
…
fast-isel-tls.ll
…
fast-isel-trunc-kill-subreg.ll
…
fast-isel-uint-float-conversion-x86-64.ll
[X86][BreakFalseDeps] Using reverse order for undef register selection (#137569)
2025-06-11 22:08:20 +08:00
fast-isel-uint-float-conversion.ll
[X86][BreakFalseDeps] Using reverse order for undef register selection (#137569)
2025-06-11 22:08:20 +08:00
fast-isel-undef-fp.ll
…
fast-isel-vecload.ll
…
fast-isel-x32.ll
Remove Native Client support (#133661)
2025-07-15 13:22:33 -04:00
fast-isel-x86-64.ll
…
fast-isel-x86.ll
…
fast-isel.ll
…
fast-regalloc-live-out-debug-values.mir
…
fastcall-correct-mangling.ll
Introduce MCAsmInfo::UsesSetToEquateSymbol and prefer = to .set
2025-06-11 22:19:31 -07:00
fastcc3struct.ll
…
fastcc-2.ll
…
fastcc-byval.ll
…
fastcc-sret.ll
…
fastcc.ll
…
fastisel-gep-promote-before-add.ll
…
fastisel-memset-flush.ll
…
fastisel-softfloat.ll
…
fastmath-float-half-conversion.ll
…
fastregalloc-selfloop.mir
…
fastregalloc-tied-undef.mir
…
fat-lto-section.ll
…
fcmove.ll
…
fcmp-constant.ll
…
fcmp-logic.ll
[X86][BreakFalseDeps] Using reverse order for undef register selection (#137569)
2025-06-11 22:08:20 +08:00
fdiv-combine-vec.ll
…
fdiv-combine.ll
…
fdiv.ll
[DAGCombiner] Remove UnsafeFPMath usage in visitFSUBForFMACombine etc. (#145637)
2025-06-30 08:41:23 +08:00
fentry-ibt.ll
…
fentry-insertion.ll
…
fentry.mir
[CodeGen][NPM] Port FEntryInserter to NPM (#129857)
2025-03-17 10:35:53 +05:30
field-extract-use-trunc.ll
…
fildll.ll
…
file-directive.ll
…
file-source-filename.ll
…
finite-libcalls.ll
[X86][GlobalISel] Enable POW/EXP*/LOG* functions with libcall mapping (#130328)
2025-03-08 07:30:36 +07:00
fixed-stack-di-mir.ll
…
fixup-blend.ll
[X86] fixup-blend.ll - add commuted load test coverage
2025-06-16 14:37:34 +01:00
fixup-bw-copy.ll
…
fixup-bw-copy.mir
…
fixup-bw-inst.ll
[X86] fixup-bw-inst.ll - regenerate test checks to simplify diff for #123787
2025-01-22 10:47:09 +00:00
fixup-bw-inst.mir
…
fixup-lea.ll
…
flags-copy-lowering.mir
…
float-asmprint.ll
…
float-conv-elim.ll
…
float-strict-powi-convert.ll
…
floor-soft-float.ll
…
flt-rounds.ll
[X86][GlobalISel] Added support for llvm.get.rounding (#147716)
2025-07-11 15:48:18 +02:00
fltused_function_pointer.ll
…
fltused_math.ll
…
fltused_vec.ll
[Win][X86]Fix issue where _fltused reference is incorrectly issued for vector floating point operations (#146792)
2025-07-07 09:31:49 -07:00
fltused.ll
…
fma4-commute-x86.ll
…
fma4-fneg-combine.ll
…
fma4-intrinsics-x86_64-folded-load.ll
…
fma4-intrinsics-x86-upgrade.ll
…
fma4-intrinsics-x86.ll
…
fma4-scalar-memfold.ll
…
fma_patterns_wide.ll
…
fma_patterns.ll
…
fma-commute-loop.ll
…
fma-commute-x86.ll
…
fma-do-not-commute.ll
…
fma-fneg-combine-2.ll
…
fma-fneg-combine.ll
…
fma-intrinsics-canonical.ll
…
fma-intrinsics-fast-isel.ll
…
fma-intrinsics-phi-213-to-231.ll
…
fma-intrinsics-x86-upgrade.ll
…
fma-intrinsics-x86.ll
…
fma-phi-213-to-231.ll
…
fma-scalar-combine.ll
MC: Centralize X86 PC-relative fixup adjustment in MCAssembler
2025-07-08 09:22:30 -07:00
fma-scalar-memfold.ll
…
fma-signed-zero.ll
…
fma.ll
MC: Centralize X86 PC-relative fixup adjustment in MCAssembler
2025-07-08 09:22:30 -07:00
fmaddsub-combine.ll
[X86] Remove UnsafeFPMath uses (#151667)
2025-08-05 08:24:52 +08:00
fmaxnum.ll
[X86] LowerSelect - use BLENDV for scalar selection on all SSE41+ targets (#125853)
2025-02-10 11:24:04 +00:00
fmf-flags.ll
[CodeGen] Use __extendhfsf2 and __truncsfhf2 by default (#126880)
2025-02-19 10:16:57 +01:00
fmf-propagation.ll
…
fmf-reduction.ll
…
fminimum-fmaximum.ll
Revert "[SDAG] Fix fmaximum legalization errors (#142170)"
2025-06-04 14:35:30 +02:00
fminimumnum-fmaximumnum.ll
[X86] Switch operands order for FMINIMUMNUM/FMAXIMUMNUM (#147193)
2025-07-07 09:57:02 +08:00
fminnum.ll
[X86] LowerSelect - use BLENDV for scalar selection on all SSE41+ targets (#125853)
2025-02-10 11:24:04 +00:00
fmsubadd-combine.ll
[X86] Remove UnsafeFPMath uses (#151667)
2025-08-05 08:24:52 +08:00
fmul-combines.ll
…
fmuladd-soft-float.ll
[X86] Fix ABI for passing after i128 (#124134)
2025-01-24 15:31:53 +01:00
fnabs.ll
…
fold_bitcast_md_range.ll
Invalidate range metadata when folding bitcast into load (#133095)
2025-03-27 14:10:55 +07:00
fold-add.ll
…
fold-and-shift-x86_64.ll
…
fold-and-shift.ll
…
fold-broadcast.ll
…
fold-call-2.ll
…
fold-call-3.ll
…
fold-call-oper.ll
…
fold-call.ll
…
fold-imm.ll
…
fold-int-pow2-with-fmul-or-fdiv.ll
[X86][BreakFalseDeps] Using reverse order for undef register selection (#137569)
2025-06-11 22:08:20 +08:00
fold-load-binops.ll
…
fold-load-unops.ll
[X86][BreakFalseDeps] Using reverse order for undef register selection (#137569)
2025-06-11 22:08:20 +08:00
fold-load-vec.ll
…
fold-load.ll
…
fold-loop-of-urem.ll
…
fold-masked-merge-demorgan.ll
[DAG] add (~a | x) & (a | y) -> (a & (x ^ y)) ^y for foldMaskedMerge (#144342)
2025-06-18 17:22:53 +01:00
fold-masked-merge.ll
Reland "[SelectionDAG] Make (a & x) | (~a & y) -> (a & (x ^ y)) ^ y available for all targets" (#143651)
2025-06-11 15:56:37 +08:00
fold-mul-lohi.ll
…
fold-pcmpeqd-1.ll
…
fold-pcmpeqd-2.ll
…
fold-push.ll
…
fold-rmw-ops.ll
MC: Centralize X86 PC-relative fixup adjustment in MCAssembler
2025-07-08 09:22:30 -07:00
fold-select.ll
…
fold-sext-trunc.ll
[RemoveDIs] Remove "try-debuginfo-iterators..." test flags (#130298)
2025-03-14 15:50:49 +00:00
fold-tied-op.ll
…
fold-vector-bv-crash.ll
…
fold-vector-sext-crash2.ll
…
fold-vector-sext-crash.ll
…
fold-vector-sext-zext.ll
…
fold-vector-shl-crash.ll
…
fold-vector-shuffle-crash.ll
[llvm] Remove br i1 undef from CodeGen/X86 tests (#121733)
2025-01-06 08:43:39 +00:00
fold-vector-trunc-sitofp.ll
…
fold-vex.ll
…
fold-xmm-zero.ll
…
fold-zext-trunc.ll
[RemoveDIs] Remove "try-debuginfo-iterators..." test flags (#130298)
2025-03-14 15:50:49 +00:00
foldimmediate-size.ll
…
foldimmediate.mir
…
fops-windows-itanium.ll
…
force-align-stack-alloca.ll
…
force-align-stack.ll
…
fp2sint.ll
…
fp16-libcalls.ll
[X86][AVX512FP16] Decouple AVX512VL and AVX512DQ from AVX512FP16 (#137450)
2025-04-27 14:01:37 +08:00
fp80-strict-libcalls.ll
…
fp80-strict-scalar-cmp.ll
…
fp80-strict-scalar.ll
…
fp128-calling-conv.ll
…
fp128-cast-strict.ll
[X86] Align f128 and i128 to 16 bytes when passing on x86-32 (#138092)
2025-07-17 11:30:36 +02:00
fp128-cast.ll
[X86] Align f128 and i128 to 16 bytes when passing on x86-32 (#138092)
2025-07-17 11:30:36 +02:00
fp128-compare.ll
…
fp128-extract.ll
…
fp128-g.ll
…
fp128-i128.ll
…
fp128-libcalls-strict.ll
[X86] Align f128 and i128 to 16 bytes when passing on x86-32 (#138092)
2025-07-17 11:30:36 +02:00
fp128-libcalls.ll
[X86] Align f128 and i128 to 16 bytes when passing on x86-32 (#138092)
2025-07-17 11:30:36 +02:00
fp128-load.ll
…
fp128-select.ll
[X86] fp128-select.ll - remove CFI noise
2025-07-03 13:14:59 +01:00
fp128-store.ll
…
fp_constant_op.ll
…
fp_load_cast_fold.ll
…
fp_load_fold.ll
…
fp-arith.ll
…
fp-clobbered-by-eh.ll
…
fp-cvt.ll
…
fp-double-rounding.ll
…
fp-elim-and-no-fp-elim.ll
…
fp-elim.ll
…
fp-fast.ll
…
fp-fold.ll
[X86] fp-fold.ll - regenerate checks
2025-02-12 15:32:08 +00:00
fp-i129.ll
[CodeGen] Use __extendhfsf2 and __truncsfhf2 by default (#126880)
2025-02-19 10:16:57 +01:00
fp-immediate-shorten.ll
…
fp-in-intregs.ll
…
fp-intrinsics-flags-x86_64.ll
…
fp-intrinsics-flags.ll
[InstrEmitter] Use AddOperand in EmitCopyToRegClassNode. (#146637)
2025-07-02 09:44:54 -07:00
fp-intrinsics-fma.ll
…
fp-intrinsics.ll
[X86][BreakFalseDeps] Using reverse order for undef register selection (#137569)
2025-06-11 22:08:20 +08:00
fp-load-trunc.ll
…
fp-logic-replace.ll
…
fp-logic.ll
…
fp-round-with-concat-vector-undef-elem.ll
[X86] lowerV4F64Shuffle - prefer BLEND before UNPCK shuffle matching (#141073)
2025-05-22 16:51:00 +01:00
fp-round.ll
[X86] VPTERNLOG comments - use "mem" just for full width loads and "m32bcst" / "m64bcst" for broadcast loads (#143721)
2025-06-12 15:21:05 +01:00
fp-roundeven.ll
[X86] Fold (f16 bitcast extract_vectorelt(v,0)) to (extract_vectorelt (v8f16 bitcast(v,0))) (#125877)
2025-02-06 08:29:39 +00:00
fp-select-cmp-and.ll
[X86] LowerSelect - use BLENDV for scalar selection on all SSE41+ targets (#125853)
2025-02-10 11:24:04 +00:00
fp-stack-2results.ll
…
fp-stack-compare.ll
…
fp-stack-direct-ret.ll
…
fp-stack-O0-crash.ll
[llvm] Remove br i1 undef in some llvm/test/CodeGen tests (#126811)
2025-02-12 09:19:00 +00:00
fp-stack-O0.ll
…
fp-stack-ret-conv.ll
…
fp-stack-ret-store.ll
…
fp-stack-ret.ll
…
fp-stack-retcopy.ll
…
fp-stack-set-st1.ll
…
fp-stack.ll
[llvm] Remove br i1 undef in some llvm/test/CodeGen tests (#126811)
2025-02-12 09:19:00 +00:00
fp-strict-libcalls-msvc32.ll
…
fp-strict-scalar-cmp-fp16.ll
…
fp-strict-scalar-cmp.ll
…
fp-strict-scalar-fp16.ll
[X86] Use X86FixupInstTunings to select between (V)MOVSS/D and (V)BLENDPS/D (#143895)
2025-06-12 18:08:07 +01:00
fp-strict-scalar-fptoint-fp16.ll
[X86] fp-strict-scalar-fptoint-fp16.ll - regenerate VMOVSH comments
2025-02-05 17:37:05 +00:00
fp-strict-scalar-fptoint.ll
…
fp-strict-scalar-inttofp-fp16.ll
[X86] Use X86FixupInstTunings to select between (V)MOVSS/D and (V)BLENDPS/D (#143895)
2025-06-12 18:08:07 +01:00
fp-strict-scalar-inttofp.ll
[X86][BreakFalseDeps] Using reverse order for undef register selection (#137569)
2025-06-11 22:08:20 +08:00
fp-strict-scalar-round-fp16.ll
[X86] Use X86FixupInstTunings to select between (V)MOVSS/D and (V)BLENDPS/D (#143895)
2025-06-12 18:08:07 +01:00
fp-strict-scalar-round.ll
…
fp-strict-scalar.ll
…
fp-trunc.ll
…
fp-undef.ll
…
fp-une-cmp.ll
…
fpclamptosat_vec.ll
[X86] X86FixupVectorConstantsPass - use scheduler model to avoid regressions (#140028)
2025-05-28 11:02:37 +01:00
fpclamptosat.ll
…
fpcmp-soft-fp.ll
DAG: Assert fcmp uno runtime calls are boolean values (#142898)
2025-06-10 10:46:29 +09:00
fpenv-combine.ll
…
fpenv.ll
…
fpstack-debuginstr-kill.ll
…
fptosi-constant.ll
…
fptosi-sat-scalar.ll
[CodeGen] Use __extendhfsf2 and __truncsfhf2 by default (#126880)
2025-02-19 10:16:57 +01:00
fptosi-sat-vector-128.ll
[InlineSpiller] Check rematerialization before folding operand (#134015)
2025-04-28 09:52:03 -07:00
fptoui-may-overflow.ll
…
fptoui-sat-scalar.ll
[CodeGen] Use __extendhfsf2 and __truncsfhf2 by default (#126880)
2025-02-19 10:16:57 +01:00
fptoui-sat-vector-128.ll
[InlineSpiller] Check rematerialization before folding operand (#134015)
2025-04-28 09:52:03 -07:00
frame-base.ll
…
frame-lowering-debug-intrinsic-2.ll
…
frame-lowering-debug-intrinsic.ll
…
frame-order.ll
…
frame-pointer-reserved.ll
[X86] Don't use rbp when it's reserved (#146638)
2025-07-07 10:02:47 +01:00
frameaddr.ll
Remove Native Client support (#133661)
2025-07-15 13:22:33 -04:00
frameregister.ll
…
freeze-binary.ll
[DAG] visitFREEZE - replace multiple frozen/unfrozen uses of an SDValue with just the frozen node (#150017)
2025-08-05 09:24:09 +01:00
freeze-combine.ll
…
freeze-constant-fold.ll
…
freeze-legalize.ll
…
freeze-unary.ll
[DAG] canCreateUndefOrPoison - add handling for ISD::ABS nodes (#148791)
2025-07-15 09:31:26 +01:00
freeze-vector.ll
[DAG] visitFREEZE - replace multiple frozen/unfrozen uses of an SDValue with just the frozen node (#150017)
2025-08-05 09:24:09 +01:00
freeze.ll
…
frem-libcall.ll
…
frem-msvc32.ll
…
frem.ll
[CodeGen] Use __extendhfsf2 and __truncsfhf2 by default (#126880)
2025-02-19 10:16:57 +01:00
fsafdo_probe2.ll
…
fsafdo_probe.ll
…
fsafdo_test1.ll
…
fsafdo_test2.ll
…
fsafdo_test3.ll
…
fsafdo_test4.ll
…
fsetcc.ll
…
fsgsbase.ll
…
fshl-splat-undef.ll
…
fshl.ll
[X86] Align f128 and i128 to 16 bytes when passing on x86-32 (#138092)
2025-07-17 11:30:36 +02:00
fshr.ll
[X86] Align f128 and i128 to 16 bytes when passing on x86-32 (#138092)
2025-07-17 11:30:36 +02:00
fsxor-alignment.ll
…
ftrunc.ll
[X86][BreakFalseDeps] Using reverse order for undef register selection (#137569)
2025-06-11 22:08:20 +08:00
full-lsr.ll
…
func-sanitizer.ll
…
funclet-layout.ll
…
function-alias.ll
…
function-align.ll
CodeGen: Respect function align attribute if less than preferred alignment.
2025-07-18 13:33:46 -07:00
function-subtarget-features-2.ll
…
function-subtarget-features.ll
…
funnel-shift-logic-fold.ll
…
funnel-shift-rot.ll
…
funnel-shift.ll
[X86] Align f128 and i128 to 16 bytes when passing on x86-32 (#138092)
2025-07-17 11:30:36 +02:00
ga-offset2.ll
…
ga-offset.ll
…
gather-addresses.ll
…
gather-scatter-opaque-ptr-2.ll
…
gather-scatter-opaque-ptr.ll
…
gc-empty-basic-blocks.ll
…
gcc_except_table_bb_sections_ehpad_groups_with_cold.ll
…
gcc_except_table_bb_sections_nolpads.ll
…
gcc_except_table_bb_sections.ll
…
gcc_except_table_functions.ll
…
gcc_except_table-multi.ll
…
gcc_except_table.ll
…
gep-expanded-vector.ll
…
getelementptr.ll
…
getmant-false-deps.ll
…
gfni-funnel-shifts.ll
[X86] VPTERNLOG comments - use "mem" just for full width loads and "m32bcst" / "m64bcst" for broadcast loads (#143721)
2025-06-12 15:21:05 +01:00
gfni-intrinsics.ll
…
gfni-lzcnt.ll
[X86] Use GFNI for LZCNT vXi8 ops (#141888)
2025-06-04 14:26:34 +01:00
gfni-rotates.ll
[X86] combineConcatVectorOps - convert ISD::VECTOR_SHUFFLE concatenation to use combineConcatVectorOps recursion (#130610)
2025-03-11 14:37:51 +00:00
gfni-shifts.ll
[X86] VPTERNLOG comments - use "mem" just for full width loads and "m32bcst" / "m64bcst" for broadcast loads (#143721)
2025-06-12 15:21:05 +01:00
gfni-tzcnt.ll
…
ghc-cc64.ll
[RegAlloc] Sort CopyHint by IsCSR (#131046)
2025-04-14 09:58:46 -04:00
ghc-cc.ll
…
global-access-pie.ll
…
global-fill.ll
…
global-sections-comdat.ll
…
global-sections-tls.ll
…
global-sections.ll
[COFF] Preserve UniqueID used to create MCSectionCOFF (#123869)
2025-04-28 13:39:40 +08:00
global-variable-partition.ll
[NFC]In codegen pipeline, turn static-data-splitter pass on/off with its own option (#134752)
2025-04-07 22:22:08 -07:00
global-with-max-align.ll
…
gnu-eh-alternative.ll
…
gnu-seh-nolpads.ll
…
gpr-to-mask.ll
[DAG] getNode - convert scalar i1 arithmetic calls to bitwise instructions (#125486)
2025-02-03 16:36:01 +00:00
graalcc.ll
…
gs-fold.ll
…
h-register-addressing-32.ll
…
h-register-addressing-64.ll
…
h-register-store.ll
…
h-registers-0.ll
…
h-registers-1.ll
…
h-registers-2.ll
…
h-registers-3.ll
…
haddsub-2.ll
…
haddsub-3.ll
…
haddsub-4.ll
…
haddsub-broadcast.ll
…
haddsub-shuf-undef-operand.ll
…
haddsub-shuf.ll
…
haddsub-undef.ll
[X86] combineConcatVectorOps - convert X86ISD::HADD/SUB concatenation to use combineConcatVectorOps recursion (#130579)
2025-03-10 13:03:27 +00:00
haddsub.ll
…
half-constrained.ll
[X86] Use X86FixupInstTunings to select between (V)MOVSS/D and (V)BLENDPS/D (#143895)
2025-06-12 18:08:07 +01:00
half-darwin.ll
[X86] Use X86FixupInstTunings to select between (V)MOVSS/D and (V)BLENDPS/D (#143895)
2025-06-12 18:08:07 +01:00
half-fp80-darwin.ll
[X86] Fold (v4i32 (scalar_to_vector (i32 (anyext (bitcast (f16)))))) -> (v4i32 bitcast (v8f16 scalar_to_vector)) (#123338)
2025-01-17 14:46:22 +00:00
half.ll
[X86][BreakFalseDeps] Using reverse order for undef register selection (#137569)
2025-06-11 22:08:20 +08:00
handle-move.ll
[MISched] Unify the way to specify scheduling direction (#119518)
2024-12-12 11:24:07 +08:00
heap-alloc-markers.mir
…
hidden-vis-2.ll
…
hidden-vis-3.ll
…
hidden-vis-4.ll
…
hidden-vis-pic.ll
…
hidden-vis.ll
…
hipe-cc64.ll
…
hipe-cc.ll
…
hipe-prologue.ll
…
hoist-and-by-const-from-lshr-in-eqcmp-zero.ll
…
hoist-and-by-const-from-shl-in-eqcmp-zero.ll
…
hoist-common.ll
…
hoist-invariant-load.ll
…
hoist-spill-lpad.ll
…
hoist-spill.ll
[llvm] Remove br i1 undef from CodeGen/X86 tests (#121733)
2025-01-06 08:43:39 +00:00
horizontal-reduce-add.ll
…
horizontal-reduce-fadd.ll
…
horizontal-reduce-smax.ll
…
horizontal-reduce-smin.ll
…
horizontal-reduce-umax.ll
…
horizontal-reduce-umin.ll
…
horizontal-shuffle-2.ll
…
horizontal-shuffle-3.ll
…
horizontal-shuffle-4.ll
…
horizontal-shuffle-demanded.ll
…
horizontal-shuffle.ll
…
horizontal-sum.ll
[X86] Remove combineShuffleOfConcatUndef fold (#144524)
2025-06-17 15:30:49 +01:00
hot-unlikely-section-prefix.ll
…
huge-stack-offset2.ll
…
huge-stack-offset.ll
[X86] huge-stack-offset.ll - add gnux32 test coverage
2025-01-27 14:10:16 +00:00
huge-stack.ll
Reapply "[X86] Correct 32-bit immediate assertion and fix 64-bit lowering for huge frame offsets" (#152239)
2025-08-11 21:23:44 +05:30
i1narrowfail.ll
…
i2k.ll
…
i16lshr8pat.ll
…
i64-mem-copy.ll
…
i64-to-float.ll
…
i128-add.ll
[X86] Align f128 and i128 to 16 bytes when passing on x86-32 (#138092)
2025-07-17 11:30:36 +02:00
i128-and-beyond.ll
…
i128-fp128-abi.ll
[X86] Align f128 and i128 to 16 bytes when passing on x86-32 (#138092)
2025-07-17 11:30:36 +02:00
i128-fpconv-win64-strict.ll
…
i128-fpconv-win64.ll
…
i128-immediate.ll
…
i128-mul.ll
…
i128-ret.ll
…
i128-sdiv.ll
[X86] Align f128 and i128 to 16 bytes when passing on x86-32 (#138092)
2025-07-17 11:30:36 +02:00
i128-udiv.ll
[X86] Align f128 and i128 to 16 bytes when passing on x86-32 (#138092)
2025-07-17 11:30:36 +02:00
i256-add.ll
…
i386-baseptr.ll
…
i386-setjmp-pic.ll
…
i386-shrink-wrapping.ll
…
i386-tlscall-fastregalloc.ll
…
i486-fence-loop.ll
…
i686-win-shrink-wrapping.ll
…
iabs.ll
[X86] Align f128 and i128 to 16 bytes when passing on x86-32 (#138092)
2025-07-17 11:30:36 +02:00
icall-branch-funnel.ll
…
icmp-abs-C-vec.ll
[X86] icmp-abs-C-vec.ll - regenerate test checks for TERNLOG comments
2025-05-22 11:30:18 +01:00
icmp-abs-C.ll
…
icmp-opt.ll
…
icmp-pow2-diff.ll
…
icmp-pow2-logic-npow2.ll
…
icmp-pow2-mask.ll
[X86] X86FixupVectorConstantsPass - use scheduler model to avoid regressions (#140028)
2025-05-28 11:02:37 +01:00
icmp-shift-opt.ll
[X86] Align f128 and i128 to 16 bytes when passing on x86-32 (#138092)
2025-07-17 11:30:36 +02:00
ident-metadata.ll
…
ifunc-asm.ll
Introduce MCAsmInfo::UsesSetToEquateSymbol and prefer = to .set
2025-06-11 22:19:31 -07:00
illegal-bitfield-loadstore.ll
[DAGCombiner] Refactor and improve ReduceLoadOpStoreWidth (#119564)
2024-12-16 12:15:11 +01:00
illegal-insert.ll
…
illegal-vector-args-return.ll
…
immediate_merging64.ll
…
immediate_merging.ll
…
implicit-faultmap.ll
…
implicit-null-check-negative.ll
…
implicit-null-check.ll
[X86] Prefer lock or over mfence (#106555)
2025-03-11 16:12:23 +01:00
implicit-null-checks.mir
[llvm] Remove br i1 undef from CodeGen/X86 tests (#121733)
2025-01-06 08:43:39 +00:00
implicit-null-chk-reg-rewrite.mir
[llvm] Remove br i1 undef in some llvm/test/CodeGen tests (#126811)
2025-02-12 09:19:00 +00:00
implicit-use-spill.mir
…
imul-lea-2.ll
…
imul-lea.ll
…
imul.ll
…
inalloca-ctor.ll
…
inalloca-invoke.ll
…
inalloca-regparm.ll
…
inalloca-stdcall.ll
…
inalloca.ll
…
inc-of-add.ll
…
inconsistent_landingpad.ll
…
indirect-br-gep-unmerge.ll
…
indirect-branch-tracking-cm-lager.ll
…
indirect-branch-tracking-eh2.ll
…
indirect-branch-tracking-eh.ll
…
indirect-branch-tracking-r2.ll
…
indirect-branch-tracking.ll
…
indirect-hidden.ll
…
init-priority.ll
…
inline-0bh.ll
…
inline-asm-2addr.ll
…
inline-asm-A-constraint.ll
…
inline-asm-assertion.ll
VirtRegRewriter: Fix verifier errors after regalloc failures (#128280)
2025-02-26 13:19:49 +07:00
inline-asm-avx512f-v-constraint.ll
…
inline-asm-avx512f-x-constraint.ll
…
inline-asm-avx512vl-v-constraint-32bit.ll
…
inline-asm-avx512vl-v-constraint.ll
…
inline-asm-avx-v-constraint-32bit.ll
…
inline-asm-avx-v-constraint.ll
…
inline-asm-bad-constraint-n.ll
…
inline-asm-default-clobbers.ll
…
inline-asm-duplicated-constraint.ll
…
inline-asm-e-constraint.ll
…
inline-asm-error.ll
…
inline-asm-flag-clobber.ll
…
inline-asm-flag-output.ll
…
inline-asm-fpstack.ll
properly align long double on i386 darwin (#148102)
2025-07-11 12:17:43 +08:00
inline-asm-function-call-pic.ll
…
inline-asm-h.ll
…
inline-asm-i-constraint-i1.ll
[MC] Simplify MCBinaryExpr/MCUnaryExpr printing by reducing parentheses (#133674)
2025-03-30 22:03:14 -07:00
inline-asm-imm-out-of-range.ll
…
inline-asm-int-to-fp.ll
…
inline-asm-memop.ll
…
inline-asm-movdir64b-x86_64.ll
…
inline-asm-movdir64b.ll
…
inline-asm-mrv.ll
…
inline-asm-multilevel-gep.ll
…
inline-asm-n-constraint.ll
…
inline-asm-out-regs.ll
…
inline-asm-p-constraint.ll
…
inline-asm-pic.ll
…
inline-asm-ptr-cast.ll
…
inline-asm-q-regs.ll
…
inline-asm-R-constraint.ll
…
inline-asm-sp-clobber-memcpy.ll
…
inline-asm-stack-realign2.ll
…
inline-asm-stack-realign3.ll
…
inline-asm-stack-realign.ll
…
inline-asm-tied.ll
…
inline-asm-Ws-constraint-error.ll
…
inline-asm-Ws-constraint.ll
…
inline-asm-x-i128.ll
…
inline-asm-x-scalar.ll
…
inline-asm.ll
…
inline-spiller-impdef-on-implicit-def-regression.ll
…
inline-sse.ll
…
inlineasm-sched-bug.ll
…
innermost-loop-alignment.ll
…
inreg.ll
…
ins_split_regalloc.ll
…
ins_subreg_coalesce-1.ll
…
ins_subreg_coalesce-2.ll
…
ins_subreg_coalesce-3.ll
MachineLICM: Merge logic for implicit and explicit definitions.
2025-07-09 13:02:15 -07:00
insert-into-constant-vector.ll
[X86] X86FixupVectorConstantsPass - use VPMOVSX/ZX extensions for PS/PD domain moves (#122601)
2025-01-12 15:59:05 +00:00
insert-into-vector-through-stack-no-stack-realign.ll
…
insert-loaded-scalar.ll
…
insert-positions.ll
[llvm] Remove br i1 undef in some llvm/test/CodeGen tests (#126811)
2025-02-12 09:19:00 +00:00
insert-prefetch-inline.afdo
…
insert-prefetch-inline.ll
…
insert-prefetch-invalid-instr.afdo
…
insert-prefetch-invalid-instr.ll
…
insert-prefetch-other.afdo
…
insert-prefetch.afdo
…
insert-prefetch.ll
…
insert-subvector-broadcast.ll
[X86] combineINSERT_SUBVECTOR - generalise insert_subvector(x,extract(broadcast)) -> blend (#140516)
2025-05-21 09:28:52 +01:00
insert.ll
…
insertelement-copytoregs.ll
…
insertelement-duplicates.ll
…
insertelement-legalize.ll
…
insertelement-ones.ll
[DAG] visitINSERT_VECTOR_ELT - convert to or mask if all insertions are -1 (#138213)
2025-05-13 17:10:54 +01:00
insertelement-shuffle.ll
…
insertelement-var-index.ll
[X86] lowerV8I16GeneralSingleInputShuffle - for splat PSHUFW+PSHUFD patterns, widen the splats to encourage combines (#129854)
2025-03-06 14:25:57 +00:00
insertelement-zero.ll
[X86] X86FixupInstTuning - fold BLENDPS -> MOVSD (#144029)
2025-06-13 11:05:57 +01:00
insertps-combine.ll
…
insertps-from-constantpool.ll
…
insertps-O0-bug.ll
…
insertps-unfold-load-bug.ll
…
instr-symbols.mir
…
instrument-function-inlined.ll
…
int8-to-fp.ll
…
int-intrinsic.ll
…
int-to-fp-demanded.ll
…
intersect-fma-fmf.ll
…
interval-update-remat.ll
[llvm] Remove br i1 undef from CodeGen/X86 tests (#121733)
2025-01-06 08:43:39 +00:00
intrinsic-cttz-elts.ll
…
invalid-liveness.mir
…
invalid-operand-bundle-call.ll
[SelectionDAG] Fix misplaced commas in operand bundle errors (#149331)
2025-07-17 21:18:05 +01:00
invalid-operand-bundle-callbr.ll
[SelectionDAG] improve error messages for invalid operator bundle (#148945)
2025-07-15 17:30:48 -07:00
invalid-operand-bundle-invoke.ll
[SelectionDAG] improve error message for invalid op bundles (#148722)
2025-07-14 20:41:10 -07:00
invalid-shift-immediate.ll
…
invpcid-intrinsic.ll
…
ipra-inline-asm.ll
…
ipra-local-linkage-2.ll
…
ipra-local-linkage.ll
…
ipra-reg-alias.ll
…
ipra-reg-usage.ll
…
ipra-transform.ll
…
is_fpclass-fp80.ll
…
is_fpclass.ll
…
isel-and.ll
[X86][GlobalISel] Support addr matching in SDAG patterns (#130445)
2025-04-19 22:59:18 +02:00
isel-blendi-gettargetconstant.ll
…
isel-br.ll
…
isel-brcond-fcmp.ll
[X86] isel-brcond-fcmp.ll - regenerate checks
2025-05-13 17:15:53 +01:00
isel-brcond-icmp.ll
[X86] isel-brcond-icmp.ll - regenerate checks and add missing X86 test coverage
2025-05-13 17:15:54 +01:00
isel-buildvector-avx.ll
[X86] X86FixupVectorConstantsPass - use VPMOVSX/ZX extensions for PS/PD domain moves (#122601)
2025-01-12 15:59:05 +00:00
isel-buildvector-sse2.ll
[X86][GlobalISel] Support addr matching in SDAG patterns (#130445)
2025-04-19 22:59:18 +02:00
isel-buildvector-sse.ll
[X86][GlobalISel] Support addr matching in SDAG patterns (#130445)
2025-04-19 22:59:18 +02:00
isel-extract-subvector-non-pow2-elems.ll
[X86] Fix arithmetic error in extractVector (#128052)
2025-02-24 21:39:28 +08:00
isel-fabs-x87.ll
[X86][GlobalISel] Fix RegBank issue for G_FABS (#145674)
2025-06-30 22:52:12 +02:00
isel-fabs.ll
[X86][GlobalIsel] support G_FABS (#136718)
2025-06-25 10:13:40 +01:00
isel-fcmp-x87.ll
properly align long double on i386 darwin (#148102)
2025-07-11 12:17:43 +08:00
isel-fcmp.ll
[X86][GlobalISel] Support G_FCMP for scalar cases (#123598)
2025-02-07 13:01:21 +05:30
isel-fp-to-int.ll
…
isel-fp-to-sint-x87.ll
[X86][GlobalISel] - Legalize And Select G_FPTOSI/G_SITOFP in X87 mode (#137377)
2025-06-02 16:43:39 +02:00
isel-fpclass.ll
[X86][GlobalISel] Add test for IS_FP_CLASS (#148816)
2025-07-28 00:39:23 +02:00
isel-icmp.ll
[X86][GlobalISel] Support addr matching in SDAG patterns (#130445)
2025-04-19 22:59:18 +02:00
isel-int-to-fp.ll
[X86][BreakFalseDeps] Using reverse order for undef register selection (#137569)
2025-06-11 22:08:20 +08:00
isel-optnone.ll
…
isel-or.ll
[X86][GlobalISel] Support addr matching in SDAG patterns (#130445)
2025-04-19 22:59:18 +02:00
isel-phi.ll
[X86][GlobalISel] Support addr matching in SDAG patterns (#130445)
2025-04-19 22:59:18 +02:00
isel-postprocessing-test-fold-memop.ll
…
isel-sdiv.ll
[X86][GlobalISel] Support addr matching in SDAG patterns (#130445)
2025-04-19 22:59:18 +02:00
isel-select-cmov.ll
[X86][GlobalISel] Support addr matching in SDAG patterns (#130445)
2025-04-19 22:59:18 +02:00
isel-shift.ll
…
isel-sink2.ll
…
isel-sink3.ll
…
isel-sink.ll
…
isel-sint-to-fp-x87.ll
[X86][GlobalISel] - Legalize And Select G_FPTOSI/G_SITOFP in X87 mode (#137377)
2025-06-02 16:43:39 +02:00
isel-sqrt.ll
[X86][GlobalISel] Added support for G_FSQRT (#132356)
2025-03-26 13:52:17 +01:00
isel-srem.ll
[X86][GlobalISel] Support addr matching in SDAG patterns (#130445)
2025-04-19 22:59:18 +02:00
isel-traps.ll
[X86][GlobalISel] Support addr matching in SDAG patterns (#130445)
2025-04-19 22:59:18 +02:00
isel-udiv.ll
[X86][GlobalISel] Support addr matching in SDAG patterns (#130445)
2025-04-19 22:59:18 +02:00
isel-urem.ll
[X86][GlobalISel] Support addr matching in SDAG patterns (#130445)
2025-04-19 22:59:18 +02:00
isel-x87.ll
[X86][GlobalISel] Support addr matching in SDAG patterns (#130445)
2025-04-19 22:59:18 +02:00
isel-xor.ll
[X86][GlobalISel] Support addr matching in SDAG patterns (#130445)
2025-04-19 22:59:18 +02:00
isint.ll
…
isnan2.ll
…
isnan.ll
…
ispositive.ll
…
ispow2.ll
[CodeGenPrepare] Unfold slow ctpop when used in power-of-two test (#102731)
2025-04-23 08:54:10 +03:00
issue56055.ll
…
issue64826-switferror-eh.ll
…
issue76416.ll
…
jcc-indirect-thunk-kernel.ll
…
jump_sign.ll
Reland [SelectionDAG] Folding ZERO-EXTEND/SIGN_EXTEND poison to Poison value in getNode (#136701)
2025-04-22 17:36:41 -04:00
jump-table-partition.ll
[NFC]In codegen pipeline, turn static-data-splitter pass on/off with its own option (#134752)
2025-04-07 22:22:08 -07:00
jump-table-size-section.ll
…
kcfi-arity.ll
[X86][KCFI] Do not require linux triple for kcfi-arity (#148207)
2025-07-11 15:03:30 +02:00
kcfi-patchable-function-prefix.ll
…
kcfi.ll
[SelectionDAG] [KCFI] Allow "kcfi" on invoke (#148742)
2025-07-14 18:55:09 -07:00
keylocker-intrinsics-fast-isel.ll
…
keylocker-intrinsics.ll
…
kmov.ll
[X86] X86FixupVectorConstantsPass - use scheduler model to avoid regressions (#140028)
2025-05-28 11:02:37 +01:00
known-bits-vector.ll
[X86] combineConcatVectorOps - convert ISD::VECTOR_SHUFFLE concatenation to use combineConcatVectorOps recursion (#130610)
2025-03-11 14:37:51 +00:00
known-bits.ll
…
known-never-zero.ll
[X86] Handle BSF/BSR "zero-input pass through" behaviour (#123623)
2025-01-23 12:59:59 +00:00
known-pow2.ll
…
known-signbits-shl.ll
…
known-signbits-vector.ll
…
knownbits-div.ll
…
knownbits-hadd-hsub.ll
[DAG] visitFREEZE - replace multiple frozen/unfrozen uses of an SDValue with just the frozen node (#150017)
2025-08-05 09:24:09 +01:00
kshift.ll
…
label-annotation.ll
…
label-heapallocsite.ll
[RemoveDIs] Remove "try-debuginfo-iterators..." test flags (#130298)
2025-03-14 15:50:49 +00:00
label-redefinition.ll
…
lack-of-signed-truncation-check.ll
…
lakemont.ll
…
large-code-model-isel.ll
…
large-constants-x32.ll
…
large-constants.ll
…
large-displacements-fastisel.ll
Reapply "[X86] Correct 32-bit immediate assertion and fix 64-bit lowering for huge frame offsets" (#152239)
2025-08-11 21:23:44 +05:30
large-displacements.ll
Reapply "[X86] Correct 32-bit immediate assertion and fix 64-bit lowering for huge frame offsets" (#152239)
2025-08-11 21:23:44 +05:30
large-gep-chain.ll
…
large-gep-scale.ll
…
large-global.ll
…
large-pic-jump-table.ll
…
large-pic-string.ll
…
late-address-taken.ll
…
late-remat-update-2.mir
…
late-remat-update.mir
[CodeGen][NewPM] Port RegisterCoalescer to NPM (#124698)
2025-02-03 13:41:51 +07:00
late-tail-dup-computed-goto.mir
[X86] Add late tail duplication tests with computed gotos.
2025-07-28 09:37:16 +01:00
ldexp-f80.ll
[Test] Mark a number of libcall tests nounwind (#148329)
2025-07-12 11:57:28 +02:00
ldexp-libcall.ll
[Test] Mark a number of libcall tests nounwind (#148329)
2025-07-12 11:57:28 +02:00
ldexp-not-readonly.ll
[Test] Mark a number of libcall tests nounwind (#148329)
2025-07-12 11:57:28 +02:00
ldexp-strict.ll
[Test] Mark a number of libcall tests nounwind (#148329)
2025-07-12 11:57:28 +02:00
ldexp-wrong-signature2.ll
[Test] Mark a number of libcall tests nounwind (#148329)
2025-07-12 11:57:28 +02:00
ldexp-wrong-signature.ll
[Test] Mark a number of libcall tests nounwind (#148329)
2025-07-12 11:57:28 +02:00
ldexp.ll
[Test] Mark a number of libcall tests nounwind (#148329)
2025-07-12 11:57:28 +02:00
ldzero.ll
…
lea-2.ll
Remove Native Client support (#133661)
2025-07-15 13:22:33 -04:00
lea-3.ll
Remove Native Client support (#133661)
2025-07-15 13:22:33 -04:00
lea-4.ll
Remove Native Client support (#133661)
2025-07-15 13:22:33 -04:00
lea-5.ll
Remove Native Client support (#133661)
2025-07-15 13:22:33 -04:00
lea-8bit.ll
[X86][APX] Fix a typo in LEA suffix (#135734)
2025-04-15 17:00:25 +08:00
lea-16bit.ll
[X86] Added support for 8 and 16bit LEA instructions (#122102)
2025-03-04 08:12:17 +08:00
lea-dagdag.ll
…
lea-fixup-blockaddress.mir
…
lea-opt2.ll
…
lea-opt-cse1.ll
…
lea-opt-cse2.ll
…
lea-opt-cse3.ll
…
lea-opt-cse4.ll
…
lea-opt-memop-check-1.ll
Introduce MCAsmInfo::UsesSetToEquateSymbol and prefer = to .set
2025-06-11 22:19:31 -07:00
lea-opt-memop-check-2.ll
…
lea-opt-with-debug.mir
…
lea-opt.ll
…
lea-recursion.ll
…
lea.ll
Remove Native Client support (#133661)
2025-07-15 13:22:33 -04:00
leaf-fp-elim.ll
…
leaFixup32.mir
…
leaFixup64.mir
…
legalize-fmp-oeq-vector-select.ll
…
legalize-ins-ext-vec-elt.ll
…
legalize-libcalls.ll
…
legalize-shift-64.ll
…
legalize-shift.ll
…
legalize-shl-vec.ll
…
legalize-sub-zero-2.ll
[llvm] Remove br i1 undef in some llvm/test/CodeGen tests (#126811)
2025-02-12 09:19:00 +00:00
legalize-sub-zero.ll
[X86] legalize-sub-zero.ll - regenerate test checks
2025-07-01 16:07:32 +01:00
legalize-types-remapid.ll
…
legalize-vaarg.ll
…
legalize-vec-assertzext.ll
…
legalizedag_vec.ll
…
licm-dominance.ll
…
licm-nested.ll
…
licm-regpressure.ll
…
licm-symbol.ll
[llvm] Remove br i1 undef in some llvm/test/CodeGen tests (#126811)
2025-02-12 09:19:00 +00:00
lifetime-alias.ll
…
limit-split-cost.mir
[RegAlloc][NewPM] Plug Greedy RA in codegen pipeline (#120557)
2025-03-03 11:06:15 +05:30
limited-prec.ll
…
line-zero-prologue-end.ll
…
linux-preemption.ll
Introduce MCAsmInfo::UsesSetToEquateSymbol and prefer = to .set
2025-06-11 22:19:31 -07:00
lit.local.cfg
…
live-out-reg-info.ll
…
live-range-nosubreg.ll
…
live-vars.ll
…
liveness-local-regalloc.ll
[llvm] Remove br i1 undef in some llvm/test/CodeGen tests (#126811)
2025-02-12 09:19:00 +00:00
llc-override-mcpu-mattr.ll
…
llc-start-stop-instance.ll
…
llrint-conv.ll
[Test] Add and update tests for lrint/llrint (NFC) (#152662)
2025-08-12 09:56:51 +09:00
llround-conv.ll
[X86][GlobalISel] Enable G_LROUND/G_LLROUND with libcall mapping (#125096)
2025-02-03 14:12:43 +07:00
llvm.acos.ll
[X86][GlobalISel] Enable Trigonometric functions with libcall mapping (#126931)
2025-02-27 10:10:36 +07:00
llvm.asin.ll
[X86][GlobalISel] Enable Trigonometric functions with libcall mapping (#126931)
2025-02-27 10:10:36 +07:00
llvm.atan2.ll
[X86][GlobalISel] Enable Trigonometric functions with libcall mapping (#126931)
2025-02-27 10:10:36 +07:00
llvm.atan.ll
[X86][GlobalISel] Enable Trigonometric functions with libcall mapping (#126931)
2025-02-27 10:10:36 +07:00
llvm.cos.ll
[X86][GlobalISel] Enable Trigonometric functions with libcall mapping (#126931)
2025-02-27 10:10:36 +07:00
llvm.cosh.ll
[X86][GlobalISel] Enable Trigonometric functions with libcall mapping (#126931)
2025-02-27 10:10:36 +07:00
llvm.frexp.f80.ll
[Test] Mark a number of libcall tests nounwind (#148329)
2025-07-12 11:57:28 +02:00
llvm.frexp.ll
[Test] Mark a number of libcall tests nounwind (#148329)
2025-07-12 11:57:28 +02:00
llvm.modf-win32.ll
[SDAG][X86] Promote float FMODF to double on 32-bit Windows (#130636)
2025-03-11 12:06:15 +00:00
llvm.sin.ll
[X86][GlobalISel] Enable Trigonometric functions with libcall mapping (#126931)
2025-02-27 10:10:36 +07:00
llvm.sincos.ll
[X86][GlobalISel] Enable SINCOS with libcall mapping (#142438)
2025-06-25 15:37:33 +09:00
llvm.sincos.vec.ll
[X86][NFC] Added/Updated SINCOS function testcases (#141283)
2025-06-02 15:51:32 +02:00
llvm.sinh.ll
[X86][GlobalISel] Enable Trigonometric functions with libcall mapping (#126931)
2025-02-27 10:10:36 +07:00
llvm.tan.ll
[X86][GlobalISel] Enable Trigonometric functions with libcall mapping (#126931)
2025-02-27 10:10:36 +07:00
llvm.tanh.ll
[X86][GlobalISel] Enable Trigonometric functions with libcall mapping (#126931)
2025-02-27 10:10:36 +07:00
load-chain.ll
…
load-combine-dbg.ll
…
load-combine.ll
[LLVM][SelectionDAG] Align poison/undef binop folds with IR. (#149334)
2025-07-30 11:20:30 +01:00
load-local-v3i1.ll
…
load-local-v3i129.ll
…
load-local-v4i5.ll
…
load-partial-dot-product.ll
…
load-partial.ll
…
load-sample-profile-2.ll
…
load-sample-profile.ll
…
load-scalar-as-vector.ll
…
load-slice.ll
…
loadStore_vectorizer.ll
…
loc-remat.ll
…
local_stack_symbol_ordering.ll
…
local-sym-storage-class.ll
…
localescape.ll
Introduce MCAsmInfo::UsesSetToEquateSymbol and prefer = to .set
2025-06-11 22:19:31 -07:00
log2_not_readnone.ll
…
logic-shift.ll
…
logical-load-fold.ll
…
long-double-abi-align.ll
properly align long double on i386 darwin (#148102)
2025-07-11 12:17:43 +08:00
long-setcc.ll
…
longlong-deadload.ll
…
loop-blocks.ll
…
loop-hoist.ll
…
loop-rotate.ll
…
loop-search.ll
…
loop-strength-reduce2.ll
…
loop-strength-reduce4.ll
…
loop-strength-reduce5.ll
…
loop-strength-reduce6.ll
…
loop-strength-reduce7.ll
…
loop-strength-reduce8.ll
…
loop-strength-reduce-2.ll
…
loop-strength-reduce-3.ll
…
loop-strength-reduce-crash.ll
[llvm] Remove br i1 undef from CodeGen/X86 tests (#121733)
2025-01-06 08:43:39 +00:00
loop-strength-reduce.ll
…
lower-bitcast.ll
…
lower-ptrmask.ll
…
lower-vec-shift-2.ll
…
lower-vec-shift.ll
[DAG] canCreateUndefOrPoison - add EXTRACT_SUBVECTOR handling (#132745)
2025-03-24 16:03:47 +00:00
lower-vec-shuffle-bug.ll
…
lrint-conv-i32.ll
[Test] Add and update tests for lrint/llrint (NFC) (#152662)
2025-08-12 09:56:51 +09:00
lrint-conv-i64.ll
[Test] Add and update tests for lrint/llrint (NFC) (#152662)
2025-08-12 09:56:51 +09:00
lround-conv-i32.ll
[X86][GlobalISel] Enable G_LROUND/G_LLROUND with libcall mapping (#125096)
2025-02-03 14:12:43 +07:00
lround-conv-i64.ll
[X86][GlobalISel] Enable G_LROUND/G_LLROUND with libcall mapping (#125096)
2025-02-03 14:12:43 +07:00
lrshrink-debug.ll
…
lrshrink-ehpad-phis.ll
…
lrshrink.ll
…
lsr-addrecloops.ll
…
lsr-crash-empty-uses.ll
[llvm] Remove br i1 undef from CodeGen/X86 tests (#121733)
2025-01-06 08:43:39 +00:00
lsr-delayed-fold.ll
[llvm] Remove br i1 undef from CodeGen/X86 tests (#121733)
2025-01-06 08:43:39 +00:00
lsr-i386.ll
…
lsr-interesting-step.ll
…
lsr-loop-exit-cond.ll
…
lsr-negative-stride.ll
…
lsr-nonaffine.ll
…
lsr-normalization.ll
…
lsr-overflow.ll
[llvm] Remove br i1 undef in some llvm/test/CodeGen tests (#126811)
2025-02-12 09:19:00 +00:00
lsr-quadratic-expand.ll
…
lsr-redundant-addressing.ll
…
lsr-reuse-trunc.ll
…
lsr-reuse.ll
…
lsr-sort.ll
…
lsr-static-addr.ll
…
lsr-wrap.ll
…
lvi-hardening-gadget-graph.ll
…
lvi-hardening-indirectbr.ll
…
lvi-hardening-inline-asm.ll
…
lvi-hardening-loads.ll
…
lvi-hardening-ret.ll
…
lwp-intrinsics-x86_64.ll
…
lwp-intrinsics.ll
…
lzcnt-tzcnt.ll
…
lzcnt-zext-cmp.ll
[X86] SimplifyDemandedVectorEltsForTargetNode - replace packed fcmp node with scalar fcmp node if only element0 is demanded (#140563)
2025-05-20 09:33:28 +01:00
lzcnt.ll
…
macCatalyst.ll
…
machine-block-freq.mir
…
machine-combiner-dbg.mir
…
machine-combiner-int-vec.ll
[X86] X86FixupVectorConstantsPass - use scheduler model to avoid regressions (#140028)
2025-05-28 11:02:37 +01:00
machine-combiner-int.ll
…
machine-combiner.ll
…
machine-copy-dbgvalue.mir
…
machine-copy-prop.mir
…
machine-cp-debug.mir
…
machine-cp-mask-reg.mir
…
machine-cp.ll
…
machine-cse.ll
…
machine-licm-vs-wineh.mir
[win] NFC: Rename EHCatchret to EHCont to allow for EH Continuation targets that aren't catchret instructions (#129953)
2025-03-06 09:28:44 -08:00
machine-loops.ll
…
machine-outliner-cfi-tail-some.mir
…
machine-outliner-cfi-tail.mir
…
machine-outliner-debuginfo.ll
…
machine-outliner-disubprogram.ll
[RemoveDIs] Remove "try-debuginfo-iterators..." test flags (#130298)
2025-03-14 15:50:49 +00:00
machine-outliner-noredzone.ll
…
machine-outliner-tailcalls.ll
…
machine-outliner.ll
…
machine-region-info.mir
…
machine-sink-and-implicit-null-checks.ll
…
machine-sink.ll
…
machine-trace-metrics-crash.ll
Reland [SelectionDAG] Folding ZERO-EXTEND/SIGN_EXTEND poison to Poison value in getNode (#136701)
2025-04-22 17:36:41 -04:00
machine-trace-metrics-entryBB-critpath.ll
…
MachineBranchProb.ll
…
MachineSink-CritEdge.ll
…
MachineSink-DbgValue.ll
…
machinesink-debug-inv-0.mir
[CodeGen][NewPM] Port MachineSink to NPM (#115434)
2025-03-03 15:49:37 +05:30
MachineSink-eflags.ll
…
MachineSink-Issue98477.ll
…
machinesink-merge-debuginfo.ll
…
machinesink-null-debuginfo.ll
…
MachineSink-PHIUse.ll
…
MachineSink-SubReg.ll
…
macho-comdat.ll
…
macho-trap.ll
…
madd.ll
[PHIElimination] Revert #131837 #146320 #146337 (#146850)
2025-07-03 07:48:08 -04:00
mangle-question-mark.ll
[llvm] Linker flags for UEFI (#137878)
2025-04-30 12:14:58 -07:00
mask-negated-bool.ll
…
masked_compressstore_isel.ll
…
masked_compressstore.ll
…
masked_expandload_isel.ll
…
masked_expandload.ll
[X86] X86FixupInstTuning - extend BLENDPD/S -> MOVSD/S handling to SSE variant (#143961)
2025-06-13 08:52:48 +01:00
masked_gather_scatter_widen.ll
…
masked_gather_scatter.ll
[X86] Use X86FixupInstTunings to select between (V)MOVSS/D and (V)BLENDPS/D (#143895)
2025-06-12 18:08:07 +01:00
masked_gather.ll
[X86] Use X86FixupInstTunings to select between (V)MOVSS/D and (V)BLENDPS/D (#143895)
2025-06-12 18:08:07 +01:00
masked_load.ll
[PHIElimination] Revert #131837 #146320 #146337 (#146850)
2025-07-03 07:48:08 -04:00
masked_loadstore_split.ll
…
masked_store_trunc_ssat.ll
[DAG] visitCONCAT_VECTORS - relax legality checks (#137210)
2025-04-24 19:08:06 +01:00
masked_store_trunc_usat.ll
[DAG] visitCONCAT_VECTORS - relax legality checks (#137210)
2025-04-24 19:08:06 +01:00
masked_store_trunc.ll
[DAG] visitCONCAT_VECTORS - relax legality checks (#137210)
2025-04-24 19:08:06 +01:00
masked_store.ll
[X86] combineConcatVectorOps - convert X86ISD::BLENDI concatenation to use combineConcatVectorOps recursion (#131121)
2025-03-13 12:58:22 +00:00
masked-iv-safe.ll
…
masked-iv-unsafe.ll
…
maskmovdqu.ll
…
materialize.ll
…
matrix-multiply.ll
[X86] combineTargetShuffle - canonicalize vperm2x128(x,x)/vperm2x128(undef,x) -> vperm2x128(x,undef)
2025-06-05 12:50:33 +01:00
mature-mc-support.ll
…
mbp-false-cfg-break.ll
[llvm] Remove br i1 undef from some llvm/test/CodeGen tests (#128272)
2025-02-23 09:23:33 +00:00
mcinst-avx-lowering.ll
…
mcinst-lowering.ll
…
mcu-abi.ll
…
mem-intrin-base-reg.ll
…
mem-promote-integers.ll
…
membarrier.ll
[X86] Prefer lock or over mfence (#106555)
2025-03-11 16:12:23 +01:00
memcmp-constant.ll
…
memcmp-mergeexpand.ll
…
memcmp-minsize-x32.ll
…
memcmp-minsize.ll
…
memcmp-more-load-pairs-x32.ll
[X86] Match SETCC_CARRY in addition of SUB when trying to reconstruct LEA (#126551)
2025-02-14 17:38:25 +08:00
memcmp-more-load-pairs.ll
[X86] Match SETCC_CARRY in addition of SUB when trying to reconstruct LEA (#126551)
2025-02-14 17:38:25 +08:00
memcmp-optsize-x32.ll
[X86] Match SETCC_CARRY in addition of SUB when trying to reconstruct LEA (#126551)
2025-02-14 17:38:25 +08:00
memcmp-optsize.ll
[X86] Match SETCC_CARRY in addition of SUB when trying to reconstruct LEA (#126551)
2025-02-14 17:38:25 +08:00
memcmp-pgso-x32.ll
[X86] Match SETCC_CARRY in addition of SUB when trying to reconstruct LEA (#126551)
2025-02-14 17:38:25 +08:00
memcmp-pgso.ll
[X86] Match SETCC_CARRY in addition of SUB when trying to reconstruct LEA (#126551)
2025-02-14 17:38:25 +08:00
memcmp-x32.ll
[X86] Match SETCC_CARRY in addition of SUB when trying to reconstruct LEA (#126551)
2025-02-14 17:38:25 +08:00
memcmp.ll
[X86] Match SETCC_CARRY in addition of SUB when trying to reconstruct LEA (#126551)
2025-02-14 17:38:25 +08:00
memcpy-2.ll
…
memcpy-from-string.ll
…
memcpy-inline-fsrm.ll
…
memcpy-inline.ll
…
memcpy-light-avx.ll
…
memcpy-scoped-aa.ll
…
memcpy-struct-by-value.ll
…
memcpy.ll
…
memfold-mov32r0.ll
…
mempcpy-32.ll
…
mempcpy.ll
…
memset64-on-x86-32.ll
…
memset-2.ll
…
memset-3.ll
…
memset-inline.ll
[X86] lowerV8I16GeneralSingleInputShuffle - for splat PSHUFW+PSHUFD patterns, widen the splats to encourage combines (#129854)
2025-03-06 14:25:57 +00:00
memset-minsize.ll
…
memset-nonzero.ll
[X86] lowerV8I16GeneralSingleInputShuffle - for splat PSHUFW+PSHUFD patterns, widen the splats to encourage combines (#129854)
2025-03-06 14:25:57 +00:00
memset-sse-stack-realignment.ll
…
memset-vs-memset-inline.ll
…
memset-zero.ll
…
memset.ll
…
merge_store_duplicated_loads.ll
…
merge_store.ll
…
merge-consecutive-loads-128.ll
…
merge-consecutive-loads-256.ll
…
merge-consecutive-loads-512.ll
…
merge-consecutive-stores-i1.ll
…
merge-consecutive-stores-nt.ll
…
merge-consecutive-stores.ll
…
merge-huge-sp-updates.ll
Reapply "[X86] Correct 32-bit immediate assertion and fix 64-bit lowering for huge frame offsets" (#152239)
2025-08-11 21:23:44 +05:30
merge-sp-update-lea.ll
…
merge-sp-updates-cfi.ll
…
merge-store-constants.ll
…
merge-store-dependency.ll
…
merge-store-partially-alias-loads.ll
…
merge-vector-stores-scale-idx-crash.ll
[llvm] Remove br i1 undef from CodeGen/X86 tests (#121733)
2025-01-06 08:43:39 +00:00
MergeConsecutiveStores.ll
…
mfence.ll
[X86] mfence.ll - remove dead X32 check prefix
2025-03-12 15:05:44 +00:00
midpoint-int-vec-128.ll
[X86] VPTERNLOG comments - use "mem" just for full width loads and "m32bcst" / "m64bcst" for broadcast loads (#143721)
2025-06-12 15:21:05 +01:00
midpoint-int-vec-256.ll
[DAG] visitFREEZE - replace multiple frozen/unfrozen uses of an SDValue with just the frozen node (#150017)
2025-08-05 09:24:09 +01:00
midpoint-int-vec-512.ll
[DAG] visitFREEZE - replace multiple frozen/unfrozen uses of an SDValue with just the frozen node (#150017)
2025-08-05 09:24:09 +01:00
midpoint-int.ll
[DAG] visitFREEZE - replace multiple frozen/unfrozen uses of an SDValue with just the frozen node (#150017)
2025-08-05 09:24:09 +01:00
min-legal-vector-width.ll
[PHIElimination] Revert #131837 #146320 #146337 (#146850)
2025-07-03 07:48:08 -04:00
mingw-alloca.ll
…
mingw-comdats-xdata.ll
[Cygwin] Emit COMDAT name correctly for Cygwin (#138621)
2025-05-07 14:45:48 +03:00
mingw-comdats.ll
[Cygwin] Emit COMDAT name correctly for Cygwin (#138621)
2025-05-07 14:45:48 +03:00
mingw-hidden.ll
…
mingw-refptr.ll
[Cygwin] Fix global variable dll import (#121439)
2025-01-03 00:08:58 +02:00
misaligned-memset.ll
…
misched_phys_reg_assign_order.ll
…
misched-aa-colored.ll
[MISched] Unify the way to specify scheduling direction (#119518)
2024-12-12 11:24:07 +08:00
misched-aa-mmos.ll
[llvm] Remove br i1 undef from some llvm/test/CodeGen tests (#128272)
2025-02-23 09:23:33 +00:00
misched-balance.ll
…
misched-code-difference-with-debug.ll
…
misched-copy.ll
…
misched-crash.ll
[llvm] Remove br i1 undef from CodeGen/X86 tests (#121733)
2025-01-06 08:43:39 +00:00
misched-critical-path.ll
…
misched-fusion.ll
…
misched-ilp.ll
…
misched-matmul.ll
…
misched-matrix.ll
[MISched] Unify the way to specify scheduling direction (#119518)
2024-12-12 11:24:07 +08:00
misched-new.ll
[MISched] Unify the way to specify scheduling direction (#119518)
2024-12-12 11:24:07 +08:00
mixed-ptr-sizes-i686.ll
…
mixed-ptr-sizes.ll
[llvm][aarch64] Add support for the MS qualifiers __ptr32, __ptr64, _sptr, __uptr (#112793)
2025-01-31 10:39:53 -08:00
mmx-arg-passing-x86-64.ll
…
mmx-arg-passing.ll
…
mmx-arith.ll
…
mmx-bitcast-fold.ll
…
mmx-bitcast.ll
…
mmx-build-vector.ll
…
mmx-coalescing.ll
…
mmx-copy-gprs.ll
…
mmx-cvt.ll
…
mmx-fold-load.ll
…
mmx-fold-zero.ll
[InlineSpiller] Check rematerialization before folding operand (#134015)
2025-04-28 09:52:03 -07:00
mmx-inlineasm.ll
…
mmx-intrinsics.ll
…
mmx-only.ll
…
morestack-decl.ll
…
mov-zero-to-xor.ll
…
movbe.ll
…
movddup-load-fold.ll
…
movdir-intrinsic-x86_64.ll
…
movdir-intrinsic-x86.ll
…
move_latch_to_loop_top.ll
…
movfs.ll
…
movgs.ll
…
movmsk-bittest.ll
…
movmsk-cmp.ll
[X86] movmsk-cmp.ll - regenerate VPTERNLOG asm comments
2025-06-20 11:46:43 +01:00
movmsk.ll
…
movntdq-no-avx.ll
…
movpc32-check.ll
…
movrs-avx10.2-512-intrinsics.ll
…
movrs-avx10.2-intrinsics.ll
…
movrs-builtins.ll
[X86][APX] Support APX + MOVRS (#123264)
2025-01-17 16:06:31 +08:00
movrs-prefetch-builtins.ll
…
movtopush64.ll
…
movtopush-stack-align.ll
…
movtopush.ll
[llvm] No inline stackprobe for UEFI (#139330)
2025-05-12 10:06:11 -07:00
movtopush.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
ms-inline-asm-array.ll
…
ms-inline-asm-avx512.ll
…
ms-inline-asm-functions.ll
…
ms-inline-asm-PR44272.ll
…
ms-inline-asm-redundant-clobber.ll
…
ms-inline-asm-variables-x64-1-reg.ll
…
ms-inline-asm-variables-x64-2-regs.ll
…
ms-inline-asm-variables-x64-nopic.ll
…
ms-inline-asm-variables-x86-1-reg.ll
…
ms-inline-asm-variables-x86-2-regs.ll
…
ms-inline-asm.ll
…
ms-secure-hotpatch-attr.ll
Add support for Windows Secure Hot-Patching (redo) (#145565)
2025-06-24 14:56:55 -07:00
ms-secure-hotpatch-bad-file.ll
Add support for Windows Secure Hot-Patching (redo) (#145565)
2025-06-24 14:56:55 -07:00
ms-secure-hotpatch-direct-global-access.ll
Add support for Windows Secure Hot-Patching (redo) (#145565)
2025-06-24 14:56:55 -07:00
ms-secure-hotpatch-functions-file.ll
Add support for Windows Secure Hot-Patching (redo) (#145565)
2025-06-24 14:56:55 -07:00
ms-secure-hotpatch-functions-list.ll
Add support for Windows Secure Hot-Patching (redo) (#145565)
2025-06-24 14:56:55 -07:00
mul64.ll
…
mul128_sext_loop.ll
…
mul128.ll
[X86] Align f128 and i128 to 16 bytes when passing on x86-32 (#138092)
2025-07-17 11:30:36 +02:00
mul-cmp.ll
…
mul-constant-i8.ll
…
mul-constant-i16.ll
…
mul-constant-i32.ll
…
mul-constant-i64.ll
[X86] combineAdd - fold (add (sub (shl x, c), y), z) -> (sub (add (shl x, c), z), y) (#142734)
2025-06-05 08:20:44 +01:00
mul-constant-result.ll
…
mul-demand.ll
…
mul-i256.ll
…
mul-i512.ll
…
mul-i1024.ll
…
mul-legalize.ll
…
mul-remat.ll
…
mul-shift-reassoc.ll
…
mulc-false-deps.ll
…
mulfix_combine.ll
…
mulo-pow2.ll
…
muloti.ll
[TargetLowering] Improve one signature of forceExpandWideMUL. (#123991)
2025-01-23 12:49:35 -08:00
mult-alt-generic-i686.ll
…
mult-alt-generic-x86_64.ll
…
mult-alt-x86.ll
…
multiple-loop-post-inc.ll
[llvm] Remove br i1 undef from some llvm/test/CodeGen tests (#128272)
2025-02-23 09:23:33 +00:00
multiple-return-values-cross-block.ll
…
mulvi32.ll
[X86] combineConcatVectorOps - convert ISD::VECTOR_SHUFFLE concatenation to use combineConcatVectorOps recursion (#130610)
2025-03-11 14:37:51 +00:00
mulx32.ll
…
mulx64.ll
…
musttail-fastcall.ll
…
musttail-inalloca.ll
…
musttail-indirect.ll
…
musttail-tailcc.ll
[X86] Use X86 check prefix for 32-bit instead of X32 in tail call tests. NFC.
2025-05-12 13:56:45 +01:00
musttail-thiscall.ll
…
musttail-varargs.ll
[llvm][X86] REX profile for UEFI (#138362)
2025-06-09 13:46:40 -07:00
musttail.ll
…
mwaitx.ll
[RegAlloc] Sort CopyHint by IsCSR (#131046)
2025-04-14 09:58:46 -04:00
mxcsr-reg-usage.ll
…
naked-fn-with-frame-pointer.ll
…
naked-fn-with-unreachable-trap.ll
[SelectionDAG] Not issue TRAP node if naked function (#132147)
2025-03-20 18:18:03 -07:00
named-reg-alloc.ll
CodeGen: Emit error if getRegisterByName fails (#145194)
2025-06-23 16:33:35 +09:00
named-reg-notareg.ll
CodeGen: Emit error if getRegisterByName fails (#145194)
2025-06-23 16:33:35 +09:00
named-vector-shuffle-reverse.ll
…
narrow_op-1.ll
…
narrow-load-metadata.ll
Reland "DAG: Preserve range metadata when load is narrowed" (#128144) (#130609)
2025-03-13 12:47:03 +07:00
narrow-shl-cst.ll
…
narrow-shl-load.ll
…
neg_cmp.ll
…
neg_fp.ll
…
neg-abs.ll
[X86] Align f128 and i128 to 16 bytes when passing on x86-32 (#138092)
2025-07-17 11:30:36 +02:00
neg-of-3ops-lea.ll
…
neg-shl-add.ll
…
negate-add-zero.ll
…
negate-i1.ll
…
negate-shift.ll
…
negate.ll
…
negative_zero.ll
…
negative-offset.ll
…
negative-sin.ll
…
negative-stride-fptosi-user.ll
…
negative-subscript.ll
…
new-remat.ll
…
newline-and-quote.ll
…
no-and8ri8.ll
…
no-cmov.ll
…
no-dup-cv-directive.ll
…
no-non-zero-debug-loc-prologue.ll
…
no-plt-libcalls.ll
[IR] Convert from nocapture to captures(none) (#123181)
2025-01-29 16:56:47 +01:00
no-plt.ll
…
no-prolog-kill.ll
…
no-ret-in-x87-reg.ll
…
no-split-size.ll
…
no-sse2-avg.ll
…
no-sse-win64.ll
[llvm] Win x64 Unwind V2 1/n: Mark beginning and end of epilogs (#110024)
2025-01-30 13:51:30 -08:00
no-sse-x86.ll
…
no-stack-arg-probe.ll
…
no-trap-after-noreturn-fastisel.ll
…
no-wide-load.ll
…
nobt.ll
…
nocf_check.ll
[X86] nocf_check: disable tail call
2025-03-16 16:18:14 -07:00
nocfivalue.ll
…
nofpclass.ll
CodeGen: Add ISD::AssertNoFPClass (#138839)
2025-05-15 16:05:15 +08:00
nomerge.ll
…
nomovtopush.ll
…
non-lazy-bind.ll
…
non-unique-sections.ll
…
non-value-mem-operand.mir
…
nontemporal-2.ll
…
nontemporal-3.ll
…
nontemporal-4.ll
[X86] X86FixupVectorConstantsPass - use VPMOVSX/ZX extensions for PS/PD domain moves (#122601)
2025-01-12 15:59:05 +00:00
nontemporal-loads-2.ll
…
nontemporal-loads.ll
…
nontemporal.ll
…
noreturn-call-linux.ll
…
noreturn-call-win64.ll
Fix Windows EH IP2State tables (remove +1 bias) (#144745)
2025-07-22 09:18:13 -07:00
noreturn-call.ll
…
norex-subreg.ll
…
nosse-error1.ll
…
nosse-varargs.ll
…
nosse-vector.ll
…
not-and-simplify.ll
…
not-of-dec.ll
[DAGCombiner] Add hasOneUse checks for folding (not (add X, -1)) to (neg X) (#126667)
2025-02-12 12:24:29 +08:00
not-shift.ll
…
note-cet-property-inlineasm.ll
…
note-cet-property.ll
…
note-sections.ll
…
null-mcstreamer.ll
…
null-streamer.ll
…
O0-pipeline.ll
[X86][APX] Suppress EGPR/NDD instructions for relocations (#136660)
2025-04-29 19:12:59 +08:00
objc-gc-module-flags.ll
…
oddshuffles.ll
[X86] combineINSERT_SUBVECTOR - directly fold to X86ISD::SUBV_BROADCAST_LOAD to prevent vector split infinite loop (#145077)
2025-06-21 00:38:30 +02:00
oddsubvector.ll
[DAG] visitFREEZE - replace multiple frozen/unfrozen uses of an SDValue with just the frozen node (#150017)
2025-08-05 09:24:09 +01:00
offload_sections.ll
…
offset-operator.ll
…
omit-urem-of-power-of-two-or-zero-when-comparing-with-zero.ll
…
opaque-constant-asm.ll
…
opaque-ptr.ll
…
opt_phis2.mir
…
opt_phis.mir
…
opt-ext-uses.ll
…
opt-pipeline.ll
[CodeGen] Inline stack guard check on Windows (#136290)
2025-06-12 19:38:42 +05:00
opt-shuff-tstore.ll
…
optimize-compare.mir
Revert "[X86][APX] Support peephole optimization with CCMP instruction (#129994)" (#136796)
2025-04-25 10:55:31 +08:00
optimize-max-0.ll
…
optimize-max-1.ll
…
optimize-max-2.ll
…
optimize-max-3.ll
…
optnone.mir
…
or-address.ll
…
or-branch.ll
…
or-lea.ll
…
or-with-overflow.ll
…
oss-fuzz-25184.ll
…
osx-private-labels.ll
…
overflow-intrinsic-optimizations.ll
…
overflow-intrinsic-setcc-fold.ll
…
overflow.ll
…
overflowing-iv-codegen.ll
…
overflowing-iv.ll
…
overlap-shift.ll
…
packed_struct.ll
…
packss.ll
…
packus.ll
…
paddus.ll
[x86] paddus.ll - regenerate VPTERNLOG comments
2025-03-10 17:25:15 +00:00
palignr.ll
…
parity-vec.ll
…
parity.ll
…
partial-fold32.ll
…
partial-fold64.ll
…
partial-tail-dup.ll
…
partition.ll
…
pass-three.ll
…
patchable-function-entry-ibt.ll
…
patchable-function-entry.ll
Support alternative sections for patchable function entries (#131230)
2025-04-02 21:53:55 +00:00
patchable-prologue-debuginfo.ll
…
patchable-prologue-tailcall.ll
…
patchable-prologue.ll
…
patchpoint-invoke.ll
…
patchpoint-verifiable.mir
…
patchpoint.ll
…
pause.ll
…
pcsections-atomics.ll
[SelectionDAG] Fix copyExtraInfo where new node has entry as operand (#149307)
2025-07-17 15:44:21 +02:00
pcsections-memops.ll
…
pcsections.ll
…
peep-setb.ll
…
peep-test-0.ll
…
peep-test-1.ll
…
peep-test-2.ll
…
peep-test-3.ll
…
peep-test-4.ll
…
peep-test-5.ll
…
peephole-copy.ll
…
peephole-copy.mir
[CodeGen] Fix INLINEASM regclass numbers to match names in tests (#142359)
2025-07-21 10:23:08 +01:00
peephole-cvt-sse.ll
…
peephole-fold-movsd.ll
…
peephole-fold-testrr.mir
…
peephole-multiple-folds.ll
…
peephole-na-phys-copy-folding.ll
…
peephole-nofold-tpoff-x86_64.mir
…
peephole-nofold-tpoff-x86.mir
…
peephole-recurrence.mir
…
peephole-test-after-add.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
peephole.mir
…
perm.avx2-false-deps.ll
…
perm.avx512-false-deps.ll
…
personality_size.ll
…
personality.ll
…
phaddsub-extract.ll
…
phaddsub-undef.ll
…
phaddsub.ll
…
phi-bit-propagation.ll
[llvm] Remove br i1 undef from some llvm/test/CodeGen tests (#128272)
2025-02-23 09:23:33 +00:00
phi-immediate-factoring.ll
…
phielim-split.ll
…
phielim-undef.mir
…
phys_subreg_coalesce-2.ll
…
phys_subreg_coalesce-3.ll
…
phys_subreg_coalesce.ll
…
phys-reg-local-regalloc.ll
…
physreg-pairs-error.ll
…
physreg-pairs.ll
…
pic_jumptable.ll
…
pic-load-remat.ll
…
pic.ll
…
pie.ll
…
pku.ll
…
pmaddubsw.ll
…
pmovext.ll
…
pmovsx-inreg.ll
…
pmul.ll
[X86] VPTERNLOG comments - use "mem" just for full width loads and "m32bcst" / "m64bcst" for broadcast loads (#143721)
2025-06-12 15:21:05 +01:00
pmulh.ll
[X86] combinePMULH - combine mulhu + srl (#132548)
2025-08-05 16:10:56 +05:30
pmulld.ll
…
pmullq-false-deps.ll
…
pointer-vector.ll
…
poison-ops.ll
[SelectionDAG] Propagate poison in getNode with two operands if the input is poison. (#135387)
2025-04-17 09:23:14 -04:00
pop-stack-cleanup-msvc.ll
…
pop-stack-cleanup.ll
…
popcnt.ll
[X86] Align f128 and i128 to 16 bytes when passing on x86-32 (#138092)
2025-07-17 11:30:36 +02:00
post-ra-sched-with-debug.mir
CodeGen][NewPM] Port PostRAScheduler to NPM. (#125798)
2025-02-05 12:45:59 +05:30
post-ra-sched.ll
…
postalloc-coalescing.ll
…
postra-ignore-dbg-instrs.mir
[CodeGen][NewPM] Port "PostRAMachineSink" pass to NPM (#129690)
2025-07-10 13:10:46 +05:30
postra-licm.ll
…
pow-libcall.ll
…
pow.75.ll
…
pow.ll
…
powi-const.ll
[X86][NFC] Added POWI function testcases (#134276)
2025-04-04 13:42:20 +02:00
powi-int32min.ll
…
powi-windows.ll
…
powi.ll
[X86][GlobalISel] Enable POWI function with libcall mapping (#134369)
2025-04-07 14:32:56 +02:00
pr1462.ll
…
pr1489.ll
…
pr1505.ll
…
pr1505b.ll
…
pr2177.ll
…
pr2182.ll
…
pr2326.ll
…
pr2585.ll
…
pr2656.ll
…
pr2659.ll
…
pr2849.ll
…
pr2924.ll
…
pr2982.ll
…
pr3154.ll
…
pr3216.ll
…
pr3241.ll
…
pr3243.ll
…
pr3244.ll
…
pr3250.ll
…
pr3317.ll
…
pr3366.ll
…
pr3457.ll
…
pr3522.ll
…
pr5145.ll
…
pr7882.ll
…
pr8925.ll
[X86] Add test coverage for #9297
2025-02-14 11:38:47 +00:00
pr9127.ll
…
pr9517.ll
…
pr9743.ll
…
pr10068.ll
…
pr10475.ll
[llvm] Remove br i1 undef from CodeGen/X86 tests (#121733)
2025-01-06 08:43:39 +00:00
pr10499.ll
…
pr10523.ll
…
pr10524.ll
…
pr10525.ll
…
pr10526.ll
…
pr11202.ll
…
pr11334.ll
…
pr11415.ll
…
pr11468.ll
…
pr11985.ll
…
pr11998.ll
[llvm] Remove br i1 undef from CodeGen/X86 tests (#121733)
2025-01-06 08:43:39 +00:00
pr12360.ll
…
pr12889.ll
…
pr13209.ll
…
pr13220.ll
…
pr13458.ll
…
pr13577.ll
…
pr13859.ll
…
pr13899.ll
…
pr14088.ll
…
pr14098.ll
…
pr14161.ll
…
pr14204.ll
…
pr14314.ll
…
pr14333.ll
…
pr14562.ll
…
pr15267.ll
…
pr15296.ll
…
pr15309.ll
…
pr15705.ll
[PHIElimination] Revert #131837 #146320 #146337 (#146850)
2025-07-03 07:48:08 -04:00
pr15981.ll
…
pr16031.ll
…
pr16360.ll
…
pr16807.ll
…
pr17546.ll
…
pr17631.ll
…
pr17764.ll
…
pr18014.ll
…
pr18054.ll
…
pr18162.ll
…
pr18344.ll
…
pr18846.ll
[llvm] Remove br i1 undef from some llvm/test/CodeGen tests (#128272)
2025-02-23 09:23:33 +00:00
pr19049.ll
…
pr20011.ll
…
pr20012.ll
…
pr20020.ll
…
pr20088.ll
…
pr21099.ll
…
pr21792.ll
…
pr22019.ll
Introduce MCAsmInfo::UsesSetToEquateSymbol and prefer = to .set
2025-06-11 22:19:31 -07:00
pr22103.ll
…
pr22338.ll
…
pr22473.ll
…
pr22774.ll
…
pr22970.ll
…
pr23103.ll
…
pr23246.ll
…
pr23258.ll
…
pr23273.ll
…
pr23603.ll
…
pr23664.ll
…
pr24139.ll
…
pr24374.ll
…
pr24602.ll
…
pr25725.ll
…
pr25828.ll
…
pr26350.ll
…
pr26625.ll
…
pr26652.ll
…
pr26757.ll
…
pr26835.ll
…
pr26870.ll
…
pr27071.ll
…
pr27202.ll
…
pr27501.ll
…
pr27591.ll
…
pr27681.mir
CodeGen][NewPM] Port PostRAScheduler to NPM. (#125798)
2025-02-05 12:45:59 +05:30
pr28129.ll
…
pr28173.ll
…
pr28444.ll
…
pr28472.ll
…
pr28489.ll
…
pr28515.ll
…
pr28560.ll
…
pr28824.ll
…
pr29010.ll
…
pr29022.ll
…
pr29061.ll
…
pr29112.ll
[X86] X86FixupVectorConstantsPass - use VPMOVSX/ZX extensions for PS/PD domain moves (#122601)
2025-01-12 15:59:05 +00:00
pr29170.ll
…
pr29222.ll
…
pr30284.ll
[DAG] Combine store + vselect to masked_store (#145176)
2025-08-04 19:05:36 +05:30
pr30290.ll
[X86] X86FixupVectorConstantsPass - use scheduler model to avoid regressions (#140028)
2025-05-28 11:02:37 +01:00
pr30430.ll
…
pr30511.ll
…
pr30562.ll
…
pr30813.ll
…
pr30821.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
pr31045.ll
…
pr31088.ll
[X86] Fold (f16 bitcast extract_vectorelt(v,0)) to (extract_vectorelt (v8f16 bitcast(v,0))) (#125877)
2025-02-06 08:29:39 +00:00
pr31143.ll
…
pr31242.ll
…
pr31271.ll
…
pr31323.ll
…
pr31593.ll
…
pr31773.ll
…
pr31956.ll
…
pr32108.ll
[llvm] Remove br i1 undef from CodeGen/X86 tests (#121733)
2025-01-06 08:43:39 +00:00
pr32241.ll
…
pr32256.ll
[PHIElimination] Revert #131837 #146320 #146337 (#146850)
2025-07-03 07:48:08 -04:00
pr32278.ll
…
pr32282.ll
…
pr32284.ll
[X86] EmitCmp - use existing XOR node to check for equality (#125506)
2025-02-04 09:14:37 +00:00
pr32329.ll
…
pr32340.ll
…
pr32345.ll
…
pr32368.ll
…
pr32420.ll
…
pr32451.ll
…
pr32484.ll
…
pr32515.ll
…
pr32588.ll
…
pr32610.ll
…
pr32659.ll
…
pr32907.ll
…
pr33010.ll
…
pr33290.ll
…
pr33349.ll
[X86] combineKSHIFT - fold kshiftr(kshiftr/extract_subvector(X,C1),C2) --> kshiftr(X,C1+C2) (#115528)
2024-12-18 09:48:38 +00:00
pr33715.ll
…
pr33747.ll
…
pr33828.ll
…
pr33954.ll
…
pr33960.ll
[LLVM][SelectionDAG] Align poison/undef binop folds with IR. (#149334)
2025-07-30 11:20:30 +01:00
pr34080-2.ll
…
pr34080.ll
[X86][BreakFalseDeps] Using reverse order for undef register selection (#137569)
2025-06-11 22:08:20 +08:00
pr34088.ll
…
pr34137.ll
…
pr34139.ll
…
pr34149.ll
…
pr34177.ll
[X86] combineKSHIFT - fold kshiftr(kshiftr/extract_subvector(X,C1),C2) --> kshiftr(X,C1+C2) (#115528)
2024-12-18 09:48:38 +00:00
pr34271-1.ll
…
pr34271.ll
…
pr34292.ll
…
pr34381.ll
…
pr34397.ll
…
pr34421.ll
…
pr34592.ll
[X86] lowerVECTOR_SHUFFLE - canonicalize zeros/ones/fp splat constants to ensure no undefs (#141214)
2025-05-23 11:02:46 +01:00
pr34605.ll
…
pr34629.ll
…
pr34634.ll
…
pr34653.ll
…
pr34657.ll
…
pr34855.ll
…
pr35272.ll
…
pr35316.ll
…
pr35399.ll
…
pr35443.ll
…
pr35636.ll
…
pr35761.ll
…
pr35763.ll
[DAGCombiner] Refactor and improve ReduceLoadOpStoreWidth (#119564)
2024-12-16 12:15:11 +01:00
pr35765.ll
…
pr35918.ll
…
pr35972.ll
…
pr35982.ll
…
pr36199.ll
…
pr36274.ll
…
pr36312.ll
…
pr36553.ll
…
pr36602.ll
…
pr36865.ll
…
pr37025.ll
…
pr37063.ll
[SDAG] Remove noundef workaround for range metadata/attributes (#141745)
2025-05-30 10:56:49 +02:00
pr37264.ll
…
pr37359.ll
…
pr37499.ll
…
pr37820.ll
…
pr37826.ll
…
pr37879.ll
[X86][BreakFalseDeps] Using reverse order for undef register selection (#137569)
2025-06-11 22:08:20 +08:00
pr37916.ll
…
pr38038.ll
…
pr38185.ll
…
pr38217.ll
…
pr38533.ll
…
pr38539.ll
[DAG] visitFREEZE - replace multiple frozen/unfrozen uses of an SDValue with just the frozen node (#150017)
2025-08-05 09:24:09 +01:00
pr38639.ll
[X86] lowerVECTOR_SHUFFLE - canonicalize zeros/ones/fp splat constants to ensure no undefs (#141214)
2025-05-23 11:02:46 +01:00
pr38738.ll
…
pr38743.ll
…
pr38762.ll
…
pr38763.ll
…
pr38795-verifier-error-pr38788.mir
…
pr38795.ll
[PHIElimination] Revert #131837 #146320 #146337 (#146850)
2025-07-03 07:48:08 -04:00
pr38803.ll
[X86][BreakFalseDeps] Using reverse order for undef register selection (#137569)
2025-06-11 22:08:20 +08:00
pr38819.ll
…
pr38865-2.ll
…
pr38865-3.ll
…
pr38865.ll
MC: Centralize X86 PC-relative fixup adjustment in MCAssembler
2025-07-08 09:22:30 -07:00
pr38952.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
pr39098.ll
…
pr39243.ll
…
pr39666.ll
…
pr39733.ll
…
pr39896.ll
…
pr39926.ll
…
pr40090.ll
[X86] Use BSR passthrough behaviour to fold (CMOV (BSR ?, X), Y, (X == 0)) -> (BSR Y, X) (#143662)
2025-06-12 10:46:08 +01:00
pr40289-64bit.ll
…
pr40289.ll
…
pr40529.ll
…
pr40539.ll
[X86] SimplifyDemandedVectorEltsForTargetNode - replace packed fcmp node with scalar fcmp node if only element0 is demanded (#140563)
2025-05-20 09:33:28 +01:00
pr40631_deadstore_elision.ll
…
pr40730.ll
[X86] Use X86FixupInstTunings to select between (V)MOVSS/D and (V)BLENDPS/D (#143895)
2025-06-12 18:08:07 +01:00
pr40737.ll
…
pr40811.ll
…
pr40891.ll
[DAG] visitCONCAT_VECTORS - relax legality checks (#137210)
2025-04-24 19:08:06 +01:00
pr40994.ll
…
pr41619_reduced.mir
X86: Remove hack in shouldRewriteCopySrc for subregister handling (#125224)
2025-02-05 23:25:04 +07:00
pr41619.ll
PeepholeOpt: Remove subreg def check for bitcast (#130086)
2025-03-07 07:44:08 +07:00
pr41678.ll
…
pr41748.ll
…
pr42064.ll
…
pr42452.ll
…
pr42565.ll
…
pr42616.ll
…
pr42727.ll
…
pr42870.ll
…
pr42905.ll
[DAG] visitEXTRACT_SUBVECTOR - accumulate SimplifyDemandedVectorElts demanded elts across all EXTRACT_SUBVECTOR uses (REAPPLIED) (#133401)
2025-03-29 17:55:38 +00:00
pr42909.ll
…
pr42992.ll
…
pr42998.ll
…
pr43157.ll
[X86] Add diagnostic for fp128 inline assemble for 32-bit (#146458)
2025-07-01 12:39:43 +08:00
pr43507.ll
…
pr43509.ll
…
pr43529.ll
…
pr43575.ll
…
pr43820.ll
…
pr43866.ll
…
pr43952.ll
…
pr44140.ll
…
pr44396.ll
…
pr44412.ll
…
pr44749.ll
…
pr44812.ll
…
pr44915.ll
…
pr44976.ll
…
pr45067.ll
…
pr45378.ll
…
pr45443.ll
…
pr45563-2.ll
…
pr45563.ll
…
pr45833.ll
…
pr45995-2.ll
…
pr45995.ll
…
pr46004.ll
[X86] Align f128 and i128 to 16 bytes when passing on x86-32 (#138092)
2025-07-17 11:30:36 +02:00
pr46189.ll
…
pr46315.ll
…
pr46455.ll
…
pr46527.ll
[X86] lowerV8I16GeneralSingleInputShuffle - for splat PSHUFW+PSHUFD patterns, widen the splats to encourage combines (#129854)
2025-03-06 14:25:57 +00:00
pr46532.ll
[X86] X86FixupVectorConstantsPass - use scheduler model to avoid regressions (#140028)
2025-05-28 11:02:37 +01:00
pr46585.ll
…
pr46820.ll
…
pr46827.ll
…
pr46877.ll
…
pr47000.ll
…
pr47024.ll
…
pr47299.ll
…
pr47482.ll
…
pr47517.ll
…
pr47857.ll
…
pr47874.ll
…
pr48064.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
pr48215.ll
…
pr48458.ll
…
pr48727.ll
…
pr48888.ll
…
pr49028.ll
…
pr49076.ll
…
pr49087.ll
…
pr49162.ll
…
pr49393.ll
…
pr49451.ll
[PHIElimination] Revert #131837 #146320 #146337 (#146850)
2025-07-03 07:48:08 -04:00
pr49466.ll
…
pr49467.ll
…
pr49587.ll
…
pr50254.ll
Reland [SelectionDAG] Folding ZERO-EXTEND/SIGN_EXTEND poison to Poison value in getNode (#136701)
2025-04-22 17:36:41 -04:00
pr50374.ll
…
pr50431.ll
…
pr50609.ll
…
pr50709.ll
…
pr50782.ll
…
pr50823.ll
…
pr50907.ll
…
pr51175.ll
…
pr51281.ll
…
pr51371.ll
…
pr51615.ll
[X86] lowerShuffleAsBroadcast - use isShuffleEquivalent to search for a hidden broadcast pattern (#126517)
2025-02-12 10:12:20 +00:00
pr51878_computeAliasing.ll
…
pr51903.mir
…
pr52567.ll
…
pr53243-tail-call-fastisel.ll
[RemoveDIs] Remove "try-debuginfo-iterators..." test flags (#130298)
2025-03-14 15:50:49 +00:00
pr53247.ll
…
pr53419.ll
…
pr53842.ll
…
pr53990-incorrect-machine-sink.ll
…
pr54369.ll
…
pr55158.ll
…
pr55271.ll
…
pr55648.ll
…
pr55846.ll
…
pr56103.ll
…
pr56170.ll
…
pr56351.ll
…
pr57283.ll
…
pr57340.ll
[X86] X86FixupVectorConstantsPass - use scheduler model to avoid regressions (#140028)
2025-05-28 11:02:37 +01:00
pr57402.ll
…
pr57474.ll
…
pr57554.ll
…
pr57576.ll
…
pr57658.ll
…
pr57673.ll
Reland [SelectionDAG] Folding ZERO-EXTEND/SIGN_EXTEND poison to Poison value in getNode (#136701)
2025-04-22 17:36:41 -04:00
pr57673.mir
…
pr58538.ll
…
pr58685.ll
…
pr58914.mir
…
pr59258.ll
…
pr59305.ll
…
pr59980.ll
…
pr61038.ll
…
pr61348.ll
…
pr61384.ll
MC: Centralize X86 PC-relative fixup adjustment in MCAssembler
2025-07-08 09:22:30 -07:00
pr61524.ll
…
pr61923.ll
…
pr61964.ll
…
pr62014.ll
[X86] lowerV8I16GeneralSingleInputShuffle - for splat PSHUFW+PSHUFD patterns, widen the splats to encourage combines (#129854)
2025-03-06 14:25:57 +00:00
pr62145.ll
[X86] getIntImmCostInst - recognise i64 ICMP EQ/NE special cases (#142812)
2025-06-06 10:21:40 +01:00
pr62242.ll
…
pr62286.ll
[SelectionDAG] Handle more opcodes in isGuaranteedNotToBeUndefOrPoison (#147019)
2025-08-14 09:05:15 +00:00
pr62653.ll
…
pr63091.ll
…
pr63108.ll
[PHIElimination] Revert #131837 #146320 #146337 (#146850)
2025-07-03 07:48:08 -04:00
pr63430.ll
…
pr63439.ll
…
pr63475.ll
…
pr63507.ll
…
pr63645.ll
…
pr63692.ll
…
pr63975.ll
…
pr64322.ll
…
pr64323.ll
…
pr64439.ll
…
pr64589.ll
…
pr64593.ll
…
pr64655.ll
…
pr65895.ll
…
pr67333.ll
…
pr68068.ll
…
pr68539.ll
…
pr69080.ll
…
pr69965.ll
…
pr72539.ll
…
pr74736.ll
…
pr77459.ll
[X86] X86FixupVectorConstantsPass - use scheduler model to avoid regressions (#140028)
2025-05-28 11:02:37 +01:00
pr78109.ll
[X86] X86FixupVectorConstantsPass - use VPMOVSX/ZX extensions for PS/PD domain moves (#122601)
2025-01-12 15:59:05 +00:00
pr78897.ll
[DAG] combineVSelectWithAllOnesOrZeros - missing freeze (#150388)
2025-08-04 15:55:12 +01:00
pr81136.ll
…
pr85681.ll
…
pr86305.ll
[X86] Fold (v4i32 (scalar_to_vector (i32 (anyext (bitcast (f16)))))) -> (v4i32 bitcast (v8f16 scalar_to_vector)) (#123338)
2025-01-17 14:46:22 +00:00
pr86880.mir
…
pr89877.ll
[X86] Handle BSF/BSR "zero-input pass through" behaviour (#123623)
2025-01-23 12:59:59 +00:00
pr90668.ll
…
pr90703.ll
…
pr90844.ll
…
pr90847.ll
[X86] Handle BSF/BSR "zero-input pass through" behaviour (#123623)
2025-01-23 12:59:59 +00:00
pr91005.ll
[X86] Avoid zero extend i16 when inserting fp16 (#126194)
2025-04-27 09:51:13 +08:00
pr92569.ll
[X86] Handle BSF/BSR "zero-input pass through" behaviour (#123623)
2025-01-23 12:59:59 +00:00
pr92720.ll
…
pr93000.ll
…
pr94824.ll
…
pr94829.ll
[CodeGenPrepare] Unfold slow ctpop when used in power-of-two test (#102731)
2025-04-23 08:54:10 +03:00
pr95274.ll
…
pr95278.ll
[X86] mayFoldIntoStore - peek through oneuse bitcase users to find a store node (#123366)
2025-01-18 14:08:24 +05:30
pr97968.ll
[X86] Fold VPERMV3(X,M,Y) -> VPERMV(CONCAT(X,Y),WIDEN(M)) iff the CONCAT is free (#122485)
2025-01-13 14:13:55 +00:00
pr99396.ll
…
pr107423.ll
[X86] Add test coverage for #107423
2025-01-03 17:44:25 +00:00
pr108728.ll
…
pr108731.ll
…
pr111170.ll
…
pr114360.ll
…
pr114520.ll
[X86] Fold (v4i32 (scalar_to_vector (i32 (anyext (bitcast (f16)))))) -> (v4i32 bitcast (v8f16 scalar_to_vector)) (#123338)
2025-01-17 14:46:22 +00:00
pr116153.ll
[X86] Avoid zero extend i16 when inserting fp16 (#126194)
2025-04-27 09:51:13 +08:00
pr118934.ll
…
pr119158.ll
[SelectionDAG] Propagate poison in getNode with two operands if the input is poison. (#135387)
2025-04-17 09:23:14 -04:00
pr120093.ll
[DAG] visitFREEZE - only fold integer types to an all ones constant
2024-12-16 16:46:38 +00:00
pr120906.ll
[X86] IsNOT - don't fold not(pcmpgt(C1, C2)) -> pcmpgt(C2, C1 - 1)
2024-12-22 17:21:44 +00:00
pr122580.ll
[X86] LowerCTPOP - check if the operand is a constant when collecting KnownBits
2025-01-11 13:41:50 +00:00
pr123333.ll
[X86] Only call combineBitcastToBoolVector after legalization (#123386)
2025-01-18 11:44:46 +00:00
pr124255.ll
[SelectionDAG] WidenVecOp_INSERT_SUBVECTOR - Replace INSERT_SUBVECTOR with series of INSERT_VECTOR_ELT (#124420)
2025-01-28 18:54:49 +05:30
pr128143.ll
[DAGCombiner] visitFREEZE: Early exit when N is deleted (#128161)
2025-02-22 12:06:34 +08:00
pr131389.ll
[X86] X86MCInstLower.cpp - printConstant - don't assume the source constant data is smaller than the printed data
2025-03-17 13:08:55 +00:00
pr132844.ll
[X86] combineSelect - attempt to combine with shuffles (#143753)
2025-06-12 09:29:41 +01:00
pr134602.ll
[DAG] isSplatValue - only treat binop splats with repeated undef elements as undef (#135945)
2025-04-16 12:34:11 +01:00
pr134607.ll
[X86] pr134607.ll - regenerate test checks
2025-07-07 12:03:17 +01:00
pr135917.ll
[DAG] isSplatValue - only treat binop splats with repeated undef elements as undef (#135945)
2025-04-16 12:34:11 +01:00
pr138982.ll
[X86][TargetLowering] Avoid deleting temporary nodes in getNegatedExpression (#139029)
2025-05-10 13:14:01 +08:00
pr140491-sincos-lifetimes.ll
[IR] Remove size argument from lifetime intrinsics (#150248)
2025-08-08 11:09:34 +02:00
pr142513.ll
[X86] getIntImmCostInst - recognise i64 ICMP EQ/NE special cases (#142812)
2025-06-06 10:21:40 +01:00
pr142937.ll
[SelectionDAG][X86] Handle llvm.type.test in DAGBuilder (#142939)
2025-06-09 10:44:55 +05:30
pr147781.ll
[X86] combineStore - remove rangedata when converting 64-bit copies to f64 load/store (#147904)
2025-07-10 09:32:09 +01:00
pr149841.ll
[X86] isGuaranteedNotToBeUndefOrPoisonForTargetNode - X86ISD::GlobalBaseReg and X86ISD::Wrapper/WrapperRIP nodes are never poison (#149854)
2025-07-22 07:51:01 +01:00
pr152630.ll
[DAGCombine] Correctly extend the constant RHS in TargetLowering::SimplifySetCC (#152862)
2025-08-10 01:24:37 +08:00
PR34565.ll
…
PR37310.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
PR40322.ll
…
PR71178-register-coalescer-crash.ll
…
pre-coalesce-2.ll
…
pre-coalesce.ll
…
pre-coalesce.mir
…
pre-ra-sched.ll
…
preallocated-nocall.ll
…
preallocated-x64.ll
…
preallocated.ll
…
prefer-avx256-lzcnt.ll
…
prefer-avx256-mask-extend.ll
…
prefer-avx256-mask-shuffle.ll
…
prefer-avx256-mulo.ll
…
prefer-avx256-popcnt.ll
…
prefer-avx256-shift.ll
…
prefer-avx256-trunc.ll
…
prefer-avx256-wide-mul.ll
…
prefer-fpext-splat.ll
…
prefetch.ll
…
prefetchi.ll
…
prefixdata.ll
…
preserve_allcc64-ret-double.ll
…
preserve_allcc64.ll
…
preserve_mostcc64_win.ll
…
preserve_mostcc64-ret-double.ll
…
preserve_mostcc64-sret.ll
…
preserve_mostcc64.ll
…
preserve_none_swift.ll
…
preserve_nonecc64-ret-double.ll
…
preserve_nonecc64.ll
…
preserve_nonecc_call_win.ll
[llvm] Win x64 Unwind V2 1/n: Mark beginning and end of epilogs (#110024)
2025-01-30 13:51:30 -08:00
preserve_nonecc_call.ll
…
preserve_nonecc_musttail.ll
…
private-2.ll
…
private.ll
…
probe-stack-eflags.ll
…
probe-stack-x32.ll
…
prolog-push-seq.ll
…
prologepilog_deref_size.mir
…
prologue-epilogue-remarks.mir
…
prologuedata.ll
…
promote-assert-zext.ll
…
promote-cmp.ll
…
promote-i16.ll
…
promote-sra-by-itself.ll
…
promote-trunc.ll
…
promote-vec3.ll
…
promote.ll
…
propagate-disjoint-in-shl-or.ll
…
ps4-noreturn.ll
…
ps4-ssp-nop.ll
…
psadbw.ll
…
pseudo_cmov_lower1.ll
…
pseudo_cmov_lower2.ll
…
pseudo_cmov_lower-fp16.ll
…
pseudo_cmov_lower.ll
…
pseudo-probe-desc-check.ll
[X86] Add assertion required for pseudo probe desc check test (#149800)
2025-07-21 19:28:14 +08:00
pshufb-mask-comments.ll
…
pshufd-combine-crash.ll
…
psubus.ll
[X86] VPTERNLOG comments - use "mem" just for full width loads and "m32bcst" / "m64bcst" for broadcast loads (#143721)
2025-06-12 15:21:05 +01:00
ptest.ll
[X86] ptest.ll - add test coverage for #144861 load chains
2025-06-20 11:13:42 +01:00
ptr-rotate.ll
…
ptrtoaddr.ll
[IR] Introduce the ptrtoaddr instruction
2025-08-08 10:12:39 -07:00
ptrtoint-constexpr-invalid.ll
AsmPrinter: Do not use report_fatal_error for unhandled ConstantExpr (#145275)
2025-06-23 16:29:58 +09:00
ptrtoint-constexpr.ll
[IR] Remove mul constant expression (#127046)
2025-02-14 09:28:57 +01:00
ptrtoint-narrow.ll
…
ptwrite32-intrinsic.ll
…
ptwrite64-intrinsic.ll
…
pull-binop-through-shift.ll
…
pull-conditional-binop-through-shift.ll
…
push-cfi-debug.ll
…
push-cfi-obj.ll
…
push-cfi.ll
…
ragreedy-bug.ll
…
ragreedy-hoist-spill.ll
Reland [SelectionDAG] Folding ZERO-EXTEND/SIGN_EXTEND poison to Poison value in getNode (#136701)
2025-04-22 17:36:41 -04:00
ragreedy-last-chance-recoloring.ll
…
range-false-deps.ll
…
raoint-intrinsics-32.ll
…
raoint-intrinsics-64.ll
…
rd-mod-wr-eflags.ll
…
rdpid.ll
…
rdpmc.ll
…
rdpru.ll
…
rdrand-x86_64.ll
…
rdrand.ll
…
rdseed-x86_64.ll
…
rdseed.ll
…
rdtsc-upgrade.ll
…
rdtsc.ll
…
read-fp-no-frame-pointer.ll
…
reassociate-add.ll
…
recip-fastmath2.ll
[X86] X86FixupVectorConstantsPass - use scheduler model to avoid regressions (#140028)
2025-05-28 11:02:37 +01:00
recip-fastmath.ll
[X86] X86FixupVectorConstantsPass - use scheduler model to avoid regressions (#140028)
2025-05-28 11:02:37 +01:00
recip-pic.ll
…
red-zone2.ll
…
red-zone.ll
…
reduce-trunc-shl.ll
…
regalloc-advanced-split-cost.ll
…
regalloc-copy-hints.mir
…
regalloc-fast-missing-live-out-spill.mir
…
regalloc-reconcile-broken-hints.ll
…
regalloc-spill-at-ehpad.ll
…
regalloc-tight-invoke.ll
…
regallocfast-callbr-asm-spills-after-reload.mir
[RegAllocFast] Ensure live-in vregs get reloaded after INLINEASM_BR spills
2025-03-24 09:19:53 +01:00
regcall-no-plt.ll
…
reghinting.ll
…
regparm.ll
…
regpressure.ll
…
relative-reloc-32.ll
AsmPrinter: Remove ELF's special lowerRelativeReference for unnamed_addr function; use lowerDSOLocalEquivalent in more cases
2025-04-08 10:11:20 -07:00
relative-reloc-64.ll
AsmPrinter: Remove ELF's special lowerRelativeReference for unnamed_addr function; use lowerDSOLocalEquivalent in more cases
2025-04-08 10:11:20 -07:00
relocimm-code-model.ll
…
relptr-rodata.ll
AsmPrinter: Remove ELF's special lowerRelativeReference for unnamed_addr function; use lowerDSOLocalEquivalent in more cases
2025-04-08 10:11:20 -07:00
rem_crash.ll
…
rem.ll
…
remarks-section.ll
[AsmPrinter] Fix crash when remarks section is unsupported (#144724)
2025-06-20 12:55:11 +01:00
remat-constant.ll
…
remat-fold-load.ll
[llvm] Remove br i1 undef from some llvm/test/CodeGen tests (#128272)
2025-02-23 09:23:33 +00:00
remat-mov-0.ll
…
remat-phys-dead.ll
…
remat-scalar-zero.ll
…
rematerialize-sub-super-reg.mir
…
replace_unsupported_masked_mem_intrin.ll
…
replace-load-and-with-bzhi.ll
…
ret-addr.ll
…
ret-i64-0.ll
…
ret-mmx.ll
…
retpoline-external.ll
…
retpoline-regparm.ll
…
retpoline.ll
…
return_zeroext_i2.ll
…
return-ext.ll
…
returned-trunc-tail-calls.ll
…
rev16.ll
…
reverse_branches.ll
…
rex-profile-test.ll
[llvm][X86] REX profile for UEFI (#138362)
2025-06-09 13:46:40 -07:00
rint-conv.ll
[X86] Combine FRINT + FP_TO_SINT to LRINT (#126477)
2025-02-21 14:44:08 +08:00
rip-rel-address.ll
…
rip-rel-lea.ll
…
rodata-relocs.ll
…
rot16.ll
…
rot32.ll
…
rot64.ll
…
rotate2.ll
…
rotate4.ll
…
rotate5.ll
…
rotate_vec.ll
…
rotate-add.ll
[DAGCombiner] Attempt to fold 'add' nodes to funnel-shift or rotate (#125612)
2025-04-04 15:39:24 -07:00
rotate-extract-vector.ll
…
rotate-extract.ll
…
rotate-multi.ll
…
rotate.ll
…
rounding-ops.ll
[X86][BreakFalseDeps] Using reverse order for undef register selection (#137569)
2025-06-11 22:08:20 +08:00
rrlist-livereg-corrutpion.ll
…
rtm.ll
…
sad_variations.ll
…
sad.ll
[X86] combineBasicSADPattern - pattern match various vXi8 ABDU patterns (#147570)
2025-07-09 08:08:22 +01:00
sadd_sat_plus.ll
…
sadd_sat_vec.ll
[X86] VPTERNLOG comments - use "mem" just for full width loads and "m32bcst" / "m64bcst" for broadcast loads (#143721)
2025-06-12 15:21:05 +01:00
sadd_sat.ll
…
saddo-redundant-add.ll
…
safestack_inline.ll
…
safestack_ssp.ll
…
safestack.ll
…
same-align-bytes-with-llasm-llobj.ll
…
sandybridge-loads.ll
…
sar_fold64.ll
…
sar_fold.ll
…
sat-add.ll
…
sbb-false-dep.ll
…
sbb-zero-idiom.ll
…
sbb.ll
…
scalar_sse_minmax.ll
…
scalar_widen_div.ll
…
scalar-ext-logic.ll
…
scalar-extract.ll
…
scalar-fp-to-i32.ll
[X86] Align f128 and i128 to 16 bytes when passing on x86-32 (#138092)
2025-07-17 11:30:36 +02:00
scalar-fp-to-i64.ll
[X86] Align f128 and i128 to 16 bytes when passing on x86-32 (#138092)
2025-07-17 11:30:36 +02:00
scalar-int-to-fp.ll
[X86][BreakFalseDeps] Using reverse order for undef register selection (#137569)
2025-06-11 22:08:20 +08:00
scalar-min-max-fill-operand.ll
…
scalarize-bitcast.ll
…
scalarize-fp.ll
[X86] Use X86FixupInstTunings to select between (V)MOVSS/D and (V)BLENDPS/D (#143895)
2025-06-12 18:08:07 +01:00
scatter-schedule.ll
…
scavenger.mir
…
scev-interchange.ll
…
scheduler-asm-moves.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
scheduler-backtracking.ll
[X86] Handle BSF/BSR "zero-input pass through" behaviour (#123623)
2025-01-23 12:59:59 +00:00
scmp.ll
[X86] Align f128 and i128 to 16 bytes when passing on x86-32 (#138092)
2025-07-17 11:30:36 +02:00
sdiv_fix_sat.ll
[X86] Align f128 and i128 to 16 bytes when passing on x86-32 (#138092)
2025-07-17 11:30:36 +02:00
sdiv_fix.ll
[X86] Align f128 and i128 to 16 bytes when passing on x86-32 (#138092)
2025-07-17 11:30:36 +02:00
sdiv-exact.ll
…
sdiv-pow2.ll
…
section_mergeable_size.ll
…
section-stats.ll
…
segmented-stacks-dynamic.ll
…
segmented-stacks-standalone.ll
…
segmented-stacks.ll
[llvm] Win x64 Unwind V2 1/n: Mark beginning and end of epilogs (#110024)
2025-01-30 13:51:30 -08:00
seh-catch-all-win32.ll
Introduce MCAsmInfo::UsesSetToEquateSymbol and prefer = to .set
2025-06-11 22:19:31 -07:00
seh-catch-all.ll
Fix Windows EH IP2State tables (remove +1 bias) (#144745)
2025-07-22 09:18:13 -07:00
seh-catchpad.ll
Fix Windows EH IP2State tables (remove +1 bias) (#144745)
2025-07-22 09:18:13 -07:00
seh-except-finally.ll
Fix Windows EH IP2State tables (remove +1 bias) (#144745)
2025-07-22 09:18:13 -07:00
seh-except-restore.ll
[win] Fix EH Cont Guard targets when SEH personality is used (#129612)
2025-03-07 09:07:47 -08:00
seh-exception-code.ll
…
seh-filter-no-personality.ll
…
seh-finally.ll
Fix Windows EH IP2State tables (remove +1 bias) (#144745)
2025-07-22 09:18:13 -07:00
seh-localaddress.ll
…
seh-no-invokes.ll
Introduce MCAsmInfo::UsesSetToEquateSymbol and prefer = to .set
2025-06-11 22:19:31 -07:00
seh-safe-div-win32.ll
…
seh-safe-div.ll
Fix Windows EH IP2State tables (remove +1 bias) (#144745)
2025-07-22 09:18:13 -07:00
seh-stack-realign.ll
Introduce MCAsmInfo::UsesSetToEquateSymbol and prefer = to .set
2025-06-11 22:19:31 -07:00
seh-unwind-inline-asm-codegen.ll
Fix Windows EH IP2State tables (remove +1 bias) (#144745)
2025-07-22 09:18:13 -07:00
select_const_i128.ll
…
select_const.ll
…
select_meta.ll
…
select-1-or-neg1.ll
…
select-constant-lea.ll
…
select-constant-xor.ll
…
select-ext.ll
…
select-lea.ll
…
select-mmx.ll
…
select-narrow-int-to-fp.ll
[X86][BreakFalseDeps] Using reverse order for undef register selection (#137569)
2025-06-11 22:08:20 +08:00
select-neg.ll
…
select-of-fp-constants.ll
…
select-of-half-constants.ll
…
select-optimize.ll
[IR] Remove size argument from lifetime intrinsics (#150248)
2025-08-08 11:09:34 +02:00
select-phi-s16-fp.ll
…
select-prof-codegen.ll
…
select-smin-smax.ll
…
select-sra.ll
…
select-testb-volatile-load.ll
…
select-to-and-zext.ll
…
select-with-and-or.ll
…
select.ll
[X86] Match SETCC_CARRY in addition of SUB when trying to reconstruct LEA (#126551)
2025-02-14 17:38:25 +08:00
selectcc-to-shiftand.ll
…
selection-dag-salvagetrunc.ll
…
selectiondag-crash.ll
…
selectiondag-cse.ll
[llvm] Remove br i1 undef from some llvm/test/CodeGen tests (#128272)
2025-02-23 09:23:33 +00:00
selectiondag-debug-loc.ll
…
selectiondag-order.ll
[Verifier][CGP] Allow integer argument to dbg_declare (#134803)
2025-04-10 12:29:56 +02:00
selectiondag-patchpoint-legalize.ll
…
selectiondag-stackmap-legalize.ll
…
semantic-interposition-asm.ll
…
serialize-intrinsic.ll
…
setcc-combine.ll
[X86] LowerSelect - use BLENDV for scalar selection on all SSE41+ targets (#125853)
2025-02-10 11:24:04 +00:00
setcc-freeze.ll
…
setcc-fsh.ll
…
setcc-logic.ll
…
setcc-lowering.ll
[X86] shouldReduceLoadWidth - don't split loads if we can freely reuse full width legal binop (#129695)
2025-04-29 10:35:15 +01:00
setcc-narrowing.ll
…
setcc-non-simple-type.ll
[DAG] visitFREEZE - limit freezing of multiple operands (#149797)
2025-07-22 15:40:55 +01:00
setcc-wide-types.ll
…
setcc.ll
…
setjmp-spills.ll
…
setoeq.ll
…
setuge.ll
…
sext-i1.ll
…
sext-load.ll
…
sext-ret-val.ll
…
sext-setcc-self.ll
…
sext-subreg.ll
…
sext-trunc.ll
…
sext-vsetcc.ll
[X86] sext-vsetcc.ll - regenerate VPTERNLOG comments
2025-02-20 11:58:45 +00:00
sha512-intrinsics.ll
…
sha.ll
…
shadow-stack.ll
…
shift_minsize.ll
…
shift-amount-mod.ll
…
shift-and-x86_64.ll
…
shift-and.ll
…
shift-avx2-crash.ll
…
shift-bmi2.ll
…
shift-by-signext.ll
…
shift-coalesce.ll
…
shift-codegen.ll
…
shift-combine-crash.ll
…
shift-combine.ll
[X86] Align f128 and i128 to 16 bytes when passing on x86-32 (#138092)
2025-07-17 11:30:36 +02:00
shift-double-x86_64.ll
…
shift-double.ll
…
shift-eflags.ll
…
shift-folding.ll
…
shift-i128.ll
[X86] Align f128 and i128 to 16 bytes when passing on x86-32 (#138092)
2025-07-17 11:30:36 +02:00
shift-i256.ll
…
shift-i512.ll
[X86] Allow znver3/4/5 targets to use double-shift instructions by default (#132720)
2025-06-25 10:48:51 +01:00
shift-logic.ll
…
shift-mask.ll
…
shift-one.ll
…
shift-pair.ll
…
shift-parts.ll
…
shift-pcmp.ll
…
shl_elim.ll
…
shl_undef.ll
…
shl-anyext.ll
…
shl-crash-on-legalize.ll
…
shl-i64.ll
…
shrink_vmul_sse.ll
…
shrink_vmul.ll
…
shrink_wrap_dbg_value.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
shrink-compare-pgso.ll
…
shrink-compare.ll
…
shrink-const.ll
…
shrink-fp-const1.ll
…
shrink-fp-const2.ll
…
shrink-wrap-chkstk-x86_64.ll
…
shrink-wrap-chkstk.ll
…
shrink-wrapping-vla.ll
…
shrinkwrap-callbr.ll
[ARM,AArch64] Don't put BTI at asm goto branch targets (#141562)
2025-06-03 08:44:13 +01:00
shrinkwrap-hang.ll
…
shuffle-as-shifts.ll
…
shuffle-blendw.ll
…
shuffle-combine-crash-2.ll
…
shuffle-combine-crash-3.ll
…
shuffle-combine-crash-4.ll
…
shuffle-combine-crash-5.ll
…
shuffle-combine-crash.ll
Reland [SelectionDAG] Folding ZERO-EXTEND/SIGN_EXTEND poison to Poison value in getNode (#136701)
2025-04-22 17:36:41 -04:00
shuffle-extract-subvector.ll
…
shuffle-half.ll
Reland [SelectionDAG] Folding ZERO-EXTEND/SIGN_EXTEND poison to Poison value in getNode (#136701)
2025-04-22 17:36:41 -04:00
shuffle-of-insert.ll
…
shuffle-of-shift.ll
…
shuffle-of-splat-multiuses.ll
…
shuffle-strided-with-offset-128.ll
…
shuffle-strided-with-offset-256.ll
…
shuffle-strided-with-offset-512.ll
[X86] Fold VPERMV3(X,M,Y) -> VPERMV(CONCAT(X,Y),WIDEN(M)) iff the CONCAT is free (#122485)
2025-01-13 14:13:55 +00:00
shuffle-vs-trunc-128.ll
[X86] SimplifyDemandedVectorEltsForTargetNode - reduce the size of VPERMV/VPERMV3 nodes if the upper elements are not demanded (REAPPLIED) (#134263)
2025-04-03 17:39:38 +01:00
shuffle-vs-trunc-256.ll
[X86] X86FixupInstTuning - prefer VPBLENDD to VPBLENDW shuffles on AVX2+ targets (#144269)
2025-06-16 10:31:24 +01:00
shuffle-vs-trunc-512.ll
[X86] combineConcatVectorOps - add concatenation handling for BITCAST nodes (#133913)
2025-04-10 17:44:39 +01:00
sibcall-2.ll
…
sibcall-3.ll
…
sibcall-4.ll
…
sibcall-5.ll
…
sibcall-6.ll
…
sibcall-byval.ll
…
sibcall-win64.ll
…
sibcall.ll
[X86] Elect to tail call when sret ptr is passed to the callee
2025-08-05 09:50:52 +02:00
signbit-shift.ll
…
signbit-test.ll
…
signed-truncation-check.ll
…
simple-register-allocation-read-undef.mir
…
simple-zext.ll
…
sincos-opt.ll
…
sincos-stack-args.ll
[Test] Mark a number of libcall tests nounwind (#148329)
2025-07-12 11:57:28 +02:00
sincos.ll
[Test] Mark a number of libcall tests nounwind (#148329)
2025-07-12 11:57:28 +02:00
single_elt_vector_memory_operation.ll
…
sink-addsub-of-const.ll
…
sink-blockfreq.ll
…
sink-down-undef-use.mir
…
sink-gep-before-mem-inst.ll
…
sink-hoist.ll
…
sink-local-value.ll
[RemoveDIs] Remove "try-debuginfo-iterators..." test flags (#130298)
2025-03-14 15:50:49 +00:00
sink-out-of-loop.ll
…
sitofp.ll
…
sjlj-baseptr.ll
…
sjlj-eh-musttail.ll
…
sjlj-eh.ll
…
sjlj-shadow-stack-liveness.mir
…
sjlj-unwind-inline-asm-codegen.ll
…
sjlj.ll
…
slot-indexes.ll
…
slow-incdec.ll
…
slow-pmulld.ll
[X86] X86FixupVectorConstantsPass - use scheduler model to avoid regressions (#140028)
2025-05-28 11:02:37 +01:00
slow-unaligned-mem.ll
…
sm3-intrinsics.ll
…
sm4-evex-intrinsics.ll
…
sm4-intrinsics.ll
…
small-byval-memcpy.ll
…
smax.ll
[X86] Align f128 and i128 to 16 bytes when passing on x86-32 (#138092)
2025-07-17 11:30:36 +02:00
smin.ll
[X86] Align f128 and i128 to 16 bytes when passing on x86-32 (#138092)
2025-07-17 11:30:36 +02:00
smul_fix_sat_constants.ll
…
smul_fix_sat.ll
[TargetLowering] Improve one signature of forceExpandWideMUL. (#123991)
2025-01-23 12:49:35 -08:00
smul_fix.ll
…
smul-with-overflow.ll
[TargetLowering] Improve one signature of forceExpandWideMUL. (#123991)
2025-01-23 12:49:35 -08:00
smulo-128-legalisation-lowering.ll
[TargetLowering] Improve one signature of forceExpandWideMUL. (#123991)
2025-01-23 12:49:35 -08:00
soft-fp-legal-in-HW-reg.ll
…
soft-fp.ll
…
soft-sitofp.ll
…
speculation-hardening-sls.ll
…
speculative-execution-side-effect-suppression.ll
…
speculative-load-hardening-call-and-ret.ll
…
speculative-load-hardening-gather.ll
…
speculative-load-hardening-indirect.ll
…
speculative-load-hardening-no-spill.ll
…
speculative-load-hardening.ll
…
splat-const.ll
…
splat-for-size.ll
…
split-eh-lpad-edges.ll
…
split-extend-vector-inreg.ll
[X86][BreakFalseDeps] Using reverse order for undef register selection (#137569)
2025-06-11 22:08:20 +08:00
split-reg-with-hint.ll
…
split-store.ll
…
split-vector-bitcast.ll
…
split-vector-rem.ll
…
splitkit-remat-broken-subreg-constraint.mir
SplitKit: Take register class directly from instruction definition (#129727)
2025-03-06 20:06:35 +07:00
sqrt-fastmath-mir.ll
[InstrEmitter] Use AddOperand in EmitCopyToRegClassNode. (#146637)
2025-07-02 09:44:54 -07:00
sqrt-fastmath-tune.ll
[X86] X86FixupVectorConstantsPass - use scheduler model to avoid regressions (#140028)
2025-05-28 11:02:37 +01:00
sqrt-fastmath-tunecpu-attr.ll
…
sqrt-fastmath.ll
[DAG] combineVSelectWithAllOnesOrZeros - missing freeze (#150388)
2025-08-04 15:55:12 +01:00
sqrt-partial.ll
…
srem-lkk.ll
…
srem-seteq-illegal-types.ll
…
srem-seteq-optsize.ll
…
srem-seteq-vec-nonsplat.ll
[X86] VPTERNLOG comments - use "mem" just for full width loads and "m32bcst" / "m64bcst" for broadcast loads (#143721)
2025-06-12 15:21:05 +01:00
srem-seteq-vec-splat.ll
…
srem-seteq.ll
…
srem-vector-lkk.ll
…
sret-implicit.ll
…
sse1-fcopysign.ll
…
sse1.ll
…
sse2-intrinsics-canonical.ll
…
sse2-intrinsics-fast-isel-x86_64.ll
…
sse2-intrinsics-fast-isel.ll
[X86] X86FixupInstTuning - fold BLENDPS -> MOVSD (#144029)
2025-06-13 11:05:57 +01:00
sse2-intrinsics-x86_64-upgrade.ll
…
sse2-intrinsics-x86_64.ll
…
sse2-intrinsics-x86-upgrade.ll
MC: Centralize X86 PC-relative fixup adjustment in MCAssembler
2025-07-08 09:22:30 -07:00
sse2-intrinsics-x86.ll
MC: Centralize X86 PC-relative fixup adjustment in MCAssembler
2025-07-08 09:22:30 -07:00
sse2-vector-shifts.ll
…
sse2.ll
[X86] X86FixupInstTuning - fold BLENDPS -> MOVSD (#144029)
2025-06-13 11:05:57 +01:00
sse3-avx-addsub-2.ll
…
sse3-avx-addsub.ll
…
sse3-intrinsics-fast-isel.ll
…
sse3-intrinsics-x86.ll
…
sse3.ll
…
sse4a-intrinsics-fast-isel.ll
…
sse4a-upgrade.ll
…
sse4a.ll
…
sse41-intrinsics-fast-isel.ll
[X86] X86FixupInstTuning - fold BLENDPS -> MOVSD (#144029)
2025-06-13 11:05:57 +01:00
sse41-intrinsics-x86-upgrade.ll
[X86] X86FixupInstTuning - fold BLENDPS -> MOVSD (#144029)
2025-06-13 11:05:57 +01:00
sse41-intrinsics-x86.ll
MC: Centralize X86 PC-relative fixup adjustment in MCAssembler
2025-07-08 09:22:30 -07:00
sse41-pmovxrm.ll
…
sse41.ll
MC: Centralize X86 PC-relative fixup adjustment in MCAssembler
2025-07-08 09:22:30 -07:00
sse42-intrinsics-fast-isel.ll
…
sse42-intrinsics-x86.ll
…
sse_partial_update.ll
…
sse_reload_fold.ll
…
sse-align-0.ll
…
sse-align-1.ll
…
sse-align-2.ll
…
sse-align-3.ll
…
sse-align-4.ll
…
sse-align-5.ll
…
sse-align-6.ll
…
sse-align-7.ll
…
sse-align-8.ll
…
sse-align-9.ll
…
sse-align-10.ll
…
sse-align-11.ll
…
sse-align-12.ll
…
sse-commute.ll
…
sse-cvttp2si.ll
[X86][BreakFalseDeps] Using reverse order for undef register selection (#137569)
2025-06-11 22:08:20 +08:00
sse-domains.ll
[X86] X86FixupVectorConstantsPass - use scheduler model to avoid regressions (#140028)
2025-05-28 11:02:37 +01:00
sse-fcopysign.ll
…
sse-fsignum.ll
…
sse-insertelt-from-mem.ll
[X86] X86FixupInstTuning - extend BLENDPD/S -> MOVSD/S handling to SSE variant (#143961)
2025-06-13 08:52:48 +01:00
sse-insertelt.ll
[X86] X86FixupInstTuning - fold BLENDPS -> MOVSD (#144029)
2025-06-13 11:05:57 +01:00
sse-intel-ocl.ll
…
sse-intrinsics-fast-isel-x86_64.ll
…
sse-intrinsics-fast-isel.ll
[X86] Use X86FixupInstTunings to select between (V)MOVSS/D and (V)BLENDPS/D (#143895)
2025-06-12 18:08:07 +01:00
sse-intrinsics-x86_64-upgrade.ll
…
sse-intrinsics-x86_64.ll
…
sse-intrinsics-x86-upgrade.ll
…
sse-intrinsics-x86.ll
…
sse-load-ret.ll
…
sse-minmax.ll
[X86] LowerSelect - use BLENDV for scalar selection on all SSE41+ targets (#125853)
2025-02-10 11:24:04 +00:00
sse-only.ll
…
sse-regcall4.ll
[DAG] getNode - convert scalar i1 arithmetic calls to bitwise instructions (#125486)
2025-02-03 16:36:01 +00:00
sse-regcall.ll
[DAG] getNode - convert scalar i1 arithmetic calls to bitwise instructions (#125486)
2025-02-03 16:36:01 +00:00
sse-scalar-fp-arith-unary.ll
…
sse-scalar-fp-arith.ll
[PHIElimination] Revert #131837 #146320 #146337 (#146850)
2025-07-03 07:48:08 -04:00
sse-unaligned-mem-feature.ll
…
sse-varargs.ll
…
sshl_sat_vec.ll
…
sshl_sat.ll
…
ssp-data-layout.ll
…
ssp-guard-spill.ll
…
ssse3-intrinsics-fast-isel.ll
…
ssse3-intrinsics-x86-upgrade.ll
…
ssse3-intrinsics-x86.ll
…
ssub_sat_plus.ll
…
ssub_sat_vec.ll
[X86] VPTERNLOG comments - use "mem" just for full width loads and "m32bcst" / "m64bcst" for broadcast loads (#143721)
2025-06-12 15:21:05 +01:00
ssub_sat.ll
…
stack_guard_remat.ll
…
stack-align2.ll
Remove Native Client support (#133661)
2025-07-15 13:22:33 -04:00
stack-align-memcpy.ll
…
stack-align.ll
…
stack-clash-dynamic-alloca.ll
…
stack-clash-extra-huge.ll
Reapply "[X86] Correct 32-bit immediate assertion and fix 64-bit lowering for huge frame offsets" (#152239)
2025-08-11 21:23:44 +05:30
stack-clash-huge.ll
Reapply "[X86] Correct 32-bit immediate assertion and fix 64-bit lowering for huge frame offsets" (#152239)
2025-08-11 21:23:44 +05:30
stack-clash-large-large-align.ll
…
stack-clash-large.ll
…
stack-clash-medium-natural-probes-mutliple-objects.ll
…
stack-clash-medium-natural-probes.ll
…
stack-clash-medium.ll
…
stack-clash-small-alloc-medium-align.ll
…
stack-clash-small-large-align.ll
…
stack-clash-small.ll
…
stack-clash-unknown-call.ll
…
stack-coloring-wineh.ll
Fix Windows EH IP2State tables (remove +1 bias) (#144745)
2025-07-22 09:18:13 -07:00
stack-folding-adx-x86_64.ll
…
stack-folding-avx512bf16.ll
…
stack-folding-avx512vp2intersect.ll
…
stack-folding-bmi2.ll
…
stack-folding-bmi2.mir
…
stack-folding-bmi.ll
…
stack-folding-fp-avx1.ll
[X86] Use X86FixupInstTunings to select between (V)MOVSS/D and (V)BLENDPS/D (#143895)
2025-06-12 18:08:07 +01:00
stack-folding-fp-avx512.ll
…
stack-folding-fp-avx512fp16-fma.ll
[X86][AVX512FP16] Decouple AVX512VL and AVX512DQ from AVX512FP16 (#137450)
2025-04-27 14:01:37 +08:00
stack-folding-fp-avx512fp16.ll
[X86][AVX512FP16] Decouple AVX512VL and AVX512DQ from AVX512FP16 (#137450)
2025-04-27 14:01:37 +08:00
stack-folding-fp-avx512fp16vl-fma.ll
[X86][AVX512FP16] Decouple AVX512VL and AVX512DQ from AVX512FP16 (#137450)
2025-04-27 14:01:37 +08:00
stack-folding-fp-avx512fp16vl.ll
[X86][AVX512FP16] Decouple AVX512VL and AVX512DQ from AVX512FP16 (#137450)
2025-04-27 14:01:37 +08:00
stack-folding-fp-avx512vl.ll
…
stack-folding-fp-nofpexcept.mir
…
stack-folding-fp-sse42.ll
…
stack-folding-int-avx1.ll
…
stack-folding-int-avx2.ll
…
stack-folding-int-avx512.ll
…
stack-folding-int-avx512ifma.ll
…
stack-folding-int-avx512vl.ll
…
stack-folding-int-avx512vnni.ll
…
stack-folding-int-avxifma.ll
…
stack-folding-int-avxvnni.ll
…
stack-folding-int-avxvnniint8.ll
…
stack-folding-int-avxvnniint16.ll
…
stack-folding-int-sse42.ll
…
stack-folding-lwp.ll
…
stack-folding-mmx.ll
…
stack-folding-sha.ll
…
stack-folding-tbm.ll
…
stack-folding-x86_64.ll
…
stack-folding-xop.ll
…
stack-frame-layout-remarks.ll
[test] Replace -march=x86 -mcpu=i386 with -mtriple
2024-12-15 12:57:35 -08:00
stack-guard-memloc-vararg.ll
…
stack-guard-oob.ll
…
stack-probe-red-zone.ll
…
stack-probe-size.ll
…
stack-probes.ll
…
stack-protector-2.ll
…
stack-protector-3.ll
…
stack-protector-atomicrmw-xchg.ll
[StackProtector] Fix domtree verification in NewPM
2025-03-05 12:55:27 +01:00
stack-protector-dbginfo.ll
…
stack-protector-msvc-oz.ll
[CodeGen] Inline stack guard check on Windows (#136290)
2025-06-12 19:38:42 +05:00
stack-protector-msvc.ll
[CodeGen] Inline stack guard check on Windows (#136290)
2025-06-12 19:38:42 +05:00
stack-protector-musttail.ll
…
stack-protector-no-return.ll
…
stack-protector-phi.ll
[StackProtector] Fix phi handling in HasAddressTaken() (#129248)
2025-03-05 12:45:13 +01:00
stack-protector-recursively.ll
…
stack-protector-remarks.ll
…
stack-protector-strong-macho-win32-xor.ll
…
stack-protector-target-openbsd.ll
RuntimeLibcalls: Add some tests for OpenBSD stack protectors (#147888)
2025-07-15 15:50:54 +09:00
stack-protector-target.ll
…
stack-protector-trap-unreachable.ll
…
stack-protector-vreg-to-vreg-copy.ll
…
stack-protector-weight.ll
…
stack-protector.ll
[LLVM][Cygwin] Enable conditions that are shared with MinGW (#149638)
2025-07-29 10:01:04 -07:00
stack-size-section-function-sections.ll
…
stack-size-section.ll
…
stack-update-frame-opcode.ll
…
StackColoring-dbg-invariance.mir
…
StackColoring-dbg.ll
…
StackColoring-tbaa.mir
…
StackColoring-use-between-allocas.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
StackColoring.ll
[llvm] Remove br i1 undef from CodeGen/X86 tests (#121733)
2025-01-06 08:43:39 +00:00
stackguard-internal.ll
…
stackmap-args.ll
[CodeGen] @llvm.experimental.stackmap make operands immediate (#117932)
2024-12-11 17:41:19 +08:00
stackmap-dynamic-alloca.ll
…
stackmap-fast-isel.ll
…
stackmap-frame-setup.ll
…
stackmap-large-constants.ll
…
stackmap-large-location-size.ll
…
stackmap-liveness.ll
…
stackmap-macho.ll
…
stackmap-nops.ll
…
stackmap-shadow-optimization.ll
…
stackmap-undef-operand-anyregcc.mir
[Statepoint] Treat undef operands less specially (#119682)
2024-12-17 12:59:46 +07:00
stackmap.ll
[llvm] Remove br i1 undef from CodeGen/X86 tests (#121733)
2025-01-06 08:43:39 +00:00
stackpointer.ll
…
statepoint-allocas.ll
…
statepoint-call-lowering.ll
…
statepoint-cmp-sunk-past-statepoint.ll
[X86/AArch64] Autogen two additional tests
2025-07-03 13:11:29 -07:00
statepoint-deopt-lowering.ll
…
statepoint-duplicates-export.ll
…
statepoint-far-call.ll
…
statepoint-fastregalloc.mir
…
statepoint-fixup-call.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
statepoint-fixup-copy-prop-neg.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
statepoint-fixup-copy-prop.mir
[CodeGen][NewPM] Port "FixupStatepointCallerSaved" pass to NPM (#129541)
2025-03-04 15:47:43 +05:30
statepoint-fixup-invoke.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
statepoint-fixup-shared-ehpad.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
statepoint-fixup-undef-def.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
statepoint-fixup-undef.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
statepoint-forward.ll
…
statepoint-gc-live.ll
…
statepoint-gctransition-call-lowering.ll
…
statepoint-invoke-ra-enter-at-end.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
statepoint-invoke-ra-hoist-copies.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
statepoint-invoke-ra-inline-spiller.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
statepoint-invoke-ra-remove-back-copies.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
statepoint-invoke-ra.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
statepoint-invoke.ll
…
statepoint-live-in-remat.ll
…
statepoint-live-in.ll
…
statepoint-no-extra-const.ll
…
statepoint-no-realign-stack.ll
…
statepoint-ra-no-ls.ll
…
statepoint-ra.ll
…
statepoint-regs.ll
…
statepoint-relocate-undef.ll
…
statepoint-spill-lowering.ll
…
statepoint-spill-slot-size-promotion.ll
…
statepoint-split-single-block.ll
…
statepoint-stack-usage.ll
…
statepoint-stackmap-format.ll
…
statepoint-stackmap-size.ll
…
statepoint-two-results.ll
…
statepoint-uniqueing.ll
…
statepoint-vector-bad-spill.ll
…
statepoint-vector.ll
…
statepoint-vreg-details.ll
…
statepoint-vreg-folding.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
statepoint-vreg-invoke.ll
…
statepoint-vreg-twoaddr.mir
…
statepoint-vreg-unlimited-tied-opnds.ll
…
statepoint-vreg.ll
…
statepoint-vreg.mir
…
stdarg.ll
…
stdcall-notailcall.ll
…
stdcall.ll
…
store_op_load_fold2.ll
…
store_op_load_fold.ll
[DAGCombiner] Refactor and improve ReduceLoadOpStoreWidth (#119564)
2024-12-16 12:15:11 +01:00
store-empty-member.ll
…
store-fp-constant.ll
…
store-global-address.ll
…
store-narrow.ll
…
store-zero-and-minus-one.ll
…
stores-merging.ll
…
storetrunc-fp.ll
…
strict-fadd-combines.ll
…
strict-fsub-combines.ll
…
stride-nine-with-base-reg.ll
…
stride-reuse.ll
…
sttni.ll
…
sub-of-bias.ll
…
sub-of-not.ll
…
sub-with-overflow.ll
…
sub.ll
…
subcarry.ll
[DAG] getNode - convert scalar i1 arithmetic calls to bitwise instructions (#125486)
2025-02-03 16:36:01 +00:00
subreg-fail.mir
Revert "Reland "RegisterCoalescer: Add implicit-def of super register when coalescing SUBREG_TO_REG" (#134408)"
2025-08-04 12:07:30 +00:00
subreg-to-reg-0.ll
…
subreg-to-reg-1.ll
…
subreg-to-reg-2.ll
…
subreg-to-reg-3.ll
…
subreg-to-reg-4.ll
…
subreg-to-reg-6.ll
…
subvector-broadcast.ll
[X86] lowerV4F64Shuffle - prefer BLEND before UNPCK shuffle matching (#141073)
2025-05-22 16:51:00 +01:00
subvectorwise-store-of-vector-splat.ll
[X86] lowerV8I16GeneralSingleInputShuffle - for splat PSHUFW+PSHUFD patterns, widen the splats to encourage combines (#129854)
2025-03-06 14:25:57 +00:00
sunkaddr-ext.ll
…
swap.ll
[IR][SDAG] Remove lifetime size handling from SDAG (#150944)
2025-07-29 09:53:59 +02:00
swift-async-no-fastisel.ll
…
swift-async-reg-win64.ll
…
swift-async-reg.ll
…
swift-async-win64.ll
[llvm] Win x64 Unwind V2 1/n: Mark beginning and end of epilogs (#110024)
2025-01-30 13:51:30 -08:00
swift-async.ll
…
swift-dynamic-async-frame.ll
…
swift-error.ll
…
swift-return.ll
…
swiftcc.ll
…
swifterror.ll
[PHIElimination] Revert #131837 #146320 #146337 (#146850)
2025-07-03 07:48:08 -04:00
swiftself-win64.ll
…
swiftself.ll
…
swifttail-async-i386.ll
…
swifttail-async-win64.ll
…
swifttail-async.ll
…
swifttail-realign.ll
…
swifttail-return.ll
…
swifttailcc-store-ret-address-aliasing-stack-slot.ll
[X86] Use StackArgTokenFactor for all stores when setting up tail calls. (#126244)
2025-02-10 20:01:14 +00:00
switch-bit-test-unreachable-default.ll
…
switch-bt.ll
…
switch-crit-edge-constant.ll
…
switch-default-only.ll
…
switch-density.ll
…
switch-edge-weight.ll
…
switch-jmp-edge-split.mir
…
switch-jump-table.ll
…
switch-lower-peel-top-case.ll
…
switch-or.ll
…
switch-order-weight.ll
…
switch-phi-const.ll
…
switch-zextload.ll
…
switch.ll
[llvm] Remove br i1 undef from CodeGen/X86 tests (#121733)
2025-01-06 08:43:39 +00:00
SwitchLowering.ll
…
swizzle-2.ll
…
swizzle-avx2.ll
…
SwizzleShuff.ll
…
symbol-redefinition.ll
…
system-intrinsics-64-xsave.ll
…
system-intrinsics-64-xsavec.ll
…
system-intrinsics-64-xsaveopt.ll
…
system-intrinsics-64-xsaves.ll
…
system-intrinsics-64.ll
…
system-intrinsics-xgetbv.ll
…
system-intrinsics-xsave.ll
…
system-intrinsics-xsavec.ll
…
system-intrinsics-xsaveopt.ll
…
system-intrinsics-xsaves.ll
…
system-intrinsics-xsetbv.ll
…
system-intrinsics.ll
…
tagged-globals-jump-table.ll
…
tagged-globals-pic.ll
…
tagged-globals-static.ll
…
tail-call-attrs.ll
…
tail-call-casts.ll
…
tail-call-conditional.mir
…
tail-call-got.ll
…
tail-call-legality.ll
…
tail-call-mutable-memarg.ll
…
tail-call-parameter-attrs-mismatch.ll
…
tail-call-win64.ll
…
tail-calls-compatible-attrs.ll
…
tail-dup-addr.ll
…
tail-dup-asm-goto.ll
[ARM,AArch64] Don't put BTI at asm goto branch targets (#141562)
2025-06-03 08:44:13 +01:00
tail-dup-catchret.ll
…
tail-dup-debugloc.ll
…
tail-dup-debugvalue.mir
…
tail-dup-merge-loop-headers.ll
…
tail-dup-multiple-latch-loop.ll
…
tail-dup-no-other-successor.ll
…
tail-dup-partial.ll
…
tail-dup-pred-succ-size.mir
[TailDup] Allow large number of predecessors/successors without phis. (#116072)
2025-01-23 18:24:20 +00:00
tail-dup-repeat.ll
…
tail-merge-after-mbp.mir
…
tail-merge-debugloc.ll
…
tail-merge-identical.ll
…
tail-merge-unreachable.ll
[llvm] Remove br i1 undef from CodeGen/X86 tests (#121733)
2025-01-06 08:43:39 +00:00
tail-merge-wineh.ll
…
tail-opts.ll
…
tail-threshold.ll
…
tailcall-3regparm.ll
…
tailcall-64.ll
…
tailcall-assume.ll
…
tailcall-calleesave.ll
…
tailcall-caller-nocsr.ll
…
tailcall-cgp-dup.ll
Introduce MCAsmInfo::UsesSetToEquateSymbol and prefer = to .set
2025-06-11 22:19:31 -07:00
tailcall-disable.ll
…
tailcall-extract.ll
…
tailcall-fastisel.ll
…
tailcall-largecode.ll
…
tailcall-lifetime-end.ll
…
tailcall-mem-intrinsics.ll
…
tailcall-msvc-conventions.ll
…
tailcall-multiret.ll
…
tailcall-nofpclass.ll
…
tailcall-pseudo-64.mir
…
tailcall-pseudo.mir
…
tailcall-range.ll
…
tailcall-readnone.ll
…
tailcall-returndup-void.ll
…
tailcall-ri64.ll
…
tailcall-ssp-split-debug.ll
[llvm] Remove br i1 undef from some llvm/test/CodeGen tests (#128272)
2025-02-23 09:23:33 +00:00
tailcall-stackalign.ll
…
tailcall-structret.ll
…
tailcall-swifttailcc.ll
…
tailcall-tailcc.ll
[X86] Use X86 check prefix for 32-bit instead of X32 in tail call tests. NFC.
2025-05-12 13:56:45 +01:00
tailcall.ll
…
tailcallbyval64.ll
…
tailcallbyval.ll
…
tailcallfp2.ll
…
tailcallfp.ll
…
tailcallpic1.ll
…
tailcallpic2.ll
…
tailcallpic3.ll
…
tailcallstack64.ll
…
tailcc-calleesave.ll
…
tailcc-disable-tail-calls.ll
…
tailcc-dwarf.ll
…
tailcc-fastcc.ll
[X86] Use X86 check prefix for 32-bit instead of X32 in tail call tests. NFC.
2025-05-12 13:56:45 +01:00
tailcc-fastisel.ll
[llvm] Allow Fast and Tail CC in UEFI (#138361)
2025-05-06 15:48:05 -07:00
tailcc-largecode.ll
…
tailcc-notail.ll
…
tailcc-ssp.ll
[CodeGen] Inline stack guard check on Windows (#136290)
2025-06-12 19:38:42 +05:00
tailcc-stackalign.ll
…
tailcc-structret.ll
…
tailccbyval64.ll
…
tailccbyval.ll
…
tailccfp2.ll
…
tailccfp.ll
…
tailccpic1.ll
…
tailccpic2.ll
…
tailccstack64.ll
[llvm] Allow Fast and Tail CC in UEFI (#138361)
2025-05-06 15:48:05 -07:00
taildup-callsiteinfo.mir
[llvm] Win x64 Unwind V2 1/n: Mark beginning and end of epilogs (#110024)
2025-01-30 13:51:30 -08:00
taildup-crash.ll
[llvm] Remove br i1 undef from some llvm/test/CodeGen tests (#128272)
2025-02-23 09:23:33 +00:00
taildup-heapallocsite.ll
Fix Windows EH IP2State tables (remove +1 bias) (#144745)
2025-07-22 09:18:13 -07:00
tailjmp_gotpcrel_relax_relocation.ll
…
tailregccpic.ll
…
targetLoweringGeneric.ll
…
tbm_patterns.ll
…
tbm-intrinsics-fast-isel-x86_64.ll
…
tbm-intrinsics-fast-isel.ll
…
tbm-intrinsics-x86_64.ll
…
tbm-intrinsics.ll
…
ternlog.ll
…
test-nofold.ll
…
test-shrink-bug.ll
[CostModel] Handle all cost kinds in getCmpSelInstrCost (#148233)
2025-07-15 18:08:52 +01:00
test-shrink.ll
PeepholeOpt: Fix looking for def of current copy to coalesce (#125533)
2025-02-05 23:29:02 +07:00
test-vs-bittest.ll
…
testb-je-fusion.ll
…
testl-commute.ll
…
text-section-prefix.ll
[COFF] Preserve UniqueID used to create MCSectionCOFF (#123869)
2025-04-28 13:39:40 +08:00
this-return-64.ll
…
thread_pointer-error.ll
…
thread_pointer.ll
…
threadlocal_address.ll
…
throws-cfi-fp.ll
…
throws-cfi-no-fp.ll
…
tied-depbreak.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
tls-addr-non-leaf-function.ll
…
tls-align.ll
…
tls-android-negative.ll
…
tls-android.ll
…
tls-desc.ll
…
tls-function-argument.ll
…
tls-local-dynamic.ll
…
tls-models.ll
…
tls-no-plt.ll
…
tls-pic.ll
…
tls-pie.ll
…
tls-shrink-wrapping.ll
…
tls-windows-itanium.ll
…
tls.ll
…
tlv-1.ll
…
tlv-2.ll
…
tlv-3.ll
…
token_landingpad.ll
…
topdepthreduce-postra.mir
…
trap.ll
…
tree_way_unsigned_cmp.ll
…
trunc-and.ll
…
trunc-ext-ld-st.ll
…
trunc-nsw-nuw.ll
[DAG] getNode - fold (sext (trunc x)) -> x iff the upper bits are already signbits (#151945)
2025-08-06 14:55:46 +01:00
trunc-store.ll
…
trunc-subvector.ll
…
trunc-to-bool.ll
…
trunc-vector-width.ll
[X86] X86FixupVectorConstantsPass - use scheduler model to avoid regressions (#140028)
2025-05-28 11:02:37 +01:00
TruncAssertSext.ll
…
TruncAssertZext.ll
…
tsxldtrk-intrinsic.ll
…
tuning-shuffle-permilpd-avx512.ll
…
tuning-shuffle-permilpd.ll
…
tuning-shuffle-permilps-avx512.ll
…
tuning-shuffle-permilps.ll
…
tuning-shuffle-unpckpd-avx512.ll
…
tuning-shuffle-unpckpd.ll
…
tuning-shuffle-unpckps-avx512.ll
…
tuning-shuffle-unpckps.ll
…
twoaddr-coalesce-2.ll
…
twoaddr-coalesce-3.ll
…
twoaddr-coalesce.ll
…
twoaddr-dbg-value.mir
…
twoaddr-lea.ll
…
twoaddr-mul2.mir
…
twoaddr-sink-terminator.ll
…
typeid-alias.ll
…
uadd_inc_iv.ll
…
uadd_sat_plus.ll
…
uadd_sat_vec.ll
[X86] Fix ABI for passing after i128 (#124134)
2025-01-24 15:31:53 +01:00
uadd_sat.ll
…
ubsan-trap-merge.ll
…
ubsan-trap-nomerge.ll
…
ubsantrap.ll
…
ucmp.ll
[X86] Align f128 and i128 to 16 bytes when passing on x86-32 (#138092)
2025-07-17 11:30:36 +02:00
udiv_fix_sat.ll
[X86] Align f128 and i128 to 16 bytes when passing on x86-32 (#138092)
2025-07-17 11:30:36 +02:00
udiv_fix.ll
[X86] Align f128 and i128 to 16 bytes when passing on x86-32 (#138092)
2025-07-17 11:30:36 +02:00
udiv-exact.ll
…
udivmodei5.ll
…
uefi-fastcc.ll
[llvm] Allow Fast and Tail CC in UEFI (#138361)
2025-05-06 15:48:05 -07:00
uint64-to-float.ll
…
uint_to_fp-2.ll
…
uint_to_fp-3.ll
…
uint_to_fp.ll
…
uint_to_half.ll
[X86] Combine uitofp <v x i32> to <v x half> (#121809)
2025-01-08 16:49:29 +08:00
uintr-intrinsics.ll
…
umax.ll
[X86] Align f128 and i128 to 16 bytes when passing on x86-32 (#138092)
2025-07-17 11:30:36 +02:00
umin.ll
[X86] Align f128 and i128 to 16 bytes when passing on x86-32 (#138092)
2025-07-17 11:30:36 +02:00
umul_fix_sat.ll
…
umul_fix.ll
…
umul-with-carry.ll
…
umul-with-overflow.ll
…
umulo-64-legalisation-lowering.ll
…
umulo-128-legalisation-lowering.ll
[X86] Align f128 and i128 to 16 bytes when passing on x86-32 (#138092)
2025-07-17 11:30:36 +02:00
unaligned_extract_from_vector_through_stack.ll
…
unaligned-32-byte-memops.ll
…
unaligned-load.ll
…
unaligned-spill-folding.ll
…
undef-eflags.mir
…
undef-globals-bss.ll
…
undef-label.ll
…
undef-ops.ll
…
undo-mul-and.ll
…
unfold-masked-merge-scalar-constmask-innerouter.ll
…
unfold-masked-merge-scalar-constmask-interleavedbits.ll
…
unfold-masked-merge-scalar-constmask-interleavedbytehalves.ll
…
unfold-masked-merge-scalar-constmask-lowhigh.ll
…
unfold-masked-merge-scalar-variablemask.ll
Reland "[SelectionDAG] Make (a & x) | (~a & y) -> (a & (x ^ y)) ^ y available for all targets" (#143651)
2025-06-11 15:56:37 +08:00
unfold-masked-merge-vector-variablemask-const.ll
…
unfold-masked-merge-vector-variablemask.ll
Reland "[SelectionDAG] Make (a & x) | (~a & y) -> (a & (x ^ y)) ^ y available for all targets" (#143651)
2025-06-11 15:56:37 +08:00
unfoldMemoryOperand.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
unknown-location.ll
…
unpredictable-brcond.ll
[InstrEmitter] Use AddOperand in EmitCopyToRegClassNode. (#146637)
2025-07-02 09:44:54 -07:00
unreachable-loop-sinking.ll
[llvm] Remove br i1 undef from CodeGen/X86 tests (#121733)
2025-01-06 08:43:39 +00:00
unreachable-mbb-undef-phi.mir
[CodeGen][NPM] Port ProcessImplicitDefs to NPM (#148110)
2025-07-16 13:23:27 +05:30
unreachable-trap.ll
…
unreachable-ubsantrap.ll
…
unreachableblockelim.ll
…
unused_stackslots.ll
…
unwind-init.ll
…
unwind-inline-asm-codegen.ll
…
unwindraise.ll
…
update-terminator-debugloc.ll
…
update-terminator.mir
[llvm] Remove br i1 undef from CodeGen/X86 tests (#121733)
2025-01-06 08:43:39 +00:00
urem-i8-constant.ll
…
urem-lkk.ll
…
urem-power-of-two.ll
…
urem-seteq-illegal-types.ll
[X86] combineTargetShuffle - fold (vzmovl (shift x, y)) -> (shift (vzmovl x), y) (#141579)
2025-05-27 16:21:12 +01:00
urem-seteq-nonzero.ll
…
urem-seteq-optsize.ll
…
urem-seteq-vec-nonsplat.ll
…
urem-seteq-vec-nonzero.ll
…
urem-seteq-vec-splat.ll
…
urem-seteq-vec-tautological.ll
[DAG] Refactor X86 combineVSelectWithAllOnesOrZeros fold into a generic DAG Combine (#145298)
2025-07-02 15:07:48 +01:00
urem-seteq.ll
…
urem-vector-lkk.ll
…
use-add-flags.ll
…
use-cr-result-of-dom-icmp-st.ll
…
usermsr-intrinsics.ll
…
ushl_sat_vec.ll
[DAG] combineVSelectWithAllOnesOrZeros - missing freeze (#150388)
2025-08-04 15:55:12 +01:00
ushl_sat.ll
…
usub_inc_iv.ll
…
usub_sat_plus.ll
…
usub_sat_vec.ll
[X86] VPTERNLOG comments - use "mem" just for full width loads and "m32bcst" / "m64bcst" for broadcast loads (#143721)
2025-06-12 15:21:05 +01:00
usub_sat.ll
…
utf8.ll
…
utf16-cfstrings.ll
…
uwtables.ll
…
v2f32.ll
…
v4f32-immediate.ll
…
v4i32load-crash.ll
…
v8i1-masks.ll
[X86] Check that the type is integer before calling isUnsignedIntSetCC in combineExtSetcc. (#128263)
2025-02-22 10:10:51 -08:00
vaargs-prolog-insert.ll
Reland [SelectionDAG] Folding ZERO-EXTEND/SIGN_EXTEND poison to Poison value in getNode (#136701)
2025-04-22 17:36:41 -04:00
vaargs-win32.ll
…
vaargs.ll
…
vaes-intrinsics-avx512-x86.ll
…
vaes-intrinsics-avx512vl-x86.ll
…
vaes-intrinsics-avx-x86.ll
…
var-permute-128.ll
[DAG] combineVSelectWithAllOnesOrZeros - missing freeze (#150388)
2025-08-04 15:55:12 +01:00
var-permute-256.ll
[X86] var-permute-256.ll - add missing check prefixes for AVX512F/DQ only targets
2025-06-25 14:55:52 +01:00
var-permute-512.ll
…
vararg_no_start.ll
…
vararg_tailcall.ll
…
vararg-callee-cleanup.ll
…
varargs-softfloat.ll
…
variable-sized-darwin-bzero.ll
…
variadic-node-pic.ll
…
vastart-defs-eflags.ll
…
vbinop-simplify-bug.ll
…
vec3-setcc-crash.ll
…
vec3.ll
…
vec_align_i256.ll
…
vec_align.ll
…
vec_anyext.ll
…
vec_call.ll
…
vec_cast2.ll
…
vec_cast3.ll
…
vec_cast.ll
…
vec_cmp_sint-128.ll
…
vec_cmp_uint-128.ll
…
vec_compare-sse4.ll
…
vec_compare.ll
…
vec_ctbits.ll
…
vec_ext_inreg.ll
…
vec_extract-avx.ll
[X86] Use X86FixupInstTunings to select between (V)MOVSS/D and (V)BLENDPS/D (#143895)
2025-06-12 18:08:07 +01:00
vec_extract-mmx.ll
…
vec_extract-sse4.ll
…
vec_extract.ll
[X86] getTargetConstantBitsFromNode - early-out if the element bitsize doesn't align with the source bitsize (#150184)
2025-07-23 11:22:38 +01:00
vec_fabs.ll
[X86][AVX512FP16] Decouple AVX512VL and AVX512DQ from AVX512FP16 (#137450)
2025-04-27 14:01:37 +08:00
vec_fcopysign.ll
[X86][AVX512FP16] Decouple AVX512VL and AVX512DQ from AVX512FP16 (#137450)
2025-04-27 14:01:37 +08:00
vec_floor.ll
[X86] X86FixupInstTuning - fold BLENDPS -> MOVSD (#144029)
2025-06-13 11:05:57 +01:00
vec_fneg.ll
[X86][AVX512FP16] Decouple AVX512VL and AVX512DQ from AVX512FP16 (#137450)
2025-04-27 14:01:37 +08:00
vec_fp_to_int.ll
[X86] X86FixupVectorConstantsPass - use VPMOVSX/ZX extensions for PS/PD domain moves (#122601)
2025-01-12 15:59:05 +00:00
vec_fpext.ll
MC: Centralize X86 PC-relative fixup adjustment in MCAssembler
2025-07-08 09:22:30 -07:00
vec_fptrunc.ll
…
vec_i64.ll
…
vec_ins_extract-1.ll
…
vec_ins_extract.ll
…
vec_insert-2.ll
…
vec_insert-3.ll
…
vec_insert-4.ll
…
vec_insert-5.ll
[X86] combineTargetShuffle - fold (vzmovl (shift x, y)) -> (shift (vzmovl x), y) (#141579)
2025-05-27 16:21:12 +01:00
vec_insert-7.ll
…
vec_insert-8.ll
…
vec_insert-9.ll
…
vec_insert-mmx.ll
…
vec_int_to_fp.ll
[SelectionDAG] Fold undemanded operand to UNDEF for VECTOR_SHUFFLE (#145524)
2025-06-25 16:05:54 +02:00
vec_loadsingles.ll
…
vec_logical.ll
…
vec_minmax_match.ll
…
vec_minmax_sint.ll
[X86] X86FixupVectorConstantsPass - use VPMOVSX/ZX extensions for PS/PD domain moves (#122601)
2025-01-12 15:59:05 +00:00
vec_minmax_uint.ll
[X86] X86FixupVectorConstantsPass - use VPMOVSX/ZX extensions for PS/PD domain moves (#122601)
2025-01-12 15:59:05 +00:00
vec_no-common-bits.ll
…
vec_partial.ll
…
vec_reassociate.ll
…
vec_return.ll
…
vec_saddo.ll
[X86] vector overflow tests - regenerate VPTERNLOG comments
2025-01-04 17:57:15 +00:00
vec_sdiv_to_shift.ll
…
vec_set-2.ll
…
vec_set-3.ll
…
vec_set-4.ll
…
vec_set-6.ll
…
vec_set-7.ll
…
vec_set-8.ll
…
vec_set-A.ll
…
vec_set-B.ll
…
vec_set-C.ll
…
vec_set-D.ll
…
vec_set-F.ll
…
vec_set-H.ll
[X86] lowerV8I16GeneralSingleInputShuffle - for splat PSHUFW+PSHUFD patterns, widen the splats to encourage combines (#129854)
2025-03-06 14:25:57 +00:00
vec_set.ll
…
vec_setcc-2.ll
…
vec_setcc.ll
…
vec_shift2.ll
…
vec_shift3.ll
…
vec_shift4.ll
…
vec_shift5.ll
…
vec_shift6.ll
[X86] LowerShift - don't prematurely lower to x86 vector shift imm instructions (#120282)
2024-12-18 16:08:45 +00:00
vec_shift7.ll
…
vec_shift.ll
…
vec_shuf-insert.ll
…
vec_smulo.ll
[TargetLowering] Improve one signature of forceExpandWideMUL. (#123991)
2025-01-23 12:49:35 -08:00
vec_split.ll
…
vec_ss_load_fold.ll
[X86] Use X86FixupInstTunings to select between (V)MOVSS/D and (V)BLENDPS/D (#143895)
2025-06-12 18:08:07 +01:00
vec_ssubo.ll
[X86] vector overflow tests - regenerate VPTERNLOG comments
2025-01-04 17:57:15 +00:00
vec_trunc_sext.ll
…
vec_uaddo.ll
[X86] vector overflow tests - regenerate VPTERNLOG comments
2025-01-04 17:57:15 +00:00
vec_uint_to_fp-fastmath.ll
…
vec_uint_to_fp.ll
…
vec_umulo.ll
DAG: Fix vector_shuffle -> splat fold defining undef lanes (#123596)
2025-01-21 23:55:50 +07:00
vec_unsafe-fp-math.ll
…
vec_usubo.ll
[X86] vector overflow tests - regenerate VPTERNLOG comments
2025-01-04 17:57:15 +00:00
vec_zero_cse.ll
…
vec_zero-2.ll
…
vec_zero.ll
…
vec-2bit-int.ll
[Clang] Allow vector and matrix type attributes for sub-byte _BitInt (#140253)
2025-05-20 15:06:36 +02:00
vec-copysign-avx512.ll
…
vec-copysign.ll
…
vec-libcalls.ll
…
vec-loadsingles-alignment.ll
…
vec-strict-128-fp16.ll
[X86] X86FixupInstTuning - fold BLENDPS -> MOVSD (#144029)
2025-06-13 11:05:57 +01:00
vec-strict-128.ll
…
vec-strict-256-fp16.ll
…
vec-strict-256.ll
…
vec-strict-512-fp16.ll
…
vec-strict-512.ll
…
vec-strict-cmp-128-fp16.ll
[X86][AVX512FP16] Decouple AVX512VL and AVX512DQ from AVX512FP16 (#137450)
2025-04-27 14:01:37 +08:00
vec-strict-cmp-128.ll
[X86][StrictFP] Add widening support for STRICT_FMIN/STRICT_FMAX (#119391)
2024-12-11 20:21:34 +08:00
vec-strict-cmp-256-fp16.ll
…
vec-strict-cmp-256.ll
…
vec-strict-cmp-512-fp16.ll
…
vec-strict-cmp-512-skx.ll
[X86] vec-strict-cmp-512-skx.ll - regenerate checks
2025-02-12 18:48:55 +00:00
vec-strict-cmp-512.ll
…
vec-strict-cmp-sub128.ll
…
vec-strict-fptoint-128-fp16.ll
[X86][FP16] Do not customize WidenLowerNode for half if VLX not enabled (#146994)
2025-07-04 22:57:03 +08:00
vec-strict-fptoint-128.ll
[X86] vec-strict-fptoint - regenerate VPTERNLOG comments
2025-02-12 18:48:54 +00:00
vec-strict-fptoint-256-fp16.ll
[X86][FP16] Widen 128/256-bit CVTTP2xI to 512-bit when VLX not enabled (#142763)
2025-06-05 15:32:25 +08:00
vec-strict-fptoint-256.ll
[X86] vec-strict-fptoint - regenerate VPTERNLOG comments
2025-02-12 18:48:54 +00:00
vec-strict-fptoint-512-fp16.ll
[X86][AVX512FP16] Decouple AVX512VL and AVX512DQ from AVX512FP16 (#137450)
2025-04-27 14:01:37 +08:00
vec-strict-fptoint-512.ll
[X86] vec-strict-fptoint - regenerate VPTERNLOG comments
2025-02-12 18:48:54 +00:00
vec-strict-inttofp-128-fp16.ll
[X86][AVX512FP16] Decouple AVX512VL and AVX512DQ from AVX512FP16 (#137450)
2025-04-27 14:01:37 +08:00
vec-strict-inttofp-128.ll
[X86][BreakFalseDeps] Using reverse order for undef register selection (#137569)
2025-06-11 22:08:20 +08:00
vec-strict-inttofp-256-fp16.ll
…
vec-strict-inttofp-256.ll
[X86][BreakFalseDeps] Using reverse order for undef register selection (#137569)
2025-06-11 22:08:20 +08:00
vec-strict-inttofp-512-fp16.ll
[X86][AVX512FP16] Decouple AVX512VL and AVX512DQ from AVX512FP16 (#137450)
2025-04-27 14:01:37 +08:00
vec-strict-inttofp-512.ll
[X86][BreakFalseDeps] Using reverse order for undef register selection (#137569)
2025-06-11 22:08:20 +08:00
vec-strict-round-128.ll
…
vec-trunc-store.ll
…
vecloadextract.ll
…
vector_splat-const-shift-of-constmasked.ll
…
vector-bitreverse.ll
[X86] Ensure that bit reversals of byte vectors are properly lowered on pure GFNI targets (#148304)
2025-07-18 19:14:34 +01:00
vector-blend.ll
[X86] X86FixupInstTuning - fold BLENDPS -> MOVSD (#144029)
2025-06-13 11:05:57 +01:00
vector-bo-select-avx512.ll
…
vector-bo-select.ll
[DAG] combineVSelectWithAllOnesOrZeros - missing freeze (#150388)
2025-08-04 15:55:12 +01:00
vector-compare-all_of.ll
…
vector-compare-any_of.ll
…
vector-compare-combines.ll
…
vector-compare-results.ll
…
vector-compare-simplify.ll
…
vector-compress.ll
[DAG] visitFREEZE - replace multiple frozen/unfrozen uses of an SDValue with just the frozen node (#150017)
2025-08-05 09:24:09 +01:00
vector-constrained-fp-intrinsics-flags.ll
[InstrEmitter] Use AddOperand in EmitCopyToRegClassNode. (#146637)
2025-07-02 09:44:54 -07:00
vector-constrained-fp-intrinsics-fma.ll
…
vector-constrained-fp-intrinsics.ll
[X86][BreakFalseDeps] Using reverse order for undef register selection (#137569)
2025-06-11 22:08:20 +08:00
vector-ext-logic.ll
…
vector-extend-inreg.ll
…
vector-fshl-128.ll
[X86] VPTERNLOG comments - use "mem" just for full width loads and "m32bcst" / "m64bcst" for broadcast loads (#143721)
2025-06-12 15:21:05 +01:00
vector-fshl-256.ll
[X86] combineConcatVectorOps - only always concat logic ops on AVX512 targets (#145036)
2025-06-20 15:51:04 +01:00
vector-fshl-512.ll
[X86] VPTERNLOG comments - use "mem" just for full width loads and "m32bcst" / "m64bcst" for broadcast loads (#143721)
2025-06-12 15:21:05 +01:00
vector-fshl-rot-128.ll
[DAG] visitFREEZE - replace multiple frozen/unfrozen uses of an SDValue with just the frozen node (#150017)
2025-08-05 09:24:09 +01:00
vector-fshl-rot-256.ll
[DAG] visitFREEZE - replace multiple frozen/unfrozen uses of an SDValue with just the frozen node (#150017)
2025-08-05 09:24:09 +01:00
vector-fshl-rot-512.ll
[X86] VPTERNLOG comments - use "mem" just for full width loads and "m32bcst" / "m64bcst" for broadcast loads (#143721)
2025-06-12 15:21:05 +01:00
vector-fshl-rot-sub128.ll
[DAG] isSplatValue - only treat binop splats with repeated undef elements as undef (#135945)
2025-04-16 12:34:11 +01:00
vector-fshl-sub128.ll
[DAG] isSplatValue - only treat binop splats with repeated undef elements as undef (#135945)
2025-04-16 12:34:11 +01:00
vector-fshr-128.ll
[X86] VPTERNLOG comments - use "mem" just for full width loads and "m32bcst" / "m64bcst" for broadcast loads (#143721)
2025-06-12 15:21:05 +01:00
vector-fshr-256.ll
[X86] combineConcatVectorOps - only always concat logic ops on AVX512 targets (#145036)
2025-06-20 15:51:04 +01:00
vector-fshr-512.ll
[X86] VPTERNLOG comments - use "mem" just for full width loads and "m32bcst" / "m64bcst" for broadcast loads (#143721)
2025-06-12 15:21:05 +01:00
vector-fshr-rot-128.ll
[DAG] visitFREEZE - replace multiple frozen/unfrozen uses of an SDValue with just the frozen node (#150017)
2025-08-05 09:24:09 +01:00
vector-fshr-rot-256.ll
[DAG] visitFREEZE - replace multiple frozen/unfrozen uses of an SDValue with just the frozen node (#150017)
2025-08-05 09:24:09 +01:00
vector-fshr-rot-512.ll
[X86] VPTERNLOG comments - use "mem" just for full width loads and "m32bcst" / "m64bcst" for broadcast loads (#143721)
2025-06-12 15:21:05 +01:00
vector-fshr-rot-sub128.ll
[DAG] isSplatValue - only treat binop splats with repeated undef elements as undef (#135945)
2025-04-16 12:34:11 +01:00
vector-fshr-sub128.ll
[DAG] isSplatValue - only treat binop splats with repeated undef elements as undef (#135945)
2025-04-16 12:34:11 +01:00
vector-gep.ll
[DAG] canCreateUndefOrPoison - add EXTRACT_SUBVECTOR handling (#132745)
2025-03-24 16:03:47 +00:00
vector-half-conversions.ll
[X86] Use X86FixupInstTunings to select between (V)MOVSS/D and (V)BLENDPS/D (#143895)
2025-06-12 18:08:07 +01:00
vector-idiv-sdiv-128.ll
[X86] Fold (add X, (srl Y, 7)) -> (sub X, (icmp_sgt 0, Y)) on vXi8 vectors (#143359)
2025-06-09 11:52:07 +01:00
vector-idiv-sdiv-256.ll
[X86] Fold (add X, (srl Y, 7)) -> (sub X, (icmp_sgt 0, Y)) on vXi8 vectors (#143359)
2025-06-09 11:52:07 +01:00
vector-idiv-sdiv-512.ll
[X86] VPTERNLOG comments - use "mem" just for full width loads and "m32bcst" / "m64bcst" for broadcast loads (#143721)
2025-06-12 15:21:05 +01:00
vector-idiv-udiv-128.ll
…
vector-idiv-udiv-256.ll
[X86] SimplifyDemandedBitsForTargetNode - add X86ISD::BLENDI handling (#133102)
2025-03-27 09:32:40 +00:00
vector-idiv-udiv-512.ll
[X86] VPTERNLOG comments - use "mem" just for full width loads and "m32bcst" / "m64bcst" for broadcast loads (#143721)
2025-06-12 15:21:05 +01:00
vector-idiv-v2i32.ll
…
vector-idiv.ll
…
vector-interleave.ll
[X86] Reuse X86ISD::SUBV_BROADCAST_LOAD for subvector loads across chains (#142381)
2025-06-03 10:00:10 +01:00
vector-interleaved-load-i8-stride-2.ll
[X86] combineConcatVectorOps - convert X86ISD::VPERMV3 concatenation to use combineConcatVectorOps recursion
2025-03-10 18:52:59 +00:00
vector-interleaved-load-i8-stride-3.ll
[X86] splitVector - split concat_vectors(a,b,c,d) -> concat_vectors(a,b) + concat_vectors(c,d) (#133753)
2025-04-01 09:57:39 +01:00
vector-interleaved-load-i8-stride-4.ll
[X86] lowerShuffleWithUndefHalf - don't split vXi8 unary shuffles if the 128-bit source lanes are already in place (#122919)
2025-01-15 08:19:54 +00:00
vector-interleaved-load-i8-stride-5.ll
[X86] lowerShuffleWithUndefHalf - don't split vXi8 unary shuffles if the 128-bit source lanes are already in place (#122919)
2025-01-15 08:19:54 +00:00
vector-interleaved-load-i8-stride-6.ll
[X86] lowerShuffleWithUndefHalf - don't split vXi8 unary shuffles if the 128-bit source lanes are already in place (#122919)
2025-01-15 08:19:54 +00:00
vector-interleaved-load-i8-stride-7.ll
[X86] combineSelect - attempt to combine with shuffles (#143753)
2025-06-12 09:29:41 +01:00
vector-interleaved-load-i8-stride-8.ll
[X86] lowerShuffleAsVTRUNC - use combineConcatVectorOps to catch more "cheap" concats (#145876)
2025-06-26 14:12:18 +01:00
vector-interleaved-load-i16-stride-2.ll
[X86] splitVector - use collectConcatOps to find pre-split subvectors (#142774)
2025-06-04 17:53:43 +01:00
vector-interleaved-load-i16-stride-3.ll
[X86] combineX86ShufflesRecursively - iteratively peek through bitcasts to free subvector widening/narrowing sources. (#134701)
2025-04-08 11:28:40 +01:00
vector-interleaved-load-i16-stride-4.ll
[X86] lowerShuffleAsVTRUNC - use combineConcatVectorOps to catch more "cheap" concats (#145876)
2025-06-26 14:12:18 +01:00
vector-interleaved-load-i16-stride-5.ll
[X86] SimplifyDemandedVectorEltsForTargetNode - reduce the size of VPERMV/VPERMV3 nodes if the upper elements are not demanded (REAPPLIED) (#134263)
2025-04-03 17:39:38 +01:00
vector-interleaved-load-i16-stride-6.ll
[X86] combineX86ShuffleChain - don't combine to VPERM2W/VPERM2B from just any single variable mask (#127914)
2025-02-20 09:11:29 +00:00
vector-interleaved-load-i16-stride-7.ll
[X86] combineX86ShuffleChain - don't combine to VPERM2W/VPERM2B from just any single variable mask (#127914)
2025-02-20 09:11:29 +00:00
vector-interleaved-load-i16-stride-8.ll
[X86] Fold VPERMV3(X,M,Y) -> VPERMV(CONCAT(X,Y),WIDEN(M)) iff the CONCAT is free (#122485)
2025-01-13 14:13:55 +00:00
vector-interleaved-load-i32-stride-2.ll
[X86] Fold VPERMV3(X,M,Y) -> VPERMV(CONCAT(X,Y),WIDEN(M)) iff the CONCAT is free (#122485)
2025-01-13 14:13:55 +00:00
vector-interleaved-load-i32-stride-3.ll
[X86] combineTargetShuffle - fold VPERMV3(HI,MASK,LO) -> VPERMV(COMMUTE(MASK),CONCAT(LO,HI)) (#127199)
2025-02-15 11:59:52 +00:00
vector-interleaved-load-i32-stride-4.ll
[X86] X86FixupInstTuning - fold BLENDPS -> MOVSD (#144029)
2025-06-13 11:05:57 +01:00
vector-interleaved-load-i32-stride-5.ll
[X86] X86FixupInstTuning - fold BLENDPS -> MOVSD (#144029)
2025-06-13 11:05:57 +01:00
vector-interleaved-load-i32-stride-6.ll
[X86] getFauxShuffleMask - insert_subvector - skip undemanded subvectors (#129042)
2025-02-27 15:25:02 +00:00
vector-interleaved-load-i32-stride-7.ll
[X86] combineTargetShuffle - fold VPERMV3(HI,MASK,LO) -> VPERMV(COMMUTE(MASK),CONCAT(LO,HI)) (#127199)
2025-02-15 11:59:52 +00:00
vector-interleaved-load-i32-stride-8.ll
[X86] Fold EXTRACT_SUBVECTOR(VPERMV(V,M),C) -> EXTRACT_SUBVECTOR(VPERMV(V,M'),0)
2025-02-13 12:35:05 +00:00
vector-interleaved-load-i64-stride-2.ll
[X86] Fold VPERMV3(X,M,Y) -> VPERMV(CONCAT(X,Y),WIDEN(M)) iff the CONCAT is free (#122485)
2025-01-13 14:13:55 +00:00
vector-interleaved-load-i64-stride-3.ll
[X86] SimplifyDemandedVectorEltsForTargetNode - handle 512-bit X86ISD::VPERMI with lower half demanded elts (#137139)
2025-04-24 10:41:31 +01:00
vector-interleaved-load-i64-stride-4.ll
[X86] X86FixupVectorConstantsPass - use VPMOVSX/ZX extensions for PS/PD domain moves (#122601)
2025-01-12 15:59:05 +00:00
vector-interleaved-load-i64-stride-5.ll
…
vector-interleaved-load-i64-stride-6.ll
[X86] Fold VPERMV3(X,M,Y) -> VPERMV(CONCAT(X,Y),WIDEN(M)) iff the CONCAT is free (#122485)
2025-01-13 14:13:55 +00:00
vector-interleaved-load-i64-stride-7.ll
[X86] Fold VPERMV3(X,M,Y) -> VPERMV(CONCAT(X,Y),WIDEN(M)) iff the CONCAT is free (#122485)
2025-01-13 14:13:55 +00:00
vector-interleaved-load-i64-stride-8.ll
…
vector-interleaved-store-i8-stride-2.ll
[X86] splitVector - use collectConcatOps to find pre-split subvectors (#142774)
2025-06-04 17:53:43 +01:00
vector-interleaved-store-i8-stride-3.ll
[X86] collectConcatOps - handle extract_subvector(concat_subvectors(...)) patterns (#143406)
2025-06-09 18:40:15 +01:00
vector-interleaved-store-i8-stride-4.ll
[X86] combineX86ShufflesRecursively - iteratively peek through bitcasts to free subvector widening/narrowing sources. (#134701)
2025-04-08 11:28:40 +01:00
vector-interleaved-store-i8-stride-5.ll
[X86] combineSelect - attempt to combine with shuffles (#143753)
2025-06-12 09:29:41 +01:00
vector-interleaved-store-i8-stride-6.ll
[X86] combineSelect - attempt to combine with shuffles (#143753)
2025-06-12 09:29:41 +01:00
vector-interleaved-store-i8-stride-7.ll
[X86] combineINSERT_SUBVECTOR - directly fold to X86ISD::SUBV_BROADCAST_LOAD to prevent vector split infinite loop (#145077)
2025-06-21 00:38:30 +02:00
vector-interleaved-store-i8-stride-8.ll
[X86] combineSelect - attempt to combine with shuffles (#143753)
2025-06-12 09:29:41 +01:00
vector-interleaved-store-i16-stride-2.ll
[X86] splitVector - use collectConcatOps to find pre-split subvectors (#142774)
2025-06-04 17:53:43 +01:00
vector-interleaved-store-i16-stride-3.ll
[X86] shouldReduceLoadWidth - don't split loads if we can freely reuse full width legal binop (#129695)
2025-04-29 10:35:15 +01:00
vector-interleaved-store-i16-stride-4.ll
[X86] combineConcatVectorOps - require free concatenation of at least one operand of UNPCKL\H (#135366)
2025-04-11 15:41:09 +01:00
vector-interleaved-store-i16-stride-5.ll
[X86] VPTERNLOG comments - use "mem" just for full width loads and "m32bcst" / "m64bcst" for broadcast loads (#143721)
2025-06-12 15:21:05 +01:00
vector-interleaved-store-i16-stride-6.ll
[X86] shouldReduceLoadWidth - don't split loads if we can freely reuse full width legal binop (#129695)
2025-04-29 10:35:15 +01:00
vector-interleaved-store-i16-stride-7.ll
[X86] VPTERNLOG comments - use "mem" just for full width loads and "m32bcst" / "m64bcst" for broadcast loads (#143721)
2025-06-12 15:21:05 +01:00
vector-interleaved-store-i16-stride-8.ll
[X86] combineSelect - attempt to combine with shuffles (#143753)
2025-06-12 09:29:41 +01:00
vector-interleaved-store-i32-stride-2.ll
[X86] lowerV8F32Shuffle - use lowerShufflePairAsUNPCKAndPermute on AVX1 targets (#140881)
2025-05-21 13:00:48 +01:00
vector-interleaved-store-i32-stride-3.ll
[X86] splitAndLowerShuffle - split a v8f32 bitcast from v8i32 operands as 2 v4i32 shuffles (#143493)
2025-06-10 11:29:08 +01:00
vector-interleaved-store-i32-stride-4.ll
[X86] splitAndLowerShuffle - split a v8f32 bitcast from v8i32 operands as 2 v4i32 shuffles (#143493)
2025-06-10 11:29:08 +01:00
vector-interleaved-store-i32-stride-5.ll
[X86] Use X86FixupInstTunings to select between (V)MOVSS/D and (V)BLENDPS/D (#143895)
2025-06-12 18:08:07 +01:00
vector-interleaved-store-i32-stride-6.ll
[X86] splitAndLowerShuffle - split a v8f32 bitcast from v8i32 operands as 2 v4i32 shuffles (#143493)
2025-06-10 11:29:08 +01:00
vector-interleaved-store-i32-stride-7.ll
[X86] Use X86FixupInstTunings to select between (V)MOVSS/D and (V)BLENDPS/D (#143895)
2025-06-12 18:08:07 +01:00
vector-interleaved-store-i32-stride-8.ll
[X86] splitAndLowerShuffle - split a v8f32 bitcast from v8i32 operands as 2 v4i32 shuffles (#143493)
2025-06-10 11:29:08 +01:00
vector-interleaved-store-i64-stride-2.ll
[X86] combineConcatVectorOps - concat per-lane v2f64/v4f64 shuffles into vXf64 vshufpd (#143017)
2025-06-06 16:41:40 +01:00
vector-interleaved-store-i64-stride-3.ll
[X86] X86FixupVectorConstantsPass - use VPMOVSX/ZX extensions for PS/PD domain moves (#122601)
2025-01-12 15:59:05 +00:00
vector-interleaved-store-i64-stride-4.ll
[X86] Fold VPERMV3(WIDEN(X),M,WIDEN(Y)) -> VPERMV(CONCAT(X,Y),M') iff the CONCAT is free (#122750)
2025-01-14 13:26:38 +00:00
vector-interleaved-store-i64-stride-5.ll
[X86] SimplifyDemandedVectorEltsForTargetNode - reduce the size of VPERMV/VPERMV3 nodes if the upper elements are not demanded (REAPPLIED) (#134263)
2025-04-03 17:39:38 +01:00
vector-interleaved-store-i64-stride-6.ll
[X86] SimplifyDemandedVectorEltsForTargetNode - reduce the size of VPERMV/VPERMV3 nodes if the upper elements are not demanded (REAPPLIED) (#134263)
2025-04-03 17:39:38 +01:00
vector-interleaved-store-i64-stride-7.ll
[X86] getFauxShuffleMask - insert_subvector - skip undemanded subvectors (#129042)
2025-02-27 15:25:02 +00:00
vector-interleaved-store-i64-stride-8.ll
…
vector-intrinsics.ll
…
vector-llrint-f16.ll
[Test] Add and update tests for lrint/llrint (NFC) (#152662)
2025-08-12 09:56:51 +09:00
vector-llrint.ll
[Test] Add and update tests for lrint/llrint (NFC) (#152662)
2025-08-12 09:56:51 +09:00
vector-lrint-f16.ll
[Test] Add and update tests for lrint/llrint (NFC) (#152662)
2025-08-12 09:56:51 +09:00
vector-lrint.ll
[Test] Add and update tests for lrint/llrint (NFC) (#152662)
2025-08-12 09:56:51 +09:00
vector-lzcnt-128.ll
[X86] X86FixupVectorConstantsPass - use VPMOVSX/ZX extensions for PS/PD domain moves (#122601)
2025-01-12 15:59:05 +00:00
vector-lzcnt-256.ll
[X86] X86FixupVectorConstantsPass - use VPMOVSX/ZX extensions for PS/PD domain moves (#122601)
2025-01-12 15:59:05 +00:00
vector-lzcnt-512.ll
[X86] fold AND(X,SEXT(SETCC())) -> SELECT(SETCC(),X,0) to support AVX512 predicated {k}{z} masks (#131788)
2025-03-19 14:53:23 +00:00
vector-lzcnt-sub128.ll
…
vector-merge-store-fp-constants.ll
…
vector-mul.ll
[X86] X86FixupInstTuning - fold BLENDPS -> MOVSD (#144029)
2025-06-13 11:05:57 +01:00
vector-mulfix-legalize.ll
…
vector-narrow-binop.ll
…
vector-pack-128.ll
…
vector-pack-256.ll
…
vector-pack-512.ll
[X86] combineConcatVectorOps - convert X86ISD::PACKSS/US concatenation to use combineConcatVectorOps recursion (#130575)
2025-03-11 18:02:27 +00:00
vector-partial-undef.ll
[X86] getFauxShuffleMask - always match insert_subvector(insert_subvector(undef,sub,0),sub,c) 'subvector splat' patterns (#130115)
2025-03-06 16:06:21 +00:00
vector-pcmp.ll
[x86] vector-pcmp.ll - regenerate VPTERNLOGD asm comment
2025-06-13 14:52:24 +01:00
vector-popcnt-128-ult-ugt.ll
[X86] vector popcnt tests - regenerate VPTERNLOG comments
2025-01-11 15:02:52 +00:00
vector-popcnt-128.ll
[CodeGenPrepare] Unfold slow ctpop when used in power-of-two test (#102731)
2025-04-23 08:54:10 +03:00
vector-popcnt-256-ult-ugt.ll
[CodeGenPrepare] Unfold slow ctpop when used in power-of-two test (#102731)
2025-04-23 08:54:10 +03:00
vector-popcnt-256.ll
[CodeGenPrepare] Unfold slow ctpop when used in power-of-two test (#102731)
2025-04-23 08:54:10 +03:00
vector-popcnt-512-ult-ugt.ll
[CodeGenPrepare] Unfold slow ctpop when used in power-of-two test (#102731)
2025-04-23 08:54:10 +03:00
vector-popcnt-512.ll
[CodeGenPrepare] Unfold slow ctpop when used in power-of-two test (#102731)
2025-04-23 08:54:10 +03:00
vector-reduce-add-mask.ll
[X86] X86FixupInstTuning - prefer VPBLENDD to VPBLENDW shuffles on AVX2+ targets (#144269)
2025-06-16 10:31:24 +01:00
vector-reduce-add-sext.ll
…
vector-reduce-add-zext.ll
[X86] X86FixupInstTuning - prefer VPBLENDD to VPBLENDW shuffles on AVX2+ targets (#144269)
2025-06-16 10:31:24 +01:00
vector-reduce-add.ll
[X86] X86FixupInstTuning - prefer VPBLENDD to VPBLENDW shuffles on AVX2+ targets (#144269)
2025-06-16 10:31:24 +01:00
vector-reduce-and-bool.ll
[X86] vector reduction tests - regenerate VPTERNLOG comments
2025-01-22 17:23:37 +00:00
vector-reduce-and-cmp.ll
[X86] vector reduction tests - regenerate VPTERNLOG comments
2025-01-22 17:23:37 +00:00
vector-reduce-and-scalar.ll
[X86] vector reduction tests - regenerate VPTERNLOG comments
2025-01-22 17:23:37 +00:00
vector-reduce-and.ll
…
vector-reduce-ctpop.ll
[X86] combineConcatVectorOps - add concatenation handling for BITCAST nodes (#133913)
2025-04-10 17:44:39 +01:00
vector-reduce-fadd-fast.ll
…
vector-reduce-fadd.ll
…
vector-reduce-fmax-fmin-fast.ll
[DAG] visitEXTRACT_SUBVECTOR - accumulate SimplifyDemandedVectorElts demanded elts across all EXTRACT_SUBVECTOR uses (REAPPLIED) (#133401)
2025-03-29 17:55:38 +00:00
vector-reduce-fmax-nnan.ll
[X86] SimplifyDemandedVectorEltsForTargetNode - replace packed fcmp node with scalar fcmp node if only element0 is demanded (#140563)
2025-05-20 09:33:28 +01:00
vector-reduce-fmax.ll
[X86] LowerSelect - use BLENDV for scalar selection on all SSE41+ targets (#125853)
2025-02-10 11:24:04 +00:00
vector-reduce-fmaximum.ll
[X86] LowerSelect - use BLENDV for scalar selection on all SSE41+ targets (#125853)
2025-02-10 11:24:04 +00:00
vector-reduce-fmin-nnan.ll
[X86] SimplifyDemandedVectorEltsForTargetNode - replace packed fcmp node with scalar fcmp node if only element0 is demanded (#140563)
2025-05-20 09:33:28 +01:00
vector-reduce-fmin.ll
[X86] LowerSelect - use BLENDV for scalar selection on all SSE41+ targets (#125853)
2025-02-10 11:24:04 +00:00
vector-reduce-fmul-fast.ll
…
vector-reduce-fmul.ll
…
vector-reduce-mul.ll
[DAG] visitEXTRACT_SUBVECTOR - accumulate SimplifyDemandedVectorElts demanded elts across all EXTRACT_SUBVECTOR uses (REAPPLIED) (#133401)
2025-03-29 17:55:38 +00:00
vector-reduce-or-bool.ll
…
vector-reduce-or-cmp.ll
…
vector-reduce-or.ll
…
vector-reduce-smax.ll
…
vector-reduce-smin.ll
…
vector-reduce-umax.ll
[X86] vector reduction tests - regenerate VPTERNLOG comments
2025-01-22 17:23:37 +00:00
vector-reduce-umin.ll
…
vector-reduce-xor-bool.ll
[DAG] visitCONCAT_VECTORS - relax legality checks (#137210)
2025-04-24 19:08:06 +01:00
vector-reduce-xor.ll
…
vector-rem.ll
…
vector-replicaton-i1-mask.ll
[X86] combineX86ShufflesRecursively - peek through one use bitcasts to find additional (free) extract_subvector nodes
2025-02-20 13:49:49 +00:00
vector-rotate-128.ll
[DAG] visitFREEZE - replace multiple frozen/unfrozen uses of an SDValue with just the frozen node (#150017)
2025-08-05 09:24:09 +01:00
vector-rotate-256.ll
[DAG] visitFREEZE - replace multiple frozen/unfrozen uses of an SDValue with just the frozen node (#150017)
2025-08-05 09:24:09 +01:00
vector-rotate-512.ll
[X86] VPTERNLOG comments - use "mem" just for full width loads and "m32bcst" / "m64bcst" for broadcast loads (#143721)
2025-06-12 15:21:05 +01:00
vector-sext.ll
[X86] lowerV8I16GeneralSingleInputShuffle - for splat PSHUFW+PSHUFD patterns, widen the splats to encourage combines (#129854)
2025-03-06 14:25:57 +00:00
vector-shift-ashr-128.ll
[X86] VPTERNLOG comments - use "mem" just for full width loads and "m32bcst" / "m64bcst" for broadcast loads (#143721)
2025-06-12 15:21:05 +01:00
vector-shift-ashr-256.ll
[X86] VPTERNLOG comments - use "mem" just for full width loads and "m32bcst" / "m64bcst" for broadcast loads (#143721)
2025-06-12 15:21:05 +01:00
vector-shift-ashr-512.ll
[X86] VPTERNLOG comments - use "mem" just for full width loads and "m32bcst" / "m64bcst" for broadcast loads (#143721)
2025-06-12 15:21:05 +01:00
vector-shift-ashr-sub128.ll
[X86] VPTERNLOG comments - use "mem" just for full width loads and "m32bcst" / "m64bcst" for broadcast loads (#143721)
2025-06-12 15:21:05 +01:00
vector-shift-by-select-loop.ll
…
vector-shift-lshr-128.ll
[X86] lowerV8I16GeneralSingleInputShuffle - for splat PSHUFW+PSHUFD patterns, widen the splats to encourage combines (#129854)
2025-03-06 14:25:57 +00:00
vector-shift-lshr-256.ll
[X86] combineConcatVectorOps - only concat AVX1 v4i64 shift-by-32 to a shuffle if the concat is free (#145043)
2025-06-20 18:09:07 +01:00
vector-shift-lshr-512.ll
…
vector-shift-lshr-sub128.ll
[X86] lowerV8I16GeneralSingleInputShuffle - for splat PSHUFW+PSHUFD patterns, widen the splats to encourage combines (#129854)
2025-03-06 14:25:57 +00:00
vector-shift-lut.ll
…
vector-shift-shl-128.ll
[X86] lowerV8I16GeneralSingleInputShuffle - for splat PSHUFW+PSHUFD patterns, widen the splats to encourage combines (#129854)
2025-03-06 14:25:57 +00:00
vector-shift-shl-256.ll
[X86] combineConcatVectorOps - only concat AVX1 v4i64 shift-by-32 to a shuffle if the concat is free (#145043)
2025-06-20 18:09:07 +01:00
vector-shift-shl-512.ll
[X86] VPTERNLOG comments - use "mem" just for full width loads and "m32bcst" / "m64bcst" for broadcast loads (#143721)
2025-06-12 15:21:05 +01:00
vector-shift-shl-sub128.ll
[X86] lowerV8I16GeneralSingleInputShuffle - for splat PSHUFW+PSHUFD patterns, widen the splats to encourage combines (#129854)
2025-03-06 14:25:57 +00:00
vector-shuffle-128-unpck.ll
…
vector-shuffle-128-v2.ll
[X86] X86FixupInstTuning - fold BLENDPS -> MOVSD (#144029)
2025-06-13 11:05:57 +01:00
vector-shuffle-128-v4.ll
[X86] X86FixupInstTuning - fold BLENDPS -> MOVSD (#144029)
2025-06-13 11:05:57 +01:00
vector-shuffle-128-v8.ll
[X86] lowerV8I16GeneralSingleInputShuffle - for splat PSHUFW+PSHUFD patterns, widen the splats to encourage combines (#129854)
2025-03-06 14:25:57 +00:00
vector-shuffle-128-v16.ll
[NFC][LLVM][CodeGen][X86] Add ConstantInt/FP based vector support to MachineInstr fixup and printing code. (#137331)
2025-05-13 11:33:07 +01:00
vector-shuffle-256-v4.ll
[X86] Use X86FixupInstTunings to select between (V)MOVSS/D and (V)BLENDPS/D (#143895)
2025-06-12 18:08:07 +01:00
vector-shuffle-256-v8.ll
[X86] X86FixupInstTuning - fold BLENDPS -> MOVSD (#144029)
2025-06-13 11:05:57 +01:00
vector-shuffle-256-v16.ll
[X86] combineConcatVectorOps - convert X86ISD::BLENDI concatenation to use combineConcatVectorOps recursion (#131121)
2025-03-13 12:58:22 +00:00
vector-shuffle-256-v32.ll
[X86] combineX86ShufflesRecursively - iteratively peek through bitcasts to free subvector widening/narrowing sources. (#134701)
2025-04-08 11:28:40 +01:00
vector-shuffle-512-v8.ll
[X86] combineConcatVectorOps - extend VPERMILPD handling to support 512-bit types
2025-03-17 19:15:37 +00:00
vector-shuffle-512-v16.ll
[X86] X86FixupVectorConstantsPass - use scheduler model to avoid regressions (#140028)
2025-05-28 11:02:37 +01:00
vector-shuffle-512-v32.ll
[X86] X86FixupVectorConstantsPass - use scheduler model to avoid regressions (#140028)
2025-05-28 11:02:37 +01:00
vector-shuffle-512-v64.ll
[X86] lowerShuffleAsLanePermuteAndPermute - ensure we've simplified the demanded shuffle mask elts before testing for a matching shuffle (#153554)
2025-08-14 10:47:11 +01:00
vector-shuffle-avx512.ll
[X86] VPTERNLOG comments - use "mem" just for full width loads and "m32bcst" / "m64bcst" for broadcast loads (#143721)
2025-06-12 15:21:05 +01:00
vector-shuffle-combining-avx2.ll
[X86] SimplifyDemandedVectorEltsForTargetNode - ensure X86ISD::VPERMILPV node use v2f64/v4f32 types
2025-06-20 17:03:30 +01:00
vector-shuffle-combining-avx512bw.ll
…
vector-shuffle-combining-avx512bwvl.ll
[X86] vector-shuffle-combining-avx512bwvl.ll - regenerate test check
2025-05-23 14:10:17 +01:00
vector-shuffle-combining-avx512f.ll
[X86] combineSelect - attempt to combine with shuffles (#143753)
2025-06-12 09:29:41 +01:00
vector-shuffle-combining-avx512vbmi.ll
[X86] fold AND(X,SEXT(SETCC())) -> SELECT(SETCC(),X,0) to support AVX512 predicated {k}{z} masks (#131788)
2025-03-19 14:53:23 +00:00
vector-shuffle-combining-avx512vl.ll
[X86] add test coverage for #143606
2025-06-11 08:26:36 +01:00
vector-shuffle-combining-avx.ll
[X86] combineConcatVectorOps - add concatenation handling for X86ISD::VPERMILPV nodes (#132355)
2025-03-21 09:40:27 +00:00
vector-shuffle-combining-sse4a.ll
…
vector-shuffle-combining-sse41.ll
…
vector-shuffle-combining-ssse3.ll
[X86] X86FixupInstTuning - fold BLENDPS -> MOVSD (#144029)
2025-06-13 11:05:57 +01:00
vector-shuffle-combining-xop.ll
[X86] Use X86FixupInstTunings to select between (V)MOVSS/D and (V)BLENDPS/D (#143895)
2025-06-12 18:08:07 +01:00
vector-shuffle-combining.ll
[X86] X86FixupVectorConstantsPass - use scheduler model to avoid regressions (#140028)
2025-05-28 11:02:37 +01:00
vector-shuffle-concatenation.ll
[X86] X86FixupInstTuning - fold BLENDPS -> MOVSD (#144029)
2025-06-13 11:05:57 +01:00
vector-shuffle-fast-per-lane.ll
…
vector-shuffle-masked.ll
…
vector-shuffle-mmx.ll
…
vector-shuffle-sse1.ll
…
vector-shuffle-sse4a.ll
…
vector-shuffle-sse41.ll
…
vector-shuffle-v1.ll
…
vector-shuffle-v48.ll
…
vector-shuffle-v192.ll
[X86] combineConcatVectorOps - add support for AVX1 and/or/xor/andnp concatenation (#130645)
2025-03-11 09:54:44 +00:00
vector-shuffle-variable-128.ll
…
vector-shuffle-variable-256.ll
…
vector-sqrt.ll
…
vector-trunc-math.ll
…
vector-trunc-nowrap.ll
[DAG] visitCONCAT_VECTORS - relax legality checks (#137210)
2025-04-24 19:08:06 +01:00
vector-trunc-packus.ll
[DAG] visitCONCAT_VECTORS - relax legality checks (#137210)
2025-04-24 19:08:06 +01:00
vector-trunc-ssat.ll
[DAG] visitCONCAT_VECTORS - relax legality checks (#137210)
2025-04-24 19:08:06 +01:00
vector-trunc-usat.ll
[X86] X86FixupVectorConstantsPass - use scheduler model to avoid regressions (#140028)
2025-05-28 11:02:37 +01:00
vector-trunc.ll
[DAG] visitCONCAT_VECTORS - relax legality checks (#137210)
2025-04-24 19:08:06 +01:00
vector-truncate-combine.ll
…
vector-tzcnt-128.ll
[X86] X86FixupVectorConstantsPass - use VPMOVSX/ZX extensions for PS/PD domain moves (#122601)
2025-01-12 15:59:05 +00:00
vector-tzcnt-256.ll
[X86] X86FixupVectorConstantsPass - use VPMOVSX/ZX extensions for PS/PD domain moves (#122601)
2025-01-12 15:59:05 +00:00
vector-tzcnt-512.ll
…
vector-unsigned-cmp.ll
[X86] lowerV8I16GeneralSingleInputShuffle - for splat PSHUFW+PSHUFD patterns, widen the splats to encourage combines (#129854)
2025-03-06 14:25:57 +00:00
vector-variable-idx2.ll
…
vector-variable-idx.ll
…
vector-width-store-merge.ll
…
vector-zext.ll
[X86] lowerV8I16GeneralSingleInputShuffle - for splat PSHUFW+PSHUFD patterns, widen the splats to encourage combines (#129854)
2025-03-06 14:25:57 +00:00
vector-zmov.ll
[X86] X86FixupInstTuning - extend BLENDPD/S -> MOVSD/S handling to SSE variant (#143961)
2025-06-13 08:52:48 +01:00
vector.ll
…
vectorcall.ll
…
version_directive.ll
…
vfcmp.ll
…
viabs.ll
…
virtreg-physreg-def-regallocfast.mir
…
virtual-registers-cleared-in-machine-functions-liveins.ll
…
visibility2.ll
…
visibility.ll
…
vmaskmov-offset.ll
…
vmovq.ll
…
volatile-memstores-nooverlapping-load-stores.ll
…
volatile.ll
…
vortex-bug.ll
…
vp2intersect_multiple_pairs.ll
…
vpdpwssd.ll
…
vpshufbitqbm-intrinsics-upgrade.ll
…
vpshufbitqbm-intrinsics.ll
…
vsel-cmp-load.ll
…
vselect-2.ll
[X86] X86FixupInstTuning - fold BLENDPS -> MOVSD (#144029)
2025-06-13 11:05:57 +01:00
vselect-avx512.ll
…
vselect-avx.ll
[X86] isShuffleFoldableLoad - only check that the SDValue has one use (#126900)
2025-02-12 13:13:49 +00:00
vselect-constants.ll
[DAGCombiner] Don't ignore N2's undef elements in foldVSelectOfConstants (#129272)
2025-03-01 20:21:28 +08:00
vselect-minmax.ll
…
vselect-packss.ll
…
vselect-pcmp.ll
[X86] VPTERNLOG comments - use "mem" just for full width loads and "m32bcst" / "m64bcst" for broadcast loads (#143721)
2025-06-12 15:21:05 +01:00
vselect-post-combine.ll
…
vselect-zero.ll
[X86] LowerSelect - use BLENDV for scalar selection on all SSE41+ targets (#125853)
2025-02-10 11:24:04 +00:00
vselect.ll
[X86] X86FixupInstTuning - fold BLENDPS -> MOVSD (#144029)
2025-06-13 11:05:57 +01:00
vshift_scalar.ll
…
vshift_split2.ll
…
vshift_split.ll
…
vshift-1.ll
…
vshift-2.ll
…
vshift-3.ll
…
vshift-4.ll
…
vshift-5.ll
…
vshift-6.ll
…
vshli-simplify-demanded-bits.ll
…
vsplit-and.ll
…
vzero-excess.ll
…
waitpkg-intrinsics.ll
…
warn-stack.ll
…
wbinvd-intrinsic.ll
…
wbnoinvd-intrinsic.ll
…
weak_def_can_be_hidden.ll
…
weak-undef.ll
…
weak.ll
…
wide-fma-contraction.ll
…
wide-integer-cmp.ll
[X86] Align f128 and i128 to 16 bytes when passing on x86-32 (#138092)
2025-07-17 11:30:36 +02:00
wide-integer-fold.ll
…
wide-scalar-shift-by-byte-multiple-legalization.ll
…
wide-scalar-shift-legalization.ll
PeepholeOpt: Fix looking for def of current copy to coalesce (#125533)
2025-02-05 23:29:02 +07:00
widen_arith-1.ll
…
widen_arith-2.ll
…
widen_arith-3.ll
…
widen_arith-4.ll
[X86] LowerShift - don't prematurely lower to x86 vector shift imm instructions (#120282)
2024-12-18 16:08:45 +00:00
widen_arith-5.ll
…
widen_arith-6.ll
…
widen_bitcnt.ll
[X86] combineConcatVectorOps - convert ISD::VECTOR_SHUFFLE concatenation to use combineConcatVectorOps recursion (#130610)
2025-03-11 14:37:51 +00:00
widen_bitops-0.ll
…
widen_bitops-1.ll
…
widen_cast-1.ll
…
widen_cast-2.ll
…
widen_cast-3.ll
…
widen_cast-4.ll
…
widen_cast-5.ll
…
widen_cast-6.ll
…
widen_compare-1.ll
…
widen_conv-1.ll
…
widen_conv-2.ll
…
widen_conv-3.ll
…
widen_conv-4.ll
…
widen_conversions.ll
…
widen_extract-1.ll
…
widen_fadd.ll
[X86] combineINSERT_SUBVECTOR - generalise insert_subvector(x,extract(broadcast)) -> blend (#140516)
2025-05-21 09:28:52 +01:00
widen_fdiv.ll
[X86] combineINSERT_SUBVECTOR - generalise insert_subvector(x,extract(broadcast)) -> blend (#140516)
2025-05-21 09:28:52 +01:00
widen_fmul.ll
[X86] combineINSERT_SUBVECTOR - generalise insert_subvector(x,extract(broadcast)) -> blend (#140516)
2025-05-21 09:28:52 +01:00
widen_fsub.ll
[X86] combineINSERT_SUBVECTOR - generalise insert_subvector(x,extract(broadcast)) -> blend (#140516)
2025-05-21 09:28:52 +01:00
widen_load-0.ll
…
widen_load-1.ll
…
widen_load-2.ll
…
widen_load-3.ll
…
widen_mul.ll
…
widen_shuffle-1.ll
DAG: Fix vector_shuffle -> splat fold defining undef lanes (#123596)
2025-01-21 23:55:50 +07:00
widen-load-of-small-alloca-with-zero-upper-half.ll
PeepholeOpt: Fix looking for def of current copy to coalesce (#125533)
2025-02-05 23:29:02 +07:00
widen-load-of-small-alloca.ll
PeepholeOpt: Fix looking for def of current copy to coalesce (#125533)
2025-02-05 23:29:02 +07:00
WidenArith.ll
…
widened-broadcast.ll
[X86] lowerV8I16GeneralSingleInputShuffle - for splat PSHUFW+PSHUFD patterns, widen the splats to encourage combines (#129854)
2025-03-06 14:25:57 +00:00
win32_sret.ll
…
win32-bool.ll
…
win32-eh-available-externally.ll
…
win32-eh-states.ll
Fix Windows EH IP2State tables (remove +1 bias) (#144745)
2025-07-22 09:18:13 -07:00
win32-eh.ll
[MC] Don't print () around $ names
2025-03-30 16:38:16 -07:00
win32-int-runtime-libcalls.ll
RuntimeLibcalls: Fix calling conv of win32 div libcalls (#149098)
2025-07-17 08:29:09 +09:00
win32-pic-jumptable.ll
…
win32-preemption.ll
[llvm] Linker flags for UEFI (#137878)
2025-04-30 12:14:58 -07:00
win32-seh-catchpad-realign.ll
…
win32-seh-catchpad.ll
[win] Fix EH Cont Guard targets when SEH personality is used (#129612)
2025-03-07 09:07:47 -08:00
win32-seh-nested-finally.ll
…
win32-spill-xmm.ll
…
win32-ssp.ll
[LLVM][Cygwin] Enable conditions that are shared with MinGW (#149638)
2025-07-29 10:01:04 -07:00
win64_alloca_dynalloca.ll
…
win64_call_epi.ll
…
win64_eh_leaf2.ll
…
win64_eh_leaf.ll
…
win64_eh.ll
[llvm] No inline stackprobe for UEFI (#139330)
2025-05-12 10:06:11 -07:00
win64_frame.ll
[llvm] No inline stackprobe for UEFI (#139330)
2025-05-12 10:06:11 -07:00
win64_nonvol.ll
…
win64_params.ll
…
win64_regcall.ll
…
win64_sibcall.ll
…
win64_vararg.ll
…
win64-bool.ll
…
win64-byval.ll
[llvm] Win x64 Unwind V2 1/n: Mark beginning and end of epilogs (#110024)
2025-01-30 13:51:30 -08:00
win64-eh-empty-block-2.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
win64-eh-empty-block.ll
…
win64-eh-trailing-statepoint.ll
…
win64-eh-unwindv2-errors.mir
[win][x64] Unwind v2 3/n: Add support for requiring unwind v2 to be used (equivalent to MSVC's /d2epilogunwindrequirev2) (#143577)
2025-06-16 15:06:41 -07:00
win64-eh-unwindv2-too-many-epilogs.mir
[win][x64] Unwind v2 3/n: Add support for requiring unwind v2 to be used (equivalent to MSVC's /d2epilogunwindrequirev2) (#143577)
2025-06-16 15:06:41 -07:00
win64-eh-unwindv2.ll
[win][x64] Unwind v2 3/n: Add support for emitting unwind v2 information (equivalent to MSVC /d2epilogunwind) (#129142)
2025-05-09 10:42:10 -07:00
win64-funclet-preisel-intrinsics.ll
…
win64-funclet-savexmm.ll
[llvm] Win x64 Unwind V2 1/n: Mark beginning and end of epilogs (#110024)
2025-01-30 13:51:30 -08:00
win64-jumptable.ll
…
win64-long-double.ll
…
win64-nosse-csrs.ll
…
win64-seh-epilogue-statepoint.ll
Fix Windows EH IP2State tables (remove +1 bias) (#144745)
2025-07-22 09:18:13 -07:00
win64-stackprobe-overflow.ll
Reapply "[X86] Correct 32-bit immediate assertion and fix 64-bit lowering for huge frame offsets" (#152239)
2025-08-11 21:23:44 +05:30
win_chkstk.ll
[llvm] No inline stackprobe for UEFI (#139330)
2025-05-12 10:06:11 -07:00
win_coreclr_chkstk_liveins.mir
…
win_coreclr_chkstk.ll
…
win_cst_pool.ll
…
win-alloca-expander.ll
…
win-catchpad-csrs.ll
[llvm] Win x64 Unwind V2 1/n: Mark beginning and end of epilogs (#110024)
2025-01-30 13:51:30 -08:00
win-catchpad-nested-cxx.ll
Fix Windows EH IP2State tables (remove +1 bias) (#144745)
2025-07-22 09:18:13 -07:00
win-catchpad-nested.ll
…
win-catchpad-varargs.ll
…
win-catchpad.ll
Fix Windows EH IP2State tables (remove +1 bias) (#144745)
2025-07-22 09:18:13 -07:00
win-cleanuppad.ll
Fix Windows EH IP2State tables (remove +1 bias) (#144745)
2025-07-22 09:18:13 -07:00
win-funclet-cfi.ll
[MC] Don't print () around $ names
2025-03-30 16:38:16 -07:00
win-import-call-optimization-cfguard.ll
[x64][win] Add compiler support for x64 import call optimization (equivalent to MSVC /d2guardretpoline) (#126631)
2025-05-20 14:48:41 -07:00
win-import-call-optimization-jumptable.ll
[x64][win] Add compiler support for x64 import call optimization (equivalent to MSVC /d2guardretpoline) (#126631)
2025-05-20 14:48:41 -07:00
win-import-call-optimization-nocalls.ll
[x64][win] Add compiler support for x64 import call optimization (equivalent to MSVC /d2guardretpoline) (#126631)
2025-05-20 14:48:41 -07:00
win-import-call-optimization.ll
[x64][win] Add compiler support for x64 import call optimization (equivalent to MSVC /d2guardretpoline) (#126631)
2025-05-20 14:48:41 -07:00
win-loader-replaceable-function.ll
[aarch64][x86][win] Add compiler support for MSVC's /funcoverride flag (Windows kernel loader replaceable functions) (#125320)
2025-05-09 14:56:38 -07:00
win-mixed-ehpersonality.ll
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win-smallparams.ll
[llvm] Win x64 Unwind V2 1/n: Mark beginning and end of epilogs (#110024)
2025-01-30 13:51:30 -08:00
windows-itanium-alloca.ll
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windows-seh-EHa-CppCatchDotDotDot.ll
[MC] Don't print () around $ names
2025-03-30 16:38:16 -07:00
windows-seh-EHa-CppCondiTemps.ll
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windows-seh-EHa-CppDtors01.ll
[MC] Don't print () around $ names
2025-03-30 16:38:16 -07:00
windows-seh-EHa-PreserveCFG.ll
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windows-seh-EHa-RegisterLiveness.ll
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windows-seh-EHa-TryInFinally.ll
Introduce MCAsmInfo::UsesSetToEquateSymbol and prefer = to .set
2025-06-11 22:19:31 -07:00
wineh-coreclr.ll
Fix Windows EH IP2State tables (remove +1 bias) (#144745)
2025-07-22 09:18:13 -07:00
wineh-exceptionpointer.ll
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wineh-no-ehpads.ll
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x32-cet-intrinsics.ll
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x32-function_pointer-1.ll
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x32-function_pointer-2.ll
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x32-function_pointer-3.ll
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x32-indirectbr.ll
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x32-landingpad.ll
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x32-lea-1.ll
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x32-movtopush64.ll
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x32-va_start.ll
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x64-cet-intrinsics.ll
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x86_64-mul-by-const.ll
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x86-16.ll
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x86-32-intrcc.ll
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x86-32-vector-calling-conv.ll
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x86-64-and-mask.ll
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x86-64-arg.ll
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x86-64-asm.ll
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x86-64-baseptr.ll
Remove Native Client support (#133661)
2025-07-15 13:22:33 -04:00
x86-64-bittest-logic.ll
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x86-64-call.ll
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x86-64-disp.ll
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x86-64-double-precision-shift-left.ll
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x86-64-double-precision-shift-right.ll
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x86-64-double-shifts-Oz-Os-O2.ll
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x86-64-double-shifts-var.ll
[X86] Allow znver3/4/5 targets to use double-shift instructions by default (#132720)
2025-06-25 10:48:51 +01:00
x86-64-extend-shift.ll
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x86-64-flags-intrinsics.ll
[llvm] Win x64 Unwind V2 1/n: Mark beginning and end of epilogs (#110024)
2025-01-30 13:51:30 -08:00
x86-64-gv-offset.ll
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x86-64-intrcc-nosse.ll
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x86-64-intrcc-uintr.ll
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x86-64-intrcc.ll
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x86-64-jumps.ll
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x86-64-mem.ll
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x86-64-ms_abi-vararg.ll
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x86-64-pic-1.ll
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x86-64-pic-2.ll
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x86-64-pic-3.ll
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x86-64-pic-4.ll
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x86-64-pic-5.ll
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x86-64-pic-6.ll
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x86-64-pic-7.ll
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x86-64-pic-8.ll
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x86-64-pic-9.ll
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x86-64-pic-10.ll
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x86-64-pic-11.ll
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x86-64-pic-12.ll
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x86-64-pic.ll
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x86-64-psub.ll
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x86-64-ptr-arg-simple.ll
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x86-64-ret0.ll
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x86-64-shortint.ll
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x86-64-sret-return-2.ll
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x86-64-sret-return.ll
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x86-64-stack-and-frame-ptr.ll
Remove Native Client support (#133661)
2025-07-15 13:22:33 -04:00
x86-64-static-relo-movl.ll
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x86-64-tls-1.ll
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x86-64-varargs.ll
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x86-64-veccallcc.ll
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x86-64-xmm-spill-unaligned.ll
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x86-access-to-global.ll
[InstrEmitter] Use AddOperand in EmitCopyToRegClassNode. (#146637)
2025-07-02 09:44:54 -07:00
x86-big-ret.ll
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x86-cmov-converter.ll
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x86-flags-intrinsics.ll
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x86-fold-pshufb.ll
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x86-framelowering-trap.ll
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x86-inline-asm-validation.ll
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x86-interleaved-access.ll
[X86] collectConcatOps - handle extract_subvector(concat_subvectors(...)) patterns (#143406)
2025-06-09 18:40:15 +01:00
x86-interleaved-check.ll
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x86-interrupt_cc.ll
MC: Centralize X86 PC-relative fixup adjustment in MCAssembler
2025-07-08 09:22:30 -07:00
x86-interrupt_cld.ll
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x86-interrupt_vzeroupper.ll
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x86-mixed-alignment-dagcombine.ll
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x86-no_callee_saved_registers.ll
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x86-no_caller_saved_registers-preserve.ll
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x86-no_caller_saved_registers.ll
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x86-prefer-no-gather-no-scatter.ll
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x86-regcall-got.ll
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x86-repmov-copy-eflags.ll
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x86-sanitizer-shrink-wrapping.ll
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x86-setcc-int-to-fp-combine.ll
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x86-shifts.ll
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x86-shrink-wrap-unwind.ll
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x86-shrink-wrapping.ll
Reland [SelectionDAG] Folding ZERO-EXTEND/SIGN_EXTEND poison to Poison value in getNode (#136701)
2025-04-22 17:36:41 -04:00
x86-store-gv-addr.ll
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x86-upgrade-avx2-vbroadcast.ll
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x86-upgrade-avx-vbroadcast.ll
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x86-win64-shrink-wrapping.ll
[CodeGen] Fix MachineInstr::isSafeToMove handling of inline asm. (#126807)
2025-02-25 15:29:12 -08:00
x87-reg-usage.mir
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x87-stack-pop.mir
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x87.ll
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xaluo128.ll
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xaluo.ll
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xchg-nofold.ll
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xmm-r64.ll
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xmm-vararg-noopt.ll
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xmulo.ll
[TargetLowering] Improve one signature of forceExpandWideMUL. (#123991)
2025-01-23 12:49:35 -08:00
xop-ifma.ll
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xop-intrinsics-fast-isel.ll
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xop-intrinsics-x86_64-upgrade.ll
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xop-intrinsics-x86_64.ll
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xop-mask-comments.ll
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xop-pcmov.ll
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xop-shifts.ll
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xor-combine-debugloc.ll
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xor-icmp.ll
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xor-lea.ll
[X86] Don't fold very large offsets into addr displacements during ISel (#121678)
2025-01-17 20:09:00 +07:00
xor-select-i1-combine.ll
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xor-with-overflow.ll
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xor.ll
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xray-attribute-instrumentation.ll
[XRay] xray_fn_idx: fix alignment directive
2025-07-08 21:52:53 -07:00
xray-custom-log.ll
[DebugInfo][DWARF] Don't emit bogus DW_AT_call_target for complex calls (#151378)
2025-08-05 13:25:01 -07:00
xray-empty-firstmbb.mir
[CodeGen][NPM] Port XRayInstrumentation to NPM (#129865)
2025-04-01 15:38:49 +05:30
xray-ignore-loop-detection.ll
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xray-log-args.ll
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xray-loop-detection.ll
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xray-multiplerets-in-blocks.mir
[CodeGen][NPM] Port XRayInstrumentation to NPM (#129865)
2025-04-01 15:38:49 +05:30
xray-partial-instrumentation-skip-entry.ll
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xray-partial-instrumentation-skip-exit.ll
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xray-section-group.ll
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xray-selective-instrumentation-miss.ll
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xray-selective-instrumentation.ll
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xray-tail-call-sled.ll
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xtest.ll
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ymm-ordering.ll
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zero_extend_vector_inreg_of_broadcast_from_memory.ll
[X86] getTargetConstantBitsFromNode - handle EXTRACT_SUBVECTOR through bitcasts (#143886)
2025-06-12 16:51:09 +01:00
zero_extend_vector_inreg_of_broadcast.ll
[X86] X86FixupInstTuning - prefer VPBLENDD to VPBLENDW shuffles on AVX2+ targets (#144269)
2025-06-16 10:31:24 +01:00
zero_extend_vector_inreg.ll
[X86] X86FixupInstTuning - prefer VPBLENDD to VPBLENDW shuffles on AVX2+ targets (#144269)
2025-06-16 10:31:24 +01:00
zero-call-used-regs-debug-info.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
zero-call-used-regs-fmod.ll
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zero-call-used-regs-i386.ll
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zero-call-used-regs.ll
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zero-initialized-in-bss.ll
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zero-remat.ll
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zext-demanded.ll
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zext-extract_subreg.ll
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zext-fold.ll
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zext-inreg-0.ll
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zext-inreg-1.ll
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zext-logicop-shift-load.ll
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zext-lshr.ll
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zext-sext.ll
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zext-shl.ll
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zext-trunc.ll
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zlib-longest-match.ll
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znver3-gather.ll
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