98fe2fb67a
This PR adds basic FPU support for the MIPS R5900 processor used in the PlayStation 2 Emotion Engine. The R5900 has a non-standard single-precision-only FPU with limited functionality compared to standard MIPS FPUs. Just like the previous r5900 PR, only existing instructions are used to implement basic support first. ## Changes ### Infrastructure for single-precision-only FPU (ce13ddea7bc7) - Add `isSingleFloat()` method to MipsAsmParser - Add `SINGLE` FpABIKind to MipsABIFlagsSection - Properly set CPR1Size and FpABI for single-float mode - Exclude double-precision PseudoCVT instructions when using single-float ### R5900 FPU support (13032c4d55b2) - Switch R5900 from soft-float to single-float mode - Implement R5900-specific FPU lowering with limited compare conditions - Use CVT.W.S instead of TRUNC.W.S for FP-to-int conversion (R5900 lacks TRUNC) - Add test coverage for R5900 FPU instructions and comparisons ### Invalidate unsupported FPU instructions (ee4222711dab) - Add predicates to exclude FPU instructions not supported by the R5900 - Add `C_COND_NOTR5900_M` multiclass for unsupported compare conditions - Add `ISA_MIPS2_NOT_R5900` predicate for ROUND/TRUNC/CEIL/FLOOR.W.S - Add test coverage for invalid R5900 FPU instructions ## R5900 FPU Limitations The R5900 FPU differs from standard MIPS FPUs in several ways: | Feature | Standard MIPS | R5900 | |---------|---------------|-------| | Precision | Single + Double | Single only | | Compare conditions | 16 | 4 (C.F, C.EQ, C.LT, C.LE) | | Rounding instructions | ROUND/TRUNC/CEIL/FLOOR.W.S | None (use CVT.W.S) | ## Test Plan - [x] Added `llvm/test/MC/Mips/r5900-fpu.s` - tests valid R5900 FPU instructions - [x] Added `llvm/test/MC/Mips/r5900-invalid.s` - tests rejection of unsupported instructions - [x] Added R5900 FPU comparison tests in `llvm/test/CodeGen/Mips/fcmp.ll`
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