
Fixes https://github.com/llvm/llvm-project/issues/117200. The default behavior in TargetLoweringBase is only scalar floats on fexp are supported by default, not the vectorized version. This PR adds `ISD::FEXP10` to the supported list.
34 lines
1.3 KiB
LLVM
34 lines
1.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
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; RUN: llc < %s -disable-wasm-fallthrough-return-opt -wasm-keep-registers -mattr=+simd128 | FileCheck %s
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target triple = "wasm32-unknown-unknown"
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declare <4 x float> @llvm.exp10.v4f32(<4 x float>)
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define <4 x float> @exp10_f32v4(<4 x float> %v) {
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; CHECK-LABEL: exp10_f32v4:
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; CHECK: .functype exp10_f32v4 (v128) -> (v128)
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; CHECK-NEXT: # %bb.0: # %entry
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; CHECK-NEXT: local.get $push12=, 0
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; CHECK-NEXT: f32x4.extract_lane $push0=, $pop12, 0
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; CHECK-NEXT: call $push1=, exp10f, $pop0
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; CHECK-NEXT: f32x4.splat $push2=, $pop1
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; CHECK-NEXT: local.get $push13=, 0
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; CHECK-NEXT: f32x4.extract_lane $push3=, $pop13, 1
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; CHECK-NEXT: call $push4=, exp10f, $pop3
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; CHECK-NEXT: f32x4.replace_lane $push5=, $pop2, 1, $pop4
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; CHECK-NEXT: local.get $push14=, 0
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; CHECK-NEXT: f32x4.extract_lane $push6=, $pop14, 2
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; CHECK-NEXT: call $push7=, exp10f, $pop6
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; CHECK-NEXT: f32x4.replace_lane $push8=, $pop5, 2, $pop7
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; CHECK-NEXT: local.get $push15=, 0
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; CHECK-NEXT: f32x4.extract_lane $push9=, $pop15, 3
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; CHECK-NEXT: call $push10=, exp10f, $pop9
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; CHECK-NEXT: f32x4.replace_lane $push11=, $pop8, 3, $pop10
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; CHECK-NEXT: return $pop11
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entry:
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%r = call <4 x float> @llvm.exp10.v4f32(<4 x float> %v)
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ret <4 x float> %r
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}
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