Working communication between iCE40 and RP2040
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@ -59,4 +59,6 @@ Then drag the executable onto the RP2040 drive on the desktop.
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## Special Thanks
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Christopher Lozinski (@clozinski) - wrote this README file. Thank you!
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Christopher Lozinski (@clozinski) - wrote this README file. Thank you!
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josuah (@josuah.demangeon) - helped answer questions during the development of this project
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venkat_tv (@venkat_tv) - developed the pico-ice hardware
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102
fpga.pio
102
fpga.pio
@ -1,57 +1,101 @@
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.pio_version 0
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; green
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.define public DIR_PIN 12
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; red
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.define public REQ_PIN 13
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; blue
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.define public FIN_PIN 15
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.define public CLK_PIN 24
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.program fpga
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.fifo rx
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set x, 8
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start:
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set x, 0
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mov x, ~x
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mov osr, x ; set pins to out
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out pindirs, 8 ; ...
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set pindirs, 0b11 ; ...
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set pins, 0b01 ; set dir to 1 and req to 0
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irq wait 0 ; wait for system to be ready
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wait 1 gpio CLK_PIN
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wait 0 gpio CLK_PIN
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set pins, 0b11 ; set dir and req to 1
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send_data_loop:
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set x, 0 ; set x to 0
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mov x, ~x
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pull noblock ; get data from memory
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mov x, ~osr
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jmp !x recv_data_start ; check for end of values
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mov osr, ~x
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wait 1 gpio CLK_PIN ; synchronize
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wait 0 gpio CLK_PIN ; synchronize
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out pins, 8 ; output data to pins
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jmp send_data_loop ; keep sending since no null-terminator
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recv_data_start:
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set pins, 0b00 ; set dir and req to 0
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set x, 0 ; reset x to 0
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mov osr, x ; set pins to in
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out pindirs, 8 ; ...
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set pindirs, 0b01 ; ...
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wait 1 gpio REQ_PIN ; wait for data to be ready, indicated by req signal high
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.wrap_target
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in x, 4
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in null, 4
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push
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in pins, 8 [1]
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push
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in x, 4
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in null, 4
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push
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in pins, 8 [1]
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push
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.wrap
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wait 1 gpio CLK_PIN ; synchronize
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wait 0 gpio CLK_PIN ; synchronize
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in pins, 8 ; read data from pins
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push noblock ; write data to memory
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jmp pin start ; stop receiving data if FPGA is done
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.wrap ; otherwise keep receiving data
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% c-sdk {
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#include <hardware/dma.h>
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#ifndef DMA_CHANNEL
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#define DMA_CHANNEL 0
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#endif//DMA_CHANNEL
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static int command_dma_channel;
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static int frame_dma_channel;
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static uint8_t frame_buffer[2][FRAME_WIDTH * FRAME_HEIGHT * 16 / 8] = { };
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static bool current_frame = false;
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static inline void fpga_program_init(PIO pio, uint sm, uint offset, uint pin_base, float div)
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static void fpga_program_init(PIO pio, uint sm, uint offset, uint bus_base, uint status_base, uint fin_pin)
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{
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{
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pio_sm_config c = fpga_program_get_default_config(offset);
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sm_config_set_in_pins(&c, pin_base);
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pio_sm_set_consecutive_pindirs(pio, sm, pin_base, 8, false);
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sm_config_set_in_pins(&c, bus_base);
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sm_config_set_out_pins(&c, bus_base, 8);
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sm_config_set_set_pins(&c, status_base, 2);
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sm_config_set_jmp_pin(&c, fin_pin);
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sm_config_set_in_shift(&c, false, false, 8);
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sm_config_set_out_shift(&c, false, false, 8);
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pio_sm_init(pio, sm, offset, &c);
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for (int i = 0; i < 8; i++) { pio_gpio_init(pio, bus_base + i); }
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for (int i = 0; i < 2; i++) { pio_gpio_init(pio, status_base + i); }
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}
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command_dma_channel = dma_claim_unused_channel(true);
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frame_dma_channel = dma_claim_unused_channel(true);
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{
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dma_channel_config c = dma_channel_get_default_config(command_dma_channel);
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channel_config_set_read_increment(&c, true);
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channel_config_set_write_increment(&c, false);
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channel_config_set_transfer_data_size(&c, DMA_SIZE_8);
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channel_config_set_dreq(&c, pio_get_dreq(pio, sm, true));
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channel_config_set_chain_to(&c, frame_dma_channel);
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dma_channel_configure(command_dma_channel, &c, &pio->txf[sm], NULL, 0, false);
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}
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{
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dma_channel_config c = dma_channel_get_default_config(DMA_CHANNEL);
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dma_channel_config c = dma_channel_get_default_config(frame_dma_channel);
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channel_config_set_read_increment(&c, false);
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channel_config_set_write_increment(&c, true);
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channel_config_set_transfer_data_size(&c, DMA_SIZE_8);
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channel_config_set_dreq(&c, pio_get_dreq(pio, sm, false));
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dma_channel_configure(DMA_CHANNEL, &c, NULL, &pio->rxf[sm], FRAME_WIDTH * FRAME_HEIGHT * 2 + 1, false);
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dma_channel_configure(frame_dma_channel, &c, NULL, &pio->rxf[sm], FRAME_WIDTH * FRAME_HEIGHT * 2, false);
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}
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}
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%}
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@ -1,5 +1,7 @@
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ldc_set_location -site 35 [get_ports {clk}]
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ldc_set_location -site 14 [get_ports {start}]
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ldc_set_location -site 41 [get_ports {req}]
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ldc_set_location -site 40 [get_ports {fin}]
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ldc_set_location -site 39 [get_ports {dir}]
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ldc_set_location -site 27 [get_ports {data[0]}]
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ldc_set_location -site 25 [get_ports {data[1]}]
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@ -1 +1 @@
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create_clock -period 20.8333 [get_ports {clk}]
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create_clock -period 20.8333333 [get_ports {clk}]
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8
ice/mandelbrot/.ng_run_manager.ini
Normal file
8
ice/mandelbrot/.ng_run_manager.ini
Normal file
@ -0,0 +1,8 @@
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[Runmanager]
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Geometry=@ByteArray(\x1\xd9\xd0\xcb\0\x3\0\0\0\0\0\0\0\0\0\x14\0\0\x1\xca\0\0\0\xb9\0\0\0\0\0\0\0\x14\0\0\x1\xca\0\0\0\xb9\0\0\0\0\0\0\0\0\n\0\0\0\0\0\0\0\0\x14\0\0\x1\xca\0\0\0\xb9)
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headerState=@ByteArray(\0\0\0\xff\0\0\0\0\0\0\0\x1\0\0\0\x1\0\0\0\0\x1\0\0\0\0\0\0\0\0\0\0\0\x15\0\xf0\x1f\0\0\0\t\0\0\0\f\0\0\0\x64\0\0\0\r\0\0\0\x64\0\0\0\x12\0\0\0\x64\0\0\0\x13\0\0\0\x64\0\0\0\x10\0\0\0\x64\0\0\0\x11\0\0\0\x64\0\0\0\x14\0\0\0\x64\0\0\0\xe\0\0\0\x64\0\0\0\xf\0\0\0\x64\0\0\x5\xf\0\0\0\x15\x1\x1\0\x1\0\0\0\0\0\0\0\0\0\0\0\0\x64\xff\xff\xff\xff\0\0\0\x84\0\0\0\0\0\0\0\x15\0\0\0\xc3\0\0\0\x1\0\0\0\0\0\0\0\x64\0\0\0\x1\0\0\0\0\0\0\0\x64\0\0\0\x1\0\0\0\0\0\0\0\x64\0\0\0\x1\0\0\0\0\0\0\0\x64\0\0\0\x1\0\0\0\0\0\0\0\x64\0\0\0\x1\0\0\0\0\0\0\0\x64\0\0\0\x1\0\0\0\0\0\0\0\x64\0\0\0\x1\0\0\0\0\0\0\0\x64\0\0\0\x1\0\0\0\0\0\0\0\x64\0\0\0\x1\0\0\0\0\0\0\0\x64\0\0\0\x1\0\0\0\0\0\0\0\x64\0\0\0\x1\0\0\0\0\0\0\0\0\0\0\0\x1\0\0\0\0\0\0\0\0\0\0\0\x1\0\0\0\0\0\0\0\0\0\0\0\x1\0\0\0\0\0\0\0\0\0\0\0\x1\0\0\0\0\0\0\0\0\0\0\0\x1\0\0\0\0\0\0\0\0\0\0\0\x1\0\0\0\0\0\0\0\0\0\0\0\x1\0\0\0\0\0\0\0\0\0\0\0\x1\0\0\0\0\0\0\0\0\0\0\0\x1\0\0\0\0\0\0\x3\xe8\0\0\0\0\x64)
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[impl_1%3CStrategy1%3E]
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isChecked=false
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isHidden=false
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isExpanded=false
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@ -4,7 +4,10 @@
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<Implementation title="impl_1" dir="impl_1" description="impl_1" synthesis="synplify" default_strategy="Strategy1">
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<Options def_top="top"/>
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<Source name="source/impl_1/top.sv" type="Verilog" type_short="Verilog">
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<Options VerilogStandard="System Verilog" top_module="top"/>
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<Options VerilogStandard="System Verilog"/>
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</Source>
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<Source name="../ram.sv" type="Verilog" type_short="Verilog">
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<Options VerilogStandard="System Verilog" top_module="RAM"/>
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</Source>
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<Source name="../constraints.pdc" type="Physical Constraints File" type_short="PDC">
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<Options/>
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ice/mandelbrot/.setting.ini
Normal file
7
ice/mandelbrot/.setting.ini
Normal file
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[General]
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IdFilter=@Invalid()
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ProcessFilter=@Invalid()
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TypeFilter=0
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[Individuals]
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size=0
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@ -1,6 +1,3 @@
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DRC: Design Rule Check Radiant Software (64-bit) 2024.1.0.34.2
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Wed Sep 25 13:18:59 2024
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Sat Sep 28 23:33:51 2024
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WARNING <71003020> - Top module port 'start' does not connect to anything.
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ERROR <71003010> - The port [clk] is assigned to a nonexistent pin [35]. Reassign the port to a valid pin.
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ERROR <71003010> - The port [data[0]] is assigned to a nonexistent pin [27]. Reassign the port to a valid pin.
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@ -1,9 +1,12 @@
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<?xml version="1.0" encoding="UTF-8"?>
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<RadiantProject version="4.2" radiant="2024.1.0.34.2" title="mandelbrot" device="iCE40UP5K-UWG30ITR" performance_grade="High-Performance_1.2V" family_int="ice40tp" device_int="itpa08" package_int="UWG30" operation_int="IND" speed_int="6" default_implementation="impl_1">
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<RadiantProject version="4.2" radiant="2024.1.0.34.2" title="mandelbrot" device="iCE40UP5K-SG48I" performance_grade="High-Performance_1.2V" family_int="ice40tp" device_int="itpa08" package_int="SG48" operation_int="IND" speed_int="6" default_implementation="impl_1">
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<Options/>
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<Implementation title="impl_1" dir="impl_1" description="impl_1" synthesis="synplify" default_strategy="Strategy1">
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<Options/>
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<Source name="../top.sv" type="Verilog" type_short="Verilog">
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<Source name="source/impl_1/top.sv" type="Verilog" type_short="Verilog">
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<Options VerilogStandard="System Verilog" top_module="top"/>
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</Source>
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<Source name="../ram.sv" type="Verilog" type_short="Verilog">
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<Options VerilogStandard="System Verilog"/>
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</Source>
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<Source name="../constraints.pdc" type="Physical Constraints File" type_short="PDC">
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@ -40,8 +40,153 @@ if (a)
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<BODY>
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<DIV id="content" onclick="hideTocList()"><PRE>
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<A name="pn240928081403"></A><B><U><big>pn240928081403</big></U></B>
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#Start recording tcl command: 9/25/2024 13:09:03
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#Project Location: C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/mandelbrot; Project name: mandelbrot
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prj_create -name "mandelbrot" -impl "impl_1" -dev iCE40UP5K-UWG30ITR -performance "High-Performance_1.2V" -synthesis "synplify"
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prj_add_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/top.sv" "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/constraints.sdc" "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/constraints.pdc"
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prj_save
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prj_remove_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/top.sv"
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prj_add_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/top.sv"
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prj_remove_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/top.sv"
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prj_add_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/mandelbrot/impl_1/top.sv"
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prj_remove_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/mandelbrot/impl_1/top.sv"
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prj_add_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/mandelbrot/source/impl_1/top.sv"
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prj_run PAR -impl impl_1
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prj_run Export -impl impl_1
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prj_set_device -part iCE40UP5K-SG48I -performance "High-Performance_1.2V"
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prj_run Synthesis -impl impl_1
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prj_run Map -impl impl_1
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prj_run Map -impl impl_1
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prj_run Export -impl impl_1
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prj_run Export -impl impl_1
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prj_run PAR -impl impl_1
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prj_run Export -impl impl_1
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prj_run PAR -impl impl_1
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prj_run Export -impl impl_1
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prj_run PAR -impl impl_1
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prj_run Export -impl impl_1
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prj_run PAR -impl impl_1
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prj_run Export -impl impl_1
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prj_run PAR -impl impl_1
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prj_run Export -impl impl_1
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prj_run PAR -impl impl_1
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prj_run Export -impl impl_1
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prj_run PAR -impl impl_1
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prj_run Export -impl impl_1
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prj_run PAR -impl impl_1
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prj_run Export -impl impl_1
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prj_add_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/spi.sv"
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prj_remove_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/spi.sv"
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prj_add_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/top.sv"
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prj_remove_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/top.sv"
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prj_add_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/spi.sv"
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prj_run PAR -impl impl_1
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prj_run Export -impl impl_1
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prj_run PAR -impl impl_1
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prj_run Export -impl impl_1
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prj_run Export -impl impl_1
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prj_run PAR -impl impl_1
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prj_run PAR -impl impl_1
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prj_run PAR -impl impl_1
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prj_run PAR -impl impl_1
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prj_run PAR -impl impl_1
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prj_run Export -impl impl_1
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prj_add_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/xd.sv"
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prj_run PAR -impl impl_1
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prj_run Export -impl impl_1
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prj_run Export -impl impl_1
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prj_run PAR -impl impl_1
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prj_run Export -impl impl_1
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prj_remove_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/xd.sv"
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prj_run PAR -impl impl_1
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prj_run Export -impl impl_1
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prj_run PAR -impl impl_1
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prj_run Export -impl impl_1
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prj_run PAR -impl impl_1
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prj_run Export -impl impl_1
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prj_run PAR -impl impl_1
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prj_run Export -impl impl_1
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prj_run PAR -impl impl_1
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prj_run Export -impl impl_1
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prj_remove_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/spi.sv"
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prj_add_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/spi.sv"
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prj_run PAR -impl impl_1
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prj_run Export -impl impl_1
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prj_run PAR -impl impl_1
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prj_run Export -impl impl_1
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prj_run Export -impl impl_1
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prj_run PAR -impl impl_1
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prj_run Export -impl impl_1
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prj_run PAR -impl impl_1
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prj_run PAR -impl impl_1
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prj_run Export -impl impl_1
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prj_run PAR -impl impl_1
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prj_run Export -impl impl_1
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prj_run PAR -impl impl_1
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prj_run Export -impl impl_1
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prj_run PAR -impl impl_1
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prj_run Export -impl impl_1
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prj_run PAR -impl impl_1
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prj_run PAR -impl impl_1
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prj_run Export -impl impl_1
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prj_run Export -impl impl_1
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prj_add_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/ram.sv"
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prj_disable_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/ram.sv"
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prj_enable_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/ram.sv"
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prj_remove_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/ram.sv"
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prj_run PAR -impl impl_1
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prj_run Export -impl impl_1
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prj_run PAR -impl impl_1
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prj_run Export -impl impl_1
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prj_run PAR -impl impl_1
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prj_run Export -impl impl_1
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prj_run PAR -impl impl_1
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prj_run Export -impl impl_1
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prj_remove_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/spi.sv"
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prj_run PAR -impl impl_1
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prj_run Export -impl impl_1
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prj_run PAR -impl impl_1
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prj_run Export -impl impl_1
|
||||
prj_run PAR -impl impl_1
|
||||
prj_run PAR -impl impl_1
|
||||
prj_run Export -impl impl_1
|
||||
prj_run PAR -impl impl_1
|
||||
prj_run Export -impl impl_1
|
||||
prj_run PAR -impl impl_1
|
||||
prj_run Export -impl impl_1
|
||||
prj_run PAR -impl impl_1
|
||||
prj_run Export -impl impl_1
|
||||
prj_run PAR -impl impl_1
|
||||
prj_run Export -impl impl_1
|
||||
prj_run PAR -impl impl_1
|
||||
prj_run Export -impl impl_1
|
||||
prj_run PAR -impl impl_1
|
||||
prj_run Export -impl impl_1
|
||||
prj_run PAR -impl impl_1
|
||||
prj_run Export -impl impl_1
|
||||
#Stop recording: 9/28/2024 08:14:03
|
||||
|
||||
|
||||
|
||||
<A name="pn241002102238"></A><B><U><big>pn241002102238</big></U></B>
|
||||
#Start recording tcl command: 10/2/2024 09:00:03
|
||||
#Project Location: C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/mandelbrot; Project name: mandelbrot
|
||||
prj_open "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/mandelbrot/mandelbrot.rdf"
|
||||
prj_add_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/ram.sv"
|
||||
#Stop recording: 10/2/2024 10:22:38
|
||||
|
||||
|
||||
|
||||
</PRE></DIV>
|
||||
|
||||
<DIV id="toc" class="radiant"><span onmousemove="showTocList()">Contents</span>
|
||||
<UL id="toc_list">
|
||||
<LI><A href=#pn240928081403>pn240928081403</A></LI>
|
||||
<LI><A href=#pn241002102238>pn241002102238</A></LI>
|
||||
</UL>
|
||||
</DIV>
|
||||
|
||||
<button id="back_to_top" class="radiant" onclick="scrollToTop()"><</button>
|
||||
<script type="text/javascript">
|
||||
<!--
|
||||
|
125
ice/mandelbrot/mandelbrot_tcr.dir/pn240928081403.tcr
Normal file
125
ice/mandelbrot/mandelbrot_tcr.dir/pn240928081403.tcr
Normal file
@ -0,0 +1,125 @@
|
||||
#Start recording tcl command: 9/25/2024 13:09:03
|
||||
#Project Location: C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/mandelbrot; Project name: mandelbrot
|
||||
prj_create -name "mandelbrot" -impl "impl_1" -dev iCE40UP5K-UWG30ITR -performance "High-Performance_1.2V" -synthesis "synplify"
|
||||
prj_add_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/top.sv" "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/constraints.sdc" "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/constraints.pdc"
|
||||
prj_save
|
||||
prj_remove_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/top.sv"
|
||||
prj_add_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/top.sv"
|
||||
prj_remove_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/top.sv"
|
||||
prj_add_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/mandelbrot/impl_1/top.sv"
|
||||
prj_remove_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/mandelbrot/impl_1/top.sv"
|
||||
prj_add_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/mandelbrot/source/impl_1/top.sv"
|
||||
prj_run PAR -impl impl_1
|
||||
prj_run Export -impl impl_1
|
||||
prj_set_device -part iCE40UP5K-SG48I -performance "High-Performance_1.2V"
|
||||
prj_run Synthesis -impl impl_1
|
||||
prj_run Map -impl impl_1
|
||||
prj_run Map -impl impl_1
|
||||
prj_run Export -impl impl_1
|
||||
prj_run Export -impl impl_1
|
||||
prj_run PAR -impl impl_1
|
||||
prj_run Export -impl impl_1
|
||||
prj_run PAR -impl impl_1
|
||||
prj_run Export -impl impl_1
|
||||
prj_run PAR -impl impl_1
|
||||
prj_run Export -impl impl_1
|
||||
prj_run PAR -impl impl_1
|
||||
prj_run Export -impl impl_1
|
||||
prj_run PAR -impl impl_1
|
||||
prj_run Export -impl impl_1
|
||||
prj_run PAR -impl impl_1
|
||||
prj_run Export -impl impl_1
|
||||
prj_run PAR -impl impl_1
|
||||
prj_run Export -impl impl_1
|
||||
prj_run PAR -impl impl_1
|
||||
prj_run Export -impl impl_1
|
||||
prj_add_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/spi.sv"
|
||||
prj_remove_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/spi.sv"
|
||||
prj_add_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/top.sv"
|
||||
prj_remove_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/top.sv"
|
||||
prj_add_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/spi.sv"
|
||||
prj_run PAR -impl impl_1
|
||||
prj_run Export -impl impl_1
|
||||
prj_run PAR -impl impl_1
|
||||
prj_run Export -impl impl_1
|
||||
prj_run Export -impl impl_1
|
||||
prj_run PAR -impl impl_1
|
||||
prj_run PAR -impl impl_1
|
||||
prj_run PAR -impl impl_1
|
||||
prj_run PAR -impl impl_1
|
||||
prj_run PAR -impl impl_1
|
||||
prj_run Export -impl impl_1
|
||||
prj_add_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/xd.sv"
|
||||
prj_run PAR -impl impl_1
|
||||
prj_run Export -impl impl_1
|
||||
prj_run Export -impl impl_1
|
||||
prj_run PAR -impl impl_1
|
||||
prj_run Export -impl impl_1
|
||||
prj_remove_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/xd.sv"
|
||||
prj_run PAR -impl impl_1
|
||||
prj_run Export -impl impl_1
|
||||
prj_run PAR -impl impl_1
|
||||
prj_run Export -impl impl_1
|
||||
prj_run PAR -impl impl_1
|
||||
prj_run Export -impl impl_1
|
||||
prj_run PAR -impl impl_1
|
||||
prj_run Export -impl impl_1
|
||||
prj_run PAR -impl impl_1
|
||||
prj_run Export -impl impl_1
|
||||
prj_remove_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/spi.sv"
|
||||
prj_add_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/spi.sv"
|
||||
prj_run PAR -impl impl_1
|
||||
prj_run Export -impl impl_1
|
||||
prj_run PAR -impl impl_1
|
||||
prj_run Export -impl impl_1
|
||||
prj_run Export -impl impl_1
|
||||
prj_run PAR -impl impl_1
|
||||
prj_run Export -impl impl_1
|
||||
prj_run PAR -impl impl_1
|
||||
prj_run PAR -impl impl_1
|
||||
prj_run Export -impl impl_1
|
||||
prj_run PAR -impl impl_1
|
||||
prj_run Export -impl impl_1
|
||||
prj_run PAR -impl impl_1
|
||||
prj_run Export -impl impl_1
|
||||
prj_run PAR -impl impl_1
|
||||
prj_run Export -impl impl_1
|
||||
prj_run PAR -impl impl_1
|
||||
prj_run PAR -impl impl_1
|
||||
prj_run Export -impl impl_1
|
||||
prj_run Export -impl impl_1
|
||||
prj_add_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/ram.sv"
|
||||
prj_disable_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/ram.sv"
|
||||
prj_enable_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/ram.sv"
|
||||
prj_remove_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/ram.sv"
|
||||
prj_run PAR -impl impl_1
|
||||
prj_run Export -impl impl_1
|
||||
prj_run PAR -impl impl_1
|
||||
prj_run Export -impl impl_1
|
||||
prj_run PAR -impl impl_1
|
||||
prj_run Export -impl impl_1
|
||||
prj_run PAR -impl impl_1
|
||||
prj_run Export -impl impl_1
|
||||
prj_remove_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/spi.sv"
|
||||
prj_run PAR -impl impl_1
|
||||
prj_run Export -impl impl_1
|
||||
prj_run PAR -impl impl_1
|
||||
prj_run Export -impl impl_1
|
||||
prj_run PAR -impl impl_1
|
||||
prj_run PAR -impl impl_1
|
||||
prj_run Export -impl impl_1
|
||||
prj_run PAR -impl impl_1
|
||||
prj_run Export -impl impl_1
|
||||
prj_run PAR -impl impl_1
|
||||
prj_run Export -impl impl_1
|
||||
prj_run PAR -impl impl_1
|
||||
prj_run Export -impl impl_1
|
||||
prj_run PAR -impl impl_1
|
||||
prj_run Export -impl impl_1
|
||||
prj_run PAR -impl impl_1
|
||||
prj_run Export -impl impl_1
|
||||
prj_run PAR -impl impl_1
|
||||
prj_run Export -impl impl_1
|
||||
prj_run PAR -impl impl_1
|
||||
prj_run Export -impl impl_1
|
||||
#Stop recording: 9/28/2024 08:14:03
|
5
ice/mandelbrot/mandelbrot_tcr.dir/pn241002102238.tcr
Normal file
5
ice/mandelbrot/mandelbrot_tcr.dir/pn241002102238.tcr
Normal file
@ -0,0 +1,5 @@
|
||||
#Start recording tcl command: 10/2/2024 09:00:03
|
||||
#Project Location: C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/mandelbrot; Project name: mandelbrot
|
||||
prj_open "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/mandelbrot/mandelbrot.rdf"
|
||||
prj_add_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/ram.sv"
|
||||
#Stop recording: 10/2/2024 10:22:38
|
@ -1,3 +1,3 @@
|
||||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<userSetting name="C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/mandelbrot/promote.xml" version="Diamond (64-bit) 2024.1.0.34.2" date="Thu Sep 26 10:20:19 2024" vendor="Lattice Semiconductor Corporation" >
|
||||
<userSetting name="C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/mandelbrot/promote.xml" version="Diamond (64-bit) 2024.1.0.34.2" date="Wed Oct 02 12:34:15 2024" vendor="Lattice Semiconductor Corporation" >
|
||||
</userSetting>
|
||||
|
8
ice/mandelbrot/reportview.xml
Normal file
8
ice/mandelbrot/reportview.xml
Normal file
@ -0,0 +1,8 @@
|
||||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<!DOCTYPE Report>
|
||||
<ReportView version="2.0">
|
||||
<Implement name="impl_1">
|
||||
<ToolReport id="toolpio" path="" status="0"/>
|
||||
<ToolReport id="toolsso" path="" status="0"/>
|
||||
</Implement>
|
||||
</ReportView>
|
@ -1,20 +1,75 @@
|
||||
module top
|
||||
(
|
||||
input wire clk,
|
||||
input wire start,
|
||||
output wire [7:0] data
|
||||
input wire dir,
|
||||
inout wire req,
|
||||
output wire fin,
|
||||
inout wire [7:0] data
|
||||
);
|
||||
|
||||
reg dir_last;
|
||||
reg req_last;
|
||||
|
||||
reg req_r;
|
||||
reg fin_r;
|
||||
reg [7:0] data_r;
|
||||
|
||||
reg [6:0] x;
|
||||
reg [6:0] y;
|
||||
|
||||
reg cntr;
|
||||
|
||||
reg [7:0] waddr;
|
||||
reg [7:0] raddr;
|
||||
|
||||
wire [7:0] command;
|
||||
|
||||
RAM command_buffer(.wclk(clk), .rclk(clk), .waddr(waddr), .raddr(raddr), .data_in(data), .write_en(dir && req), .data_out(command));
|
||||
|
||||
always_ff @(posedge clk) begin
|
||||
data_r <= data_r + 1;
|
||||
dir_last <= dir;
|
||||
req_last <= req;
|
||||
req_r <= !fin_r && !dir_last;
|
||||
|
||||
if (data_r < 16 || data_r > 235) begin
|
||||
data_r <= 16;
|
||||
if (dir) begin
|
||||
x <= 0;
|
||||
y <= 0;
|
||||
fin_r <= 0;
|
||||
cntr <= 0;
|
||||
raddr <= 0;
|
||||
|
||||
if (req && req_last) begin
|
||||
waddr <= waddr + 1;
|
||||
end else begin
|
||||
waddr <= 0;
|
||||
end
|
||||
end else begin
|
||||
cntr <= !cntr;
|
||||
if (cntr) begin
|
||||
data_r <= command;
|
||||
raddr <= 1 - raddr;
|
||||
if (x + y == 0) begin
|
||||
fin_r <= 1;
|
||||
end
|
||||
end else begin
|
||||
data_r <= ((x + y) >> 1) + 16;
|
||||
|
||||
if (x < 127) begin
|
||||
x <= x + 1;
|
||||
end else begin
|
||||
x <= 0;
|
||||
if (y < 127) begin
|
||||
y <= y + 1;
|
||||
end else begin
|
||||
y <= 0;
|
||||
end
|
||||
end
|
||||
end
|
||||
end
|
||||
end
|
||||
|
||||
assign data = data_r;
|
||||
assign req = dir ? 'Z : req_r;
|
||||
assign fin = fin_r;
|
||||
assign data = dir ? 'Z : data_r;
|
||||
|
||||
endmodule
|
31
ice/ram.sv
Normal file
31
ice/ram.sv
Normal file
@ -0,0 +1,31 @@
|
||||
module RAM
|
||||
#(
|
||||
parameter ADDR_WIDTH = 8,
|
||||
parameter DATA_WIDTH = 8
|
||||
)(
|
||||
input wire wclk,
|
||||
input wire rclk,
|
||||
input wire [ADDR_WIDTH-1:0] waddr,
|
||||
input wire [ADDR_WIDTH-1:0] raddr,
|
||||
input wire [DATA_WIDTH-1:0] data_in,
|
||||
input wire write_en,
|
||||
output wire [DATA_WIDTH-1:0] data_out
|
||||
);
|
||||
|
||||
reg [DATA_WIDTH-1:0] data_out_r;
|
||||
|
||||
reg [DATA_WIDTH-1:0] mem[(1<<ADDR_WIDTH)-1:0];
|
||||
|
||||
always @(posedge wclk) begin
|
||||
if (write_en) begin
|
||||
mem[waddr] <= data_in;
|
||||
end
|
||||
end
|
||||
|
||||
always @(posedge rclk) begin
|
||||
data_out_r <= mem[raddr];
|
||||
end
|
||||
|
||||
assign data_out = data_out_r;
|
||||
|
||||
endmodule
|
94
main.cpp
94
main.cpp
@ -1,6 +1,7 @@
|
||||
#include <ice_fpga.h>
|
||||
#include <ice_led.h>
|
||||
#include <ice_usb.h>
|
||||
#include <ice_spi.h>
|
||||
#include <tusb.h>
|
||||
#include <boards/pico_ice.h>
|
||||
#include <bsp/board_api.h>
|
||||
@ -10,63 +11,37 @@
|
||||
|
||||
#include "fpga.pio.h"
|
||||
|
||||
static PIO pio;
|
||||
static const PIO pio = pio0;
|
||||
static uint sm;
|
||||
|
||||
#define ICE_FPGA_START_FRAME_PIN ICE_FPGA_14_PIN
|
||||
static uint8_t frame_buffer[FRAME_WIDTH * FRAME_HEIGHT * 2] = { };
|
||||
static uint8_t command_buffer[256] = { };
|
||||
|
||||
static void video_task();
|
||||
static void start_next_frame()
|
||||
{
|
||||
if (dma_channel_is_busy(DMA_CHANNEL)) { return; }
|
||||
static void start_next_frame();
|
||||
|
||||
gpio_put(ICE_FPGA_START_FRAME_PIN, true);
|
||||
sleep_ms(10);
|
||||
printf("%d - ", gpio_get(ICE_FPGA_START_FRAME_PIN));
|
||||
gpio_put(ICE_FPGA_START_FRAME_PIN, false);
|
||||
sleep_ms(10);
|
||||
printf("%d - ", gpio_get(ICE_FPGA_START_FRAME_PIN));
|
||||
|
||||
pio_sm_set_enabled(pio, sm, false);
|
||||
pio_sm_clear_fifos(pio, sm);
|
||||
pio_sm_restart(pio, sm);
|
||||
dma_channel_set_write_addr(DMA_CHANNEL, frame_buffer[current_frame] - !current_frame, true);
|
||||
current_frame = !current_frame;
|
||||
pio_sm_set_enabled(pio, sm, true);
|
||||
}
|
||||
static bool finished = false;
|
||||
|
||||
int main()
|
||||
{
|
||||
// set to 120 MHz as it's exactly 2.5x the FPGA clock
|
||||
set_sys_clock_khz(120000, true);
|
||||
|
||||
tusb_init();
|
||||
stdio_init_all();
|
||||
|
||||
ice_led_init();
|
||||
ice_usb_init();
|
||||
|
||||
ice_fpga_init(48);
|
||||
ice_fpga_init(8);
|
||||
ice_fpga_start();
|
||||
|
||||
gpio_init_mask(0b111111111);
|
||||
gpio_set_dir(ICE_FPGA_27_PIN, GPIO_IN); // 0
|
||||
gpio_set_dir(ICE_FPGA_25_PIN, GPIO_IN); // 1
|
||||
gpio_set_dir(ICE_FPGA_21_PIN, GPIO_IN); // 2
|
||||
gpio_set_dir(ICE_FPGA_19_PIN, GPIO_IN); // 3
|
||||
gpio_set_dir(ICE_FPGA_26_PIN, GPIO_IN); // 4
|
||||
gpio_set_dir(ICE_FPGA_23_PIN, GPIO_IN); // 5
|
||||
gpio_set_dir(ICE_FPGA_20_PIN, GPIO_IN); // 6
|
||||
gpio_set_dir(ICE_FPGA_18_PIN, GPIO_IN); // 7
|
||||
gpio_pull_up(DIR_PIN);
|
||||
gpio_pull_up(REQ_PIN);
|
||||
gpio_init(FIN_PIN);
|
||||
gpio_pull_up(FIN_PIN);
|
||||
|
||||
gpio_set_dir(ICE_FPGA_START_FRAME_PIN, GPIO_OUT); // 8
|
||||
|
||||
gpio_put(ICE_FPGA_START_FRAME_PIN, false);
|
||||
|
||||
pio = pio0;
|
||||
const uint offset = pio_add_program(pio, &fpga_program);
|
||||
sm = pio_claim_unused_sm(pio, true);
|
||||
fpga_program_init(pio, sm, offset, 0, 1);
|
||||
fpga_program_init(pio, sm, offset, 0, DIR_PIN, FIN_PIN);
|
||||
pio_sm_set_enabled(pio, sm, true);
|
||||
|
||||
tud_init(0);
|
||||
|
||||
@ -75,8 +50,13 @@ int main()
|
||||
board_init_after_tusb();
|
||||
}
|
||||
|
||||
start_next_frame();
|
||||
|
||||
while (true)
|
||||
{
|
||||
printf("%d %d |", command_buffer[0], command_buffer[1]);
|
||||
for (int i = 0; i < 8; i++) { printf(" %d", gpio_get(i)); }
|
||||
printf("\n");
|
||||
tud_task();
|
||||
video_task();
|
||||
}
|
||||
@ -85,6 +65,9 @@ int main()
|
||||
|
||||
static unsigned int interval_ms = 1000 / FRAME_RATE;
|
||||
static bool tx_busy = false;
|
||||
static bool rendering = false;
|
||||
|
||||
static bool is_rendering() { return rendering || !pio_interrupt_get(pio, 0); }
|
||||
|
||||
void video_task()
|
||||
{
|
||||
@ -103,23 +86,50 @@ void video_task()
|
||||
tx_busy = true;
|
||||
start_ms = board_millis();
|
||||
|
||||
start_next_frame();
|
||||
tud_video_n_frame_xfer(0, 0, frame_buffer[current_frame], FRAME_WIDTH * FRAME_HEIGHT * 16 / 8);
|
||||
tud_video_n_frame_xfer(0, 0, frame_buffer, FRAME_WIDTH * FRAME_HEIGHT * 2);
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
const unsigned int cur = board_millis();
|
||||
if (cur - start_ms < interval_ms) { return; }
|
||||
if (tx_busy) { return; }
|
||||
if (is_rendering()) { return; }
|
||||
start_ms += interval_ms;
|
||||
tx_busy = true;
|
||||
|
||||
tud_video_n_frame_xfer(0, 0, frame_buffer[current_frame], FRAME_WIDTH * FRAME_HEIGHT * 16 / 8);
|
||||
tud_video_n_frame_xfer(0, 0, frame_buffer, FRAME_WIDTH * FRAME_HEIGHT * 2);
|
||||
}
|
||||
|
||||
void start_next_frame()
|
||||
{
|
||||
if (is_rendering()) { return; }
|
||||
rendering = true;
|
||||
|
||||
command_buffer[0] = (command_buffer[0] + 4) % 256;
|
||||
if (command_buffer[0] == 0)
|
||||
{
|
||||
command_buffer[1] = (command_buffer[1] + 16) % 256;
|
||||
}
|
||||
|
||||
dma_channel_set_trans_count(frame_dma_channel, FRAME_WIDTH * FRAME_HEIGHT * 2, false);
|
||||
dma_channel_set_write_addr(frame_dma_channel, frame_buffer, false);
|
||||
|
||||
dma_channel_set_trans_count(command_dma_channel, 2, false);
|
||||
dma_channel_set_read_addr(command_dma_channel, command_buffer, true);
|
||||
|
||||
// clear irq to indicate ready
|
||||
while (pio_interrupt_get(pio, 0))
|
||||
{
|
||||
pio_interrupt_clear(pio, 0);
|
||||
}
|
||||
|
||||
rendering = false;
|
||||
}
|
||||
|
||||
void tud_video_frame_xfer_complete_cb(uint_fast8_t ctl_idx, uint_fast8_t stm_idx)
|
||||
{
|
||||
tx_busy = false;
|
||||
|
||||
start_next_frame();
|
||||
}
|
||||
|
||||
|
@ -72,8 +72,8 @@
|
||||
#define CFG_TUD_VIDEO_STREAMING_EP_BUFSIZE 1023
|
||||
#define CFG_TUD_VIDEO_STREAMING_BULK 0
|
||||
|
||||
#define FRAME_WIDTH 320
|
||||
#define FRAME_HEIGHT 180
|
||||
#define FRAME_WIDTH 128
|
||||
#define FRAME_HEIGHT 128
|
||||
#define FRAME_RATE 60
|
||||
|
||||
// Temporarily here until ice_usb.h has necessary info
|
||||
|
Loading…
Reference in New Issue
Block a user