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Working communication between iCE40 and RP2040

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This commit is contained in:
shylie 2024-10-02 12:43:38 -04:00
parent e77c75f0df
commit f62fd1428c
18 changed files with 535 additions and 90 deletions
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2
README.md
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@ -60,3 +60,5 @@ Then drag the executable onto the RP2040 drive on the desktop.
## Special Thanks
Christopher Lozinski (@clozinski) - wrote this README file. Thank you!
josuah (@josuah.demangeon) - helped answer questions during the development of this project
venkat_tv (@venkat_tv) - developed the pico-ice hardware

102
fpga.pio
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@ -1,57 +1,101 @@
.pio_version 0
; green
.define public DIR_PIN 12
; red
.define public REQ_PIN 13
; blue
.define public FIN_PIN 15
.define public CLK_PIN 24
.program fpga
.fifo rx
set x, 8
start:
set x, 0
mov x, ~x
mov osr, x ; set pins to out
out pindirs, 8 ; ...
set pindirs, 0b11 ; ...
set pins, 0b01 ; set dir to 1 and req to 0
irq wait 0 ; wait for system to be ready
wait 1 gpio CLK_PIN
wait 0 gpio CLK_PIN
set pins, 0b11 ; set dir and req to 1
send_data_loop:
set x, 0 ; set x to 0
mov x, ~x
pull noblock ; get data from memory
mov x, ~osr
jmp !x recv_data_start ; check for end of values
mov osr, ~x
wait 1 gpio CLK_PIN ; synchronize
wait 0 gpio CLK_PIN ; synchronize
out pins, 8 ; output data to pins
jmp send_data_loop ; keep sending since no null-terminator
recv_data_start:
set pins, 0b00 ; set dir and req to 0
set x, 0 ; reset x to 0
mov osr, x ; set pins to in
out pindirs, 8 ; ...
set pindirs, 0b01 ; ...
wait 1 gpio REQ_PIN ; wait for data to be ready, indicated by req signal high
.wrap_target
in x, 4
in null, 4
push
in pins, 8 [1]
push
in x, 4
in null, 4
push
in pins, 8 [1]
push
.wrap
wait 1 gpio CLK_PIN ; synchronize
wait 0 gpio CLK_PIN ; synchronize
in pins, 8 ; read data from pins
push noblock ; write data to memory
jmp pin start ; stop receiving data if FPGA is done
.wrap ; otherwise keep receiving data
% c-sdk {
#include <hardware/dma.h>
#ifndef DMA_CHANNEL
#define DMA_CHANNEL 0
#endif//DMA_CHANNEL
static int command_dma_channel;
static int frame_dma_channel;
static uint8_t frame_buffer[2][FRAME_WIDTH * FRAME_HEIGHT * 16 / 8] = { };
static bool current_frame = false;
static inline void fpga_program_init(PIO pio, uint sm, uint offset, uint pin_base, float div)
static void fpga_program_init(PIO pio, uint sm, uint offset, uint bus_base, uint status_base, uint fin_pin)
{
{
pio_sm_config c = fpga_program_get_default_config(offset);
sm_config_set_in_pins(&c, pin_base);
pio_sm_set_consecutive_pindirs(pio, sm, pin_base, 8, false);
sm_config_set_in_pins(&c, bus_base);
sm_config_set_out_pins(&c, bus_base, 8);
sm_config_set_set_pins(&c, status_base, 2);
sm_config_set_jmp_pin(&c, fin_pin);
sm_config_set_in_shift(&c, false, false, 8);
sm_config_set_out_shift(&c, false, false, 8);
pio_sm_init(pio, sm, offset, &c);
for (int i = 0; i < 8; i++) { pio_gpio_init(pio, bus_base + i); }
for (int i = 0; i < 2; i++) { pio_gpio_init(pio, status_base + i); }
}
command_dma_channel = dma_claim_unused_channel(true);
frame_dma_channel = dma_claim_unused_channel(true);
{
dma_channel_config c = dma_channel_get_default_config(command_dma_channel);
channel_config_set_read_increment(&c, true);
channel_config_set_write_increment(&c, false);
channel_config_set_transfer_data_size(&c, DMA_SIZE_8);
channel_config_set_dreq(&c, pio_get_dreq(pio, sm, true));
channel_config_set_chain_to(&c, frame_dma_channel);
dma_channel_configure(command_dma_channel, &c, &pio->txf[sm], NULL, 0, false);
}
{
dma_channel_config c = dma_channel_get_default_config(DMA_CHANNEL);
dma_channel_config c = dma_channel_get_default_config(frame_dma_channel);
channel_config_set_read_increment(&c, false);
channel_config_set_write_increment(&c, true);
channel_config_set_transfer_data_size(&c, DMA_SIZE_8);
channel_config_set_dreq(&c, pio_get_dreq(pio, sm, false));
dma_channel_configure(DMA_CHANNEL, &c, NULL, &pio->rxf[sm], FRAME_WIDTH * FRAME_HEIGHT * 2 + 1, false);
dma_channel_configure(frame_dma_channel, &c, NULL, &pio->rxf[sm], FRAME_WIDTH * FRAME_HEIGHT * 2, false);
}
}
%}

4
ice/constraints.pdc
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@ -1,5 +1,7 @@
ldc_set_location -site 35 [get_ports {clk}]
ldc_set_location -site 14 [get_ports {start}]
ldc_set_location -site 41 [get_ports {req}]
ldc_set_location -site 40 [get_ports {fin}]
ldc_set_location -site 39 [get_ports {dir}]
ldc_set_location -site 27 [get_ports {data[0]}]
ldc_set_location -site 25 [get_ports {data[1]}]

2
ice/constraints.sdc
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@ -1 +1 @@
create_clock -period 20.8333 [get_ports {clk}]
create_clock -period 20.8333333 [get_ports {clk}]

8
ice/mandelbrot/.ng_run_manager.ini Normal file
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@ -0,0 +1,8 @@
[Runmanager]
Geometry=@ByteArray(\x1\xd9\xd0\xcb\0\x3\0\0\0\0\0\0\0\0\0\x14\0\0\x1\xca\0\0\0\xb9\0\0\0\0\0\0\0\x14\0\0\x1\xca\0\0\0\xb9\0\0\0\0\0\0\0\0\n\0\0\0\0\0\0\0\0\x14\0\0\x1\xca\0\0\0\xb9)
headerState=@ByteArray(\0\0\0\xff\0\0\0\0\0\0\0\x1\0\0\0\x1\0\0\0\0\x1\0\0\0\0\0\0\0\0\0\0\0\x15\0\xf0\x1f\0\0\0\t\0\0\0\f\0\0\0\x64\0\0\0\r\0\0\0\x64\0\0\0\x12\0\0\0\x64\0\0\0\x13\0\0\0\x64\0\0\0\x10\0\0\0\x64\0\0\0\x11\0\0\0\x64\0\0\0\x14\0\0\0\x64\0\0\0\xe\0\0\0\x64\0\0\0\xf\0\0\0\x64\0\0\x5\xf\0\0\0\x15\x1\x1\0\x1\0\0\0\0\0\0\0\0\0\0\0\0\x64\xff\xff\xff\xff\0\0\0\x84\0\0\0\0\0\0\0\x15\0\0\0\xc3\0\0\0\x1\0\0\0\0\0\0\0\x64\0\0\0\x1\0\0\0\0\0\0\0\x64\0\0\0\x1\0\0\0\0\0\0\0\x64\0\0\0\x1\0\0\0\0\0\0\0\x64\0\0\0\x1\0\0\0\0\0\0\0\x64\0\0\0\x1\0\0\0\0\0\0\0\x64\0\0\0\x1\0\0\0\0\0\0\0\x64\0\0\0\x1\0\0\0\0\0\0\0\x64\0\0\0\x1\0\0\0\0\0\0\0\x64\0\0\0\x1\0\0\0\0\0\0\0\x64\0\0\0\x1\0\0\0\0\0\0\0\x64\0\0\0\x1\0\0\0\0\0\0\0\0\0\0\0\x1\0\0\0\0\0\0\0\0\0\0\0\x1\0\0\0\0\0\0\0\0\0\0\0\x1\0\0\0\0\0\0\0\0\0\0\0\x1\0\0\0\0\0\0\0\0\0\0\0\x1\0\0\0\0\0\0\0\0\0\0\0\x1\0\0\0\0\0\0\0\0\0\0\0\x1\0\0\0\0\0\0\0\0\0\0\0\x1\0\0\0\0\0\0\0\0\0\0\0\x1\0\0\0\0\0\0\x3\xe8\0\0\0\0\x64)
[impl_1%3CStrategy1%3E]
isChecked=false
isHidden=false
isExpanded=false

5
ice/mandelbrot/.recovery
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@ -4,7 +4,10 @@
<Implementation title="impl_1" dir="impl_1" description="impl_1" synthesis="synplify" default_strategy="Strategy1">
<Options def_top="top"/>
<Source name="source/impl_1/top.sv" type="Verilog" type_short="Verilog">
<Options VerilogStandard="System Verilog" top_module="top"/>
<Options VerilogStandard="System Verilog"/>
</Source>
<Source name="../ram.sv" type="Verilog" type_short="Verilog">
<Options VerilogStandard="System Verilog" top_module="RAM"/>
</Source>
<Source name="../constraints.pdc" type="Physical Constraints File" type_short="PDC">
<Options/>

7
ice/mandelbrot/.setting.ini Normal file
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@ -0,0 +1,7 @@
[General]
IdFilter=@Invalid()
ProcessFilter=@Invalid()
TypeFilter=0
[Individuals]
size=0

5
ice/mandelbrot/drc.log
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@ -1,6 +1,3 @@
DRC: Design Rule Check Radiant Software (64-bit) 2024.1.0.34.2
Wed Sep 25 13:18:59 2024
Sat Sep 28 23:33:51 2024
WARNING <71003020> - Top module port 'start' does not connect to anything.
ERROR <71003010> - The port [clk] is assigned to a nonexistent pin [35]. Reassign the port to a valid pin.
ERROR <71003010> - The port [data[0]] is assigned to a nonexistent pin [27]. Reassign the port to a valid pin.

7
ice/mandelbrot/mandelbrot.rdf
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@ -1,9 +1,12 @@
<?xml version="1.0" encoding="UTF-8"?>
<RadiantProject version="4.2" radiant="2024.1.0.34.2" title="mandelbrot" device="iCE40UP5K-UWG30ITR" performance_grade="High-Performance_1.2V" family_int="ice40tp" device_int="itpa08" package_int="UWG30" operation_int="IND" speed_int="6" default_implementation="impl_1">
<RadiantProject version="4.2" radiant="2024.1.0.34.2" title="mandelbrot" device="iCE40UP5K-SG48I" performance_grade="High-Performance_1.2V" family_int="ice40tp" device_int="itpa08" package_int="SG48" operation_int="IND" speed_int="6" default_implementation="impl_1">
<Options/>
<Implementation title="impl_1" dir="impl_1" description="impl_1" synthesis="synplify" default_strategy="Strategy1">
<Options/>
<Source name="../top.sv" type="Verilog" type_short="Verilog">
<Source name="source/impl_1/top.sv" type="Verilog" type_short="Verilog">
<Options VerilogStandard="System Verilog" top_module="top"/>
</Source>
<Source name="../ram.sv" type="Verilog" type_short="Verilog">
<Options VerilogStandard="System Verilog"/>
</Source>
<Source name="../constraints.pdc" type="Physical Constraints File" type_short="PDC">

145
ice/mandelbrot/mandelbrot_tcl.html
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@ -40,8 +40,153 @@ if (a)
<BODY>
<DIV id="content" onclick="hideTocList()"><PRE>
<A name="pn240928081403"></A><B><U><big>pn240928081403</big></U></B>
#Start recording tcl command: 9/25/2024 13:09:03
#Project Location: C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/mandelbrot; Project name: mandelbrot
prj_create -name "mandelbrot" -impl "impl_1" -dev iCE40UP5K-UWG30ITR -performance "High-Performance_1.2V" -synthesis "synplify"
prj_add_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/top.sv" "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/constraints.sdc" "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/constraints.pdc"
prj_save
prj_remove_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/top.sv"
prj_add_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/top.sv"
prj_remove_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/top.sv"
prj_add_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/mandelbrot/impl_1/top.sv"
prj_remove_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/mandelbrot/impl_1/top.sv"
prj_add_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/mandelbrot/source/impl_1/top.sv"
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_set_device -part iCE40UP5K-SG48I -performance "High-Performance_1.2V"
prj_run Synthesis -impl impl_1
prj_run Map -impl impl_1
prj_run Map -impl impl_1
prj_run Export -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_add_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/spi.sv"
prj_remove_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/spi.sv"
prj_add_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/top.sv"
prj_remove_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/top.sv"
prj_add_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/spi.sv"
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run PAR -impl impl_1
prj_run PAR -impl impl_1
prj_run PAR -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_add_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/xd.sv"
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_remove_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/xd.sv"
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_remove_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/spi.sv"
prj_add_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/spi.sv"
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run Export -impl impl_1
prj_add_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/ram.sv"
prj_disable_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/ram.sv"
prj_enable_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/ram.sv"
prj_remove_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/ram.sv"
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_remove_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/spi.sv"
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
#Stop recording: 9/28/2024 08:14:03
<A name="pn241002102238"></A><B><U><big>pn241002102238</big></U></B>
#Start recording tcl command: 10/2/2024 09:00:03
#Project Location: C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/mandelbrot; Project name: mandelbrot
prj_open "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/mandelbrot/mandelbrot.rdf"
prj_add_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/ram.sv"
#Stop recording: 10/2/2024 10:22:38
</PRE></DIV>
<DIV id="toc" class="radiant"><span onmousemove="showTocList()">Contents</span>
<UL id="toc_list">
<LI><A href=#pn240928081403>pn240928081403</A></LI>
<LI><A href=#pn241002102238>pn241002102238</A></LI>
</UL>
</DIV>
<button id="back_to_top" class="radiant" onclick="scrollToTop()">&lt;</button>
<script type="text/javascript">
<!--

125
ice/mandelbrot/mandelbrot_tcr.dir/pn240928081403.tcr Normal file
View File

@ -0,0 +1,125 @@
#Start recording tcl command: 9/25/2024 13:09:03
#Project Location: C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/mandelbrot; Project name: mandelbrot
prj_create -name "mandelbrot" -impl "impl_1" -dev iCE40UP5K-UWG30ITR -performance "High-Performance_1.2V" -synthesis "synplify"
prj_add_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/top.sv" "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/constraints.sdc" "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/constraints.pdc"
prj_save
prj_remove_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/top.sv"
prj_add_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/top.sv"
prj_remove_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/top.sv"
prj_add_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/mandelbrot/impl_1/top.sv"
prj_remove_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/mandelbrot/impl_1/top.sv"
prj_add_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/mandelbrot/source/impl_1/top.sv"
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_set_device -part iCE40UP5K-SG48I -performance "High-Performance_1.2V"
prj_run Synthesis -impl impl_1
prj_run Map -impl impl_1
prj_run Map -impl impl_1
prj_run Export -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_add_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/spi.sv"
prj_remove_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/spi.sv"
prj_add_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/top.sv"
prj_remove_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/top.sv"
prj_add_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/spi.sv"
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run PAR -impl impl_1
prj_run PAR -impl impl_1
prj_run PAR -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_add_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/xd.sv"
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_remove_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/xd.sv"
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_remove_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/spi.sv"
prj_add_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/spi.sv"
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run Export -impl impl_1
prj_add_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/ram.sv"
prj_disable_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/ram.sv"
prj_enable_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/ram.sv"
prj_remove_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/ram.sv"
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_remove_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/spi.sv"
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
prj_run PAR -impl impl_1
prj_run Export -impl impl_1
#Stop recording: 9/28/2024 08:14:03

5
ice/mandelbrot/mandelbrot_tcr.dir/pn241002102238.tcr Normal file
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@ -0,0 +1,5 @@
#Start recording tcl command: 10/2/2024 09:00:03
#Project Location: C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/mandelbrot; Project name: mandelbrot
prj_open "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/mandelbrot/mandelbrot.rdf"
prj_add_source "C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/ram.sv"
#Stop recording: 10/2/2024 10:22:38

2
ice/mandelbrot/promote.xml
View File

@ -1,3 +1,3 @@
<?xml version="1.0" encoding="UTF-8"?>
<userSetting name="C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/mandelbrot/promote.xml" version="Diamond (64-bit) 2024.1.0.34.2" date="Thu Sep 26 10:20:19 2024" vendor="Lattice Semiconductor Corporation" >
<userSetting name="C:/Users/fuzzc/Documents/Hardware/pico-ice/pico-ice-video/ice/mandelbrot/promote.xml" version="Diamond (64-bit) 2024.1.0.34.2" date="Wed Oct 02 12:34:15 2024" vendor="Lattice Semiconductor Corporation" >
</userSetting>

8
ice/mandelbrot/reportview.xml Normal file
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@ -0,0 +1,8 @@
<?xml version="1.0" encoding="UTF-8"?>
<!DOCTYPE Report>
<ReportView version="2.0">
<Implement name="impl_1">
<ToolReport id="toolpio" path="" status="0"/>
<ToolReport id="toolsso" path="" status="0"/>
</Implement>
</ReportView>

69
ice/mandelbrot/source/impl_1/top.sv
View File

@ -1,20 +1,75 @@
module top
(
input wire clk,
input wire start,
output wire [7:0] data
input wire dir,
inout wire req,
output wire fin,
inout wire [7:0] data
);
reg dir_last;
reg req_last;
reg req_r;
reg fin_r;
reg [7:0] data_r;
always_ff @(posedge clk) begin
data_r <= data_r + 1;
reg [6:0] x;
reg [6:0] y;
if (data_r < 16 || data_r > 235) begin
data_r <= 16;
reg cntr;
reg [7:0] waddr;
reg [7:0] raddr;
wire [7:0] command;
RAM command_buffer(.wclk(clk), .rclk(clk), .waddr(waddr), .raddr(raddr), .data_in(data), .write_en(dir && req), .data_out(command));
always_ff @(posedge clk) begin
dir_last <= dir;
req_last <= req;
req_r <= !fin_r && !dir_last;
if (dir) begin
x <= 0;
y <= 0;
fin_r <= 0;
cntr <= 0;
raddr <= 0;
if (req && req_last) begin
waddr <= waddr + 1;
end else begin
waddr <= 0;
end
end else begin
cntr <= !cntr;
if (cntr) begin
data_r <= command;
raddr <= 1 - raddr;
if (x + y == 0) begin
fin_r <= 1;
end
end else begin
data_r <= ((x + y) >> 1) + 16;
if (x < 127) begin
x <= x + 1;
end else begin
x <= 0;
if (y < 127) begin
y <= y + 1;
end else begin
y <= 0;
end
end
end
end
end
assign data = data_r;
assign req = dir ? 'Z : req_r;
assign fin = fin_r;
assign data = dir ? 'Z : data_r;
endmodule

31
ice/ram.sv Normal file
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@ -0,0 +1,31 @@
module RAM
#(
parameter ADDR_WIDTH = 8,
parameter DATA_WIDTH = 8
)(
input wire wclk,
input wire rclk,
input wire [ADDR_WIDTH-1:0] waddr,
input wire [ADDR_WIDTH-1:0] raddr,
input wire [DATA_WIDTH-1:0] data_in,
input wire write_en,
output wire [DATA_WIDTH-1:0] data_out
);
reg [DATA_WIDTH-1:0] data_out_r;
reg [DATA_WIDTH-1:0] mem[(1<<ADDR_WIDTH)-1:0];
always @(posedge wclk) begin
if (write_en) begin
mem[waddr] <= data_in;
end
end
always @(posedge rclk) begin
data_out_r <= mem[raddr];
end
assign data_out = data_out_r;
endmodule

94
main.cpp
View File

@ -1,6 +1,7 @@
#include <ice_fpga.h>
#include <ice_led.h>
#include <ice_usb.h>
#include <ice_spi.h>
#include <tusb.h>
#include <boards/pico_ice.h>
#include <bsp/board_api.h>
@ -10,63 +11,37 @@
#include "fpga.pio.h"
static PIO pio;
static const PIO pio = pio0;
static uint sm;
#define ICE_FPGA_START_FRAME_PIN ICE_FPGA_14_PIN
static uint8_t frame_buffer[FRAME_WIDTH * FRAME_HEIGHT * 2] = { };
static uint8_t command_buffer[256] = { };
static void video_task();
static void start_next_frame()
{
if (dma_channel_is_busy(DMA_CHANNEL)) { return; }
static void start_next_frame();
gpio_put(ICE_FPGA_START_FRAME_PIN, true);
sleep_ms(10);
printf("%d - ", gpio_get(ICE_FPGA_START_FRAME_PIN));
gpio_put(ICE_FPGA_START_FRAME_PIN, false);
sleep_ms(10);
printf("%d - ", gpio_get(ICE_FPGA_START_FRAME_PIN));
pio_sm_set_enabled(pio, sm, false);
pio_sm_clear_fifos(pio, sm);
pio_sm_restart(pio, sm);
dma_channel_set_write_addr(DMA_CHANNEL, frame_buffer[current_frame] - !current_frame, true);
current_frame = !current_frame;
pio_sm_set_enabled(pio, sm, true);
}
static bool finished = false;
int main()
{
// set to 120 MHz as it's exactly 2.5x the FPGA clock
set_sys_clock_khz(120000, true);
tusb_init();
stdio_init_all();
ice_led_init();
ice_usb_init();
ice_fpga_init(48);
ice_fpga_init(8);
ice_fpga_start();
gpio_init_mask(0b111111111);
gpio_set_dir(ICE_FPGA_27_PIN, GPIO_IN); // 0
gpio_set_dir(ICE_FPGA_25_PIN, GPIO_IN); // 1
gpio_set_dir(ICE_FPGA_21_PIN, GPIO_IN); // 2
gpio_set_dir(ICE_FPGA_19_PIN, GPIO_IN); // 3
gpio_set_dir(ICE_FPGA_26_PIN, GPIO_IN); // 4
gpio_set_dir(ICE_FPGA_23_PIN, GPIO_IN); // 5
gpio_set_dir(ICE_FPGA_20_PIN, GPIO_IN); // 6
gpio_set_dir(ICE_FPGA_18_PIN, GPIO_IN); // 7
gpio_pull_up(DIR_PIN);
gpio_pull_up(REQ_PIN);
gpio_init(FIN_PIN);
gpio_pull_up(FIN_PIN);
gpio_set_dir(ICE_FPGA_START_FRAME_PIN, GPIO_OUT); // 8
gpio_put(ICE_FPGA_START_FRAME_PIN, false);
pio = pio0;
const uint offset = pio_add_program(pio, &fpga_program);
sm = pio_claim_unused_sm(pio, true);
fpga_program_init(pio, sm, offset, 0, 1);
fpga_program_init(pio, sm, offset, 0, DIR_PIN, FIN_PIN);
pio_sm_set_enabled(pio, sm, true);
tud_init(0);
@ -75,8 +50,13 @@ int main()
board_init_after_tusb();
}
start_next_frame();
while (true)
{
printf("%d %d |", command_buffer[0], command_buffer[1]);
for (int i = 0; i < 8; i++) { printf(" %d", gpio_get(i)); }
printf("\n");
tud_task();
video_task();
}
@ -85,6 +65,9 @@ int main()
static unsigned int interval_ms = 1000 / FRAME_RATE;
static bool tx_busy = false;
static bool rendering = false;
static bool is_rendering() { return rendering || !pio_interrupt_get(pio, 0); }
void video_task()
{
@ -103,23 +86,50 @@ void video_task()
tx_busy = true;
start_ms = board_millis();
start_next_frame();
tud_video_n_frame_xfer(0, 0, frame_buffer[current_frame], FRAME_WIDTH * FRAME_HEIGHT * 16 / 8);
tud_video_n_frame_xfer(0, 0, frame_buffer, FRAME_WIDTH * FRAME_HEIGHT * 2);
return;
}
const unsigned int cur = board_millis();
if (cur - start_ms < interval_ms) { return; }
if (tx_busy) { return; }
if (is_rendering()) { return; }
start_ms += interval_ms;
tx_busy = true;
tud_video_n_frame_xfer(0, 0, frame_buffer[current_frame], FRAME_WIDTH * FRAME_HEIGHT * 16 / 8);
tud_video_n_frame_xfer(0, 0, frame_buffer, FRAME_WIDTH * FRAME_HEIGHT * 2);
}
void start_next_frame()
{
if (is_rendering()) { return; }
rendering = true;
command_buffer[0] = (command_buffer[0] + 4) % 256;
if (command_buffer[0] == 0)
{
command_buffer[1] = (command_buffer[1] + 16) % 256;
}
dma_channel_set_trans_count(frame_dma_channel, FRAME_WIDTH * FRAME_HEIGHT * 2, false);
dma_channel_set_write_addr(frame_dma_channel, frame_buffer, false);
dma_channel_set_trans_count(command_dma_channel, 2, false);
dma_channel_set_read_addr(command_dma_channel, command_buffer, true);
// clear irq to indicate ready
while (pio_interrupt_get(pio, 0))
{
pio_interrupt_clear(pio, 0);
}
rendering = false;
}
void tud_video_frame_xfer_complete_cb(uint_fast8_t ctl_idx, uint_fast8_t stm_idx)
{
tx_busy = false;
start_next_frame();
}

4
tusb_config.h
View File

@ -72,8 +72,8 @@
#define CFG_TUD_VIDEO_STREAMING_EP_BUFSIZE 1023
#define CFG_TUD_VIDEO_STREAMING_BULK 0
#define FRAME_WIDTH 320
#define FRAME_HEIGHT 180
#define FRAME_WIDTH 128
#define FRAME_HEIGHT 128
#define FRAME_RATE 60
// Temporarily here until ice_usb.h has necessary info