2792 Commits

Author SHA1 Message Date
Devanshi
8e02d249ba
[Bolt] Replace -1ULL/-2ULL/-3ULL with std::numeric_limits in DataAggregator (#178597)
Replace instances of -1ULL, -2ULL, and -3ULL with std::numeric_limits in
Bolt DataAggregator Trace constants to address C4146 compiler warning.

Changes:
- BR_ONLY: -1ULL → std::numeric_limits<uint64_t>::max()
- FT_ONLY: -1ULL → std::numeric_limits<uint64_t>::max()
- FT_EXTERNAL_ORIGIN: -2ULL → std::numeric_limits<uint64_t>::max() - 1
- FT_EXTERNAL_RETURN: -3ULL → std::numeric_limits<uint64_t>::max() - 2

Fixes part of #147439
2026-02-08 22:04:11 -08:00
Shanzhi Chen
e4674b85e9
[BOLT][NFC] Stop populating unnecessary samples into MemSamples (#179472)
Currently, many unnecessary samples are populated into MemSamples,
including zero-initialized samples and samples in which the PC address
is not contained in any BinaryFunction. But these samples are totally
skipped during processing and the whole MemSamples vector is cleared
immediately after processing. So, we could just stop populating these
samples into MemSamples, which would reduce maximum resident set size
when processing a large perf.data.
2026-02-08 19:27:55 -08:00
Maksim Panchenko
1e5493b1b8
[BOLT] Don't fold hot text mover functions in ICF (#180367)
Hot text mover functions are placed in special sections (e.g.,
.never_hugify) to avoid being placed on hot/huge pages. Folding them
with functions from other sections could defeat this purpose.

Add a check in ICF's isIdenticalWith() to prevent folding when either
function is a hot text mover.
2026-02-07 20:39:24 -08:00
YongKang Zhu
fc89b1c2d8
[BOLT] Get symbol for const island referenced across func by relocation (#178988)
When handling relocation in one function referencing code or
data defined in another function, we should check if relocation
target is constant island or not, and get the referenced symbol
accordingly for both cases.
2026-02-02 16:05:40 -08:00
Maksim Panchenko
2b2e02bea7
[BOLT] Refactor rewriteFunctionsInPlace from rewriteFile (#178787)
Extract the code that rewrites functions in place from rewriteFile()
into a separate rewriteFunctionsInPlace() function.
2026-01-30 11:51:29 -08:00
Maksim Panchenko
34a7608fad
[BOLT] Drop -znow requirement for PLT optimization on x86-64 (#178758)
On x86-64, PLT optimization does not require the binary to be linked
with -znow because indirect calls through GOT work correctly with lazy
binding. At runtime, the dynamic linker's resolver will populate the GOT
entry on the first call, just like with a regular PLT call.

This change removes the -znow requirement specifically for x86-64 while
keeping it for other architectures. I haven't checked RISV-V, but it's
still necessary on AArch64.
2026-01-29 16:10:43 -08:00
Francesco Petrogalli
460c9b2db1
[RISC-V][Mach-O] Add assembler support for Mach-O relocations. (#177446)
This patch adds comprehensive assembler (MC layer) support for the
Mach-O object file format on RISC-V targets, enabling assembly and
disassembly of RISC-V code targeting Apple platforms.

Key changes:

- Define RISC-V-specific Mach-O relocation types in BinaryFormat/MachO.h
- Implement RISCVMachObjectWriter with full relocation handling for:
  - PCREL_HI/LO pairs for PC-relative addressing
  - GOT relocations for external symbols
  - Branch relocations (CALL, unconditional/conditional branches)
  - Data section relocations

Test files include llvm-otool dumps to verify the generated relocations.

This code is based on code originally written by Tim Northover.
2026-01-26 14:06:30 -08:00
Raul Tambre
2d62af808b
[NFCI][bolt][test] Enable AT&T syntax generally (#172355)
Having it in the X86 subdirectory only affects tests in that directory.
That's however not sufficient as for example runtime/X86/pie-exceptions-split.test is affected but
isn't located in the X86 directory.
This essentially fixes the fix for the original commit by guarding it properly for when the X86
target has been built and the flag is recognized.

Fixes: 6c48fbc1dcfbd44a47f126f21e575340b67aac06
2026-01-23 10:46:31 +02:00
Gergely Bálint
d88138d348
[BOLT] Fix long-jmp-bti-plt.c test (#176709)
The test checked for exact addresses in disassembly. This was failing on
some platforms.

Fix: changed test to check for regular expressions
2026-01-19 10:03:09 +01:00
Gergely Bálint
de40ef2a3f
[BOLT][BTI] Patch LLD-generated PLTs to contain BTI landing pad (#173245)
This patch adds the patchPLTEntryForBTI to enable patching PLT entries
generated by LLD.

## Context:

To keep BTI consistent, targets of stubs inserted in LongJmp need to be
patched. As PLTs are not optimized and emitted by BOLT, this patch adds
a helper for patching them in the original .plt section.

For PLTs generated by LLD, this is safe as LLD inserts extra nops to
PLTs which don't already contain a BTI.

PLT entry before patching:
```
   adrp x16, Page(&(.got.plt[n]))
   ldr  x17, [x16, Offset(&(.got.plt[n]))]
   add  x16, x16, Offset(&(.got.plt[n]))
   br   x17
   nop
   nop
```

PLT entry after patching:
```
   bti c
   adrp x16, Page(&(.got.plt[n]))
   ldr  x17, [x16, Offset(&(.got.plt[n]))]
   add  x16, x16, Offset(&(.got.plt[n]))
   br   x17
   nop
```

## Safety considerations:

The PLT entry can become incorrect if shifting the ADRP moves it
across a page boundary.

The PLT entry is 24 bytes, and page size is 4096 (or 16384) bytes.
Their GCD is 8 bytes, meaning that shifting the ADRP is safe, as long as
it's shifted by less than 8 bytes.

The introduced function only shifts the ADRP by one instruction (4
bytes),
meaning there is no need to recompute the ADRP offset.
2026-01-16 09:48:54 +01:00
Gergely Bálint
4193c404ca
[BOLT][BTI] Disassemble PLT entries when processing BTI binaries (#169663)
PLT entries are PseudoFunctions, and are not disassembled or emitted.
For BTI, we need to check the first MCInst of PLT entries, to see
if indirectly calling them is safe or not.

This patch disassembles PLTs for binaries using BTI, while not changing
the behaviour for binaries without BTI.

The PLTs are only disassembled, not emitted.

---------

Co-authored-by: Paschalis Mpeis <paschalis.mpeis@arm.com>
2026-01-16 07:40:05 +01:00
Paschalis Mpeis
f51fdff835
[BOLT] Add Arm's large-bolt-tests in docker-tests (#174961)
docker-tests now runs out-of-tree tests from:
- https://github.com/arm/large-bolt-tests
2026-01-14 09:32:21 +00:00
YongKang Zhu
b1e4f26928
[BOLT][AArch64] Fix epilogue-determination test (#175668)
Define jump table for each function, for conformance and better clarity.
2026-01-13 17:59:30 -08:00
Austin Jiang
e6cdfb75ac
Fix typos and spelling errors across codebase (#156270)
Corrected various spelling mistakes such as 'occurred', 'receiver',
'initialized', 'length', and others in comments, variable names,
function names, and documentation throughout the project. These
changes improve code readability and maintain consistency in naming
and documentation.

Co-authored-by: Louis Dionne <ldionne.2@gmail.com>
2026-01-13 11:52:46 -05:00
Harald van Dijk
e720636120
[BOLT] Avoid UB due to misaligned access. (#174990)
There is no guarantee that PatchOffset is suitably aligned for uint32_t,
and in BOLT's own tests, it is not aligned for uint32_t.

Fixes test failures seen with LLVM_USE_SANITIZER=Undefined.
2026-01-10 03:45:13 +00:00
Maksim Panchenko
f223ebfc2b [BOLT] Add aaupov to X86 maintainers list 2026-01-09 15:17:22 -08:00
Paschalis Mpeis
bcea722c91
[BOLT] Fix label in epilogue-determination.s test (#174960)
On RHEL8 we get the following error that may originate from the changed
typo:
```
clang: warning: argument unused during compilation: '-ffreestanding' [-Wunused-command-line-argument]
ld.lld: error: relocation R_AARCH64_ADR_PREL_LO21 cannot be used against symbol '_jmptbl2'; recompile with -fPIC
>>> defined in /tmp/epilogue-determination-7bd9d4.o
>>> referenced by /tmp/epilogue-determination-7bd9d4.o:(.text+0x54)
clang: error: linker command failed with exit code 1 (use -v to see invocation)
```
2026-01-09 10:27:54 +00:00
Maksim Panchenko
fdead4dfe4 [BOLT] Update maintainers list 2026-01-08 13:57:26 -08:00
Sam Elliott
4e3699b4c6
[RISCV] Mark More Relocs as Relaxable (#151422)
Since this code was last reviewed, more relaxations have been added to
the psABI for existing standard relocations that LLVM didn't have marked
as relaxable.

This change ensures that LLVM marks the following relocations (and their
respective fixups) as relaxable:
- `R_RISCV_JAL`
- `R_RISCV_GOT_HI20`
- `R_RISCV_TPREL_HI20`
- `R_RISCV_TLSDESC_HI20`

This also updates the linker relaxation test to use `-NEXT` to check all
the output lines.

There are lots more emitted relocations, not only due to JAL being
relaxable, but branches are now also marked linker relaxable because
they can be turned into `b<cc>; jal` during assembly relaxation, which
may also be marked relaxable.
2026-01-08 09:28:29 -08:00
Harald van Dijk
e42f862042
[BOLT][AArch64] Avoid UB due to shift of negative value. (#174994)
A build with LLVM_USE_SANITIZER=Undefined showed:

  bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp:2277:60:
  runtime error: left shift of negative value -32768

This showed up in bolt/test/AArch64/veneer-lite-mode.s.

It is valid for ADRP's operand to be negative, and not valid to shift it
like that. To perform this shift reliably, cast the value to unsigned.
2026-01-08 17:06:40 +00:00
Gergely Bálint
d6c22d4b0e
[BOLT][BTI] Disallow instrumenting BTI binaries (#174936)
Until instrumentation support is added, the feature should be
disabled for BTI binaries. An error message is added to explain
the situation.
Meanwhile, users can choose sampling-based profiling methods.

Added a TODO comment explaining missing steps.
2026-01-08 12:42:20 +01:00
Paschalis Mpeis
80ae94c63d
[BOLT][Docs] Add arm/large-bolt-tests to README (#174727)
On AArch64, we recommend to also test against binaries hosted at:
- https://github.com/arm/large-bolt-tests
2026-01-08 10:46:02 +00:00
Haibo Jiang
8fc3f6ddb8
[BOLT] Add option instrumentation-max-size for bump allocator (#174716)
While the current max memory size is sufficient for most binaries, a few
binaries may encouter insufficient allocated memory space.

Allow specify the max memory size of the instrumentation bump allocator.
2026-01-08 11:53:20 +03:00
Gergely Bálint
76c300c8c7
[BOLT][BTI] Fix assertions checking getNumOperands (#174600)
Several BTI-related functions are checking that a call MCInst has one
non-annotation operand.

This patch changes these checks to use MCPlus::getNumPrimeOperands,
instead of getNumOperands.

Testing: 
added annotations to existing gtests to serve as regression
tests. These now also explicitly check getNumOperands and getNumPrimeOperands
usage on the annotated MCInsts.
2026-01-07 10:54:00 +01:00
Paschalis Mpeis
164cfda88e
[BOLT][AArch64] Add rseq test (#174413) 2026-01-07 09:10:48 +00:00
Maksim Panchenko
3e840d2957
[BOLT] Remove unnecessary dependency. NFC (#174645)
There's no need for a full definition of `BinaryBasicBlock` in
`MCPlusBuilder.h`. Use `InstructionListType::iterator` instead of
`BinaryBasicBlock::iterator` in `findMemcpySizeInBytes()`.
2026-01-06 13:30:28 -08:00
Amir Ayupov
b01c3d6682
[BOLT] Fix merge-fdata for memory events (#128108)
Don't attempt to parse mispredictions for memory entries in LBR profile.

Test Plan: added merge-fdata-mem-prof.test
2026-01-05 20:21:32 -08:00
Victor Chernyakin
c438773432
[LLVM][ADT] Migrate users of make_scope_exit to CTAD (#174030)
This is a followup to #173131, which introduced the CTAD functionality.
2026-01-02 20:42:56 -08:00
Maksim Panchenko
14c00c05c1
[BOLT][AArch64] Rework test case for lite mode veneers. NFC (#173951)
Follow-up to #171534: provide a minimal test case.
2025-12-30 10:27:40 -08:00
Anatoly Trosinenko
2469d39a75
[BOLT] Overhaul the comments in PAuthGadgetScanner for readability (NFC) (#169801)
Update the comments in PAuthGadgetScanner.cpp to better describe the
current version of the code. Along the way, shorten identifier names
that are redundant taking their context into account:
`RegsToTrackInstsFor` (made `RegsToTrack`) and `getNumTrackedRegisters`
(made `getNumRegisters`).

Co-authored-by: Kristof Beyls <kristof.beyls@arm.com>
2025-12-29 14:10:11 +03:00
Paschalis Mpeis
e903f68314
[BOLT][Docs] Add instructions to run all tests. (#172847) 2025-12-24 12:27:04 +00:00
Amir Ayupov
6f4ddf920b
[BOLT][NFC] Split up StaleProfileMatching::matchWeights (#165492)
Simplify matchWeights in preparation for pseudo probe matching 
(#100446).

Test Plan: NFC
2025-12-23 18:55:03 -08:00
Paschalis Mpeis
9c0bf3d530
[BOLT] Add Dockerfile for testing (#173066)
Add utils/docker-tests/Dockerfile to facilitate in-tre and out-of-tree
testing.

Builds perf from source to work around an Ubuntu 24.04 issue.

To reproduce a specific issue adjust the Dockerfile like:
```
RUN git clone https://github.com/llvm/llvm-project
RUN cd llvm-project && git checkout <SHA>
```
2025-12-23 14:59:49 +00:00
Anatoly Trosinenko
96ee7d2c37
[ADT] Make use of subsetOf and anyCommon methods of BitVector (NFC) (#170876)
Replace the code along these lines

    BitVector Tmp = LHS;
    Tmp &= RHS;
    return Tmp.any();

and

    BitVector Tmp = LHS;
    Tmp.reset(RHS);
    return Tmp.none();

with `LHS.anyCommon(RHS)` and `LHS.subsetOf(RHS)`, correspondingly,
which do not require creating temporary BitVector and can return early.
2025-12-23 11:57:35 +03:00
Amir Ayupov
8c010dea55
[BOLT] Lookup top-level inline tree node in YAMLProfileWriter (#165491)
Top-level (binary) functions don't have a unique GUID mapping, with
different
causes namely coroutine fragments sharing the same parent source
function GUID.

Replace the top-level inline tree node GUID lookup with probe lookup
coupled
with walk up the inline tree.

Test Plan: added test-coro-probes.yaml
2025-12-22 14:47:21 -08:00
Gergely Bálint
674f308324
[BOLT][BTI] Add needed BTIs in LongJmp or refuse to optimize binary (#171149)
This patch adds BTI landing pads to ShortJmp/LongJmp targets in the
LongJmp pass when optimizing BTI binaries.

BOLT does not have the ability to add BTI to all types of functions.
This patch aims to insert the landing pad where possible, and emit an
error and exit where it currently is not.

BOLT cannot insert BTIs into several function "types", including:
- ignored functions,
- PLT functions,
- other functions without a CFG.

Additional context:

In #161206, BOLT gained the ability to decode the .note.gnu.property
section, and warn about lack of BTI support for BOLT. However, this
warning is misleading: the emitted binary may not need extra BTI landing
pads.

With this patch, the emitted binary will be "BTI-safe".
2025-12-22 12:24:42 +01:00
Gergely Bálint
24297bea96
[BOLT][BTI] Refactor BTI helpers (#173000)
- Add an enum to encode BTI variants in function arguments.
- Remove updateBTIVariant as createBTI can be used for the same
purpose.
- Remove a test case that checked against invalid BTI variants, as
those are now unrepresentable.
2025-12-22 10:11:41 +01:00
Paschalis Mpeis
242fcb3556
[BOLT][AArch64] Treat undefined symbols as errors in tests (#172689)
Add `-Wl,-z,defs` in `%cflags` to make linking more consistent across
distros. Aims to catch typos in handwritten assembly tests. If
intentional, individual tests can override this with: `-Wl,-z,undefs`

Tests changed:
- bolt/test/AArch64/bf_min_alignment.s: fixed a typo
- bolt/test/AArch64/tls.c: overriding behaviour in all clang
invocations, making the test more consistent.
- Overrides to allow undefined symbols in:
  - bolt/test/AArch64/epilogue-determination.s
  - bolt/test/AArch64/exceptions-plt.cpp
  - bolt/test/AArch64/ifunc.test
  - bolt/test/AArch64/plt-call.test
  - bolt/test/AArch64/text-data.c
  - bolt/test/AArch64/unsupported-passes.test
  - bolt/test/AArch64/unsupported-passes.test
2025-12-19 12:28:30 +00:00
Gergely Bálint
b6d188a7e2
[BOLT] Add missing system-linux requirements to tests (#172968)
Several lit tests are failing on macOS, as they are linux-specific,
but not using the "REQUIRES: system-linux" setting.

This patch adds the missing requirements to tests failing on macOS.
2025-12-19 11:16:18 +01:00
Alexey Moksyakov
6f748698f7
Revert "[bolt][aarch64] simplify rodata/literal load for X86 & AArch6… (#172822)
few tests are broken on ubuntu, need find out the cause 
This reverts commit 999c9382571d6aadf9b786263862bf4085dd2dba.

Co-authored-by: yavtuk <yavtuk@ya.ru>
2025-12-18 14:19:17 +03:00
Alexey Moksyakov
999c938257
[bolt][aarch64] simplify rodata/literal load for X86 & AArch64 (#165723)
This patch fixed the issue related to load literal
for AArch64 (bolt/test/AArch64/materialize-constant.s),
address range for literal is limited  +/- 1MB,
emitCI puts the constants by the end of function and
the one is out of available range.

SimplifyRODataLoads is enabled by default for X86 & AArch64
2025-12-18 09:59:01 +03:00
Maksim Panchenko
4a8e6a36b6
[BOLT][AArch64] Speed up ICF pass (#172783)
Add hashing support for MCSpecifierExpr, which is frequently used as an
operand in AArch64 instructions. Proper hashing reduces collisions when
placing functions into buckets, resulting in shorter Identical Code
Folding (ICF) pass runtime.

In one benchmark, the ICF wall time decreased from 272s to 124s.
2025-12-17 21:05:54 -08:00
Maksim Panchenko
5d1618b201
[BOLT][AArch64] Use minimal code alignment for cold functions (#172598)
On AArch64, a larger cold code size can result in more veneers,
increasing potential overhead for hot code. This change minimizes cold
code size when the `--use-compact-aligner` option (default) is enabled.
2025-12-17 16:42:58 -08:00
Maksim Panchenko
f440b5c12d
[BOLT] Synchronize function and section order (#172419)
The order in which functions are emitted into the output file does not
always reflect the order in which they will appear in the final file.
This discrepancy occurs because code is emitted to different sections,
such as `.text`, `.text.cold`, `.text.mover`, etc.

To make passes that rely on the relative function order - such as
`LongJmpPass` - more precise and functional, sort the output functions
to reflect their final layout, and validate the layout after code
sections are sorted.

Note that, at this time, we only directly change the order of the main
fragments of functions. The order of other fragments, such as cold and
warm sections relative to other fragment types, is determined by the
section order.
2025-12-16 21:55:33 -08:00
Maksim Panchenko
adaca1348e
[BOLT] Introduce getOutputBinaryFunctions(). NFCI (#172174)
To gain better control over the functions that go into the output file
and their order, introduce `BinaryContext::getOutputBinaryFunctions()`.

The new API returns a modifiable list of functions in output order.

This list is filled by a new `PopulateOutputFunctions` pass and includes
emittable functions from the input file, plus functions added by BOLT
(injected functions).

The new functionality allows to freely intermix input functions with
injected ones in the output, which will be used in new PRs.

The new function replaces `BinaryContext::getSortedFunctions()`, but
unlike its predecessor, it includes injected functions in the returned
list.
2025-12-14 16:29:01 -08:00
Maksim Panchenko
3c2f81820c
[BOLT] Introduce BinaryFunctionListType. NFC (#172128)
Use `BinaryFunctionListType` as an alias for `std::vector<BinaryFunction *>`.
2025-12-13 11:52:36 -08:00
YongKang Zhu
429dbce8d7
[BOLT][AArch64] Tweak heuristics for epilogue recognition (#169584)
If a basic block contains a load into LR from stack and has no
instruction saving LR onto stack, we just assume the basic block
is an epilogue.

This is not meant to accurately recognize epilogue in all possible
cases, but to have BOLT be conservative on treating basic block as
epilogue and then turning indirect branch with unknown control flow
to tail call.
2025-12-11 14:46:36 -08:00
Gergely Bálint
fbc121ce1e
[BOLT][BTI] Add MCPlusBuilder::insertBTI (#167329)
This function contains most of the logic for BTI:
- it takes the BasicBlock and the instruction used to jump to it.
- Then it checks if the first non-pseudo instruction is a sufficient
landing pad for the used call.
- if not, it generates the correct BTI instruction.

Also introduce the isCallCoveredByBTI helper to simplify the logic.
2025-12-11 11:58:24 +01:00
Maksim Panchenko
6470d1bb98
[BOLT] Exclude BOLT injected functions from AssignSections. NFCI (#171579)
Assign output sections for injected functions explicitly, and don't
reassign in AssignSections pass.

This change is a prerequisite for further PRs where veneer functions are
created as injected functions and their code section depends on their
placement.
2025-12-10 10:30:07 -08:00
Maksim Panchenko
28ff941a2c
[BOLT][AArch64] Always cover veneers in lite mode (#171534)
If a veneer is not disassembled in lite mode, the veneer elimination
pass will not recognize it as such and the call to such veneer will
remain unchanged.

Later, we may need to insert a new veneer for such code ending up with a
double veneer.

To avoid such suboptimal code generation, always disassemble veneers and
guarantee that they are converted to direct calls in BOLT.
2025-12-10 09:54:37 -08:00