Matt Arsenault 3134e696e4

AMDGPU: Add target feature for aligned VGPR requirement (#155336) ...

This now applies to gfx90a+ and gfx1250, so add a dedicated feature
for it so the feature check can be composed correctly with unrelated
properties. Probably would be better to invert this, but that turns
out to be difficult given the current assumptions.

2025-08-26 01:36:51 +00:00

..

AsmParser

[AMDGPU] gfx1250 kernel descriptor update (#155008)

2025-08-22 12:58:41 -07:00

Disassembler

[AMDGPU] gfx1250 kernel descriptor update (#155008)

2025-08-22 12:58:41 -07:00

MCA

[llvm] annotate interfaces in llvm/Target for DLL export (#143615)

2025-06-17 13:28:45 -07:00

MCTargetDesc

[AMDGPU] gfx1250 kernel descriptor update (#155008)

2025-08-22 12:58:41 -07:00

TargetInfo

[llvm] annotate interfaces in llvm/Target for DLL export (#143615)

2025-06-17 13:28:45 -07:00

Utils

[AMDGPU] Common up two local memory size calculations. NFCI. (#154784)

2025-08-22 08:44:11 +01:00

AMDGPU.h

[AMDGPU] Delete AMDGPU Unify Metadata pass (#153548)

2025-08-14 16:16:32 +08:00

AMDGPU.td

AMDGPU: Add target feature for aligned VGPR requirement (#155336)

2025-08-26 01:36:51 +00:00

AMDGPUAliasAnalysis.cpp

[NFC][LLVM][AMDGPU] Cleanup pass initialization for AMDGPU (#134410)

2025-04-07 17:27:50 -07:00

AMDGPUAliasAnalysis.h

…

AMDGPUAlwaysInlinePass.cpp

[NFC][AMDGPU] Replace direct arch comparison with isAMDGCN() (#131357)

2025-03-14 14:21:44 -04:00

AMDGPUAnnotateUniformValues.cpp

[AMDGPU] Preserve all analyses if nothing changed (#117994)

2024-11-28 14:33:05 +00:00

AMDGPUArgumentUsageInfo.cpp

[AMDGPU] Remove unused includes (NFC) (#116154)

2024-11-13 21:10:03 -08:00

AMDGPUArgumentUsageInfo.h

[AMDGPU] Add backward compatibility layer for kernarg preloading (#119167)

2025-01-10 11:39:02 -08:00

AMDGPUAsanInstrumentation.cpp

[IRBuilder] Add new overload for CreateIntrinsic (#131942)

2025-03-31 08:10:34 -07:00

AMDGPUAsanInstrumentation.h

[AMDGPU] Update instrumentAddress method to support aligned size and unusual size accesses. (#104804)

2024-08-21 10:31:42 +05:30

AMDGPUAsmPrinter.cpp

[AMDGPU] report named barrier cnt part2 (#154588)

2025-08-20 12:00:45 -07:00

AMDGPUAsmPrinter.h

AMDGPU gfx12: Add _dvgpr$ symbols for dynamic VGPRs (#148251)

2025-08-15 16:33:06 +01:00

AMDGPUAtomicOptimizer.cpp

[IRBuilder] Add new overload for CreateIntrinsic (#131942)

2025-03-31 08:10:34 -07:00

AMDGPUAttributes.def

Reapply "[AMDGPU] Infer amdgpu-no-flat-scratch-init attribute in AMDGPUAttributor (#94647)" (#118907)

2024-12-09 16:44:48 -08:00

AMDGPUAttributor.cpp

Revert "[AMDGPU][Attributor] Infer inreg attribute in AMDGPUAttributor (#146720)"

2025-08-18 22:59:52 -04:00

AMDGPUCallingConv.td

[AMDGPU] Change SGPR layout to striped caller/callee saved (#127353)

2025-03-08 09:28:20 -05:00

AMDGPUCallLowering.cpp

Reapply "[AMDGPU] Intrinsic for launching whole wave functions" (#153584)

2025-08-15 10:12:47 +02:00

AMDGPUCallLowering.h

[AMDGPU] ISel & PEI for whole wave functions (#145858)

2025-07-21 10:39:09 +02:00

AMDGPUCodeGenPrepare.cpp

[AMDGPU][NFC] Only include CodeGenPassBuilder.h where needed. (#154769)

2025-08-22 10:05:06 +01:00

AMDGPUCombine.td

[AMDGPU][GlobalISel] Combine for breaking s64 and/or into two s32 insts (#151731)

2025-08-20 17:32:29 +02:00

AMDGPUCombinerHelper.cpp

[AMDGPU][GlobalISel] Combine for breaking s64 and/or into two s32 insts (#151731)

2025-08-20 17:32:29 +02:00

AMDGPUCombinerHelper.h

[AMDGPU][GlobalISel] Combine for breaking s64 and/or into two s32 insts (#151731)

2025-08-20 17:32:29 +02:00

AMDGPUCtorDtorLowering.cpp

AMDGPU: Add instruction flags when lowering ctor/dtor (#111652)

2024-10-09 18:03:35 +04:00

AMDGPUCtorDtorLowering.h

…

AMDGPUExportClustering.cpp

[AMDGPU] Remove unused includes (NFC) (#141376)

2025-05-24 14:48:46 -07:00

AMDGPUExportClustering.h

…

AMDGPUExportKernelRuntimeHandles.cpp

AMDGPU: Move enqueued block handling into clang (#128519)

2025-03-10 19:54:04 +07:00

AMDGPUExportKernelRuntimeHandles.h

AMDGPU: Move enqueued block handling into clang (#128519)

2025-03-10 19:54:04 +07:00

AMDGPUFeatures.td

[AMDGPU] Increase LDS to 320K on gfx1250 (#153645)

2025-08-14 12:52:00 -07:00

AMDGPUFrameLowering.cpp

…

AMDGPUFrameLowering.h

…

AMDGPUGenRegisterBankInfo.def

…

AMDGPUGISel.td

[AMDGPU] Use SDNodeXForm to select a few VOP3P modifiers, NFC (#151907)

2025-08-04 12:51:48 -07:00

AMDGPUGlobalISelDivergenceLowering.cpp

[NFC][LLVM][AMDGPU] Cleanup pass initialization for AMDGPU (#134410)

2025-04-07 17:27:50 -07:00

AMDGPUGlobalISelUtils.cpp

AMDGPU/GlobalISel: Add waterfall lowering in regbanklegalize (#145912)

2025-07-23 16:47:00 +02:00

AMDGPUGlobalISelUtils.h

AMDGPU/GlobalISel: Add waterfall lowering in regbanklegalize (#145912)

2025-07-23 16:47:00 +02:00

AMDGPUHSAMetadataStreamer.cpp

[AMDGPU] Remove an unnecessary cast (NFC) (#151440)

2025-07-31 07:30:59 -07:00

AMDGPUHSAMetadataStreamer.h

AMDGPU: Move enqueued block handling into clang (#128519)

2025-03-10 19:54:04 +07:00

AMDGPUIGroupLP.cpp

Revert "[llvm][NFC] Use llvm::sort()" (#140668)

2025-05-20 11:27:03 +08:00

AMDGPUIGroupLP.h

…

AMDGPUImageIntrinsicOptimizer.cpp

[AMDGPU] Change placeholder from undef to poison (#130853)

2025-03-12 12:52:38 +00:00

AMDGPUInsertDelayAlu.cpp

AMDGPU: Treat WMMA XDL ops as TRANS in S_DELAY_ALU insertion for gfx1250 (#149208)

2025-07-16 17:07:48 -07:00

AMDGPUInstCombineIntrinsic.cpp

[AMDGPU] gfx1250 v_wmma_scale[16]_f32_16x16x128_f8f6f4 codegen (#152036)

2025-08-04 19:16:34 -07:00

AMDGPUInstrInfo.cpp

AMDGPU: Remove AMDGPUInstrInfo class (#144984)

2025-06-20 18:26:56 +09:00

AMDGPUInstrInfo.h

AMDGPU: Remove AMDGPUInstrInfo class (#144984)

2025-06-20 18:26:56 +09:00

AMDGPUInstrInfo.td

[AMDGPU] ISel & PEI for whole wave functions (#145858)

2025-07-21 10:39:09 +02:00

AMDGPUInstructions.td

[Target] Remove SoftFail field on targets that don't use it (NFC) (#154659)

2025-08-21 05:21:42 +03:00

AMDGPUInstructionSelector.cpp

[AMDGPU] Add s_barrier_init|join|leave instructions (#153296)

2025-08-12 15:07:07 -07:00

AMDGPUInstructionSelector.h

[AMDGPU] Add s_barrier_init|join|leave instructions (#153296)

2025-08-12 15:07:07 -07:00

AMDGPUISelDAGToDAG.cpp

[AMDGPU][NFC] Only include CodeGenPassBuilder.h where needed. (#154769)

2025-08-22 10:05:06 +01:00

AMDGPUISelDAGToDAG.h

[AMDGPU] Use SDNodeXForm to select a few VOP3P modifiers, NFC (#151907)

2025-08-04 12:51:48 -07:00

AMDGPUISelLowering.cpp

[AMDGPU] canCreateUndefOrPoisonForTargetNode - BFE_I32/U32 can't create poison/undef (#154932)

2025-08-22 12:14:45 +00:00

AMDGPUISelLowering.h

[AMDGPU] canCreateUndefOrPoisonForTargetNode - BFE_I32/U32 can't create poison/undef (#154932)

2025-08-22 12:14:45 +00:00

AMDGPULateCodeGenPrepare.cpp

[AMDGPU][NFC] Only include CodeGenPassBuilder.h where needed. (#154769)

2025-08-22 10:05:06 +01:00

AMDGPULegalizerInfo.cpp

[AMDGPU] Narrow only on store to pow of 2 mem location (#150093)

2025-08-19 00:04:27 +09:00

AMDGPULegalizerInfo.h

[AMDGPU] Support image_bvh8_intersect_ray instruction and intrinsic. (#130041)

2025-03-19 16:08:08 +01:00

AMDGPULibCalls.cpp

[AMDGPU] Remove UnsafeFPMath uses (#151079)

2025-07-31 17:36:57 +08:00

AMDGPULibFunc.cpp

[AMDGPU] Provide default value in get intrinsic param type (#122448)

2025-01-10 15:29:42 +01:00

AMDGPULibFunc.h

AMDGPU: Verify function type matches when matching libcalls (#119043)

2024-12-16 15:01:48 +09:00

AMDGPULowerBufferFatPointers.cpp

[AMDGPU][NFC] Only include CodeGenPassBuilder.h where needed. (#154769)

2025-08-22 10:05:06 +01:00

AMDGPULowerKernelArguments.cpp

[AMDGPU] Move kernarg preload logic to separate pass (#130434)

2025-05-11 21:18:11 -07:00

AMDGPULowerKernelAttributes.cpp

[AMDGPU] Add a new function getIntegerPairAttribute (#133271)

2025-03-27 15:38:54 -04:00

AMDGPULowerModuleLDSPass.cpp

[AMDGPU][NFC] Only include CodeGenPassBuilder.h where needed. (#154769)

2025-08-22 10:05:06 +01:00

AMDGPUMachineFunction.cpp

[AMDGPU] upstream barrier count reporting part1 (#154409)

2025-08-19 16:42:31 -07:00

AMDGPUMachineFunction.h

[AMDGPU] upstream barrier count reporting part1 (#154409)

2025-08-19 16:42:31 -07:00

AMDGPUMachineModuleInfo.cpp

[NFC][LLVM][AMDGPU] Cleanup pass initialization for AMDGPU (#134410)

2025-04-07 17:27:50 -07:00

AMDGPUMachineModuleInfo.h

…

AMDGPUMacroFusion.cpp

…

AMDGPUMacroFusion.h

[CodeGen] Move MISched target hooks into TargetMachine (#125700)

2025-02-05 11:41:37 +05:30

AMDGPUMarkLastScratchLoad.cpp

[NFC][LLVM][AMDGPU] Cleanup pass initialization for AMDGPU (#134410)

2025-04-07 17:27:50 -07:00

AMDGPUMCInstLower.cpp

[AMDGPU] gfx1250 64-bit relocations and fixups (#148951)

2025-07-15 17:13:42 -07:00

AMDGPUMCInstLower.h

[AMDGPU] Fix compilation errors.

2025-08-22 10:30:43 +01:00

AMDGPUMCResourceInfo.cpp

[AMDGPU] upstream barrier count reporting part1 (#154409)

2025-08-19 16:42:31 -07:00

AMDGPUMCResourceInfo.h

[AMDGPU] upstream barrier count reporting part1 (#154409)

2025-08-19 16:42:31 -07:00

AMDGPUMemoryUtils.cpp

[llvm] Remove unused includes of SmallSet.h (NFC) (#154893)

2025-08-22 10:33:46 -07:00

AMDGPUMemoryUtils.h

[AMDGPU] modify named barrier builtins and intrinsics (#114550)

2024-11-06 10:37:22 -08:00

AMDGPUMIRFormatter.cpp

[AMDGPU] Remove unused includes (NFC) (#116154)

2024-11-13 21:10:03 -08:00

AMDGPUMIRFormatter.h

…

AMDGPUPassRegistry.def

[AMDGPU] Delete AMDGPU Unify Metadata pass (#153548)

2025-08-14 16:16:32 +08:00

AMDGPUPerfHintAnalysis.cpp

[llvm] Remove unused includes of SmallSet.h (NFC) (#154893)

2025-08-22 10:33:46 -07:00

AMDGPUPerfHintAnalysis.h

NewPM/AMDGPU: Port AMDGPUPerfHintAnalysis to new pass manager (#102645)

2024-08-11 15:11:10 +04:00

AMDGPUPostLegalizerCombiner.cpp

[NFC][CodeGen] Adopt MachineFunctionProperties convenience accessors (#141101)

2025-05-23 08:30:29 -07:00

AMDGPUPredicateControl.td

…

AMDGPUPreLegalizerCombiner.cpp

[NFC][CodeGen] Adopt MachineFunctionProperties convenience accessors (#141101)

2025-05-23 08:30:29 -07:00

AMDGPUPreloadKernArgProlog.cpp

[AMDGPU] Enable kernarg preload on gfx1250 (#153686)

2025-08-14 16:29:53 -07:00

AMDGPUPreloadKernArgProlog.h

[AMDGPU] Add backward compatibility layer for kernarg preloading (#119167)

2025-01-10 11:39:02 -08:00

AMDGPUPreloadKernelArguments.cpp

[AMDGPU] Fix uncaught changes made by AMDGPUPreloadKernelArgumentsPass (#154645)

2025-08-20 16:23:23 -07:00

AMDGPUPrepareAGPRAlloc.cpp

AMDGPU: Start using AV_MOV_B64_IMM_PSEUDO (#154500)

2025-08-22 13:59:36 +09:00

AMDGPUPrepareAGPRAlloc.h

AMDGPU: Add pass to replace constant materialize with AV pseudos (#149292)

2025-07-18 17:15:38 +09:00

AMDGPUPrintfRuntimeBinding.cpp

[AMDGPU] Support 'F' and 'A' conversion specifiers with ocl printf (#148784)

2025-07-15 13:24:08 +05:30

AMDGPUPromoteAlloca.cpp

[AMDGPU] AMDGPUPromoteAlloca: increase default max-regs to 32 (#155076)

2025-08-26 09:30:16 +09:00

AMDGPUPromoteKernelArguments.cpp

[AMDGPU] Move AMDGPUMemoryUtils out of Utils. NFC. (#104930)

2024-08-20 16:15:46 +01:00

AMDGPUPTNote.h

…

AMDGPURegBankCombiner.cpp

[NFC][CodeGen] Adopt MachineFunctionProperties convenience accessors (#141101)

2025-05-23 08:30:29 -07:00

AMDGPURegBankLegalize.cpp

AMDGPU/GlobalISel: Improve readanylane combines in regbanklegalize (#145911)

2025-07-23 16:44:53 +02:00

AMDGPURegBankLegalizeHelper.cpp

[AMDGPU][GISel] Use buildObjectPtrOffset instead of buildPtrAdd (#150899)

2025-07-30 08:30:27 +02:00

AMDGPURegBankLegalizeHelper.h

AMDGPU/GlobalISel: Add waterfall lowering in regbanklegalize (#145912)

2025-07-23 16:47:00 +02:00

AMDGPURegBankLegalizeRules.cpp

AMDGPU/GlobalISel: Add regbanklegalize rules for ptr-add (#153175)

2025-08-13 15:49:48 +02:00

AMDGPURegBankLegalizeRules.h

AMDGPU/GlobalISel: Add waterfall lowering in regbanklegalize (#145912)

2025-07-23 16:47:00 +02:00

AMDGPURegBankSelect.cpp

[NFC][CodeGen] Adopt MachineFunctionProperties convenience accessors (#141101)

2025-05-23 08:30:29 -07:00

AMDGPURegisterBankInfo.cpp

[AMDGPU] Add s_barrier_init|join|leave instructions (#153296)

2025-08-12 15:07:07 -07:00

AMDGPURegisterBankInfo.h

…

AMDGPURegisterBanks.td

[AMDGPU][True16][CodeGen] uaddsat/usubsat true16 selection in gisel (#128233)

2025-02-25 17:09:34 -05:00

AMDGPURemoveIncompatibleFunctions.cpp

[AMDGPU] Remove wave64 functions (#153690)

2025-08-14 15:54:33 -07:00

AMDGPURemoveIncompatibleFunctions.h

[AMDGPU][NewPM] Port AMDGPURemoveIncompatibleFunctions to NPM (#122261)

2025-01-13 10:11:40 +05:30

AMDGPUReserveWWMRegs.cpp

[AMDGPU] Remove unused includes (NFC) (#141376)

2025-05-24 14:48:46 -07:00

AMDGPUReserveWWMRegs.h

[AMDGPU][NewPM] Port AMDGPUReserveWWMRegs to NPM (#123722)

2025-03-10 17:36:35 +05:30

AMDGPUResourceUsageAnalysis.cpp

[AMDGPU] upstream barrier count reporting part1 (#154409)

2025-08-19 16:42:31 -07:00

AMDGPUResourceUsageAnalysis.h

[AMDGPU] upstream barrier count reporting part1 (#154409)

2025-08-19 16:42:31 -07:00

AMDGPURewriteAGPRCopyMFMA.cpp

AMDGPU: Handle rewriting VGPR MFMA to AGPR with subregister copies (#153019)

2025-08-21 01:17:03 +00:00

AMDGPURewriteOutArguments.cpp

[DebugInfo][RemoveDIs] Delete debug-info-format flag (#143746)

2025-06-12 11:51:58 +01:00

AMDGPURewriteUndefForPHI.cpp

[NFC][LLVM][AMDGPU] Cleanup pass initialization for AMDGPU (#134410)

2025-04-07 17:27:50 -07:00

AMDGPUSearchableTables.td

Reapply "[AMDGPU] Intrinsic for launching whole wave functions" (#153584)

2025-08-15 10:12:47 +02:00

AMDGPUSelectionDAGInfo.cpp

[SelectionDAG] Virtualize isTargetStrictFPOpcode / isTargetMemoryOpcode (#119969)

2024-12-21 05:29:51 +03:00

AMDGPUSelectionDAGInfo.h

[SelectionDAG] Virtualize isTargetStrictFPOpcode / isTargetMemoryOpcode (#119969)

2024-12-21 05:29:51 +03:00

AMDGPUSetWavePriority.cpp

[llvm] Replace SmallSet with SmallPtrSet (NFC) (#154068)

2025-08-18 07:01:29 -07:00

AMDGPUSplitModule.cpp

[AMDGPU][SplitModule] Do not create empty modules (#135761)

2025-04-25 09:36:41 +02:00

AMDGPUSplitModule.h

…

AMDGPUSubtarget.cpp

[NFC][AMDGPU] Remove redundant code in AMDGPUSubtarget::getWavesPerEU (#155201)

2025-08-25 08:22:00 -04:00

AMDGPUSubtarget.h

AMDGPU: Support packed bf16 instructions on gfx1250 (#150283)

2025-07-23 12:01:23 -07:00

AMDGPUSwLowerLDS.cpp

[AMDGPU] Remove unused includes (NFC) (#141376)

2025-05-24 14:48:46 -07:00

AMDGPUTargetMachine.cpp

[AMDGPU][NFC] Only include CodeGenPassBuilder.h where needed. (#154769)

2025-08-22 10:05:06 +01:00

AMDGPUTargetMachine.h

[AMDGPU][NFC] Only include CodeGenPassBuilder.h where needed. (#154769)

2025-08-22 10:05:06 +01:00

AMDGPUTargetObjectFile.cpp

…

AMDGPUTargetObjectFile.h

…

AMDGPUTargetTransformInfo.cpp

[AMDGPU] Mark address space cast from private to flat as divergent if target supports globally addressable scratch (#152376)

2025-08-06 17:08:56 -04:00

AMDGPUTargetTransformInfo.h

[AMDGPU] Enable vectorization of i8 values. (#134934)

2025-06-26 19:15:31 -04:00

AMDGPUUnifyDivergentExitNodes.cpp

[NFC][LLVM][AMDGPU] Cleanup pass initialization for AMDGPU (#134410)

2025-04-07 17:27:50 -07:00

AMDGPUUnifyDivergentExitNodes.h

…

AMDGPUWaitSGPRHazards.cpp

[llvm] Use llvm::any_of (NFC) (#141444)

2025-05-26 09:13:21 -07:00

AMDGPUWaitSGPRHazards.h

[AMDGPU] Rewrite GFX12 SGPR hazard handling to dedicated pass (#118750)

2025-01-30 11:21:11 +09:00

AMDKernelCodeT.h

…

BUFInstructions.td

[AMDGPU] Support f64 atomics on gfx1250 (#151172)

2025-07-29 09:41:00 -07:00

CaymanInstructions.td

…

CMakeLists.txt

[AMDGPU] Delete AMDGPU Unify Metadata pass (#153548)

2025-08-14 16:16:32 +08:00

DSDIRInstructions.td

AMDGPU: Remove LDS-direct(param)-loads and VINTERP ops from gfx1250 support (#145631)

2025-06-24 22:44:35 -07:00

DSInstructions.td

[AMDGPU] Support f64 atomics on gfx1250 (#151172)

2025-07-29 09:41:00 -07:00

EvergreenInstructions.td

…

EXPInstructions.td

AMDGPU: Remove export and related instructions from gfx1250 support (#145624)

2025-06-24 19:59:26 -07:00

FLATInstructions.td

[AMDGPU] Use HasTransposeLoadF4F6Insts predicate on global_load_tr_* (#153266)

2025-08-12 13:51:29 -07:00

GCNCreateVOPD.cpp

[AMDGPU] VOPD/VOPD3 changes for gfx1250 (#147602)

2025-07-10 14:15:01 -07:00

GCNDPPCombine.cpp

[AMDGPU] Per-subtarget DPP instruction classification (#153096)

2025-08-11 15:41:02 -07:00

GCNDPPCombine.h

[NFC][CodeGen] Adopt MachineFunctionProperties convenience accessors (#141101)

2025-05-23 08:30:29 -07:00

GCNHazardRecognizer.cpp

[AMDGPU] Make use of SIInstrInfo::isWaitcnt. NFC. (#154087)

2025-08-18 16:18:46 +01:00

GCNHazardRecognizer.h

[AMDGPU] w/a for s_setreg_b32 gfx1250 hazard with MODE register (#153879)

2025-08-15 16:08:13 -07:00

GCNILPSched.cpp

[AMDGPU] Qualify auto. NFC. (#110878)

2024-10-03 13:07:54 +01:00

GCNIterativeScheduler.cpp

[AMDGPU] Replace dynamic VGPR feature with attribute (#133444)

2025-06-24 11:09:36 +02:00

GCNIterativeScheduler.h

[AMDGPU] Teach iterative schedulers about IGLP (#134953)

2025-04-11 15:34:49 -07:00

GCNMinRegStrategy.cpp

[AMDGPU] Qualify auto. NFC. (#110878)

2024-10-03 13:07:54 +01:00

GCNNSAReassign.cpp

[AMDGPU] Replace dynamic VGPR feature with attribute (#133444)

2025-06-24 11:09:36 +02:00

GCNNSAReassign.h

[AMDGPU][NewPM] Port GCNNSAReassign pass to new pass manager (#125034)

2025-02-18 11:13:31 +05:30

GCNPreRALongBranchReg.cpp

[CodeGen][NewPM] Port GCNPreRALongBranchReg to NPM. (#125844)

2025-02-05 18:46:27 +05:30

GCNPreRALongBranchReg.h

[CodeGen][NewPM] Port GCNPreRALongBranchReg to NPM. (#125844)

2025-02-05 18:46:27 +05:30

GCNPreRAOptimizations.cpp

[AMDGPU][True16][CodeGen] update test for buildbot failure (#131028)

2025-03-12 16:59:48 -04:00

GCNPreRAOptimizations.h

[AMDGPU][NewPM] Port "GCNPreRAOptimizations" pass to NPM (#126040)

2025-02-11 11:09:38 +05:30

GCNProcessors.td

AMDGPU: Remove "gds" feature from generic targets (#148269)

2025-07-11 12:40:13 -07:00

GCNRegPressure.cpp

[AMDGPU][Scheduler] Consistent occupancy calculation during rematerialization (#149224)

2025-08-08 14:26:04 +02:00

GCNRegPressure.h

[AMDGPU][Scheduler] Consistent occupancy calculation during rematerialization (#149224)

2025-08-08 14:26:04 +02:00

GCNRewritePartialRegUses.cpp

[AMDGPU] Simplify GCNRewritePartialRegUses pass. (#135199)

2025-04-11 15:45:24 +02:00

GCNRewritePartialRegUses.h

[AMDGPU][NewPM] Port "GCNRewritePartialRegUses" pass to NPM (#126024)

2025-02-12 11:21:40 +05:30

GCNSchedStrategy.cpp

[AMDGPU][Scheduler] Consistent occupancy calculation during rematerialization (#149224)

2025-08-08 14:26:04 +02:00

GCNSchedStrategy.h

[AMDGPU][Scheduler] Consistent occupancy calculation during rematerialization (#149224)

2025-08-08 14:26:04 +02:00

GCNSubtarget.cpp

[AMDGPU] Common up two local memory size calculations. NFCI. (#154784)

2025-08-22 08:44:11 +01:00

GCNSubtarget.h

AMDGPU: Add target feature for aligned VGPR requirement (#155336)

2025-08-26 01:36:51 +00:00

GCNVOPDUtils.cpp

[AMDGPU] VOPD/VOPD3 changes for gfx1250 (#147602)

2025-07-10 14:15:01 -07:00

GCNVOPDUtils.h

[AMDGPU] VOPD/VOPD3 changes for gfx1250 (#147602)

2025-07-10 14:15:01 -07:00

InstCombineTables.td

[TableGen] Eliminate static CodeGenIntrinsicMap in PatternParser (#107339)

2024-09-07 15:11:34 -07:00

MIMGInstructions.td

[AMDGPU] Disallow null for tensor load/store resource operands (#155074)

2025-08-23 14:06:39 -07:00

R600.h

[NFC][LLVM][AMDGPU] Cleanup pass initialization for AMDGPU (#134410)

2025-04-07 17:27:50 -07:00

R600.td

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R600AsmPrinter.cpp

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R600AsmPrinter.h

[RISCV] Replace @plt/@gotpcrel in data directives with %pltpcrel %gotpcrel

2025-03-29 11:08:13 -07:00

R600ClauseMergePass.cpp

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R600ControlFlowFinalizer.cpp

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R600Defines.h

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R600EmitClauseMarkers.cpp

[NFC][LLVM][AMDGPU] Cleanup pass initialization for AMDGPU (#134410)

2025-04-07 17:27:50 -07:00

R600ExpandSpecialInstrs.cpp

[CodeGen] Remove FinalizeMachineBundles pass (#149806)

2025-07-23 11:36:49 +01:00

R600FrameLowering.cpp

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R600FrameLowering.h

[llvm] Consistently respect naked fn attribute in TargetFrameLowering::hasFP() (#106014)

2024-10-18 09:35:42 +04:00

R600InstrFormats.td

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R600InstrInfo.cpp

[MC] Return MCRegister from MCRegisterClass::getRegister. NFC (#132126)

2025-03-20 07:24:53 -07:00

R600InstrInfo.h

[CodeGen] Change copyPhysReg interface to use Register instead of MCRegister. (#128473)

2025-02-24 09:55:34 -08:00

R600InstrInfo.td

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R600Instructions.td

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R600ISelDAGToDAG.cpp

[AMDGPU] Remove unused includes (NFC) (#141376)

2025-05-24 14:48:46 -07:00

R600ISelLowering.cpp

[AMDGPU][NFC] Only include CodeGenPassBuilder.h where needed. (#154769)

2025-08-22 10:05:06 +01:00

R600ISelLowering.h

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R600MachineCFGStructurizer.cpp

[NFC][CodeGen] Adopt MachineFunctionProperties convenience accessors (#141101)

2025-05-23 08:30:29 -07:00

R600MachineFunctionInfo.cpp

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R600MachineFunctionInfo.h

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R600MachineScheduler.cpp

[AMDGPU] Use range-based for loops (NFC) (#106184)

2024-08-27 06:46:01 -07:00

R600MachineScheduler.h

[NFC] Eliminate top-level "using namespace" from some headers. (#102751)

2024-08-11 13:10:48 -07:00

R600MCInstLower.cpp

[AMDGPU] Fix compilation errors.

2025-08-22 10:30:43 +01:00

R600OpenCLImageTypeLoweringPass.cpp

[AMDGPU] Qualify auto. NFC. (#110878)

2024-10-03 13:07:54 +01:00

R600OptimizeVectorRegisters.cpp

[AMDGPU] Use MachineRegisterInfo::def_instructions (NFC) (#142782)

2025-06-04 12:30:56 -07:00

R600Packetizer.cpp

[TableGen] Emit OpName as an enum class instead of a namespace (#125313)

2025-02-12 08:19:30 -08:00

R600Processors.td

[AMDGPU] Rename LocalMemorySize features to AddressableLocalMemorySize (#110242)

2024-09-30 10:29:31 +01:00

R600RegisterInfo.cpp

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R600RegisterInfo.h

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R600RegisterInfo.td

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R600Schedule.td

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R600Subtarget.cpp

[SelectionDAG] Add empty implementation of SelectionDAGInfo to some targets (#119968)

2024-12-16 15:13:46 +03:00

R600Subtarget.h

[SelectionDAG] Add empty implementation of SelectionDAGInfo to some targets (#119968)

2024-12-16 15:13:46 +03:00

R600TargetMachine.cpp

[AMDGPU][NFC] Only include CodeGenPassBuilder.h where needed. (#154769)

2025-08-22 10:05:06 +01:00

R600TargetMachine.h

[AMDGPU][NFC] Only include CodeGenPassBuilder.h where needed. (#154769)

2025-08-22 10:05:06 +01:00

R600TargetTransformInfo.cpp

[CostModel] Make Op0 and Op1 const in getVectorInstrCost. NFC (#137631)

2025-05-01 15:55:08 +01:00

R600TargetTransformInfo.h

[CostModel] Make Op0 and Op1 const in getVectorInstrCost. NFC (#137631)

2025-05-01 15:55:08 +01:00

R700Instructions.td

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SIAnnotateControlFlow.cpp

[AMDGPU][NFC] Only include CodeGenPassBuilder.h where needed. (#154769)

2025-08-22 10:05:06 +01:00

SIDefines.h

AMDGPU: Add pseudoinstruction for 64-bit agpr or vgpr constants (#154499)

2025-08-20 22:54:37 +09:00

SIFixSGPRCopies.cpp

[llvm] Replace SmallSet with SmallPtrSet (NFC) (#154068)

2025-08-18 07:01:29 -07:00

SIFixSGPRCopies.h

AMDGPU/NewPM: Port SIFixSGPRCopies to new pass manager (#102614)

2024-08-09 17:52:41 +04:00

SIFixVGPRCopies.cpp

[AMDGPU][NewPM] Port SIFixVGPRCopies to NPM (#123592)

2025-01-21 15:27:46 +05:30

SIFixVGPRCopies.h

[AMDGPU][NewPM] Port SIFixVGPRCopies to NPM (#123592)

2025-01-21 15:27:46 +05:30

SIFoldOperands.cpp

Revert "[AMDGPU] Fold copies of constant physical registers into their uses (#154183)" (#154219)

2025-08-18 16:22:47 -07:00

SIFoldOperands.h

[NFC][CodeGen] Adopt MachineFunctionProperties convenience accessors (#141101)

2025-05-23 08:30:29 -07:00

SIFormMemoryClauses.cpp

[AMDGPU] Replace dynamic VGPR feature with attribute (#133444)

2025-06-24 11:09:36 +02:00

SIFormMemoryClauses.h

[AMDGPU][NewPM] Port "SIFormMemoryClauses" to NPM (#127181)

2025-02-17 11:07:17 +05:30

SIFrameLowering.cpp

[AMDGPU] Ensure non-reserved CSR spilled regs are live-in (#146427)

2025-08-01 11:54:25 -05:00

SIFrameLowering.h

Reland [AMDGPU] Support block load/store for CSR #130013 (#137169)

2025-04-25 11:29:27 +02:00

SIInsertHardClauses.cpp

[AMDGPU] Adjust hard clause rules for gfx1250 (#152592)

2025-08-07 14:59:31 -07:00

SIInsertWaitcnts.cpp

AMDGPU/GFX12: Do not wait unnecessarily before barriers (#154970)

2025-08-23 00:07:59 -07:00

SIInstrFormats.td

[AMDGPU] Encode NV bit in VIMAGE/VSAMPLE. NFC (#153654)

2025-08-14 13:19:38 -07:00

SIInstrInfo.cpp

AMDGPU: Fix not diagnosing unaligned VGPRs for vsrc operands (#155104)

2025-08-25 17:42:58 +09:00

SIInstrInfo.h

AMDGPU/GFX12: Do not wait unnecessarily before barriers (#154970)

2025-08-23 00:07:59 -07:00

SIInstrInfo.td

AMDGPU: Add pseudoinstruction for 64-bit agpr or vgpr constants (#154499)

2025-08-20 22:54:37 +09:00

SIInstructions.td

[AMDGPU][True16][CodeGen] use vgpr16 for zext patterns (reopen #153894) (#154211)

2025-08-20 10:26:49 -04:00

SIISelLowering.cpp

AMDGPU: Start considering new atomicrmw metadata on integer operations (#122138)

2025-08-22 05:29:36 +00:00

SIISelLowering.h

[NFC][AMDGPU] Move cmp+select arguments optimization to SIISelLowering. (#150929)

2025-07-28 22:11:36 +02:00

SILateBranchLowering.cpp

[AMDGPU][NFC] Only include CodeGenPassBuilder.h where needed. (#154769)

2025-08-22 10:05:06 +01:00

SILoadStoreOptimizer.cpp

[AMDGPU] Support merging 16-bit and 8-bit TBUFFER load/store instruction (#145078)

2025-08-20 21:16:25 +08:00

SILoadStoreOptimizer.h

[NFC][CodeGen] Adopt MachineFunctionProperties convenience accessors (#141101)

2025-05-23 08:30:29 -07:00

SILowerControlFlow.cpp

[llvm] Replace SmallSet with SmallPtrSet (NFC) (#154068)

2025-08-18 07:01:29 -07:00

SILowerControlFlow.h

[AMDGPU][NewPM] Port SILowerControlFlow pass into NPM. (#123045)

2025-01-16 11:06:38 +05:30

SILowerI1Copies.cpp

[NFC][CodeGen] Adopt MachineFunctionProperties convenience accessors (#141101)

2025-05-23 08:30:29 -07:00

SILowerI1Copies.h

AMDGPU/GlobalISel: Temporal divergence lowering (non i1) (#124298)

2025-03-12 12:09:37 +01:00

SILowerSGPRSpills.cpp

[AMDGPU][NFC] Only include CodeGenPassBuilder.h where needed. (#154769)

2025-08-22 10:05:06 +01:00

SILowerSGPRSpills.h

[NFC][CodeGen] Adopt MachineFunctionProperties convenience accessors (#141101)

2025-05-23 08:30:29 -07:00

SILowerWWMCopies.cpp

[AMDGPU][NewPM] Port SILowerWWMCopies to NPM (#123695)

2025-01-22 14:54:01 +05:30

SILowerWWMCopies.h

[AMDGPU][NewPM] Port SILowerWWMCopies to NPM (#123695)

2025-01-22 14:54:01 +05:30

SIMachineFunctionInfo.cpp

AMDGPU: Add missing static to cl::opt (#152747)

2025-08-09 08:33:09 +09:00

SIMachineFunctionInfo.h

[AMDGPU] AsmPrinter: Unify arg handling (#151672)

2025-08-08 12:00:37 +02:00

SIMachineScheduler.cpp

[AMDGPU] Use MachineRegisterInfo::def_instructions (NFC) (#142782)

2025-06-04 12:30:56 -07:00

SIMachineScheduler.h

[AMDGPU] Replace unsigned with Register in SIMachineScheduler. NFC

2025-01-26 00:26:00 -08:00

SIMemoryLegalizer.cpp

[AMDGPU] introduce S_WAITCNT_LDS_DIRECT in the memory legalizer (#150887)

2025-07-30 11:23:28 +05:30

SIModeRegister.cpp

[AMDGPU][NPM] Port SIModeRegister to NPM (#129014)

2025-03-04 10:51:03 +05:30

SIModeRegisterDefaults.cpp

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SIModeRegisterDefaults.h

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SIOptimizeExecMasking.cpp

[AMDGPU][True16][CodeGen] True16 Add OpSel when optimizing exec mask (#128928)

2025-02-28 09:41:05 -05:00

SIOptimizeExecMasking.h

[AMDGPU][NewPM] Port SIOptimizeExecMasking to NPM (#123572)

2025-01-20 16:34:01 +05:30

SIOptimizeExecMaskingPreRA.cpp

[AMDGPU][NewPM] Port SIOptimizeExecMaskingPreRA to NPM (#125351)

2025-02-20 17:35:56 +05:30

SIOptimizeExecMaskingPreRA.h

[AMDGPU][NewPM] Port SIOptimizeExecMaskingPreRA to NPM (#125351)

2025-02-20 17:35:56 +05:30

SIOptimizeVGPRLiveRange.cpp

[AMDGPU][NFC] Only include CodeGenPassBuilder.h where needed. (#154769)

2025-08-22 10:05:06 +01:00

SIOptimizeVGPRLiveRange.h

[NFC][CodeGen] Adopt MachineFunctionProperties convenience accessors (#141101)

2025-05-23 08:30:29 -07:00

SIPeepholeSDWA.cpp

[AMDGPU][MC] Allow opsel for v_max_i16 etc in GFX10 (#143982)

2025-06-26 14:08:13 -07:00

SIPeepholeSDWA.h

[AMDGPU][NewPM] Port SIPeepholeSDWA pass to NPM (#107049)

2024-09-11 14:30:16 +04:00

SIPostRABundler.cpp

AMDGPU: VIMAGE/VSAMPLE are bundle candidates (#140854)

2025-05-28 08:47:05 +08:00

SIPostRABundler.h

[AMDGPU][NewPM] Port SIPostRABundler to NPM (#123717)

2025-02-21 16:05:58 +05:30

SIPreAllocateWWMRegs.cpp

[AMDGPU][NFC] Only include CodeGenPassBuilder.h where needed. (#154769)

2025-08-22 10:05:06 +01:00

SIPreAllocateWWMRegs.h

[NewPM][AMDGPU] Port SIPreAllocateWWMRegs to NPM (#109939)

2024-10-22 15:37:08 +05:30

SIPreEmitPeephole.cpp

[AMDGPU][NPM] Port SIPreEmitPeephole to NPM (#130065)

2025-04-08 17:58:48 +05:30

SIProgramInfo.cpp

[AMDGPU] upstream barrier count reporting part1 (#154409)

2025-08-19 16:42:31 -07:00

SIProgramInfo.h

[AMDGPU] upstream barrier count reporting part1 (#154409)

2025-08-19 16:42:31 -07:00

SIRegisterInfo.cpp

[AMDGPU] Add MC support for new gfx1250 src_flat_scratch_base_lo/hi (#152203)

2025-08-05 14:35:48 -07:00

SIRegisterInfo.h

AMDGPU: Move getMaxNumVectorRegs into GCNSubtarget (NFC) (#150889)

2025-07-28 17:25:20 +09:00

SIRegisterInfo.td

[AMDGPU] Fix the comment wrt SSrc_* RCs. NFC. (#153711)

2025-08-14 17:17:16 -07:00

SISchedule.td

AMDGPU: Support v_wmma_f32_16x16x128_f8f6f4 on gfx1250 (#149684)

2025-07-21 10:09:42 -07:00

SIShrinkInstructions.cpp

[AMDGPU] Codegen support for v_fmaak_f64/f_fmamk_f64 (#148734)

2025-07-14 17:57:06 -07:00

SIShrinkInstructions.h

[AMDGPU][NewPM] Port SIShrinkInstructions to new pass manager. (#106967)

2024-09-03 10:52:50 +05:30

SIWholeQuadMode.cpp

[NFC][CodeGen] Adopt MachineFunctionProperties convenience accessors (#141101)

2025-05-23 08:30:29 -07:00

SIWholeQuadMode.h

[NFC][CodeGen] Adopt MachineFunctionProperties convenience accessors (#141101)

2025-05-23 08:30:29 -07:00

SMInstructions.td

[AMDGPU] Select VMEM prefetch for llvm.prefetch on gfx1250 (#150493)

2025-07-24 13:22:50 -07:00

SOPInstructions.td

[AMDGPU] Disable s_setkill on gfx1250 (#153471)

2025-08-13 23:01:04 -07:00

VIInstrFormats.td

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VINTERPInstructions.td

[AMDGPU][True16][CodeGen] support for true16 for vinterp 16bit instructions (#116702)

2024-12-09 11:52:05 -05:00

VOP1Instructions.td

[AMDGPU] Remove obsolete comments from VOP1Instructions.td. NFC. (#153249)

2025-08-12 14:29:21 -07:00

VOP2Instructions.td

[AMDGPU][MC] In GFX11+ v_pk_fmac_f16 should not allow DPP (#148751)

2025-07-30 13:44:24 -07:00

VOP3Instructions.td

[AMDGPU] Per-subtarget DPP instruction classification (#153096)

2025-08-11 15:41:02 -07:00

VOP3PInstructions.td

[AMDGPU] Add gfx1250 wmma_scale[16]_f32_32x16x128_f4 instructions (#152194)

2025-08-05 15:15:21 -07:00

VOPCInstructions.td

[AMDGPU] VOPD/VOPD3 changes for gfx1250 (#147602)

2025-07-10 14:15:01 -07:00

VOPDInstructions.td

[AMDGPU] VOPD/VOPD3 changes for gfx1250 (#147602)

2025-07-10 14:15:01 -07:00

VOPInstructions.td

[AMDGPU] gfx1250 v_wmma_ld_scale instructions (#152010)

2025-08-04 11:36:48 -07:00