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llvm-project/llvm/test/CodeGen/PowerPC
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zhijian lin 45909ec469
[PowePC] using MTVSRBMI instruction instead of constant pool in power10+ (#144084) 
The instruction MTVSRBMI set 0x00(or 0xFF) to each byte of VSR based on
the bits mask. Using the instruction instead of constant pool can reduce
the asm code size and instructions in power10.
2025-07-04 10:07:03 -04:00
..
GlobalISel
GlobalISel: Replace use of report_fatal_error (#145866)
2025-06-27 21:16:23 +09:00
2004-11-29-ShrCrash.ll
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2004-11-30-shift-crash.ll
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2004-11-30-shr-var-crash.ll
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2004-12-12-ZeroSizeCommon.ll
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2005-01-14-SetSelectCrash.ll
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2005-01-14-UndefLong.ll
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2005-08-12-rlwimi-crash.ll
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2005-09-02-LegalizeDuplicatesCalls.ll
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2005-10-08-ArithmeticRotate.ll
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2005-11-30-vastart-crash.ll
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2006-01-11-darwin-fp-argument.ll
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2006-01-20-ShiftPartsCrash.ll
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2006-04-01-FloatDoubleExtend.ll
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2006-04-05-splat-ish.ll
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2006-04-19-vmaddfp-crash.ll
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2006-05-12-rlwimi-crash.ll
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2006-07-07-ComputeMaskedBits.ll
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2006-07-19-stwbrx-crash.ll
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2006-08-11-RetVector.ll
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2006-08-15-SelectionCrash.ll
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2006-09-28-shift_64.ll
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2006-10-13-Miscompile.ll
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2006-10-17-brcc-miscompile.ll
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2006-10-17-ppc64-alloca.ll
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2006-11-10-DAGCombineMiscompile.ll
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2006-11-29-AltivecFPSplat.ll
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2006-12-07-LargeAlloca.ll
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2006-12-07-SelectCrash.ll
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2007-01-04-ArgExtension.ll
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2007-01-15-AsmDialect.ll
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2007-01-29-lbrx-asm.ll
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2007-01-31-InlineAsmAddrMode.ll
Reland "[PowerPC] Add error for incorrect use of memory operands (#114277)" (#115958)
2024-11-13 22:24:19 -05:00
2007-02-16-AlignPacked.ll
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2007-02-16-InlineAsmNConstraint.ll
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2007-02-23-lr-saved-twice.ll
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2007-03-24-cntlzd.ll
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2007-03-30-SpillerCrash.ll
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2007-04-24-InlineAsm-I-Modifier.ll
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2007-04-30-InlineAsmEarlyClobber.ll
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2007-05-03-InlineAsm-S-Constraint.ll
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2007-05-14-InlineAsmSelectCrash.ll
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2007-05-22-tailmerge-3.ll
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2007-05-30-dagcombine-miscomp.ll
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2007-06-28-BCCISelBug.ll
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2007-08-04-CoalescerAssert.ll
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2007-09-04-AltivecDST.ll
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2007-09-07-LoadStoreIdxForms.ll
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2007-09-08-unaligned.ll
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2007-09-11-RegCoalescerAssert.ll
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2007-09-12-LiveIntervalsAssert.ll
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2007-10-16-InlineAsmFrameOffset.ll
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2007-10-18-PtrArithmetic.ll
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2007-10-21-LocalRegAllocAssert2.ll
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2007-10-21-LocalRegAllocAssert.ll
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2007-11-04-CoalescerCrash.ll
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2007-11-16-landingpad-split.ll
[PowerPC][LLC] Utilize PPC::getNormalizedPPCTargetCPU() to set CPU (#113943)
2024-11-04 09:40:54 -05:00
2007-11-19-VectorSplitting.ll
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2008-02-05-LiveIntervalsAssert.ll
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2008-02-09-LocalRegAllocAssert.ll
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2008-03-05-RegScavengerAssert.ll
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2008-03-17-RegScavengerCrash.ll
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2008-03-18-RegScavengerAssert.ll
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2008-03-24-AddressRegImm.ll
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2008-03-24-CoalescerBug.ll
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2008-03-26-CoalescerBug.ll
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2008-04-10-LiveIntervalCrash.ll
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2008-04-16-CoalescerBug.ll
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2008-04-23-CoalescerCrash.ll
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2008-05-01-ppc_fp128.ll
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2008-06-19-LegalizerCrash.ll
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2008-06-21-F128LoadStore.ll
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2008-06-23-LiveVariablesCrash.ll
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2008-07-10-SplatMiscompile.ll
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2008-07-15-Bswap.ll
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2008-07-15-Fabs.ll
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2008-07-15-SignExtendInreg.ll
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2008-07-17-Fneg.ll
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2008-07-24-PPC64-CCBug.ll
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2008-09-12-CoalescerBug.ll
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2008-10-17-AsmMatchingOperands.ll
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2008-10-28-f128-i32.ll
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2008-10-28-UnprocessedNode.ll
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2008-12-02-LegalizeTypeAssert.ll
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2009-01-16-DeclareISelBug.ll
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2009-03-17-LSRBug.ll
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2009-05-28-LegalizeBRCC.ll
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2009-07-16-InlineAsm-M-Operand.ll
Reland "[PowerPC] Add error for incorrect use of memory operands (#114277)" (#115958)
2024-11-13 22:24:19 -05:00
2009-08-17-inline-asm-addr-mode-breakage.ll
…
2009-09-18-carrybit.ll
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2009-11-15-ProcImpDefsBug.ll
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2009-11-25-ImpDefBug.ll
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2010-02-04-EmptyGlobal.ll
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2010-02-12-saveCR.ll
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2010-03-09-indirect-call.ll
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2010-04-01-MachineCSEBug.ll
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2010-05-03-retaddr1.ll
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2010-10-11-Fast-Varargs.ll
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2010-12-18-PPCStackRefs.ll
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2011-12-05-NoSpillDupCR.ll
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2011-12-06-SpillAndRestoreCR.ll
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2011-12-08-DemandedBitsMiscompile.ll
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2012-09-16-TOC-entry-check.ll
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2012-10-11-dynalloc.ll
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2012-10-12-bitcast.ll
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2012-11-16-mischedcall.ll
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2013-05-15-preinc-fold.ll
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2013-07-01-PHIElimBug.mir
[PHIElimination] Revert #131837 #146320 #146337 (#146850)
2025-07-03 07:48:08 -04:00
2016-01-07-BranchWeightCrash.ll
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2016-04-16-ADD8TLS.ll
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2016-04-17-combine.ll
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2016-04-28-setjmp.ll
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2018-09-19-sextinreg-vector-crash.ll
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a2-fp-basic.ll
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aa-tbaa.ll
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aantidep-def-ec.mir
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aantidep-inline-asm-use.ll
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absol-jump-table-enabled.ll
[LegalizeDAG] Use Base+Offset instead of Offset+Base for jump tables
2025-01-31 14:05:34 -08:00
add_cmp.ll
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add-fi.ll
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addc.ll
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adde_return_type.ll
[PowerPC] Deprecate uses of ISD::ADDC/ISD::ADDE/ISD::SUBC/ISD::SUBE (#133155)
2025-04-03 13:22:49 -04:00
addegluecrash.ll
[PowerPC] Deprecate uses of ISD::ADDC/ISD::ADDE/ISD::SUBC/ISD::SUBE (#133155)
2025-04-03 13:22:49 -04:00
addi-licm.ll
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addi-offset-fold.ll
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addi-reassoc.ll
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addisdtprelha-nonr3.mir
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addrfuncstr.ll
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addrspacecast.ll
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addze.ll
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aggressive-anti-dep-breaker-subreg.ll
PeepholeOpt: Fix looking for def of current copy to coalesce (#125533)
2025-02-05 23:29:02 +07:00
aix32-cc-abi-vaarg-mir.ll
[PowerPC] Split tests into asm and mir parts (NFC)
2025-06-18 12:34:39 +02:00
aix32-cc-abi-vaarg.ll
[PowerPC] Split tests into asm and mir parts (NFC)
2025-06-18 12:34:39 +02:00
aix32-crsave.mir
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aix32-p8-scalar_vector_conversions.ll
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aix32-vector-pair-cc-spills.ll
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aix32-vector-vararg-callee-split.ll
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aix32-vector-vararg-callee.ll
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aix32-vector-vararg-caller-split.ll
[InstrEmitter] Use AddOperand in EmitCopyToRegClassNode. (#146637)
2025-07-02 09:44:54 -07:00
aix32-vector-vararg-fixed-callee.ll
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aix64-cc-abi-vaarg-mir.ll
[PowerPC] Split tests into asm and mir parts (NFC)
2025-06-18 12:34:39 +02:00
aix64-cc-abi-vaarg.ll
[PowerPC] Split tests into asm and mir parts (NFC)
2025-06-18 12:34:39 +02:00
aix64-cc-byval.ll
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aix64-csr-alloc.mir
[PowerPC] Utilize getReservedRegs to find asm clobberable registers. (#107863)
2024-11-04 12:57:26 -05:00
aix64-vector-pair-cc-spills.ll
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aix64-vector-vararg-callee.ll
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aix64-vector-vararg-fixed-callee.ll
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aix64-virtual-call-no-spills.ll
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aix64-xcoff-roptr.ll
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aix_scalar_vector_permuted.ll
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aix-aggressive-merge-const.ll
[GlobalMerge] Aggressively merge constants to reduce TOC entries (#111756)
2024-10-24 10:16:39 -04:00
aix-alias-alignment-2.ll
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aix-alias-alignment-3.ll
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aix-alias-alignment.ll
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aix-alias-unsupported.ll
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aix-alias.ll
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aix-alloca-r31.ll
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aix-AppendingLinkage.ll
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aix-aux-header.ll
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aix-available-externally-linkage-fun.ll
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aix-available-externally-linkage.ll
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aix-base-pointer.ll
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aix-bytestring.ll
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aix-calleesavedregs.ll
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aix-cc-abi-mir.ll
[PowerPC][AIX] Specify pointer info and alignment for stack store (#144526)
2025-06-18 10:50:17 +02:00
aix-cc-abi.ll
[PowerPC][AIX] Specify pointer info and alignment for stack store (#144526)
2025-06-18 10:50:17 +02:00
aix-cc-altivec.ll
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aix-cc-byval-limitation3.ll
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aix-cc-byval-mem.ll
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aix-cc-byval-mir.ll
[PowerPC][AIX] Specify pointer info and alignment for stack store (#144526)
2025-06-18 10:50:17 +02:00
aix-cc-byval-split.ll
[PowerPC] Deprecate uses of ISD::ADDC/ISD::ADDE/ISD::SUBC/ISD::SUBE (#133155)
2025-04-03 13:22:49 -04:00
aix-cc-byval.ll
[PowerPC] Split test into assembly and MIR variants (NFC)
2025-06-17 15:16:24 +02:00
aix-cc-ext-vec-abi.ll
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aix-codemodel-attr.ll
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aix-command-line-metadata.ll
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aix-common.ll
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aix-complex.ll
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aix-constant-align.ll
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aix-cpu-version-multifunction.ll
[PowerPC][AIX] Emit PowerPC version for XCOFF (#113214)
2024-12-10 11:11:50 -05:00
aix-cpu-version.ll
[PowerPC][AIX] Emit PowerPC version for XCOFF (#113214)
2024-12-10 11:11:50 -05:00
aix-crspill.ll
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aix-csr-alloc.mir
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aix-csr-vector-extabi.ll
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aix-csr-vector.ll
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aix-csr.ll
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aix-dfltabi-rsrvd-reg.ll
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aix-dwarf.ll
[PowerPC][LLC] Utilize PPC::getNormalizedPPCTargetCPU() to set CPU (#113943)
2024-11-04 09:40:54 -05:00
aix-ehinfo-sym.ll
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aix-emit-tracebacktable-clobber-register.ll
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aix-emit-tracebacktable-redzone-boundary.mir
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aix-emit-tracebacktable-ssp.ll
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aix-emit-tracebacktable-vectorinfo_hasvarg.ll
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aix-emit-tracebacktable-vectorinfo.ll
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aix-emit-tracebacktable.ll
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aix-exception.ll
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aix-extern-weak.ll
[PowerPC][AIX] Emit PowerPC version for XCOFF (#113214)
2024-12-10 11:11:50 -05:00
aix-extern.ll
[PowerPC][AIX] Emit PowerPC version for XCOFF (#113214)
2024-12-10 11:11:50 -05:00
aix-external-sym-sdnode-lowering.ll
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aix-filename-absolute-path.ll
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aix-filename-c.ll
[PowerPC][AIX] Emit PowerPC version for XCOFF (#113214)
2024-12-10 11:11:50 -05:00
aix-filename-cpp.ll
[PowerPC][AIX] Emit PowerPC version for XCOFF (#113214)
2024-12-10 11:11:50 -05:00
aix-filename-f.ll
[PowerPC][AIX] Emit PowerPC version for XCOFF (#113214)
2024-12-10 11:11:50 -05:00
aix-filename-relative-path.ll
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aix-filename-special-character-double-quotation.ll
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aix-filename-special-character-single-quotation.ll
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aix-fptoint.ll
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aix-framepointer-save-restore.ll
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aix-func-align.ll
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aix-func-dsc-gen.ll
[PowerPC][AIX] Emit PowerPC version for XCOFF (#113214)
2024-12-10 11:11:50 -05:00
aix-ignore-xcoff-visibility.ll
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aix-indirect-call.ll
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aix-inline-asm-clobber-warning.ll
[PowerPC] Utilize getReservedRegs to find asm clobberable registers. (#107863)
2024-11-04 12:57:26 -05:00
aix-inlineasm-reserved-reg-dflt-warn.ll
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aix-insert-extract.ll
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aix-internal.ll
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aix-LinkOnceAnyLinkage.ll
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aix-LinkOnceODRLinkage.ll
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aix-llvm-intrinsic.ll
[PowerPC][AIX] Emit PowerPC version for XCOFF (#113214)
2024-12-10 11:11:50 -05:00
aix-lower-block-address.ll
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aix-lower-constant-pool-index.ll
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aix-lower-jump-table-mir.ll
[LegalizeDAG] Use Base+Offset instead of Offset+Base for jump tables
2025-01-31 14:05:34 -08:00
aix-lower-jump-table.ll
[LegalizeDAG] Use Base+Offset instead of Offset+Base for jump tables
2025-01-31 14:05:34 -08:00
aix-lr.ll
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aix-nest-param.ll
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aix-nonzero-zerofill.ll
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aix-overflow-toc-data.py
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aix-overflow-toc.py
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aix-p8vector-liveins.ll
[MIR] Fix tests for flags in register info (#112179)
2024-10-14 18:28:54 +05:30
aix-p9-insert-extract.ll
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aix-p9-xxinsertw-xxextractuw.ll
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aix-personality-alias.ll
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aix-prefixed-instruction-boundary.mir
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aix-print-pc.mir
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aix-readonly-with-relocation.ll
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aix-reference-func-addr-const.ll
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aix-relativeref.ll
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aix-relro-section.ll
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aix-return55.ll
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aix-rodata-align.ll
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aix-shared-lib-tls-model-opt-small-local-dynamic-tls.ll
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aix-shared-lib-tls-model-opt.ll
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aix-small-local-dynamic-tls-largeaccess.ll
[MC] Simplify MCBinaryExpr/MCUnaryExpr printing by reducing parentheses (#133674)
2025-03-30 22:03:14 -07:00
aix-small-local-dynamic-tls-types.ll
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aix-small-local-exec-tls-char.ll
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aix-small-local-exec-tls-double.ll
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aix-small-local-exec-tls-float.ll
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aix-small-local-exec-tls-int.ll
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aix-small-local-exec-tls-largeaccess2.ll
[MC] Simplify MCBinaryExpr/MCUnaryExpr printing by reducing parentheses (#133674)
2025-03-30 22:03:14 -07:00
aix-small-local-exec-tls-largeaccess.ll
[MC] Simplify MCBinaryExpr/MCUnaryExpr printing by reducing parentheses (#133674)
2025-03-30 22:03:14 -07:00
aix-small-local-exec-tls-longlong.ll
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aix-small-local-exec-tls-short.ll
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aix-small-tls-globalvarattr-funcattr.ll
[MC] Simplify MCBinaryExpr/MCUnaryExpr printing by reducing parentheses (#133674)
2025-03-30 22:03:14 -07:00
aix-small-tls-globalvarattr-loadaddr.ll
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aix-small-tls-globalvarattr-targetattr.ll
[MC] Simplify MCBinaryExpr/MCUnaryExpr printing by reducing parentheses (#133674)
2025-03-30 22:03:14 -07:00
aix-space.ll
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aix-spills-for-eh.ll
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aix-sret-param.ll
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aix-static-init-default-priority.ll
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aix-static-init-key-object.ll
AsmPrinter: Do not use report_fatal_error for AIX XXStructor error (#145273)
2025-06-23 16:25:53 +09:00
aix-static-init-no-unique-module-id.ll
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aix-static-init-non-default-priority.ll
[PowerPC][LLC] Utilize PPC::getNormalizedPPCTargetCPU() to set CPU (#113943)
2024-11-04 09:40:54 -05:00
aix-text-ref.ll
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aix-text.ll
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aix-tls-gd-double.ll
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aix-tls-gd-int.ll
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aix-tls-gd-longlong.ll
[PowerPC] Deprecate uses of ISD::ADDC/ISD::ADDE/ISD::SUBC/ISD::SUBE (#133155)
2025-04-03 13:22:49 -04:00
aix-tls-gd-target-flags.ll
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aix-tls-ie-ldst.ll
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aix-tls-ie-xcoff-reloc.ll
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aix-tls-ld-xcoff-reloc-large.ll
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aix-tls-le-ldst-double.ll
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aix-tls-le-ldst-float.ll
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aix-tls-le-ldst-int.ll
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aix-tls-le-ldst-longlong.ll
[PowerPC] Deprecate uses of ISD::ADDC/ISD::ADDE/ISD::SUBC/ISD::SUBE (#133155)
2025-04-03 13:22:49 -04:00
aix-tls-le-ldst-O0.ll
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aix-tls-le-xcoff-reloc32.ll
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aix-tls-le-xcoff-reloc-large32.ll
[PowerPC] Deprecate uses of ISD::ADDC/ISD::ADDE/ISD::SUBC/ISD::SUBE (#133155)
2025-04-03 13:22:49 -04:00
aix-tls-le-xcoff-reloc-large.ll
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aix-tls-le-xcoff-reloc.ll
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aix-tls-local-dynamic.ll
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aix-tls-variables-ppc32.ll
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aix-tls-variables-ppc64.ll
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aix-tls-xcoff-reloc-large.ll
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aix-tls-xcoff-reloc.ll
…
aix-tls-xcoff-variables.ll
[PowerPC][AIX] Emit PowerPC version for XCOFF (#113214)
2024-12-10 11:11:50 -05:00
aix-tocdata-fastisel.ll
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aix-tracetable-csr.ll
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aix-trampoline.ll
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aix-undef-func-call.ll
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aix-user-defined-memcpy.ll
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aix-vec_extract_p9_2.ll
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aix-vec_extract_p9.ll
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aix-vec_insert_elt.ll
Revert "Reland "RegisterCoalescer: Add implicit-def of super register when coalescing SUBREG_TO_REG" (#123632)"
2025-01-22 10:11:32 +00:00
aix-vec-arg-spills-callee.ll
…
aix-vec-arg-spills-mir.ll
[PowerPC][AIX] Specify pointer info and alignment for stack store (#144526)
2025-06-18 10:50:17 +02:00
aix-vec-arg-spills.ll
[PowerPC][AIX] Specify pointer info and alignment for stack store (#144526)
2025-06-18 10:50:17 +02:00
aix-vector-byval-callee.ll
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aix-vector-byval.ll
…
aix-vector-stack-caller.ll
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aix-vector-stack.ll
…
aix-vector-vararg-caller.ll
[PowerPC][AIX] Specify pointer info and alignment for stack store (#144526)
2025-06-18 10:50:17 +02:00
aix-vector-vararg-fixed-caller.ll
[PowerPC][AIX] Specify pointer info and alignment for stack store (#144526)
2025-06-18 10:50:17 +02:00
aix-vsx-splatimm.ll
…
aix-weak-reloc.ll
[PowerPC][LLC] Utilize PPC::getNormalizedPPCTargetCPU() to set CPU (#113943)
2024-11-04 09:40:54 -05:00
aix-weak-undef-func-call.ll
…
aix-weak.ll
[PowerPC][AIX] Emit PowerPC version for XCOFF (#113214)
2024-12-10 11:11:50 -05:00
aix-WeakODRLinkage.ll
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aix-xcoff-cold.ll
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aix-xcoff-data-only-notoc.ll
…
aix-xcoff-data-sections.ll
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aix-xcoff-data.ll
[PowerPC][AIX] Emit PowerPC version for XCOFF (#113214)
2024-12-10 11:11:50 -05:00
aix-xcoff-endian-error.ll
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aix-xcoff-error-explicit-data-section.ll
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aix-xcoff-exception-section-debug.ll
[PowerPC][LLC] Utilize PPC::getNormalizedPPCTargetCPU() to set CPU (#113943)
2024-11-04 09:40:54 -05:00
aix-xcoff-exception-section.ll
[PowerPC][LLC] Utilize PPC::getNormalizedPPCTargetCPU() to set CPU (#113943)
2024-11-04 09:40:54 -05:00
aix-xcoff-explicit-section.ll
…
aix-xcoff-externL.ll
…
aix-xcoff-funcsect-explicitsect.ll
…
aix-xcoff-funcsect.ll
…
aix-xcoff-huge-relocs.ll
…
aix-xcoff-lcomm.ll
…
aix-xcoff-lower-comm.ll
…
aix-xcoff-mergeable-const.ll
Enable aggressive constant merge in GlobalMerge for AIX (#113956)
2024-10-31 11:22:48 -04:00
aix-xcoff-mergeable-str.ll
[PPC] Remove missed cases of ppc-merge-string-pool (#117626)
2024-12-03 13:31:26 -05:00
aix-xcoff-reloc-large.ll
…
aix-xcoff-reloc-symb.mir
…
aix-xcoff-reloc.ll
[PowerPC][AIX] Emit PowerPC version for XCOFF (#113214)
2024-12-10 11:11:50 -05:00
aix-xcoff-rodata.ll
[PPC] Remove missed cases of ppc-merge-string-pool (#117626)
2024-12-03 13:31:26 -05:00
aix-xcoff-roptr.ll
…
aix-xcoff-symbol-rename.ll
…
aix-xcoff-textdisassembly.ll
…
aix-xcoff-tls-rename.ll
…
aix-xcoff-toc.ll
…
aix-xcoff-used-with-stringpool.ll
[PPC] Remove missed cases of ppc-merge-string-pool (#117626)
2024-12-03 13:31:26 -05:00
aix-xcoff-used.ll
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aix-xcoff-visibility.ll
[PowerPC][LLC] Utilize PPC::getNormalizedPPCTargetCPU() to set CPU (#113943)
2024-11-04 09:40:54 -05:00
alias.ll
…
align.ll
…
alignlongjumptest.mir
…
all-atomics.ll
[PowerPC] eliminate RLWINM instruction following LBARX as possible (#144089)
2025-06-25 09:26:40 -04:00
alloca-crspill.ll
[llvm] Mark scavenging spill-slots as *spilled* stack objects. (#122673)
2025-01-14 10:18:31 +02:00
alloca-oversized.ll
[PowerPC][LLC] Utilize PPC::getNormalizedPPCTargetCPU() to set CPU (#113943)
2024-11-04 09:40:54 -05:00
allocate-r0.ll
…
altivec-ord.ll
…
and_add.ll
…
and_sext.ll
…
and_sra.ll
…
and-branch.ll
…
and-elim.ll
…
and-extend-combine.ll
…
and-imm.ll
…
and-mask.ll
…
andc.ll
…
anon_aggr.ll
…
anyext_srl.ll
[PowerPC] anyext_srl.ll - regenerate checks
2025-07-04 12:18:14 +01:00
arg_promotion.ll
…
arr-fp-arg-no-copy.ll
…
ashr-neg1.ll
…
asm-constraints.ll
…
asm-dialect.ll
…
asm-printer-topological-order.ll
Introduce MCAsmInfo::UsesSetToEquateSymbol and prefer = to .set
2025-06-11 22:19:31 -07:00
asm-template-I.ll
…
asm-Zy.ll
…
asym-regclass-copy.ll
…
atomic-1.ll
…
atomic-2.ll
[PowerPC] enable AtomicExpandImpl::expandAtomicCmpXchg for powerpc (#142395)
2025-06-13 09:14:48 -04:00
atomic-compare-exchange-weak.ll
[PowerPC] enable AtomicExpandImpl::expandAtomicCmpXchg for powerpc (#142395)
2025-06-13 09:14:48 -04:00
atomic-float.ll
[PowerPC] enable AtomicExpandImpl::expandAtomicCmpXchg for powerpc (#142395)
2025-06-13 09:14:48 -04:00
atomic-minmax.ll
…
atomicrmw-cond-sub-clamp.ll
[PowerPC] enable AtomicExpandImpl::expandAtomicCmpXchg for powerpc (#142395)
2025-06-13 09:14:48 -04:00
atomicrmw-uinc-udec-wrap.ll
[PowerPC] enable AtomicExpandImpl::expandAtomicCmpXchg for powerpc (#142395)
2025-06-13 09:14:48 -04:00
Atomics-64.ll
…
atomics-constant.ll
…
atomics-fences.ll
…
atomics-i8-ldst.ll
…
atomics-i16-ldst.ll
…
atomics-i32-ldst.ll
…
atomics-i64-ldst.ll
…
atomics-i128-ldst.ll
…
atomics-i128.ll
…
atomics-indexed.ll
[PowerPC][LLC] Utilize PPC::getNormalizedPPCTargetCPU() to set CPU (#113943)
2024-11-04 09:40:54 -05:00
atomics-regression.ll
[PowerPC] eliminate RLWINM instruction following LBARX as possible (#144089)
2025-06-25 09:26:40 -04:00
atomics.ll
[PowerPC] enable AtomicExpandImpl::expandAtomicCmpXchg for powerpc (#142395)
2025-06-13 09:14:48 -04:00
available-externally.ll
…
basic-toc-data-def.ll
…
basic-toc-data-extern.ll
…
basic-toc-data-local-linkage.ll
…
basic-toc-data-private-linkage.ll
…
bcd-intrinsics.ll
…
bdzlr.ll
…
bfloat16-outer-product.ll
PowerPC: Use REG_SEQUENCE instead of INSERT_SUBREG (#129941)
2025-03-18 13:41:24 -04:00
big-endian-actual-args.ll
…
big-endian-call-result.ll
…
big-endian-formal-args.ll
…
big-endian-store-forward.ll
CodeGen/test: improve a test, regen with UTC (#113338)
2024-11-04 11:29:25 +00:00
bitcast-peephole.mir
[CodeGen][NewPM] Port PeepholeOptimizer to NPM (#116326)
2024-11-18 11:02:01 +05:30
bitcasts-direct-move.ll
…
bitfieldinsert.ll
…
block-placement-1.mir
…
block-placement.mir
…
blockaddress.ll
…
bool-math.ll
…
BoolRetToIntTest-2.ll
…
BoolRetToIntTest.ll
…
botheightreduce.mir
…
bperm.ll
…
branch_coalesce.ll
…
branch_coalescing.mir
…
branch_selector.ll
…
branch-hint.ll
…
branch-on-store-cond.ll
…
branch-opt.ll
…
brcond.ll
…
BreakableToken-reduced.ll
…
bswap64.ll
…
bswap-load-store.ll
…
build-vector-allones.ll
…
build-vector-from-load-and-zeros.ll
[PowerPC] special case small int constant for custom scalar_to_vector (#109850)
2024-10-21 12:19:07 -04:00
build-vector-tests.ll
[PowerPC] extend smaller splats into bigger splats (with fix) (#142194)
2025-06-09 14:01:38 -04:00
build-vector-to-ld-chain.ll
…
buildvec_canonicalize.ll
…
builtins-bcd-assist.ll
…
builtins-bcd-transform.ll
[PowerPC] Support for Packed BCD conversion builtins (#142723)
2025-06-25 14:47:38 +05:30
builtins-ppc-bcd-assist.ll
…
builtins-ppc-elf2-abi.ll
…
builtins-ppc-p8vector.ll
…
builtins-ppc-p9-darn.ll
…
builtins-ppc-p9-f128.ll
…
builtins-ppc-p10permute.ll
…
builtins-ppc-p10vsx.ll
…
builtins-ppc-xlcompat-check-ldarx-opt.ll
…
builtins-ppc-xlcompat-cmpb-32.ll
…
builtins-ppc-xlcompat-cmpb-64.ll
…
builtins-ppc-xlcompat-compare-64bit-only.ll
…
builtins-ppc-xlcompat-compare.ll
…
builtins-ppc-xlcompat-conversionfunc.ll
…
builtins-ppc-xlcompat-fnabs.ll
…
builtins-ppc-xlcompat-fp.ll
…
builtins-ppc-xlcompat-load-store-reversed-64bit-only.ll
…
builtins-ppc-xlcompat-load-store-reversed.ll
…
builtins-ppc-xlcompat-LoadReserve-StoreCond-64bit-only.ll
…
builtins-ppc-xlcompat-LoadReserve-StoreCond.ll
…
builtins-ppc-xlcompat-math.ll
[PowerPC][LLC] Utilize PPC::getNormalizedPPCTargetCPU() to set CPU (#113943)
2024-11-04 09:40:54 -05:00
builtins-ppc-xlcompat-maxmin.ll
…
builtins-ppc-xlcompat-mfspr-mtspr-64bit-only.ll
…
builtins-ppc-xlcompat-mfspr-mtspr-aix32.ll
…
builtins-ppc-xlcompat-move-tofrom-regs.ll
…
builtins-ppc-xlcompat-msync.ll
…
builtins-ppc-xlcompat-multiply-64bit-only.ll
…
builtins-ppc-xlcompat-multiply.ll
…
builtins-ppc-xlcompat-popcnt.ll
…
builtins-ppc-xlcompat-prefetch.ll
…
builtins-ppc-xlcompat-pwr9-64bit.ll
…
builtins-ppc-xlcompat-pwr9.ll
…
builtins-ppc-xlcompat-stfiw.ll
…
builtins-ppc-xlcompat-sync-32.ll
…
builtins-ppc-xlcompat-sync-64.ll
…
builtins-ppc-xlcompat-test.ll
…
builtins-ppc-xlcompat-trap-64bit-only.ll
…
builtins-ppc-xlcompat-trap-annotations-td.ll
…
builtins-ppc-xlcompat-trap-annotations-tw.ll
…
builtins-ppc-xlcompat-trap.ll
…
bv-pres-v8i1.ll
…
bv-widen-undef.ll
…
byval-agg-info.ll
…
byval-aliased.ll
…
byval-lhs.ll
…
byval.ll
…
callbr-asm-outputs-indirect-isel.ll
[ARM,AArch64] Don't put BTI at asm goto branch targets (#141562)
2025-06-03 08:44:13 +01:00
calls.ll
…
can-lower-ret.ll
…
cannonicalize-vector-shifts.ll
…
canonical-merge-shuffles.ll
Revert "Reland "RegisterCoalescer: Add implicit-def of super register when coalescing SUBREG_TO_REG" (#123632)"
2025-01-22 10:11:32 +00:00
carry-liveness-after-expand-isel.ll
[PowerPC] Deprecate uses of ISD::ADDC/ISD::ADDE/ISD::SUBC/ISD::SUBE (#133155)
2025-04-03 13:22:49 -04:00
cc.ll
…
cfence-double.ll
…
cfence-float.ll
…
cfence-i128.ll
…
cgp-select.ll
…
change-no-infs.ll
…
check-aix-shared-lib-tls-model-opt-IRattribute.ll
…
check-aix-shared-lib-tls-model-opt-Option.ll
…
check-aix-small-local-exec-tls-opt-IRattribute.ll
…
check-aix-small-local-exec-tls-opt.ll
…
check-cpu.ll
MCAsmStreamer: Omit initial ".text"
2024-12-22 22:03:44 -08:00
cmp_elimination.ll
…
cmp-cmp.ll
…
cmpb-ppc32.ll
…
cmpb.ll
…
coalesce-ext.ll
…
code-align.ll
…
codemodel.ll
…
coldcc2.ll
…
coldcc.ll
…
collapse-rotates.mir
…
combine_ext_trunc.ll
…
combine-fneg.ll
Revert "Reland "RegisterCoalescer: Add implicit-def of super register when coalescing SUBREG_TO_REG" (#123632)"
2025-01-22 10:11:32 +00:00
combine-setcc.ll
…
combine-sext-and-shl-after-isel.ll
…
combine-to-mulh-shift-amount.ll
…
combine-to-pre-index-store-crash.ll
…
common-chain-aix32.ll
…
common-chain.ll
…
compare-duplicate.ll
…
compare-simm.ll
…
CompareEliminationSpillIssue.ll
…
complex-return.ll
…
compute-regpressure.ll
…
const-nonsplat-array-init.ll
[PowerPC] Add SDNPMemOperand to some nodes (#115580)
2024-11-15 20:36:56 +03:00
const-splat-array-init.ll
[PowerPC] Add SDNPMemOperand to some nodes (#115580)
2024-11-15 20:36:56 +03:00
const-stov.ll
[PowerPC] special case small int constant for custom scalar_to_vector (#109850)
2024-10-21 12:19:07 -04:00
constant-combines.ll
…
constant-pool.ll
…
constants-i64.ll
…
constants.ll
…
convert-ri-addi-to-ri.mir
…
convert-rr-to-ri-instr-add.mir
…
convert-rr-to-ri-instrs-kill-flag.mir
…
convert-rr-to-ri-instrs-out-of-range.mir
Promote 32bit pseudo instr that infer extsw removal to 64bit in PPCMIPeephole (#85451)
2024-10-31 15:49:36 -04:00
convert-rr-to-ri-instrs-R0-special-handling.mir
…
convert-rr-to-ri-instrs.mir
Promote 32bit pseudo instr that infer extsw removal to 64bit in PPCMIPeephole (#85451)
2024-10-31 15:49:36 -04:00
convert-rr-to-ri-p9-vector.mir
…
copysignl.ll
[PowerPC] copysignl.ll - regenerate to reduce the diff in #111269
2024-10-29 10:57:43 +00:00
cpu-supports.ll
…
cr1eq-no-extra-moves.ll
…
cr1eq.ll
…
cr_spilling.ll
…
cr-spills.ll
…
crash.ll
…
crbit-asm-disabled.ll
…
crbit-asm.ll
…
crbits.ll
…
crreduce-reg.mir
[PowerPC] Fix ppc-reduce-cr-ops mishandling of subregister uses (#144405)
2025-07-02 15:28:44 -04:00
crsave.ll
…
crypto_bifs_be.ll
…
crypto_bifs.ll
…
cse-despite-rounding-mode.ll
…
CSR-fit.ll
…
csr-save-restore-order.ll
…
csr-split.ll
…
ctr-cleanup.ll
…
ctr-loop-tls-const.ll
…
ctr-minmaxnum.ll
…
ctrloop-asm.ll
…
ctrloop-constrained-fp.ll
Emit constrained atan2 intrinsic for clang builtin (#113636)
2024-11-12 13:34:29 -08:00
ctrloop-cpsgn.ll
…
ctrloop-do-not-duplicate-mi.mir
[win] NFC: Rename EHCatchret to EHCont to allow for EH Continuation targets that aren't catchret instructions (#129953)
2025-03-06 09:28:44 -08:00
ctrloop-fp64.ll
…
ctrloop-fp128.ll
[PPC] Replace PPCMergeStringPool with GlobalMerge for Linux (#114850)
2024-11-12 14:02:01 -05:00
ctrloop-i64.ll
…
ctrloop-i128.ll
…
ctrloop-intrin.ll
…
ctrloop-large-ec.ll
…
ctrloop-le.ll
…
ctrloop-lt.ll
…
ctrloop-ne.ll
…
ctrloop-reg.ll
…
ctrloop-s000.ll
…
ctrloop-sh.ll
…
ctrloop-shortLoops.ll
…
ctrloop-sums.ll
…
ctrloop-udivti3.ll
…
ctrloops32.mir
…
ctrloops64.mir
…
ctrloops-hot-exit.ll
…
ctrloops-pseudo.ll
…
ctrloops-softfloat.ll
…
ctrloops.ll
…
cttz.ll
…
custom-stov.ll
…
cvt_i64_to_fp.ll
[PowerPC] Deprecate uses of ISD::ADDC/ISD::ADDE/ISD::SUBC/ISD::SUBE (#133155)
2025-04-03 13:22:49 -04:00
cxx_tlscc64.ll
…
darwin-labels.ll
…
data-align.ll
Introduce MCAsmInfo::UsesSetToEquateSymbol and prefer = to .set
2025-06-11 22:19:31 -07:00
dbg.ll
…
DbgValueOtherTargets.test
…
dcbf-p10.ll
…
dcbf.ll
…
dcbt-sched.ll
…
dcbt.ll
…
debug-label-fast-isel.ll
…
debuginfo-split-int.ll
…
debuginfo-stackarg.ll
…
delete-node.ll
…
dform-adjust.ll
…
dform-pair-load-store.ll
…
direct-move-profit.ll
…
disable-ctr-ppcf128.ll
[PHIElimination] Revert #131837 #146320 #146337 (#146850)
2025-07-03 07:48:08 -04:00
DisableHoistingDueToBlockHotnessNoProfileData.mir
…
DisableHoistingDueToBlockHotnessProfileData.mir
…
div-2.ll
…
div-e-32.ll
…
div-e-all.ll
…
dmf-outer-product.ll
[PowerPC] Add dense math half-precision floating-point outer-product accumulate to DMR instructions (#133272)
2025-04-28 16:03:10 -04:00
dmr-enable.ll
[PowerPC] Intrinsics and tests for dmr insert/extract (#135653)
2025-04-24 11:27:22 -04:00
dmr-spill.ll
[PowerPC] Add code to spill and restore DMRp registers (#142443)
2025-06-18 13:50:57 -04:00
dmrp-spill.ll
[PowerPC] Add code to spill and restore DMRp registers (#142443)
2025-06-18 13:50:57 -04:00
dscr-set.ll
…
dsolocal-pic.ll
…
dsolocal-static.ll
…
dssall.ll
…
duplicate-returns-for-tailcall.ll
…
dyn-alloca-aligned.ll
…
dyn-alloca-offset.ll
…
e500-1.ll
…
early-ifcvt-no-isel.mir
[CodeGen][NewPM] Port EarlyIfConversion pass to NPM. (#108508)
2024-10-16 13:22:57 +05:30
early-ret2.ll
…
early-ret-verify.mir
…
early-ret.ll
…
early-ret.mir
…
ec-input.ll
…
eh-dwarf-cfa.ll
…
eieio.ll
…
elf64-byval-cc.ll
…
elf-common.ll
…
eliminate-compare-of-copy.ll
…
empty-functions.ll
…
emptystruct.ll
…
emutls_generic.ll
…
eqv-andc-orc-nor.ll
…
exp10-libcall.ll
…
expand-contiguous-isel.ll
Fix typo "redudant"
2025-05-22 15:42:22 +01:00
expand-foldable-isel.ll
…
expand-isel-to-branch.ll
…
expand-isel.ll
…
ext-bool-trunc-repl.ll
…
extra-toc-reg-deps.ll
…
extract-and-store.ll
[PowerPC] Add SDNPMemOperand to some nodes (#115580)
2024-11-15 20:36:56 +03:00
extsh.ll
…
extswsli.ll
…
f32-to-i64.ll
…
f128_ldst.ll
…
f128-aggregates.ll
…
f128-arith.ll
PowerPC: Fix using long double libm functions for f128 intrinsics (#144382)
2025-06-18 13:26:15 +09:00
f128-bitcast.ll
…
f128-branch-cond.ll
…
f128-compare.ll
…
f128-conv.ll
[PowerPC] Support conversion between f16 and f128 (#130158)
2025-03-19 10:19:57 -04:00
f128-fma.ll
[PowerPC] Add SDNPMemOperand to some nodes (#115580)
2024-11-15 20:36:56 +03:00
f128-passByValue.ll
[PowerPC] Add SDNPMemOperand to some nodes (#115580)
2024-11-15 20:36:56 +03:00
f128-rounding.ll
…
f128-truncateNconv.ll
…
f128-vecExtractNconv.ll
…
fabs.ll
…
fast-isel-binary.ll
…
fast-isel-br-const.ll
…
fast-isel-branch.ll
…
fast-isel-call.ll
…
fast-isel-cmp-imm.ll
…
fast-isel-const.ll
…
fast-isel-conversion-p5.ll
…
fast-isel-conversion.ll
…
fast-isel-crash.ll
…
fast-isel-ext.ll
…
fast-isel-fcmp-nan.ll
…
fast-isel-fold.ll
…
fast-isel-fpconv.ll
…
fast-isel-GEP-coalesce.ll
…
fast-isel-i64offset.ll
…
fast-isel-icmp-split.ll
…
fast-isel-indirectbr.ll
…
fast-isel-load-store-vsx.ll
…
fast-isel-load-store.ll
…
fast-isel-pcrel.ll
…
fast-isel-redefinition.ll
…
fast-isel-ret.ll
…
fast-isel-rsp.ll
…
fast-isel-shifter.ll
…
fastcc_stacksize.ll
…
fastisel-gep-promote-before-add.ll
…
fcpsgn.ll
…
fdiv-combine.ll
…
fdiv.ll
…
fence.ll
…
fixup-kill-dead-flag-crash.mir
…
float-asmprint.ll
…
float-load-store-pair.ll
…
float-logic-ops.ll
…
float-to-int.ll
…
float-vector-gather.ll
…
floatPSA.ll
…
flt-preinc.ll
…
fma-aggr-FMF.ll
…
fma-assoc.ll
[PowerPC][LLC] Utilize PPC::getNormalizedPPCTargetCPU() to set CPU (#113943)
2024-11-04 09:40:54 -05:00
fma-combine.ll
[DAGCombiner] Remove UnsafeFPMath usage in visitFSUBForFMACombine etc. (#145637)
2025-06-30 08:41:23 +08:00
fma-ext.ll
…
fma-mutate-duplicate-vreg.ll
…
fma-mutate-register-constraint.ll
…
fma-mutate.ll
…
fma-negate.ll
…
fma-precision.ll
…
fma.ll
…
fmaxnum.ll
…
fmf-propagation.ll
[SelectionDAG] Remove UnsafeFPMath check in visitFADDForFMACombine (#127770)
2025-06-25 12:31:23 +08:00
fminimum-fmaximum-f128.ll
Revert "[SDAG] Fix fmaximum legalization errors (#142170)"
2025-06-04 14:35:30 +02:00
fminimum-fmaximum.ll
Revert "[SDAG] Fix fmaximum legalization errors (#142170)"
2025-06-04 14:35:30 +02:00
fminnum.ll
…
fnabs.ll
…
fneg.ll
…
fold_swtest_br.ll
…
fold-frame-offset-using-rr.mir
…
fold-li.ll
…
fold-remove-li.ll
…
fold-rlwinm-1.ll
…
fold-rlwinm.mir
…
fold-rot-and-peephole.mir
…
fold-zero.ll
…
fp2int2fp-ppcfp128.ll
…
fp64-to-int16.ll
…
fp128-bitcast-after-operation.ll
…
fp128-libcalls.ll
[PowerPC] Support conversion between f16 and f128 (#130158)
2025-03-19 10:19:57 -04:00
fp_to_uint.ll
…
fp-branch.ll
…
fp-classify.ll
…
fp-int128-fp-combine.ll
…
fp-int-conversions-direct-moves.ll
…
fp-int-fp.ll
…
fp-intrinsics-fptosi-legal.ll
…
fp-splat.ll
…
fp-strict-conv-f128.ll
…
fp-strict-conv-spe.ll
…
fp-strict-conv.ll
…
fp-strict-f128.ll
…
fp-strict-fcmp-noopt.ll
…
fp-strict-fcmp-spe.ll
…
fp-strict-fcmp.ll
…
fp-strict-minmax.ll
…
fp-strict-round.ll
Revert "Reland "RegisterCoalescer: Add implicit-def of super register when coalescing SUBREG_TO_REG" (#123632)"
2025-01-22 10:11:32 +00:00
fp-strict.ll
…
fp-to-int-ext.ll
…
fp-to-int-to-fp.ll
…
fpcopy.ll
…
fpscr-intrinsics.ll
…
fptoui-be-crash.ll
[PowerPC][LLC] Utilize PPC::getNormalizedPPCTargetCPU() to set CPU (#113943)
2024-11-04 09:40:54 -05:00
frame_index_scavenging.mir
…
frame-size.ll
…
frameaddr-alloca.ll
…
frameaddr.ll
…
frameindex-negative-offset.ll
[PPC] Use getSignedConstant() for frame index offset
2024-11-28 10:49:45 +01:00
Frames-dyn-alloca-with-func-call.ll
…
Frames-dyn-alloca.ll
[PowerPC][LLC] Utilize PPC::getNormalizedPPCTargetCPU() to set CPU (#113943)
2024-11-04 09:40:54 -05:00
Frames-large.ll
[PowerPC][LLC] Utilize PPC::getNormalizedPPCTargetCPU() to set CPU (#113943)
2024-11-04 09:40:54 -05:00
Frames-leaf.ll
…
Frames-small.ll
…
Frames-stack-floor.ll
…
frem.ll
Revert "Reland "RegisterCoalescer: Add implicit-def of super register when coalescing SUBREG_TO_REG" (#123632)"
2025-01-22 10:11:32 +00:00
frounds.ll
[PowerPC][LLC] Utilize PPC::getNormalizedPPCTargetCPU() to set CPU (#113943)
2024-11-04 09:40:54 -05:00
fsel.ll
…
fsl-e500mc.ll
…
fsl-e5500.ll
…
fsqrt.ll
…
fsub-fneg.ll
…
ftrunc-legalize.ll
[PowerPC][LLC] Utilize PPC::getNormalizedPPCTargetCPU() to set CPU (#113943)
2024-11-04 09:40:54 -05:00
ftrunc-vec.ll
…
func-addr-consts.ll
…
func-addr.ll
…
func-alias.ll
…
funnel-shift-rot.ll
…
funnel-shift.ll
…
fusion-load-store.ll
…
future-check-features.ll
…
gcov_ctr_ref_init.ll
[NFC][Test] Fix PowerPC test gcov_ctr_ref_init.ll (#117577)
2024-11-26 12:09:49 -05:00
git_revision.ll
…
glob-comp-aa-crash.ll
…
global-address-non-got-indirect-access.ll
…
global-merge-aix-sections.ll
[PPC codegen test] NFC: Fix RUN line; fix DATA checks to match 64-bit
2025-03-15 21:20:22 -04:00
global-merge-aix-zero-size-struct.ll
[AIX][AsmPrinter] Fix unsigned subtraction wrap-around (#122214)
2025-01-09 00:07:57 -04:00
global-merge-llvm-metadata.ll
[GlobalMerge][PPC] Don't merge globals in llvm.metadata section (#131801)
2025-04-02 10:40:53 +02:00
gnu-attribute.ll
…
gpr-vsr-spill.ll
…
handle-f16-storage-type.ll
[CodeGen] Use __extendhfsf2 and __truncsfhf2 by default (#126880)
2025-02-19 10:16:57 +01:00
hardware-loops-crash.ll
…
hello.ll
…
hidden-vis-2.ll
…
hidden-vis.ll
…
hoist-logic.ll
[PowerPC][LLC] Utilize PPC::getNormalizedPPCTargetCPU() to set CPU (#113943)
2024-11-04 09:40:54 -05:00
htm-ttest.ll
…
htm.ll
…
huge-frame-call.ll
[PowerPC][LLC] Utilize PPC::getNormalizedPPCTargetCPU() to set CPU (#113943)
2024-11-04 09:40:54 -05:00
huge-frame-size.ll
…
huge-frame-unsupported.ll
…
i1-ext-fold.ll
…
i1-to-double.ll
…
i32-to-float.ll
…
i64_fp_round.ll
…
i64_fp.ll
…
i64-to-float.ll
…
i128-and-beyond.ll
…
ia-mem-r0.ll
…
ia-neg-const.ll
…
iabs.ll
…
idiv_large.ll
…
ifcvt_cr_field.ll
…
ifcvt-diamond-ret.mir
…
ifcvt-forked-bug-2016-08-08.ll
…
ifcvt.ll
…
ifcvt.mir
…
ifunc.ll
…
illegal-element-type.ll
…
in-asm-f64-reg.ll
…
inc-of-add.ll
[PowerPC] Deprecate uses of ISD::ADDC/ISD::ADDE/ISD::SUBC/ISD::SUBE (#133155)
2025-04-03 13:22:49 -04:00
indexed-load.ll
…
indirect-hidden.ll
…
indirectbr.ll
…
inline-asm-clobber-warning.ll
[PowerPC] Utilize getReservedRegs to find asm clobberable registers. (#107863)
2024-11-04 12:57:26 -05:00
inline-asm-dollarpc.ll
…
inline-asm-i-constraint-i1.ll
…
inline-asm-label.ll
…
inline-asm-multilevel-gep.ll
…
inline-asm-physical-fpr-spe.ll
…
inline-asm-physical-fpr.ll
…
inline-asm-s-modifier.ll
…
inline-asm-scalar-to-vector-error.ll
…
inline-asm-vsx-clobbers.ll
…
inlineasm-copy.ll
…
inlineasm-extendedmne.ll
…
inlineasm-i64-reg.ll
…
inlineasm-output-template.ll
…
inlineasm-vsx-reg.ll
…
instr-properties.ll
…
instruction-mix-remarks-BCTRL_LWZinto_toc.ll
…
int128_ldst.ll
…
int-fp-conv-0.ll
…
int-fp-conv-1.ll
…
intrinsic-trap.ll
…
inverted-bool-compares.ll
…
is_fpclass.ll
…
isel-rc-nox0.ll
…
isel.ll
…
ispositive.ll
…
issue55983.ll
…
isync.ll
…
itofp128.ll
…
jaggedstructs.ll
…
jump-table.ll
…
jump-tables-collapse-rotate-remove-SrcMI.mir
…
jump-tables-collapse-rotate.ll
[LegalizeDAG] Use Base+Offset instead of Offset+Base for jump tables
2025-01-31 14:05:34 -08:00
kernel-fp-round.ll
…
kill_flag_verification.ll
[PowerPC][LLC] Utilize PPC::getNormalizedPPCTargetCPU() to set CPU (#113943)
2024-11-04 09:40:54 -05:00
knowCRBitSpill.ll
…
LargeAbsoluteAddr.ll
…
larger-than-red-zone.ll
…
lbz-from-ld-shift.ll
…
lbzux.ll
…
ld-bswap64-no-ldbrx.ll
…
ld-st-upd.ll
…
ldexp-libcall.ll
…
ldexp.ll
Revert "Reland "RegisterCoalescer: Add implicit-def of super register when coalescing SUBREG_TO_REG" (#123632)"
2025-01-22 10:11:32 +00:00
ldst-16-byte-asm-aix.mir
…
ldst-16-byte-asm.mir
…
ldst-16-byte.mir
[PowerPC] Utilize getReservedRegs to find asm clobberable registers. (#107863)
2024-11-04 12:57:26 -05:00
ldst-align.ll
…
ldtoc-inv.ll
…
legalize-invert-br_cc.ll
…
legalize-vaarg.ll
[PowerPC][LLC] Utilize PPC::getNormalizedPPCTargetCPU() to set CPU (#113943)
2024-11-04 09:40:54 -05:00
lha.ll
…
licm-remat.ll
[PPC] Replace PPCMergeStringPool with GlobalMerge for Linux (#114850)
2024-11-12 14:02:01 -05:00
licm-tocReg.ll
[PowerPC][LLC] Utilize PPC::getNormalizedPPCTargetCPU() to set CPU (#113943)
2024-11-04 09:40:54 -05:00
licm-xxsplti.ll
[PowerPC] hoist xxspltib out of loop body (#127121)
2025-03-03 11:14:02 -05:00
lit.local.cfg
…
livephysregs.mir
…
livevars-crash1.mir
…
livevars-crash2.mir
…
llc_default_cpu.ll
[PowerPC][LLC] Utilize PPC::getNormalizedPPCTargetCPU() to set CPU (#113943)
2024-11-04 09:40:54 -05:00
llrint-conv.ll
…
llround-conv.ll
…
llvm.frexp.ll
…
llvm.modf.ll
[SDAG][X86] Remove hack needed to avoid missing x87 FPU stack pops (#128055)
2025-03-03 12:23:28 +00:00
llvm.sincos.ll
[SDAG] Add missing ppc_fp128 ExpandFloatRes for sincos[pi] (#128514)
2025-02-25 08:56:16 +00:00
load-and-splat.ll
[PowerPC] special case small int constant for custom scalar_to_vector (#109850)
2024-10-21 12:19:07 -04:00
load-constant-addr.ll
…
load-rightmost-vector-elt.ll
…
load-shift-combine.ll
…
load-shuffle-and-shuffle-store.ll
…
load-two-flts.ll
…
load-v4i8-improved.ll
…
logic-ops-on-compares.ll
…
long-compare.ll
…
longcall.ll
…
longdbl-truncate.ll
…
longdouble-pack.ll
…
loop-align.ll
…
loop-comment.ll
[PowerPC] eliminate RLWINM instruction following LBARX as possible (#144089)
2025-06-25 09:26:40 -04:00
loop-data-prefetch-inner.ll
…
loop-data-prefetch.ll
…
loop-hoist-toc-save.ll
…
loop-instr-form-non-inc.ll
[PowerPC] Pre-commit tests for PR130742. NFC. (#135606)
2025-04-17 17:52:49 +08:00
loop-instr-form-prepare.ll
…
loop-instr-prep-non-const-increasement.ll
…
loop-p10-pair-prepare.ll
…
loop-prep-all.ll
…
lower-globaladdr32-aix-asm.ll
…
lower-globaladdr32-aix.ll
…
lower-globaladdr64-aix-asm.ll
…
lower-globaladdr64-aix.ll
…
lower-intrinsics-afn-mass_notail.ll
[PowerPC][LLC] Utilize PPC::getNormalizedPPCTargetCPU() to set CPU (#113943)
2024-11-04 09:40:54 -05:00
lower-intrinsics-afn-mass.ll
…
lower-intrinsics-fast-mass_notail.ll
[PowerPC][LLC] Utilize PPC::getNormalizedPPCTargetCPU() to set CPU (#113943)
2024-11-04 09:40:54 -05:00
lower-intrinsics-fast-mass.ll
…
lower-intrinsics-nofast-mass.ll
…
lower-massv-attr.ll
…
lower-massv.ll
…
lower-scalar-mass-afn.ll
…
lower-scalar-mass-fast.ll
…
lower-scalar-mass-nofast.ll
…
LQ-STQ-32bit-offset.ll
…
LQ-STQ.ll
…
lrint-conv.ll
…
lround-conv.ll
…
lsa.ll
…
lsr-ctrloop.ll
…
lsr-insns-cost.ll
…
lsr-postinc-pos.ll
Remove -print-lsr-output in favor of --stop-after=loop-reduce
2024-12-29 18:58:30 -08:00
lsr-profitable-chain.ll
…
lxv-aligned-stack-slots.ll
…
lxvw4x-bug.ll
…
machine-backward-cp.mir
…
machine-combiner.ll
…
machine-cse-rm-pre.mir
…
machine-pre.ll
…
machinelicm-cse-dead-flag.mir
…
macro-fusion.ll
…
macro-fusion.mir
…
maddld.ll
…
mask64.ll
…
mature-mc-support.ll
…
mc-instrlat.ll
…
mcm-1.ll
…
mcm-2.ll
…
mcm-3.ll
…
mcm-4.ll
…
mcm-5.ll
PowerPC32:PIC: Update to bcl to fix branch prediction mis-predict issue (#134140)
2025-04-07 15:50:21 -04:00
mcm-6.ll
…
mcm-7.ll
…
mcm-8.ll
…
mcm-9.ll
…
mcm-10.ll
…
mcm-11.ll
…
mcm-12.ll
…
mcm-13.ll
…
mcm-default.ll
…
mcm-obj-2.ll
…
mcm-obj.ll
…
mcount-insertion.ll
…
mcp-elim-eviction-chain.mir
…
MCSE-caller-preserved-reg.ll
Fix typo "redudant"
2025-05-22 15:42:22 +01:00
mem_update.ll
…
mem-rr-addr-mode.ll
…
memcmp-mergeexpand.ll
…
memcmp.ll
[ExpandMemCmp][AArch64][PowerPC][RISCV][X86] Use llvm.ucmp instead of (sub (zext (icmp ugt)), (zext (icmp ult))). (#121530)
2025-01-03 09:19:32 -08:00
memcmpIR.ll
[ExpandMemCmp][AArch64][PowerPC][RISCV][X86] Use llvm.ucmp instead of (sub (zext (icmp ugt)), (zext (icmp ult))). (#121530)
2025-01-03 09:19:32 -08:00
memCmpUsedInZeroEqualityComparison.ll
…
memcpy_dereferenceable.ll
…
memcpy-vec.ll
…
memset-nc-le.ll
…
memset-tail.ll
[PowerPC] hoist xxspltib out of loop body (#127121)
2025-03-03 11:14:02 -05:00
merge_stores_dereferenceable.ll
[PowerPC] Add SDNPMemOperand to some nodes (#115580)
2024-11-15 20:36:56 +03:00
merge-private.ll
[PPC] Replace PPCMergeStringPool with GlobalMerge for Linux (#114850)
2024-11-12 14:02:01 -05:00
merge-st-chain-op.ll
…
mergeable-string-pool-exceptions.ll
[PPC] Remove missed cases of ppc-merge-string-pool (#117626)
2024-12-03 13:31:26 -05:00
mergeable-string-pool-large.ll
[PPC] Replace PPCMergeStringPool with GlobalMerge for Linux (#114850)
2024-11-12 14:02:01 -05:00
mergeable-string-pool-pr92991.ll
[PPC] Replace PPCMergeStringPool with GlobalMerge for Linux (#114850)
2024-11-12 14:02:01 -05:00
mergeable-string-pool-tls.ll
[PPC] Remove missed cases of ppc-merge-string-pool (#117626)
2024-12-03 13:31:26 -05:00
mergeable-string-pool.ll
[PPC] Replace PPCMergeStringPool with GlobalMerge for Linux (#114850)
2024-11-12 14:02:01 -05:00
MergeConsecutiveStores.ll
…
mflr-store.mir
[PowerPC] Utilize getReservedRegs to find asm clobberable registers. (#107863)
2024-11-04 12:57:26 -05:00
mftb.ll
…
mi-peephole-splat.ll
…
mi-peephole.mir
…
mi-peepholes-trap-opt.mir
…
mi-scheduling-lhs.ll
…
mi-simplify-code.mir
…
misched-inorder-latency.ll
…
misched.ll
…
mma-acc-copy-hints.ll
PowerPC: Use REG_SEQUENCE instead of INSERT_SUBREG (#129941)
2025-03-18 13:41:24 -04:00
mma-acc-memops.ll
PowerPC: Use REG_SEQUENCE instead of INSERT_SUBREG (#129941)
2025-03-18 13:41:24 -04:00
mma-acc-spill.ll
PowerPC: Use REG_SEQUENCE instead of INSERT_SUBREG (#129941)
2025-03-18 13:41:24 -04:00
mma-integer-based-outer-product.ll
PowerPC: Use REG_SEQUENCE instead of INSERT_SUBREG (#129941)
2025-03-18 13:41:24 -04:00
mma-intrinsics.ll
PowerPC: Use REG_SEQUENCE instead of INSERT_SUBREG (#129941)
2025-03-18 13:41:24 -04:00
mma-outer-product.ll
PowerPC: Use REG_SEQUENCE instead of INSERT_SUBREG (#129941)
2025-03-18 13:41:24 -04:00
mma-phi-accs.ll
…
mmaplus-acc-spill.ll
[PowerPC] Change default for auto gen stxvp for cpu=future (#142826)
2025-06-09 12:34:50 -04:00
mmaplus-crypto.ll
[PowerPC] Add load/store support for v2048i1 and DMF cryptography instructions (#136145)
2025-05-26 10:59:35 -04:00
mmaplus-intrinsics.ll
[PowerPC] Update DMF VSX ACC data transfer instructions (#138897)
2025-05-26 12:47:12 -04:00
MMO-flags-assertion.ll
…
more-dq-form-prepare.ll
…
mtvsrbmi.ll
[PowePC] using MTVSRBMI instruction instead of constant pool in power10+ (#144084)
2025-07-04 10:07:03 -04:00
mtvsrc-mfvscr-PPCVSXSwapRemoval.ll
…
mtvsrdd.ll
…
mul-const-i64.ll
…
mul-const-vector.ll
[PowerPC] extend smaller splats into bigger splats (with fix) (#142194)
2025-06-09 14:01:38 -04:00
mul-const.ll
…
mul-high.ll
…
mul-with-overflow.ll
…
mulhs.ll
…
mulld.ll
…
mulli.ll
…
mult-alt-generic-powerpc64.ll
…
mult-alt-generic-powerpc.ll
…
multi-return.ll
…
naked-fn-with-frame-pointer.ll
[llvm] Consistently respect naked fn attribute in TargetFrameLowering::hasFP() (#106014)
2024-10-18 09:35:42 +04:00
named-reg-alloc-r0.ll
[PowerPC] Expand global named register support (#113482)
2024-10-24 10:05:18 -04:00
named-reg-alloc-r1-64.ll
Revert "[PowerPC] Expand global named register support" (#113457)
2024-10-23 09:36:28 -04:00
named-reg-alloc-r1.ll
Revert "[PowerPC] Expand global named register support" (#113457)
2024-10-23 09:36:28 -04:00
named-reg-alloc-r2-64.ll
[PowerPC] Expand global named register support (#113482)
2024-10-24 10:05:18 -04:00
named-reg-alloc-r2.ll
[PowerPC] Expand global named register support (#113482)
2024-10-24 10:05:18 -04:00
named-reg-alloc-r13-64.ll
Revert "[PowerPC] Expand global named register support" (#113457)
2024-10-23 09:36:28 -04:00
named-reg-alloc-r13.ll
Revert "[PowerPC] Expand global named register support" (#113457)
2024-10-23 09:36:28 -04:00
named-reg-alloc.ll
[PowerPC] Expand global named register support (#113482)
2024-10-24 10:05:18 -04:00
neg-abs.ll
…
neg.ll
…
negate-i1.ll
…
negative-integer-fp-libcall.ll
…
negctr.ll
…
no-ctr-loop-if-exit-in-nested-loop.ll
…
no-dead-strip.ll
…
no-dup-of-bdnz.ll
…
no-dup-spill-fp.ll
…
no-duplicate.ll
…
no-ext-with-count-zeros.ll
…
no-extra-fp-conv-ldst.ll
…
no-misaligned-tocl.ll
…
no-pref-jumps.ll
…
no-rlwimi-trivial-commute.mir
…
NoCRFieldRedefWhenSpillingCRBIT.mir
…
nofpexcept.ll
[InstrEmitter] Use AddOperand in EmitCopyToRegClassNode. (#146637)
2025-07-02 09:44:54 -07:00
nomerge.ll
…
non-debug-mi-search-frspxsrsp.ll
…
non-simple-args-intrin.ll
…
noPermuteFormasking.ll
…
noredzone.ll
[PowerPC][LLC] Utilize PPC::getNormalizedPPCTargetCPU() to set CPU (#113943)
2024-11-04 09:40:54 -05:00
not-fixed-frame-object.ll
…
novrsave.ll
…
O0-pipeline.ll
Rename ExpandLargeFpConvertPass to ExpandFpPass (#131128)
2025-03-14 13:11:45 +01:00
O3-pipeline.ll
Rename ExpandLargeFpConvertPass to ExpandFpPass (#131128)
2025-03-14 13:11:45 +01:00
opt-builtins-ppc-xlcompat-cas.ll
…
opt-cmp-inst-cr0-live.ll
…
opt-cmp-rec-postra.mir
…
opt-li-add-to-addi.ll
…
opt-sub-inst-cr0-live.mir
…
optcmp.ll
…
optimize-andiso.ll
…
optimize-vector.ll
[PowerPC] catch v2i64 shift left by 1 is add case (#138772)
2025-05-13 11:26:46 -04:00
optnone-crbits-i1-ret.ll
…
or-addressing-mode.ll
…
ori_imm32.ll
…
ori_imm64.ll
…
out-of-range-dform.ll
…
overflow-intrinsic-optimizations.ll
…
p8-isel-sched.ll
…
p8-scalar_vector_conversions.ll
[PowerPC] Fix vector_shuffle combines when inputs are scalar_to_vector of differing types. (#80784)
2024-11-11 10:53:51 -05:00
p8altivec-shuffles-pred.ll
…
p9_copy_fp.ll
…
p9-dform-load-alignment.ll
…
p9-vbpermd.ll
…
p9-vector-compares-and-counts.ll
…
p9-vector-sign-extend.ll
…
p9-vinsert-vextract.ll
…
p9-xxinsertw-xxextractuw.ll
…
p10-bit-manip-ops.ll
…
p10-bswap.ll
…
p10-check-features.ll
…
p10-fi-elim.ll
MachineScheduler: Reset next cluster candidate for each node (#139513)
2025-05-28 14:53:46 +08:00
p10-handle-split-promote-vec.ll
…
p10-p11-constants.ll
…
p10-setbc-ri.ll
…
p10-setbc-rr.ll
…
p10-setbcr-ri.ll
…
p10-setbcr-rr.ll
…
p10-setboolean-ext-fp.ll
…
p10-setnbc-ri.ll
…
p10-setnbc-rr.ll
…
p10-setnbcr-ri.ll
…
p10-setnbcr-rr.ll
…
p10-spill-creq.ll
[MachineScheduler] Fix physreg dependencies of ExitSU (#123541)
2025-02-01 20:40:50 +03:00
p10-spill-crgt.ll
[PowerPC] Pre-commit tests for PR130742. NFC. (#135606)
2025-04-17 17:52:49 +08:00
p10-spill-crlt.ll
LICM: hoist BO assoc for and, or, xor (#111146)
2024-10-04 19:13:51 +01:00
p10-spill-crun.ll
…
p10-splatImm32-undef.ll
[PowerPC] special case small int constant for custom scalar_to_vector (#109850)
2024-10-21 12:19:07 -04:00
p10-splatImm32.ll
…
p10-splatImm-CPload-pcrel.ll
[PowerPC] extend smaller splats into bigger splats (with fix) (#142194)
2025-06-09 14:01:38 -04:00
p10-splatImm.ll
…
p10-string-ops.ll
…
p10-vector-divide.ll
…
p10-vector-mask-ops.ll
…
p10-vector-modulo.ll
…
p10-vector-multiply.ll
…
p10-vector-rotate.ll
…
p10-vector-shift.ll
…
p10-vector-sign-extend.ll
…
p10-vsx-pcv.ll
…
P10-stack-alignment.ll
[PowerPC][LLC] Utilize PPC::getNormalizedPPCTargetCPU() to set CPU (#113943)
2024-11-04 09:40:54 -05:00
paired-vector-intrinsics.ll
PowerPC: Use REG_SEQUENCE instead of INSERT_SUBREG (#129941)
2025-03-18 13:41:24 -04:00
patchable-function-entry.ll
…
pcrel_ldst.ll
…
pcrel-block-address.ll
…
pcrel-byte-loads.ll
…
pcrel-call-linkage-leaf.ll
…
pcrel-call-linkage-simple.ll
…
pcrel-call-linkage-with-calls.ll
…
pcrel-got-indirect.ll
…
pcrel-indirect-call.ll
…
pcrel-jump-table.ll
[LegalizeDAG] Use Base+Offset instead of Offset+Base for jump tables
2025-01-31 14:05:34 -08:00
pcrel-linkeropt-option.ll
…
pcrel-linkeropt.ll
…
pcrel-local-caller-toc.ll
…
pcrel-relocation-plus-offset.ll
…
pcrel-tail-calls.ll
…
pcrel-tls_get_addr_clobbers.ll
…
pcrel-tls-general-dynamic.ll
…
pcrel-tls-initial-exec.ll
…
pcrel-tls-local-dynamic.ll
…
pcrel-tls-local-exec.ll
…
pcrel.ll
…
peephole-align.ll
…
peephole-cmp-eq.mir
…
peephole-combineRLWINM-liveness.mir
…
peephole-counter-perOp.mir
…
peephole-counter-XToI.mir
…
peephole-miscompile-extswsli.mir
…
peephole-mma-phi-liveness.ll
[PowerPC][LLC] Utilize PPC::getNormalizedPPCTargetCPU() to set CPU (#113943)
2024-11-04 09:40:54 -05:00
peephole-phi-acc.mir
…
peephole-replaceInstr-after-eliminate-extsw.mir
[win] NFC: Rename EHCatchret to EHCont to allow for EH Continuation targets that aren't catchret instructions (#129953)
2025-03-06 09:28:44 -08:00
peephole-subreg-def.mir
PeepholeOpt: Fix looking for def of current copy to coalesce (#125533)
2025-02-05 23:29:02 +07:00
perfect-shuffle.ll
…
pgo-ref-directive.ll
…
phi-eliminate.mir
[PHIElimination] Revert #131837 #146320 #146337 (#146850)
2025-07-03 07:48:08 -04:00
pie.ll
…
pip-inner.ll
…
poison-legalization.ll
Reland "[SelectionDAG] Introducing a new ISD::POISON SDNode to represent the poison value in the IR." (#135056)
2025-04-10 11:29:14 -04:00
popcnt-zext.ll
[PowerPC][LLC] Utilize PPC::getNormalizedPPCTargetCPU() to set CPU (#113943)
2024-11-04 09:40:54 -05:00
popcnt.ll
…
popcount.ll
…
post-ra-ec.ll
…
pow_massv_075_025exp.ll
…
pow-025-075-intrinsic-scalar-mass-afn.ll
…
pow-025-075-intrinsic-scalar-mass-fast.ll
[PowerPC][LLC] Utilize PPC::getNormalizedPPCTargetCPU() to set CPU (#113943)
2024-11-04 09:40:54 -05:00
pow-025-075-nointrinsic-scalar-mass-fast.ll
…
pow.75.ll
…
power9-moves-and-splats.ll
…
powf_massv_075_025exp.ll
…
ppc32-align-long-double-sf.ll
…
ppc32-constant-BE-ppcf128.ll
…
ppc32-cyclecounter.ll
…
ppc32-i1-stack-arguments-abi-bug.ll
…
ppc32-i1-vaarg.ll
…
ppc32-i64-to-float-conv.ll
…
ppc32-lshrti3.ll
…
ppc32-nest.ll
…
ppc32-pic-bcl.ll
PowerPC32:PIC: Update to bcl to fix branch prediction mis-predict issue (#134140)
2025-04-07 15:50:21 -04:00
ppc32-pic-large.ll
PowerPC32:PIC: Update to bcl to fix branch prediction mis-predict issue (#134140)
2025-04-07 15:50:21 -04:00
ppc32-pic.ll
PowerPC32:PIC: Update to bcl to fix branch prediction mis-predict issue (#134140)
2025-04-07 15:50:21 -04:00
ppc32-secure-plt-tls2.ll
…
ppc32-secure-plt-tls.ll
…
ppc32-selectcc-i64.ll
…
ppc32-skip-regs.ll
…
ppc32-vacopy.ll
…
ppc64-32bit-addic.ll
…
ppc64-abi-extend.ll
…
ppc64-acc-regalloc-bugfix.ll
PowerPC: Use REG_SEQUENCE instead of INSERT_SUBREG (#129941)
2025-03-18 13:41:24 -04:00
ppc64-acc-regalloc.ll
PowerPC: Use REG_SEQUENCE instead of INSERT_SUBREG (#129941)
2025-03-18 13:41:24 -04:00
ppc64-align-long-double.ll
…
ppc64-altivec-abi.ll
…
ppc64-anyregcc-crash.ll
RegAlloc: Use DiagnosticInfo to report register allocation failures (#119492)
2024-12-16 10:49:08 +09:00
ppc64-anyregcc.ll
…
ppc64-blnop.ll
…
ppc64-byval-align.ll
…
ppc64-byval-larger-struct.ll
…
ppc64-byval-multi-store.ll
…
ppc64-calls.ll
…
ppc64-crash.ll
…
ppc64-crsave.mir
…
ppc64-cyclecounter.ll
…
ppc64-elf-abi.ll
…
ppc64-fastcc-fast-isel.ll
…
ppc64-fastcc.ll
…
ppc64-func-desc-hoist.ll
…
ppc64-gep-opt.ll
…
ppc64-get-cache-line-size.ll
…
ppc64-i128-abi.ll
…
ppc64-icbt-pwr7.ll
[LLVM] Skip dumping inline SDag children (#141359)
2025-05-26 19:40:01 -07:00
ppc64-icbt-pwr8.ll
…
ppc64-inlineasm-clobber.ll
[ARM,AArch64] Don't put BTI at asm goto branch targets (#141562)
2025-06-03 08:44:13 +01:00
ppc64-linux-func-size.ll
…
ppc64-nest.ll
[PowerPC][LLC] Utilize PPC::getNormalizedPPCTargetCPU() to set CPU (#113943)
2024-11-04 09:40:54 -05:00
ppc64-nonfunc-calls.ll
…
ppc64-notoc-rm-relocation.ll
…
ppc64-P9-mod.ll
…
ppc64-P9-setb.ll
…
ppc64-P9-vabsd.ll
[DAG] visitFREEZE - always allow freezing multiple operands (#145939)
2025-07-02 11:28:37 +01:00
ppc64-patchpoint.ll
…
ppc64-pre-inc-no-extra-phi.ll
…
ppc64-prefetch.ll
…
ppc64-r2-alloc.ll
…
ppc64-rop-protection-aix.ll
[PowerPC] Fix saving of Link Register when using ROP Protect (#123101)
2025-01-22 13:44:20 -05:00
ppc64-rop-protection.ll
[PowerPC] Fix saving of Link Register when using ROP Protect (#123101)
2025-01-22 13:44:20 -05:00
ppc64-sibcall-shrinkwrap.ll
…
ppc64-sibcall.ll
…
ppc64-smallarg.ll
…
ppc64-stackmap-args.ll
[CodeGen] @llvm.experimental.stackmap make operands immediate (#117932)
2024-12-11 17:41:19 +08:00
ppc64-stackmap-nops.ll
[PowerPC][LLC] Utilize PPC::getNormalizedPPCTargetCPU() to set CPU (#113943)
2024-11-04 09:40:54 -05:00
ppc64-stackmap.ll
…
ppc64-toc.ll
…
ppc64-vaarg-int.ll
…
ppc64-varargs.ll
[PowerPC][LLC] Utilize PPC::getNormalizedPPCTargetCPU() to set CPU (#113943)
2024-11-04 09:40:54 -05:00
ppc64-xxsplti32dx-pattern-check.ll
…
ppc64-zext.ll
…
ppc64le-aggregates.ll
[test] Remove redundant -march= when target triple is specified in IR
2024-12-15 12:42:17 -08:00
ppc64le-calls.ll
…
ppc64le-crsave.ll
…
ppc64le-localentry-large.ll
…
ppc64le-localentry.ll
…
ppc64le-smallarg.ll
…
ppc440-fp-basic.ll
…
ppc440-msync.ll
…
ppc_fp128-bcwriter.ll
…
ppc-32bit-build-vector.ll
[DAG] SimplifyMultipleUseDemandedBits - bypass ADD nodes if either operand is zero (#112588)
2024-11-05 17:20:41 +00:00
ppc-32bit-shift.ll
…
ppc-clear-before-return.ll
…
ppc-crbits-onoff.ll
…
ppc-ctr-dead-code.ll
…
ppc-disable-non-volatile-cr.ll
…
ppc-empty-fs.ll
…
ppc-float-spill.ll
…
ppc-label2.ll
…
ppc-label.ll
…
ppc-partword-atomic.ll
…
ppc-passname-assert.ll
…
ppc-passname.ll
…
ppc-prologue.ll
…
ppc-redzone-alignment-bug.ll
…
ppc-rotate-clear.ll
…
ppc-shrink-wrapping.ll
…
ppc-shufflevector-combine.ll
…
ppc-TOC-stats.ll
…
ppc-vaarg-agg.ll
…
ppcf128-1-opt.ll
…
ppcf128-1.ll
…
ppcf128-2.ll
…
ppcf128-3.ll
…
ppcf128-4.ll
…
ppcf128-constrained-fp-intrinsics.ll
Emit constrained atan2 intrinsic for clang builtin (#113636)
2024-11-12 13:34:29 -08:00
ppcf128-endian.ll
…
ppcf128-freeze.mir
[PHIElimination] Revert #131837 #146320 #146337 (#146850)
2025-07-03 07:48:08 -04:00
ppcf128sf.ll
…
ppcsoftops.ll
[PowerPC][LLC] Utilize PPC::getNormalizedPPCTargetCPU() to set CPU (#113943)
2024-11-04 09:40:54 -05:00
pr3711_widen_bit.ll
…
pr12757.ll
…
pr13641.ll
…
pr13891.ll
…
pr15031.ll
…
pr15359.ll
…
pr15630.ll
…
pr15632.ll
…
pr16556-2.ll
…
pr16556.ll
…
pr16573.ll
…
pr17168.ll
…
pr17354.ll
…
pr18663-2.ll
…
pr18663.ll
…
pr20442.ll
…
pr22711.ll
…
pr24216.ll
…
pr24546.ll
…
pr24636.ll
…
pr25080.ll
…
pr25157-peephole.ll
…
pr25157.ll
…
pr26180.ll
…
pr26193.ll
…
pr26356.ll
…
pr26378.ll
…
pr26381.ll
…
pr26617.ll
…
pr26690.ll
…
pr27078.ll
…
pr27350.ll
…
pr28130.ll
…
pr28630.ll
…
pr30451.ll
…
pr30640.ll
…
pr30663.ll
…
pr30715.ll
…
pr31144.ll
…
pr32063.ll
…
pr32140.ll
…
pr33093.ll
…
pr33547.ll
…
pr35402.ll
…
pr35688.ll
[PowerPC] Deprecate uses of ISD::ADDC/ISD::ADDE/ISD::SUBC/ISD::SUBE (#133155)
2025-04-03 13:22:49 -04:00
pr36068.ll
…
pr36292.ll
[PowerPC] Deprecate uses of ISD::ADDC/ISD::ADDE/ISD::SUBC/ISD::SUBE (#133155)
2025-04-03 13:22:49 -04:00
pr38087.ll
[DAG] SimplifyDemandedVectorElts - add handling for INT<->FP conversions (#117884)
2024-12-04 07:37:01 +00:00
pr38899-split-register-at-spill.mir
…
pr39478.ll
…
pr39815.ll
…
pr40922.ll
[PowerPC] Deprecate uses of ISD::ADDC/ISD::ADDE/ISD::SUBC/ISD::SUBE (#133155)
2025-04-03 13:22:49 -04:00
pr41088.ll
…
pr41177.ll
…
pr42492.ll
…
pr43527.ll
LICM: Avoid looking at use list of constant data (#134690)
2025-04-13 17:06:38 +02:00
pr43976.ll
[PowerPC][LLC] Utilize PPC::getNormalizedPPCTargetCPU() to set CPU (#113943)
2024-11-04 09:40:54 -05:00
pr44183.ll
…
pr44239.ll
…
pr45186.ll
…
pr45297.ll
…
pr45301.ll
[PowerPC] Add SDNPMemOperand to some nodes (#115580)
2024-11-15 20:36:56 +03:00
pr45432.ll
…
pr45448.ll
[PowerPC] Deprecate uses of ISD::ADDC/ISD::ADDE/ISD::SUBC/ISD::SUBE (#133155)
2025-04-03 13:22:49 -04:00
pr45628.ll
…
pr45709.ll
…
pr46759.ll
…
pr46923.ll
…
pr47155-47156.ll
[MachineScheduler][AMDGPU] Allow scheduling of single-MI regions (#128739)
2025-02-27 11:27:07 +01:00
pr47373.ll
…
pr47660.ll
[PowerPC][LLC] Utilize PPC::getNormalizedPPCTargetCPU() to set CPU (#113943)
2024-11-04 09:40:54 -05:00
pr47707.ll
…
pr47830.ll
…
pr47891.ll
[PowerPC] vector shift word/double by element size - 1 use all ones (#139794)
2025-05-23 10:49:37 -04:00
pr47916.ll
…
pr48388.ll
…
pr48519.ll
LICM: Avoid looking at use list of constant data (#134690)
2025-04-13 17:06:38 +02:00
pr48527.ll
…
pr49092.ll
[CodeGen] Use __extendhfsf2 and __truncsfhf2 by default (#126880)
2025-02-19 10:16:57 +01:00
pr49509.ll
…
pr52894-32bit.ll
…
pr52894.ll
…
pr55463.ll
…
pr55857.ll
…
pr55911.ll
…
pr56469.ll
…
pr59074.ll
[PowerPC] Add SDNPMemOperand to some nodes (#115580)
2024-11-15 20:36:56 +03:00
pr61315.ll
…
pr61882.ll
…
pr62372.ll
…
pr70208.ll
…
pr74951.ll
[PowerPC][LLC] Utilize PPC::getNormalizedPPCTargetCPU() to set CPU (#113943)
2024-11-04 09:40:54 -05:00
pr77748.ll
…
pr85066.ll
…
pr92233.ll
…
pr116071.ll
[PHIElimination] Revert #131837 #146320 #146337 (#146850)
2025-07-03 07:48:08 -04:00
pr118695.ll
[PowerPC][Backend] using signed extend value instead of zero extend value for isIntS34Immediate() (#118703)
2024-12-05 09:08:18 -05:00
pr127298.ll
[PowerPC] Use getSignedTargetConstant in SelectOptimalAddrMode. (#127305)
2025-02-15 14:13:32 -08:00
pr141642.ll
Add REQUIRES: asserts to test added in #145149 because it uses the -debug-only= flag.
2025-06-24 04:08:34 +00:00
PR3488.ll
…
PR33636.ll
…
PR33671.ll
…
PR35812-neg-cmpxchg.ll
[PowerPC] eliminate RLWINM instruction following LBARX as possible (#144089)
2025-06-25 09:26:40 -04:00
pre-inc-disable.ll
[PowerPC] extend smaller splats into bigger splats (with fix) (#142194)
2025-06-09 14:01:38 -04:00
prefer-dqform.ll
…
preinc-ld-sel-crash.ll
…
preincprep-i64-check.ll
…
preincprep-invoke.ll
…
preincprep-nontrans-crash.ll
…
private.ll
…
prolog_vec_spills.mir
…
pwr3-6x.ll
…
pwr7-gt-nop.ll
…
pzero-fp-xored.ll
…
quadint-return.ll
…
r31.ll
…
read-set-flm.ll
…
recipest.ll
[DAG] Refactor X86 combineVSelectWithAllOnesOrZeros fold into a generic DAG Combine (#145298)
2025-07-02 15:07:48 +01:00
reduce_cr.ll
…
reduce_scalarization02.ll
…
reduce_scalarization.ll
…
redundant-copy-after-tail-dup.ll
…
reg_copy.mir
…
reg-coalesce-simple.ll
…
reg-names.ll
…
reg-scavenging.ll
…
regalloc-fast-debug-spill.ll
…
register-pressure-reduction.ll
…
register-pressure.ll
…
reloc-align.ll
…
remap-crash.ll
…
remat-imm.ll
…
rematerializable-instruction-machine-licm.ll
…
remove-copy-crunsetcrbit.mir
…
remove-implicit-use.mir
…
remove-redundant-li-implicit-reg.mir
…
remove-redundant-li-skip-imp-kill.mir
…
remove-redundant-load-imm.ll
…
remove-redundant-load-imm.mir
…
remove-redundant-moves.ll
…
remove-redundant-toc-saves.ll
…
remove-self-copies.mir
…
repeated-fp-divisors.ll
…
resolvefi-basereg.ll
…
resolvefi-disp.ll
…
respect-rounding-mode.ll
…
restore-r30.ll
…
retaddr2.ll
…
retaddr_multi_levels.ll
…
retaddr.ll
…
return-val-i128.ll
…
rldimi.ll
…
rlwimi2.ll
…
rlwimi3.ll
…
rlwimi-and-or-bits.ll
…
rlwimi-and.ll
…
rlwimi-commute.ll
…
rlwimi-dyn-and.ll
…
rlwimi-keep-rsh.ll
…
rlwimi.ll
…
rlwinm2.ll
…
rlwinm_rldicl_to_andi.mir
…
rlwinm-zero-ext.ll
…
rlwinm.ll
…
rm-zext.ll
…
rotl-2.ll
…
rotl-64.ll
…
rotl-rotr-crash.ll
…
rotl.ll
…
rounding-ops.ll
…
rounding-rm-flag.ll
…
rs-undef-use.ll
…
s000-alias-misched.ll
…
saddo-ssubo.ll
[PPC] Custom lower ssubo for i64 (#118711)
2024-12-05 17:22:44 -05:00
sat-add.ll
[DAG] Refactor X86 combineVSelectWithAllOnesOrZeros fold into a generic DAG Combine (#145298)
2025-07-02 15:07:48 +01:00
sat-register-clobber.ll
…
saturating-intrinsics.ll
…
save-bp.ll
…
save-cr-ppc32svr4.ll
…
save-crbp-ppc32svr4.ll
…
save-reg-params.ll
…
scalar_cmp.ll
…
scalar_vector_test_1.ll
…
scalar_vector_test_2.ll
…
scalar_vector_test_3.ll
…
scalar_vector_test_4.ll
…
scalar_vector_test_5.ll
[DAG] Don't allow implicit truncation in extract_element(bitcast(scalar_to_vector(X))) -> trunc(srl(X,C)) fold
2024-12-30 16:08:35 +00:00
scalar-double-ldst.ll
…
scalar-equal.ll
…
scalar-float-ldst.ll
…
scalar-i8-ldst.ll
…
scalar-i16-ldst.ll
…
scalar-i32-ldst.ll
…
scalar-i64-ldst.ll
…
scalar-min-max-p10.ll
…
scalar-min-max.ll
…
scalar-rounding-ops.ll
[PowerPC] Add missing patterns for lround when i32 is returned. (#111863)
2024-10-16 10:25:09 -04:00
scalars-in-altivec-regs.ll
…
scavenging.mir
…
sched-addi.ll
…
schedule-addi-load.mir
…
scheduling-mem-dependency.ll
…
scmp.ll
…
sdag-ppcf128.ll
…
sdiv-pow2.ll
…
sections.ll
…
select_const.ll
…
select_lt0.ll
…
select-addrRegRegOnly.ll
…
select-cc-no-isel.ll
…
select-cc.ll
…
select-constant-xor.ll
…
select-i1-vs-i1.ll
…
select-to-branch.mir
…
select.ll
[PowerPC] Deprecate uses of ISD::ADDC/ISD::ADDE/ISD::SUBC/ISD::SUBE (#133155)
2025-04-03 13:22:49 -04:00
selectiondag-extload-computeknownbits.ll
…
selectiondag-sextload.ll
…
set0-v8i16.ll
…
setcc_no_zext.ll
…
setcc-logic.ll
…
setcc-sub-flag.ll
…
setcc-to-sub.ll
…
setcc-vector.ll
…
setcclike-or-comb.ll
…
setcr_bc2.mir
…
setcr_bc3.mir
…
setcr_bc.mir
…
seteq-0.ll
…
setrnd.ll
…
sext_elimination.mir
Promote 32bit pseudo instr that infer extsw removal to 64bit in PPCMIPeephole (#85451)
2024-10-31 15:49:36 -04:00
sext-vector-inreg.ll
…
sh-overflow.mir
…
shift128.ll
…
shift_mask.ll
…
shift-cmp.ll
…
shl_elim.ll
…
shl_sext.ll
…
shrink-wrap-frame-pointer.ll
[shrinkwrap] PowerPC's FP register should be honored when processing the save point for prologue. (#129855)
2025-03-21 12:55:39 -04:00
shrink-wrap.ll
…
shrink-wrap.mir
[CodeGen][NewPM] Port "ShrinkWrap" pass to NPM (#129880)
2025-04-30 13:11:17 +05:30
sign_ext_inreg1.ll
…
sign-ext-atomics.ll
…
signbit-shift.ll
[PowerPC] vector shift word/double by element size - 1 use all ones (#139794)
2025-05-23 10:49:37 -04:00
signed-offset.ll
Use getSignedTargetConstant for offset (#141149)
2025-05-26 11:08:13 -04:00
simplifyConstCmpToISEL.ll
…
simplifysetcc_narrow_load.ll
…
sink-down-more-instructions-1.mir
[CodeGen][NewPM] Port MachineSink to NPM (#115434)
2025-03-03 15:49:37 +05:30
sink-down-more-instructions-regpressure-high.mir
…
sink-side-effect.ll
…
sj-ctr-loop.ll
…
sjlj_no0x.ll
…
sjlj.ll
…
small-arguments.ll
…
sms-cpy-1.ll
[PowerPC] Pre-commit tests for PR130742. NFC. (#135606)
2025-04-17 17:52:49 +08:00
sms-grp-order.ll
LICM: Avoid looking at use list of constant data (#134690)
2025-04-13 17:06:38 +02:00
sms-iterator.ll
…
sms-large-stages.mir
…
sms-phi-1.ll
…
sms-phi-2.ll
[PHIElimination] Revert #131837 #146320 #146337 (#146850)
2025-07-03 07:48:08 -04:00
sms-phi-3.ll
[PHIElimination] Revert #131837 #146320 #146337 (#146850)
2025-07-03 07:48:08 -04:00
sms-phi-5.ll
[InstSimplify] Fix incorrect poison propagation when folding phi (#96631)
2024-11-07 14:09:45 +01:00
sms-phi.ll
[PowerPC] Pre-commit tests for PR130742. NFC. (#135606)
2025-04-17 17:52:49 +08:00
sms-recmii.ll
…
sms-regpress.mir
…
sms-remark.ll
…
sms-simple.ll
…
sms-store-dependence.ll
…
smulfixsat.ll
…
spe-fastmath.ll
…
spe-hwdouble.ll
…
spe.ll
…
spill_p9_setb.ll
…
spill-nor0.ll
…
spill-nor0.mir
…
spill-vec-pair.ll
…
splat-bug.ll
…
splat-extend.ll
[PowerPC] extend smaller splats into bigger splats (with fix) (#142194)
2025-06-09 14:01:38 -04:00
splat-larger-types-as-v16i8.ll
…
split-index-tc.ll
…
splitstore-check-volatile.ll
…
srem-lkk.ll
…
srem-seteq-illegal-types.ll
[DAG] visitAND - Fold (and (srl X, C), 1) -> (srl X, BW-1) for signbit extraction (#114992)
2024-11-05 14:42:15 +00:00
srem-vector-lkk.ll
…
srl-mask.ll
…
ssubo-32.ll
[PowerPC] Add custom lowering for ssubo (#111748) (#115875)
2024-11-28 13:55:53 -05:00
stack_pointer_vec_spills.mir
…
stack-clash-dynamic-alloca.ll
[PowerPC][LLC] Utilize PPC::getNormalizedPPCTargetCPU() to set CPU (#113943)
2024-11-04 09:40:54 -05:00
stack-clash-prologue-nounwind.ll
…
stack-clash-prologue.ll
[PowerPC][LLC] Utilize PPC::getNormalizedPPCTargetCPU() to set CPU (#113943)
2024-11-04 09:40:54 -05:00
stack-coloring-vararg.mir
…
stack-guard-global.ll
Fixed test case error which caused the default cpu is changed from generic to ppc64 for triple powerpc64 (#114828)
2024-11-04 11:37:35 -05:00
stack-guard-oob.ll
…
stack-guard-reassign.ll
…
stack-guard-tls.ll
Fixed test case error which caused the default cpu is changed from generic to ppc64 for triple powerpc64 (#114828)
2024-11-04 11:37:35 -05:00
stack-no-redzone.ll
…
stack-protector.ll
…
stack-realign.ll
…
stack-restore-with-setjmp.ll
[PHIElimination] Revert #131837 #146320 #146337 (#146850)
2025-07-03 07:48:08 -04:00
stackmap-frame-setup.ll
…
stacksize.ll
…
std-unal-fi.ll
…
stdux-constuse.ll
…
stfiwx-2.ll
…
stfiwx.ll
…
store_fptoi.ll
…
store-combine.ll
…
store-constant.ll
…
store-forward-be32.ll
[PowerPC][LLC] Utilize PPC::getNormalizedPPCTargetCPU() to set CPU (#113943)
2024-11-04 09:40:54 -05:00
store-forward-be64.ll
[PowerPC][LLC] Utilize PPC::getNormalizedPPCTargetCPU() to set CPU (#113943)
2024-11-04 09:40:54 -05:00
store-load-fwd.ll
…
store-rightmost-vector-elt.ll
…
store-update.ll
…
structsinmem.ll
…
structsinregs.ll
…
stubs.ll
…
stwu8.ll
…
stwu-gta.ll
…
stwu-sched.ll
…
stwux.ll
…
sub-bv-types.ll
…
sub-of-not.ll
[PowerPC][LLC] Utilize PPC::getNormalizedPPCTargetCPU() to set CPU (#113943)
2024-11-04 09:40:54 -05:00
subc.ll
…
subreg-coalescer.mir
…
subreg-killed.mir
…
subreg-lanemasks.mir
…
subreg-postra-2.ll
[PHIElimination] Revert #131837 #146320 #146337 (#146850)
2025-07-03 07:48:08 -04:00
subreg-postra.ll
…
subtract_from_imm.ll
…
svr4-redzone.ll
…
swap-reduction.ll
…
swaps-le-1.ll
[PowerPC] Add SDNPMemOperand to some nodes (#115580)
2024-11-15 20:36:56 +03:00
swaps-le-2.ll
…
swaps-le-3.ll
…
swaps-le-4.ll
…
swaps-le-5.ll
…
swaps-le-6.ll
…
swaps-le-7.ll
…
swaps-le-8.ll
…
tail-dup-analyzable-fallthrough.ll
…
tail-dup-branch-to-fallthrough.ll
…
tail-dup-break-cfg.ll
…
tail-dup-layout.ll
…
tailcall1-64.ll
…
tailcall1.ll
…
tailcall-speculatable-callee.ll
…
tailcall-string-rvo.ll
…
tailcallpic1.ll
…
test_call_aix.ll
…
test_func_desc.ll
…
test-and-cmp-folding.ll
…
test-vector-insert.ll
…
testBitReverse.ll
…
testComparesi32gtu.ll
…
testComparesi32leu.ll
…
testComparesi32ltu.ll
…
testComparesieqsc.ll
…
testComparesieqsi.ll
…
testComparesieqsll.ll
…
testComparesieqss.ll
…
testComparesiequc.ll
…
testComparesiequi.ll
…
testComparesiequll.ll
…
testComparesiequs.ll
…
testComparesigesc.ll
…
testComparesigesi.ll
…
testComparesigesll.ll
…
testComparesigess.ll
…
testComparesigeuc.ll
…
testComparesigeui.ll
…
testComparesigeull.ll
…
testComparesigeus.ll
…
testComparesigtsc.ll
…
testComparesigtsi.ll
…
testComparesigtsll.ll
…
testComparesigtss.ll
…
testComparesigtuc.ll
…
testComparesigtui.ll
…
testComparesigtus.ll
…
testComparesilesc.ll
…
testComparesilesi.ll
…
testComparesilesll.ll
…
testComparesiless.ll
…
testComparesileuc.ll
…
testComparesileui.ll
…
testComparesileull.ll
…
testComparesileus.ll
…
testComparesiltsc.ll
…
testComparesiltsi.ll
…
testComparesiltsll.ll
…
testComparesiltss.ll
…
testComparesiltuc.ll
…
testComparesiltui.ll
…
testComparesiltus.ll
…
testComparesinesc.ll
…
testComparesinesi.ll
…
testComparesinesll.ll
…
testComparesiness.ll
…
testComparesineuc.ll
…
testComparesineui.ll
…
testComparesineull.ll
…
testComparesineus.ll
…
testCompareslleqsc.ll
…
testCompareslleqsi.ll
…
testCompareslleqsll.ll
…
testCompareslleqss.ll
…
testComparesllequc.ll
…
testComparesllequi.ll
…
testComparesllequll.ll
…
testComparesllequs.ll
…
testComparesllgesc.ll
…
testComparesllgesi.ll
…
testComparesllgesll.ll
…
testComparesllgess.ll
…
testComparesllgeuc.ll
…
testComparesllgeui.ll
…
testComparesllgeull.ll
…
testComparesllgeus.ll
…
testComparesllgtsll.ll
…
testComparesllgtuc.ll
…
testComparesllgtui.ll
…
testComparesllgtus.ll
…
testCompareslllesc.ll
…
testCompareslllesi.ll
…
testCompareslllesll.ll
…
testComparesllless.ll
…
testComparesllleuc.ll
…
testComparesllleui.ll
…
testComparesllleull.ll
…
testComparesllleus.ll
…
testComparesllltsll.ll
…
testComparesllltuc.ll
…
testComparesllltui.ll
…
testComparesllltus.ll
…
testComparesllnesll.ll
…
testComparesllneull.ll
…
thread-pointer.ll
…
tls_get_addr_clobbers.ll
…
tls_get_addr_fence1.mir
…
tls_get_addr_fence2.mir
…
tls_get_addr_stackframe.ll
…
tls-crash.mir
…
tls-cse.ll
…
tls-debug-aix.ll
…
tls-pic.ll
…
tls-pie-xform.ll
…
tls-store2.ll
…
tls.ll
…
toc-data-common.ll
[PowerPC][LLC] Utilize PPC::getNormalizedPPCTargetCPU() to set CPU (#113943)
2024-11-04 09:40:54 -05:00
toc-data-const.ll
[PowerPC][LLC] Utilize PPC::getNormalizedPPCTargetCPU() to set CPU (#113943)
2024-11-04 09:40:54 -05:00
toc-data-large-array2.ll
…
toc-data-large-array.ll
…
toc-data-no-data-sections.ll
…
toc-data-struct-array.ll
…
toc-data.ll
[PowerPC][LLC] Utilize PPC::getNormalizedPPCTargetCPU() to set CPU (#113943)
2024-11-04 09:40:54 -05:00
toc-float.ll
…
toc-load-sched-bug.ll
[PPC] Replace PPCMergeStringPool with GlobalMerge for Linux (#114850)
2024-11-12 14:02:01 -05:00
tocdata-firm-alignment.ll
…
tocdata-non-zero-addend.mir
[PowerPC] Utilize getReservedRegs to find asm clobberable registers. (#107863)
2024-11-04 12:57:26 -05:00
tocSaveInPrologue.ll
…
topdepthreduce-postra.mir
Reland "CodeGen][NewPM] Port MachineScheduler to NPM. (#125703)" (#126684)
2025-02-12 18:54:39 +05:30
trampoline.ll
…
trunc-srl-load.ll
…
two-address-crash.mir
…
uaddo-32.ll
[PowerPC] Deprecate uses of ISD::ADDC/ISD::ADDE/ISD::SUBC/ISD::SUBE (#133155)
2025-04-03 13:22:49 -04:00
uaddo-64.ll
[PowerPC] Deprecate uses of ISD::ADDC/ISD::ADDE/ISD::SUBC/ISD::SUBE (#133155)
2025-04-03 13:22:49 -04:00
ucmp.ll
…
uint-to-fp-v4i32.ll
…
uint-to-ppcfp128-crash.ll
…
umulfixsat.ll
…
umulo-128-legalisation-lowering.ll
[PowerPC] Deprecate uses of ISD::ADDC/ISD::ADDE/ISD::SUBC/ISD::SUBE (#133155)
2025-04-03 13:22:49 -04:00
unal4-std.ll
…
unal-altivec2.ll
…
unal-altivec-wint.ll
…
unal-altivec.ll
…
unal-vec-ldst.ll
…
unal-vec-negarith.ll
…
unaligned-addressing-mode.ll
…
unaligned-dqform-ld.ll
…
unaligned-floats.ll
…
unaligned.ll
…
undef-args.ll
Reland [SelectionDAG] Folding ZERO-EXTEND/SIGN_EXTEND poison to Poison value in getNode (#136701)
2025-04-22 17:36:41 -04:00
unreachable-mbb-jtreference-elimination.ll
…
unsafe-math.ll
…
unwind-dw2-g.ll
…
unwind-dw2.ll
…
urem-lkk.ll
…
urem-seteq-illegal-types.ll
[PowerPC] Deprecate uses of ISD::ADDC/ISD::ADDE/ISD::SUBC/ISD::SUBE (#133155)
2025-04-03 13:22:49 -04:00
urem-vector-lkk.ll
…
use-cr-result-of-dom-icmp-st.ll
…
usubo_carry.ll
[PowerPC] Fix an LowerADDSUBO_CARRY error when converting carry bit for usubo_carry (#137809)
2025-04-30 10:39:09 -04:00
uwtables.ll
…
v2i64_scalar_to_vector_shuffle.ll
[PowerPC] Fix vector_shuffle combines when inputs are scalar_to_vector of differing types. (#80784)
2024-11-11 10:53:51 -05:00
v4i32_scalar_to_vector_shuffle.ll
[DAG] replaceShuffleOfInsert - add support for shuffle_vector(scalar_to_vector(x),y) -> insert_vector_elt(y,x,c) (#127210)
2025-02-27 08:41:58 +00:00
v8i16_scalar_to_vector_shuffle.ll
[PowerPC] Fix vector_shuffle combines when inputs are scalar_to_vector of differing types. (#80784)
2024-11-11 10:53:51 -05:00
v16i8_scalar_to_vector_shuffle.ll
[PowerPC] Fix vector_shuffle combines when inputs are scalar_to_vector of differing types. (#80784)
2024-11-11 10:53:51 -05:00
v1024ls.ll
[PowerPC] Fix instruction name for dmr insert (#134301)
2025-04-04 15:56:30 -04:00
vaddsplat.ll
…
varargs-struct-float.ll
…
varargs.ll
…
variable_elem_vec_extracts.ll
…
vavg.ll
…
vcmp-fold.ll
…
vcmp-setbc-quad.ll
[PowerPC] Use setbc for values from vector compare conditions (#114858)
2024-11-27 12:47:10 -05:00
vcmp-setbc.ll
[PowerPC] Use setbc for values from vector compare conditions (#114858)
2024-11-27 12:47:10 -05:00
vec_abs.ll
…
vec_absd.ll
…
vec_add_sub_doubleword.ll
[PowerPC] extend smaller splats into bigger splats (with fix) (#142194)
2025-06-09 14:01:38 -04:00
vec_add_sub_quadword.ll
…
vec_auto_constant.ll
…
vec_br_cmp.ll
…
vec_buildvector_loadstore.ll
…
vec_call.ll
…
vec_clz.ll
…
vec_cmp.ll
…
vec_cmpd_p7.ll
…
vec_cmpd.ll
…
vec_cmpq.ll
…
vec_constants.ll
…
vec_conv_fp32_to_i8_elts.ll
…
vec_conv_fp32_to_i16_elts.ll
[PowerPC] Add SDNPMemOperand to some nodes (#115580)
2024-11-15 20:36:56 +03:00
vec_conv_fp32_to_i64_elts.ll
[PowerPC] Add SDNPMemOperand to some nodes (#115580)
2024-11-15 20:36:56 +03:00
vec_conv_fp64_to_i8_elts.ll
…
vec_conv_fp64_to_i16_elts.ll
[PowerPC] Add SDNPMemOperand to some nodes (#115580)
2024-11-15 20:36:56 +03:00
vec_conv_fp64_to_i32_elts.ll
[PowerPC] Add SDNPMemOperand to some nodes (#115580)
2024-11-15 20:36:56 +03:00
vec_conv_fp_to_i_4byte_elts.ll
[PowerPC] Add SDNPMemOperand to some nodes (#115580)
2024-11-15 20:36:56 +03:00
vec_conv_fp_to_i_8byte_elts.ll
[PowerPC] Add SDNPMemOperand to some nodes (#115580)
2024-11-15 20:36:56 +03:00
vec_conv_i8_to_fp32_elts.ll
[PowerPC] Add SDNPMemOperand to some nodes (#115580)
2024-11-15 20:36:56 +03:00
vec_conv_i8_to_fp64_elts.ll
[PowerPC] Add SDNPMemOperand to some nodes (#115580)
2024-11-15 20:36:56 +03:00
vec_conv_i16_to_fp32_elts.ll
[PowerPC] Add SDNPMemOperand to some nodes (#115580)
2024-11-15 20:36:56 +03:00
vec_conv_i16_to_fp64_elts.ll
[PowerPC] Add SDNPMemOperand to some nodes (#115580)
2024-11-15 20:36:56 +03:00
vec_conv_i32_to_fp64_elts.ll
[PowerPC] Add SDNPMemOperand to some nodes (#115580)
2024-11-15 20:36:56 +03:00
vec_conv_i64_to_fp32_elts.ll
[PowerPC] Add SDNPMemOperand to some nodes (#115580)
2024-11-15 20:36:56 +03:00
vec_conv_i_to_fp_4byte_elts.ll
[PowerPC] Add SDNPMemOperand to some nodes (#115580)
2024-11-15 20:36:56 +03:00
vec_conv_i_to_fp_8byte_elts.ll
[PowerPC] Add SDNPMemOperand to some nodes (#115580)
2024-11-15 20:36:56 +03:00
vec_conv.ll
…
vec_extload.ll
…
vec_extract_p9_2.ll
…
vec_extract_p9.ll
…
vec_fmuladd.ll
…
vec_fneg.ll
…
vec_insert_elt.ll
Revert "Reland "RegisterCoalescer: Add implicit-def of super register when coalescing SUBREG_TO_REG" (#123632)"
2025-01-22 10:11:32 +00:00
vec_insert.ll
…
vec_int_ext.ll
…
vec_int_to_double_shuffle.ll
…
vec_mergeow.ll
…
vec_minmax.ll
…
vec_misaligned.ll
…
vec_mul_even_odd.ll
…
vec_mul.ll
…
vec_perf_shuffle.ll
…
vec_popcnt.ll
…
vec_revb.ll
…
vec_rotate_shift.ll
…
vec_rounding.ll
…
vec_select.ll
…
vec_shift.ll
…
vec_shuffle_le.ll
…
vec_shuffle_p8vector_le.ll
…
vec_shuffle_p8vector.ll
…
vec_shuffle.ll
…
vec_sldwi.ll
…
vec_splat_constant.ll
…
vec_splat.ll
…
vec_sqrt.ll
…
vec_urem_const.ll
…
vec_veqv_vnand_vorc.ll
…
vec_vrsave.ll
…
vec_xxpermdi.ll
…
vec_zero.ll
…
vec-abi-align.ll
…
vec-asm-disabled.ll
…
vec-bswap.ll
…
vec-extract-itofp.ll
…
vec-icmpeq-v2i64-p7.ll
…
vec-itofp.ll
[PowerPC] Add SDNPMemOperand to some nodes (#115580)
2024-11-15 20:36:56 +03:00
vec-min-max.ll
[ValueTracking] Do not use FMF from fcmp (#142266)
2025-06-02 18:21:14 +08:00
vec-promote.ll
…
vec-select.ll
…
vec-trunc2.ll
[PowerPC][LLC] Utilize PPC::getNormalizedPPCTargetCPU() to set CPU (#113943)
2024-11-04 09:40:54 -05:00
vec-trunc.ll
…
vec-zext-abdu.ll
…
vector-constrained-fp-intrinsics.ll
Revert "Reland "RegisterCoalescer: Add implicit-def of super register when coalescing SUBREG_TO_REG" (#123632)"
2025-01-22 10:11:32 +00:00
vector-copysign.ll
…
vector-extend-sign.ll
[PowerPC] extend smaller splats into bigger splats (with fix) (#142194)
2025-06-09 14:01:38 -04:00
vector-identity-shuffle.ll
…
vector-ldst.ll
…
vector-llrint.ll
[CodeGen] Use __extendhfsf2 and __truncsfhf2 by default (#126880)
2025-02-19 10:16:57 +01:00
vector-lrint.ll
[CodeGen] Use __extendhfsf2 and __truncsfhf2 by default (#126880)
2025-02-19 10:16:57 +01:00
vector-merge-store-fp-constants.ll
…
vector-popcnt-128-ult-ugt.ll
[PowerPC] extend smaller splats into bigger splats (with fix) (#142194)
2025-06-09 14:01:38 -04:00
vector-reduce-add.ll
…
vector-reduce-and.ll
…
vector-reduce-fadd.ll
DAG: Fix vector_shuffle -> splat fold defining undef lanes (#123596)
2025-01-21 23:55:50 +07:00
vector-reduce-fmax.ll
…
vector-reduce-fmin.ll
…
vector-reduce-fmul.ll
…
vector-reduce-mul.ll
…
vector-reduce-or.ll
…
vector-reduce-smax.ll
…
vector-reduce-smin.ll
…
vector-reduce-umax.ll
…
vector-reduce-umin.ll
…
vector-reduce-xor.ll
…
vector-rotates.ll
…
vector-rounding-ops.ll
…
vector-sum-sat-bit-side-effect.ll
…
vector.ll
…
vmladduhm.ll
…
vperm-instcombine.ll
…
vperm-lowering.ll
…
vperm-swap.ll
…
vrsave-inline-asm.ll
…
vrspill.ll
…
vsel-prom.ll
…
vselect-constants.ll
[PowerPC] vector shift word/double by element size - 1 use all ones (#139794)
2025-05-23 10:49:37 -04:00
vsx_builtins.ll
…
vsx_insert_extract_le.ll
…
vsx_scalar_ld_st.ll
…
vsx_shuffle_le.ll
…
vsx-args.ll
…
VSX-DForm-Scalars.ll
…
vsx-div.ll
…
vsx-elementary-arith.ll
…
vsx-fma-m-early.ll
[PowerPC] hoist xxspltiw instruction out of the loop with FMA mutation pass. (#111696)
2025-06-05 09:41:51 -04:00
vsx-fma-m.ll
…
vsx-fma-mutate-trivial-copy.ll
[SelectionDAG] Remove UnsafeFPMath check in visitFADDForFMACombine (#127770)
2025-06-25 12:31:23 +08:00
vsx-fma-mutate-undef.ll
…
vsx-fma-sp.ll
…
vsx-infl-copy1.ll
…
vsx-infl-copy2.ll
…
vsx-ldst-builtin-le.ll
…
vsx-ldst.ll
…
vsx-minmax.ll
…
vsx-p8.ll
…
vsx-p9.ll
…
vsx-partword-int-loads-and-stores.ll
…
vsx-recip-est.ll
…
vsx-self-copy.ll
…
vsx-shuffle-le-load.ll
…
vsx-shuffle-le-multiple-uses.ll
…
vsx-spill-norwstore.ll
…
vsx-spill.ll
…
vsx-vec-spill.ll
…
vsx-word-splats.ll
…
VSX-XForm-Scalars.ll
…
vsx.ll
[PHIElimination] Revert #131837 #146320 #146337 (#146850)
2025-07-03 07:48:08 -04:00
vsxD-Form-spills.ll
…
vtable-reloc.ll
…
wa-asm-fpr.ll
…
weak_def_can_be_hidden.ll
…
wide-scalar-shift-by-byte-multiple-legalization.ll
[PowerPC] Add SDNPMemOperand to some nodes (#115580)
2024-11-15 20:36:56 +03:00
wide-scalar-shift-legalization.ll
[PowerPC] Add SDNPMemOperand to some nodes (#115580)
2024-11-15 20:36:56 +03:00
widen-vec-correctly-be.ll
…
xray-attribute-instrumentation.ll
…
xray-conditional-return.ll
…
xray-ret-is-terminator.ll
…
xray-tail-call-hidden.ll
…
xray-tail-call-sled.ll
…
xvcmpeqdp-v2f64.ll
…
xxeval-and-nand.ll
…
xxeval-eqv-nor-or-xor.ll
…
xxeval-vselect-x-and.ll
[NFC][PowerPC] Pre-commit testcases for locking down the xxsel instructions for ternary patterns (#146764)
2025-07-03 20:53:02 +05:30
xxeval-vselect-x-b.ll
[NFC][PowerPC] Pre-commit testcases for locking down the xxsel instructions for ternary patterns (#146764)
2025-07-03 20:53:02 +05:30
xxeval-vselect-x-c.ll
[NFC][PowerPC] Pre-commit testcases for locking down the xxsel instructions for ternary patterns (#146764)
2025-07-03 20:53:02 +05:30
xxeval-vselect-x-or.ll
[NFC][PowerPC] Pre-commit testcases for locking down the xxsel instructions for ternary patterns (#146764)
2025-07-03 20:53:02 +05:30
xxeval-vselect-x-xor.ll
[NFC][PowerPC] Pre-commit testcases for locking down the xxsel instructions for ternary patterns (#146764)
2025-07-03 20:53:02 +05:30
xxinsertw.ll
…
xxleqv_xxlnand_xxlorc.ll
…
xxperm-swap.ll
…
xxpermdi_mnemonics.s
…
zero-not-run.ll
…
zext-and-cmp.ll
…
zext-bitperm.ll
…
zext-free.ll
…