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llvm-project/llvm/test/CodeGen/AArch64
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Graham Hunter 0e6d6127d4
[AArch64] Improve select dagcombine (#169925) 
An AnyOf reduction (aka vector.reduce.or) with a fixed-width vector is
canonicalized to a bitcast of the mask vector to an integer of the same
overall size, which is then compared against zero.

If the scalar result of the bitcast is smaller than the element size of
vectors being selected, we often end up with suboptimal codegen. This
fixes the main cases, removing scalarized code.
2025-12-02 12:29:49 +00:00
..
Atomics
[PHIElimination] Revert #131837 #146320 #146337 (#146850)
2025-07-03 07:48:08 -04:00
GlobalISel
[AArch64][GlobalISel] Improve lowering of vector fp16 fptrunc (#163398)
2025-11-28 08:32:25 +00:00
2s-complement-asm.ll
…
16bit-float-promotion-with-nofp.ll
[AArch64] Support MI and PL (#150314)
2025-08-11 07:41:38 +01:00
128bit_load_store.ll
…
a55-fuse-address.mir
Reland "CodeGen][NewPM] Port MachineScheduler to NPM. (#125703)" (#126684)
2025-02-12 18:54:39 +05:30
a57-csel.ll
…
aarch64_be-global-const.ll
…
aarch64_f16_be.ll
…
aarch64_fnmadd.ll
…
aarch64_tree_tests.ll
…
aarch64_win64cc_vararg.ll
…
aarch64-2014-08-11-MachineCombinerCrash.ll
[AArch64][test] Remove unsafe-fp-math uses (NFC) (#164606)
2025-10-22 12:14:21 +00:00
aarch64-2014-12-02-combine-soften.ll
…
aarch64-a57-fp-load-balancing.ll
[AArch64][test] Remove unsafe-fp-math uses (NFC) (#164606)
2025-10-22 12:14:21 +00:00
aarch64-address-type-promotion-assertion.ll
[llvm] Remove undef from some llvm/test/Transforms tests (#125460)
2025-02-03 08:18:23 +00:00
aarch64-address-type-promotion.ll
…
aarch64-addv.ll
[AArch64] Fold uaddv(a) to a if the all lanes except the 0th are zeros (#159086)
2025-09-17 17:20:41 +08:00
aarch64-avoid-illegal-extract-subvector.ll
…
aarch64-be-bv.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
aarch64-bf16-dotprod-intrinsics.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
aarch64-bf16-ldst-intrinsics.ll
…
aarch64-bif-gen.ll
Revert "[AArch64][GlobalISel] Expand 64bit extracts to 128bit to allow more patterns (#142904)"
2025-06-11 08:32:55 +01:00
aarch64-bit-gen.ll
Revert "[AArch64][GlobalISel] Expand 64bit extracts to 128bit to allow more patterns (#142904)"
2025-06-11 08:32:55 +01:00
aarch64-bitwisenot-fold.ll
[TargetLowering] Fold (a | b) ==/!= b -> (a & ~b) ==/!= 0 when and-not exists (#145368)
2025-06-27 14:47:52 +01:00
aarch64-bswap-ext.ll
…
aarch64-checkMergeStoreCandidatesForDependencies.ll
…
aarch64-codegen-prepare-atp.ll
…
aarch64-combine-add-sub-mul.ll
[AArch64][SVE] Avoid movprfx by reusing register for _UNDEF pseudos. (#166926)
2025-11-10 16:33:59 +00:00
aarch64-combine-add-zext.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
aarch64-combine-fmul-fsub.mir
[AArch64] Remove UnsafeFPMath (#150876)
2025-07-29 12:41:09 +08:00
aarch64-combine-gather-lanes-limit-size.mir
[AArch64][MachineCombiner] Combine sequences of gather patterns (#152979)
2025-08-18 15:10:59 +03:00
aarch64-combine-gather-lanes-with-call.mir
[AArch64][MachineCombiner] Combine sequences of gather patterns (#152979)
2025-08-18 15:10:59 +03:00
aarch64-combine-gather-lanes.mir
[AArch64][MachineCombiner] Combine sequences of gather patterns (#152979)
2025-08-18 15:10:59 +03:00
aarch64-DAGCombine-findBetterNeighborChains-crash.ll
…
aarch64-dup-dot-crash.ll
…
aarch64-dup-ext-crash.ll
[AArch64] Don't try to sink and(load) (#122274)
2025-01-10 11:54:46 +00:00
aarch64-dup-ext-scalable.ll
[LLVM][AArch64] Reduce uses of "undef" in SVE CodeGen tests.
2025-02-26 11:11:03 +00:00
aarch64-dup-ext-vectortype-crash.ll
…
aarch64-dup-ext.ll
[GlobalISel] Add computeNumSignBits for ASHR (#139503)
2025-07-21 10:23:26 +01:00
aarch64-dup-extract-scalable.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
aarch64-dynamic-stack-layout.ll
[AArch64][test] Remove unsafe-fp-math uses (NFC) (#164606)
2025-10-22 12:14:21 +00:00
aarch64-fastcc-stackup.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
aarch64-fix-cortex-a53-835769.ll
[AArch64][test] Remove unsafe-fp-math uses (NFC) (#164606)
2025-10-22 12:14:21 +00:00
aarch64-fixup-statepoint-regs-crash.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
aarch64-fold-lslfast.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
aarch64-gep-opt.ll
[SeparateConstOffsetFromGEP] Remove support for arithmetic lowering (#151477)
2025-08-01 09:35:48 +02:00
aarch64-histcnt-dag-combine-hang.ll
[AArch64][SVE] Fix hang in VECTOR_HISTOGRAM DAG combine (#152539)
2025-08-08 09:59:24 +01:00
aarch64-icmp-opt.ll
…
aarch64-insert-subvector-undef.ll
…
aarch64-interleaved-access-w-undef.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
aarch64-interleaved-ld-combine.ll
…
aarch64-isel-csinc-type.ll
[AArch64][GlobalISel] Add extra GISel test coverage. NFC
2025-07-30 10:53:47 +01:00
aarch64-isel-csinc.ll
…
aarch64-isel-umin.ll
[AArch64] Use umin for x != 0 when +cssc is enabled (#169159)
2025-11-27 19:17:00 +00:00
aarch64-known-bits-hadd.ll
[AArch64][GlobalISel] Added support for hadd family of intrinsics (#163985)
2025-11-19 15:44:02 +00:00
aarch64-large-stack-spbump.mir
[CodeGen][NewPM] Port "PrologEpilogInserter" to NPM (#130550)
2025-04-29 13:13:45 +05:30
aarch64-ldst-modified-baseReg.mir
…
aarch64-ldst-no-premature-sp-pop.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
aarch64-ldst-opt-instr-ref.mir
[InstrRef] Preserve debug instr num in aarch64-ldst-opt. (#136009)
2025-04-30 14:17:22 -07:00
aarch64-ldst-subsuperReg-no-ldp.mir
…
aarch64-load-ext.ll
[AArch64] Optimize extending loads of small vectors (#163064)
2025-11-17 21:39:10 +02:00
aarch64-loop-gep-opt.ll
…
aarch64-lsr-bfi.ll
…
aarch64-matmul-fp16.ll
[AArch64][llvm] Add support for Neon vmmlaq_{f16,f32}_mf8_fpm intrinsics (#165431)
2025-11-07 15:24:13 +00:00
aarch64-matmul-fp32.ll
[AArch64][llvm] Add support for Neon vmmlaq_{f16,f32}_mf8_fpm intrinsics (#165431)
2025-11-07 15:24:13 +00:00
aarch64-matmul.ll
[AArch64][GlobalISel] Added usdot intrinsic support (#162615)
2025-10-15 19:16:54 +01:00
aarch64-matrix-umull-smull.ll
Reland "[RegAlloc] Fix the terminal rule check for interfere with DstReg (#168661)" (#169219)
2025-11-24 09:27:25 +08:00
aarch64-minmaxv.ll
[GISel] Support narrowing G_ICMP with more than 2 parts. (#119335)
2024-12-12 09:50:26 -08:00
aarch64-mixed-ptr-sizes.ll
[llvm][aarch64] Add support for the MS qualifiers __ptr32, __ptr64, _sptr, __uptr (#112793)
2025-01-31 10:39:53 -08:00
aarch64-mops-consecutive.ll
…
aarch64-mops-mte.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
aarch64-mops.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
aarch64-mov-debug-locs.mir
[AArch64][test] Remove unsafe-fp-math uses (NFC) (#164606)
2025-10-22 12:14:21 +00:00
aarch64-mull-masks.ll
[GISel][AArch64] Allow PatLeafs to be imported in GISel which were previously causing warnings (#140935)
2025-06-09 09:02:56 +01:00
aarch64-mulv.ll
[AArch64] Regenerate and update a number of check lines. NFC
2025-09-18 09:54:47 +01:00
aarch64-named-reg-w18.ll
…
aarch64-named-reg-x18.ll
…
aarch64-neon-faminmax.ll
…
aarch64-neon-vector-insert-uaddlv.ll
[AArch64] Don't try to vectorize fixed point to fp narrowing conversion (#130665)
2025-03-25 09:53:27 -07:00
aarch64-p2align-max-bytes-neoverse.ll
…
aarch64-p2align-max-bytes.ll
…
aarch64-pmull2.ll
…
aarch64-post-coalescer.mir
[AArch64PostCoalescer] Propagate undef flag after replacing (#163119)
2025-10-15 10:15:44 +01:00
aarch64-reassociate-accumulators-sve.ll
[AArch64][NFC] Rewrite aarch64-reassociate-accumulators tests (#142625)
2025-06-04 08:56:21 +01:00
aarch64-reassociate-accumulators.ll
AArch64: Convert tests to opaque pointers (#167442)
2025-11-11 02:52:45 +00:00
aarch64-saturating-arithmetic.ll
…
aarch64-scalarize-vec-load-ext.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
aarch64-sched-store.ll
…
aarch64-signedreturnaddress.ll
[RegAlloc] Sort CopyHint by IsCSR (#131046)
2025-04-14 09:58:46 -04:00
aarch64-smax-constantfold.ll
…
aarch64-sme2-asm.ll
[AArch64] Observe Z-reg inline asm clobbers without SVE (#143742)
2025-06-13 09:07:09 +01:00
aarch64-sme-stubs.ll
Reland "[AArch64][SME] Split SMECallAttrs out of SMEAttrs" (#138671)
2025-05-15 08:37:08 +01:00
aarch64-sme-za-call-lowering.ll
[AArch64][SME] Rework VG CFI information for streaming-mode changes (#152283)
2025-08-20 14:06:12 +01:00
aarch64-smov-gen.ll
…
aarch64-smull.ll
[AArch64] Optimize extending loads of small vectors (#163064)
2025-11-17 21:39:10 +02:00
aarch64-split-logic-bitmask-immediate.ll
[AArch64] Allow splitting bitmasks for EOR/ORR. (#150394)
2025-08-07 10:42:30 +01:00
aarch64-stp-cluster.ll
…
aarch64-sve2-faminmax.ll
[AArch64][SVE2] Add codegen patterns for SVE2 FAMINMAX (#107284)
2024-09-17 09:12:27 +01:00
aarch64-sve-and-combine-crash.ll
[LLVM][AArch64] Reduce uses of "undef" in SVE CodeGen tests.
2025-02-26 11:11:03 +00:00
aarch64-sve-asm-negative.ll
…
aarch64-sve-asm.ll
Reland "[AArch64] Define high bits of FPR and GPR registers (take 2) (#114827)"
2024-11-27 13:31:59 +00:00
aarch64-sve-fill-spill-pair.ll
Reapply "[AArch64][SVE] Pair SVE fill/spill into LDP/STP with -msve-vector-bits=128." (#135177)
2025-04-14 08:18:56 +01:00
aarch64-sve-ldst-one.ll
[AArch64] Generalize integer FPR lane stores for all types (#134117)
2025-04-17 09:25:57 +01:00
aarch64-swp-ws-live-intervals-1.mir
[llvm][CodeGen] update live intervals for ModuloScheduleExpanderMVE (#132677)
2025-04-10 15:28:10 +08:00
aarch64-swp-ws-live-intervals.mir
[llvm][CodeGen] avoid repeated interval calculation in window scheduler (#132352)
2025-04-03 14:25:55 +08:00
aarch64-sysreg128.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
aarch64-tail-dup-size.ll
[AArch64] Enable GlobalMerge on externals (#158592)
2025-09-17 17:49:23 +01:00
aarch64-tbz.ll
…
aarch64-tls-flags.ll
…
aarch64-tryBitfieldInsertOpFromOr-crash.ll
…
aarch64-unroll-and-jam.ll
…
aarch64-uzp1-combine.ll
…
aarch64-v1f32-arg.ll
…
aarch64-vcvtfp2fxs-combine.ll
…
aarch64-vector-pcs.mir
…
aarch64-vectorcombine-invalid-extract-index-crash.ll
…
aarch64-vuzp.ll
…
aarch64-wide-mul.ll
[AArch64][GlobalISel] Add push_mul_through_s/zext (#141551)
2025-07-31 07:38:11 +01:00
aarch64-wide-shuffle.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
aarch64-za-clobber.ll
…
aarch64st1.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
aarch-multipart.ll
…
abd-combine.ll
[DAG] Fold trunc(abdu(x,y)) and trunc(abds(x,y)) if they have sufficient leading zero/sign bits (#151471)
2025-08-08 10:43:14 +01:00
abds-neg.ll
[AArch64] Combine ADDS and SUBS nodes with the non-flag setting versions (#157563)
2025-09-13 11:03:46 +01:00
abds.ll
[AArch64] Fold uaddv(a) to a if the all lanes except the 0th are zeros (#159086)
2025-09-17 17:20:41 +08:00
abdu-neg.ll
[TargetLowering][ExpandABD] Prefer selects over usubo if we do the same for ucmp (#159889)
2025-09-25 10:33:05 +09:00
abdu.ll
[TargetLowering][ExpandABD] Prefer selects over usubo if we do the same for ucmp (#159889)
2025-09-25 10:33:05 +09:00
abs.ll
Revert "[AArch64][GlobalISel] Expand 64bit extracts to 128bit to allow more patterns (#142904)"
2025-06-11 08:32:55 +01:00
active_lane_mask.ll
[LLVM][CodeGen] Ensure optimizeIncrementingWhile only accepts scalable vectors. (#148351)
2025-07-14 12:03:51 +01:00
adc.ll
[AArch64][GlobalISel] Add a constant funnel shift post-legalizer combine. (#151912)
2025-10-29 07:47:41 +00:00
add-extract.ll
[AArch64][GlobalISel] Add extra GISel test coverage. NFC
2025-07-30 10:53:47 +01:00
add-i256.ll
…
add-negative.ll
…
add.ll
[AArch64] Optimize extending loads of small vectors (#163064)
2025-11-17 21:39:10 +02:00
addcarry-crash.ll
[AArch64][GlobalISel] Add test coverage for more adc / ands instructions. NFC
2025-07-31 07:35:13 +01:00
addg_subg.mir
…
addimm-mulimm.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
addp-shuffle.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
addr-of-ret-addr.ll
…
addrsig-macho.ll
…
adds_cmn.ll
[AArch64] Support commuted operands in performFlagSettingCombine (#162496)
2025-10-13 13:09:28 +01:00
addsub_ext.ll
PeepholeOpt: Fix looking for def of current copy to coalesce (#125533)
2025-02-05 23:29:02 +07:00
addsub-24bit-imm.mir
[AArch64] Fold UBFMXri to UBFMWri when it's an LSR or LSL alias (#106968)
2024-09-17 11:21:23 +01:00
addsub-constant-folding.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
addsub-shifted-reg-cheap-as-move.ll
…
addsub-shifted.ll
…
addsub.ll
[AArch64][GlobalISel] Add extra GISel test coverage. NFC
2025-07-30 10:53:47 +01:00
addtruncshift.ll
[AArch64] Combine vector add(trunc(shift)) (#169523)
2025-11-26 14:17:19 +00:00
aes.ll
…
alias_mask_nosve.ll
[Intrinsics][AArch64] Add intrinsics for masking off aliasing vector lanes (#117007)
2025-09-02 15:35:15 +01:00
alias_mask_scalable_nosve2.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
alias_mask_scalable.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
alias_mask.ll
[SelectionDAG] Fix AArch64 machine verifier bug when expanding LOOP_DEPENDENCE_MASK (#168221)
2025-11-15 21:12:11 +00:00
align-down.ll
[DAGCombiner] Add hasOneUse checks for folding (not (add X, -1)) to (neg X) (#126667)
2025-02-12 12:24:29 +08:00
alloca-load-store-scalable-array.ll
[AArch64][SVE] Tweak how SVE CFI expressions are emitted (#151677)
2025-08-06 09:21:57 +01:00
alloca-load-store-scalable-struct.ll
[AArch64][SVE] Tweak how SVE CFI expressions are emitted (#151677)
2025-08-06 09:21:57 +01:00
alloca-oversized.ll
[DataLayout] Specialize the getTypeAllocSize() implementation (#156687)
2025-09-04 09:27:33 +02:00
alloca.ll
Reapply "[Aarch64] [ISel] Don't save vaargs registers if vaargs are unused" (#131459)
2025-03-24 18:13:42 +03:00
allow-check.ll
…
ampere1-sched-add.mir
Reland "CodeGen][NewPM] Port MachineScheduler to NPM. (#125703)" (#126684)
2025-02-12 18:54:39 +05:30
analyze-branch.ll
…
analyzecmp.ll
…
and-mask-removal.ll
PeepholeOpt: Fix looking for def of current copy to coalesce (#125533)
2025-02-05 23:29:02 +07:00
and-mask-variable.ll
[AArch64] shouldFoldMaskToVariableShiftPair should be true for scalars up to the biggest legal type (#158069)
2025-09-30 17:48:47 +01:00
and-sink.ll
…
andandshift.ll
…
andcompare.ll
[AArch64] Update some tests to use a more common check prefix. NFC
2025-07-28 08:26:48 +01:00
andorbrcompare.ll
[AArch64] Update some tests to use a more common check prefix. NFC
2025-07-28 08:26:48 +01:00
andorxor.ll
[AArch64] Optimize extending loads of small vectors (#163064)
2025-11-17 21:39:10 +02:00
apple-latest-cpu.ll
…
apply-disjoint-flag-in-dagcombine.ll
[DAG] Apply Disjoint flag. (#118045)
2024-12-03 09:21:03 +08:00
arg_promotion.ll
Revert "[Transforms][IPO] Add func suffix in ArgumentPromotion and DeadArgume… (#105742)"
2024-09-19 03:54:13 -07:00
argument-blocks-array-of-struct.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
argument-blocks.ll
[AArch64] Do not split bfloat HFA args between regs and stack (#128909)
2025-02-27 11:38:41 +00:00
arithmetic_fence.ll
…
arm64_32-addrs.ll
PeepholeOpt: Fix looking for def of current copy to coalesce (#125533)
2025-02-05 23:29:02 +07:00
arm64_32-atomics.ll
…
arm64_32-fastisel.ll
…
arm64_32-frame-pointers.ll
…
arm64_32-gep-sink.ll
…
arm64_32-memcpy.ll
…
arm64_32-neon.ll
[AArch64] arm64_32-neon.ll - regenerate test checks
2025-07-07 18:31:11 +01:00
arm64_32-null.ll
…
arm64_32-pointer-extend.ll
…
arm64_32-stack-pointers.ll
…
arm64_32-tls.ll
…
arm64_32-va.ll
…
arm64_32.ll
[AArch64] Fold UBFMXri to UBFMWri when it's an LSR or LSL alias (#106968)
2024-09-17 11:21:23 +01:00
arm64-2011-03-09-CPSRSpill.ll
[llvm] Remove undef from some llvm/test/Transforms tests (#125460)
2025-02-03 08:18:23 +00:00
arm64-2011-03-17-AsmPrinterCrash.ll
[llvm] Remove undef from some llvm/test/Transforms tests (#125460)
2025-02-03 08:18:23 +00:00
arm64-2011-03-21-Unaligned-Frame-Index.ll
…
arm64-2011-04-21-CPSRBug.ll
[llvm] Remove undef from some llvm/test/Transforms tests (#125460)
2025-02-03 08:18:23 +00:00
arm64-2011-10-18-LdStOptBug.ll
…
arm64-2012-01-11-ComparisonDAGCrash.ll
[llvm] Remove undef from some llvm/test/Transforms tests (#125460)
2025-02-03 08:18:23 +00:00
arm64-2012-05-07-DAGCombineVectorExtract.ll
…
arm64-2012-05-07-MemcpyAlignBug.ll
…
arm64-2012-05-09-LOADgot-bug.ll
…
arm64-2012-05-22-LdStOptBug.ll
…
arm64-2012-06-06-FPToUI.ll
…
arm64-2012-07-11-InstrEmitterBug.ll
[llvm] Remove undef from some llvm/test/Transforms tests (#125460)
2025-02-03 08:18:23 +00:00
arm64-2013-01-13-ffast-fcmp.ll
…
arm64-2013-01-23-frem-crash.ll
[llvm] Remove undef from some llvm/test/Transforms tests (#125460)
2025-02-03 08:18:23 +00:00
arm64-2013-01-23-sext-crash.ll
[llvm] Remove undef from some llvm/test/Transforms tests (#125460)
2025-02-03 08:18:23 +00:00
arm64-2013-02-12-shufv8i8.ll
…
arm64-aapcs-be.ll
…
arm64-aapcs.ll
…
arm64-abi_align.ll
…
arm64-abi-hfa-args.ll
…
arm64-abi-varargs.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
arm64-abi.ll
…
arm64-addp.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
arm64-addr-mode-folding.ll
…
arm64-addr-type-promotion.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
arm64-addrmode.ll
[LiveIntervals] Ignore artificial regs when adding kill flags (#116963)
2024-12-04 20:25:31 +00:00
arm64-AdvSIMD-Scalar.ll
[AArch64] Lower zero cycle FPR zeroing (#156261)
2025-09-10 08:32:51 +03:00
arm64-alloc-no-stack-realign.ll
…
arm64-alloca-frame-pointer-offset.ll
…
arm64-andCmpBrToTBZ.ll
…
arm64-ands-bad-peephole.ll
…
arm64-AnInfiniteLoopInDAGCombine.ll
…
arm64-anyregcc-crash.ll
RegAlloc: Use DiagnosticInfo to report register allocation failures (#119492)
2024-12-16 10:49:08 +09:00
arm64-anyregcc.ll
…
arm64-arith-saturating.ll
[AArch64] Prefer using DUP instead of INS where possible (#138549)
2025-05-15 10:31:09 +02:00
arm64-arith.ll
…
arm64-arm64-dead-def-elimination-flag.ll
…
arm64-assert-zext-sext.ll
…
arm64-atomic-128.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
arm64-atomic.ll
…
arm64-bcc.ll
…
arm64-big-endian-bitconverts.ll
…
arm64-big-endian-eh.ll
…
arm64-big-endian-varargs.ll
…
arm64-big-endian-vector-callee.ll
…
arm64-big-endian-vector-caller.ll
…
arm64-big-imm-offsets.ll
…
arm64-big-stack.ll
…
arm64-bitfield-extract.ll
[AArch64] arm64-bitfield-extract.ll - regenerate test checks
2025-07-07 16:04:57 +01:00
arm64-blockaddress.ll
…
arm64-break.ll
…
arm64-build-vector.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
arm64-builtins-linux.ll
…
arm64-call-tailcalls.ll
[llvm] Remove undef from some llvm/test/Transforms tests (#125460)
2025-02-03 08:18:23 +00:00
arm64-cast-opt.ll
…
arm64-ccmp-heuristics.ll
…
arm64-ccmp.ll
[SimplifyCFG] Eliminate dead edges of switches according to the domain of conditions (#165748)
2025-11-04 20:55:33 +08:00
arm64-clrsb.ll
[AArch64][GlobalISel] Update and cleanup a number of gisel tests. NFC
2024-11-23 18:58:55 +00:00
arm64-coalesce-ext.ll
…
arm64-coalescing-MOVi32imm.ll
…
arm64-code-model-large-darwin.ll
…
arm64-codegen-prepare-extload.ll
[LLVM][IR] Use splat syntax when printing Constant[Data]Vector. (#112548)
2024-11-06 11:53:33 +00:00
arm64-collect-loh-garbage-crash.ll
…
arm64-collect-loh-str.ll
…
arm64-collect-loh.ll
[AArch64] Generalize integer FPR lane stores for all types (#134117)
2025-04-17 09:25:57 +01:00
arm64-complex-ret.ll
…
arm64-const-addr.ll
…
arm64-constrained-fcmp-no-nans-opt.ll
…
arm64-convert-v4f64.ll
[AArch64] Scalarize extracted vector loads. (#159714)
2025-09-23 07:18:46 +00:00
arm64-copy-phys-zero-reg.mir
[AArch64] Widen GPR32 zero cycle zeroing (#164244)
2025-10-25 09:36:56 +03:00
arm64-copy-tuple.ll
…
arm64-crc32.ll
…
arm64-crypto.ll
[AArch64][GlobalISel] Add regbank information to other sha1 intrinsics.
2025-09-07 13:50:25 +01:00
arm64-cse.ll
…
arm64-csel.ll
[AArch64] Check for negative numbers when adjusting icmps (#141151)
2025-05-30 15:22:54 +01:00
arm64-csldst-mmo.ll
…
arm64-custom-call-saved-reg.ll
…
arm64-cvt-simd-fptoi.ll
[AArch64][GlobalISel] SIMD fpcvt codegen for fptoi(_sat) (#160831)
2025-10-24 11:53:34 +01:00
arm64-cvt-simd-intrinsics.ll
[AArch64][GlobalISel] Add codegen for simd fpcvt intrinsics (#157680)
2025-09-25 14:39:30 +01:00
arm64-cvt.ll
…
arm64-dagcombiner-convergence.ll
…
arm64-dagcombiner-dead-indexed-load.ll
…
arm64-dagcombiner-load-slicing.ll
MachineScheduler: Improve instruction clustering (#137784)
2025-06-05 15:28:04 +08:00
arm64-darwin-cc.ll
…
arm64-dead-def-frame-index.ll
…
arm64-dead-register-def-bug.ll
[llvm] Remove undef from some llvm/test/Transforms tests (#125460)
2025-02-03 08:18:23 +00:00
arm64-detect-vec-redux.ll
[AArch64][test] Remove unsafe-fp-math uses (NFC) (#164606)
2025-10-22 12:14:21 +00:00
arm64-dup.ll
[AArch64][GlobalISel] Combine G_UNMERGE(G_DUPLANE16) -> G_DUPLANE16 (#142731)
2025-06-09 20:57:45 +01:00
arm64-early-ifcvt.ll
[AArch64] Convert CSEL(X, 1) into CSINC(X, XZR) in early-ifcvt (#162993)
2025-10-20 16:14:15 +02:00
arm64-elf-calls.ll
…
arm64-elf-constpool.ll
…
arm64-EXT-undef-mask.ll
…
arm64-ext.ll
[AArch64] Treat single-vector ext as legal shuffle masks. (#151909)
2025-08-06 20:54:11 +01:00
arm64-extend-int-to-fp.ll
…
arm64-extend.ll
…
arm64-extload-knownzero.ll
…
arm64-extract_subvector.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
arm64-extract-insert-varidx.ll
[GISel][AArch64] Allow PatLeafs to be imported in GISel which were previously causing warnings (#140935)
2025-06-09 09:02:56 +01:00
arm64-extract.ll
…
arm64-fast-isel-addr-offset.ll
…
arm64-fast-isel-alloca.ll
…
arm64-fast-isel-br.ll
…
arm64-fast-isel-call.ll
…
arm64-fast-isel-conversion-fallback.ll
[AArch64] Use pattern to select bf16 fpextend (#137212)
2025-05-02 12:55:18 +01:00
arm64-fast-isel-conversion.ll
…
arm64-fast-isel-crc32.ll
…
arm64-fast-isel-fcmp.ll
…
arm64-fast-isel-gv.ll
…
arm64-fast-isel-icmp.ll
…
arm64-fast-isel-indirectbr.ll
…
arm64-fast-isel-intrinsic.ll
…
arm64-fast-isel-materialize.ll
…
arm64-fast-isel-noconvert.ll
…
arm64-fast-isel-rem.ll
…
arm64-fast-isel-ret.ll
…
arm64-fast-isel-store.ll
…
arm64-fast-isel-tag.ll
…
arm64-fast-isel.ll
[llvm] Remove undef from some llvm/test/Transforms tests (#125460)
2025-02-03 08:18:23 +00:00
arm64-fastcc-tailcall.ll
…
arm64-fastisel-gep-promote-before-add.ll
…
arm64-fcmp-opt.ll
…
arm64-fcopysign.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
arm64-fixed-point-scalar-cvt-dagcombine.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
arm64-fma-combine-with-fpfusion.ll
[AArch64][test] Remove unsafe-fp-math uses (NFC) (#164606)
2025-10-22 12:14:21 +00:00
arm64-fma-combines.ll
[CodeGen] Remove -enable-unsafe-fp-math option (#164559)
2025-10-22 15:40:31 +08:00
arm64-fmadd.ll
…
arm64-fmax-safe.ll
[ValueTracking] Do not use FMF from fcmp (#142266)
2025-06-02 18:21:14 +08:00
arm64-fmax.ll
[AArch64] Support MI and PL (#150314)
2025-08-11 07:41:38 +01:00
arm64-fminv.ll
…
arm64-fml-combines.ll
[AArch64] Remove UnsafeFPMath (#150876)
2025-07-29 12:41:09 +08:00
arm64-fmuladd.ll
…
arm64-fold-address.ll
…
arm64-fold-lshr.ll
[LLVM][CodeGen][SVE] Don't combine shifts at the expense of addressing modes. (#149873)
2025-07-24 10:54:48 +01:00
arm64-fold-lsl.ll
…
arm64-fp128-folding.ll
…
arm64-fp128.ll
[AArch64][GlobalISel] Improve lowering of vector fp16 fptrunc (#163398)
2025-11-28 08:32:25 +00:00
arm64-fp-contract-zero.ll
[AArch64] Regenerate and update a number of check lines. NFC
2025-09-18 09:54:47 +01:00
arm64-fp-imm-size.ll
…
arm64-fp-imm.ll
…
arm64-fp.ll
…
arm64-fpcr.ll
…
arm64-fpenv.ll
[AArch64] Create set.fpmr intrinsic and assembly lowering (#114248)
2024-11-08 12:18:38 +00:00
arm64-frame-index.ll
…
arm64-global-address.ll
…
arm64-hello.ll
…
arm64-hlt.ll
…
arm64-homogeneous-prolog-epilog-bad-outline.mir
…
arm64-homogeneous-prolog-epilog-frame-tail.ll
[AArch64] Do not mark homogeneous prolog/epilog functions optnone (#117959)
2024-11-28 00:11:05 -08:00
arm64-homogeneous-prolog-epilog-no-helper.ll
…
arm64-homogeneous-prolog-epilog-odd-csrs.ll
…
arm64-homogeneous-prolog-epilog.ll
[AArch64] Do not mark homogeneous prolog/epilog functions optnone (#117959)
2024-11-28 00:11:05 -08:00
arm64-i16-subreg-extract.ll
[AArch64] Scalarize extracted vector loads. (#159714)
2025-09-23 07:18:46 +00:00
arm64-icmp-opt.ll
…
arm64-indexed-memory.ll
[AArch64][GlobalISel] Add G_FPEXT(G_FCONSTANT) folding (#162829)
2025-10-10 12:17:06 +00:00
arm64-indexed-vector-ldst-2.ll
[AArch64][test] Remove unsafe-fp-math uses (NFC) (#164606)
2025-10-22 12:14:21 +00:00
arm64-indexed-vector-ldst.ll
[AArch64] Do not generate ld1IndexPost when inserting into lane 0 of a zero vector (#145723)
2025-06-27 12:47:16 +01:00
arm64-inline-asm-error-I.ll
…
arm64-inline-asm-error-J.ll
…
arm64-inline-asm-error-K.ll
…
arm64-inline-asm-error-L.ll
…
arm64-inline-asm-error-M.ll
…
arm64-inline-asm-error-N.ll
…
arm64-inline-asm-zero-reg-error.ll
…
arm64-inline-asm.ll
…
arm64-instruction-mix-remarks.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
arm64-isel-or.ll
…
arm64-join-reserved.ll
…
arm64-jumptable.ll
…
arm64-large-frame.ll
…
arm64-ld1.ll
[LLVM][CodeGen][AArch64] Fix global-isel for LD1R. (#164418)
2025-10-22 12:22:49 +01:00
arm64-ld-from-st.ll
[AArch64] Fold UBFMXri to UBFMWri when it's an LSR or LSL alias (#106968)
2024-09-17 11:21:23 +01:00
arm64-ldp-aa.ll
…
arm64-ldp-cluster.ll
[AArch64] Scalarize extracted vector loads. (#159714)
2025-09-23 07:18:46 +00:00
arm64-ldp.ll
…
arm64-ldst-unscaled-pre-post.mir
…
arm64-ldur.ll
…
arm64-ldxr-stxr.ll
PeepholeOpt: Fix looking for def of current copy to coalesce (#125533)
2025-02-05 23:29:02 +07:00
arm64-leaf.ll
…
arm64-long-shift.ll
…
arm64-memcpy-inline.ll
…
arm64-memset-inline.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
arm64-memset-to-bzero-pgso.ll
…
arm64-memset-to-bzero.ll
…
arm64-misaligned-memcpy-inline.ll
…
arm64-misched-basic-A53.ll
[AArch64][test] Remove unsafe-fp-math uses (NFC) (#164606)
2025-10-22 12:14:21 +00:00
arm64-misched-basic-A57.ll
[AArch64][test] Remove unsafe-fp-math uses (NFC) (#164606)
2025-10-22 12:14:21 +00:00
arm64-misched-forwarding-A53.ll
…
arm64-misched-memdep-bug.ll
…
arm64-misched-multimmo.ll
…
arm64-movi.ll
…
arm64-mte.ll
…
arm64-mul.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
arm64-named-reg-alloc.ll
CodeGen: Emit error if getRegisterByName fails (#145194)
2025-06-23 16:33:35 +09:00
arm64-named-reg-notareg.ll
CodeGen: Emit error if getRegisterByName fails (#145194)
2025-06-23 16:33:35 +09:00
arm64-narrow-st-merge.ll
…
arm64-neg.ll
…
arm64-neon-2velem-high.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
arm64-neon-2velem.ll
[AArch64][GlobalISel] Combine G_UNMERGE(G_DUPLANE16) -> G_DUPLANE16 (#142731)
2025-06-09 20:57:45 +01:00
arm64-neon-3vdiff.ll
[AArch64][GlobalISel] Added pmull/pmull64 intrinsic support (#165740)
2025-11-05 16:53:45 +00:00
arm64-neon-aba-abd.ll
[DAG] Fold trunc(abdu(x,y)) and trunc(abds(x,y)) if they have sufficient leading zero/sign bits (#151471)
2025-08-08 10:43:14 +01:00
arm64-neon-across.ll
[AArch64] Lower aarch64_neon_saddlv via SADDLV nodes. (#103307)
2024-08-22 16:43:24 +01:00
arm64-neon-add-pairwise.ll
[AArch64][GlobalISel] Prefer DUPLANE to REV and other shuffles (#142725)
2025-06-09 07:47:17 +01:00
arm64-neon-add-sub.ll
…
arm64-neon-copy.ll
[AArch64][GlobalISel] SIMD fpcvt codegen for fptoi(_sat) (#160831)
2025-10-24 11:53:34 +01:00
arm64-neon-copyPhysReg-tuple.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
arm64-neon-mul-div-cte.ll
[GlobaISel] Allow expanding of sdiv -> mul by constant (#146504)
2025-07-14 15:01:12 +01:00
arm64-neon-mul-div.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
arm64-neon-scalar-by-elem-mul.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
arm64-neon-select_cc.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
arm64-neon-simd-ldst-one.ll
Revert "[AArch64][GlobalISel] Expand 64bit extracts to 128bit to allow more patterns (#142904)"
2025-06-11 08:32:55 +01:00
arm64-neon-simd-shift.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
arm64-neon-simd-vget.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
arm64-neon-st-lane-aa.ll
…
arm64-neon-v1i1-setcc.ll
[AArch64] Spare N2I roundtrip when splatting float comparison (#141806)
2025-06-06 19:07:12 +03:00
arm64-neon-v8.1a.ll
Revert "[AArch64][GlobalISel] Expand 64bit extracts to 128bit to allow more patterns (#142904)"
2025-06-11 08:32:55 +01:00
arm64-neon-vector-list-spill.ll
…
arm64-neon-vector-shuffle-extract.ll
…
arm64-non-pow2-ldst.ll
…
arm64-nvcast.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
arm64-opt-remarks-lazy-bfi.ll
…
arm64-patchpoint-scratch-regs.ll
…
arm64-patchpoint.ll
…
arm64-pic-local-symbol.ll
…
arm64-platform-reg.ll
…
arm64-popcnt.ll
[AArch64] Use umin for x != 0 when +cssc is enabled (#169159)
2025-11-27 19:17:00 +00:00
arm64-prefetch-addrmode.ll
[AArch64] Allow register offset addressing mode for prefetch (#124534)
2025-01-28 09:16:40 +00:00
arm64-prefetch-new.ll
…
arm64-prefetch.ll
…
arm64-preserve-all.ll
Revert "[GlobalISel] Diagnose inline assembly constraint lowering errors (#135782)"
2025-05-07 14:50:45 +02:00
arm64-preserve-most.ll
Revert "[GlobalISel] Diagnose inline assembly constraint lowering errors (#135782)"
2025-05-07 14:50:45 +02:00
arm64-promote-const-complex-initializers.ll
…
arm64-promote-const.ll
…
arm64-raddhn-combine.ll
…
arm64-redzone.ll
…
arm64-reg-copy-noneon.ll
…
arm64-register-offset-addressing.ll
…
arm64-register-pairing.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
arm64-regress-f128csel-flags.ll
…
arm64-regress-interphase-shift.ll
…
arm64-regress-opt-cmp-signed.mir
[AArch64] Allow peephole to optimize AND + signed compare with 0 (#153608)
2025-11-10 22:32:31 +00:00
arm64-regress-opt-cmp.mir
…
arm64-reserve-call-saved-reg.ll
…
arm64-reserved-arg-reg-call-error.ll
…
arm64-return-vector.ll
…
arm64-returnaddr.ll
…
arm64-rev.ll
[GISel][AArch64] Allow PatLeafs to be imported in GISel which were previously causing warnings (#140935)
2025-06-09 09:02:56 +01:00
arm64-rounding.ll
[AArch64][test] Remove unsafe-fp-math uses (NFC) (#164606)
2025-10-22 12:14:21 +00:00
arm64-saddlp1d-uaddlp1d.mir
[AArch64][GlobalISel] Prevented llvm.aarch64.neon.saddlp/uaddlp fallback (#160883)
2025-10-07 21:51:57 +01:00
arm64-scaled_iv.ll
…
arm64-scvt.ll
…
arm64-setcc-int-to-fp-combine.ll
…
arm64-setcc-swap-infloop.ll
…
arm64-shifted-sext.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
arm64-shrink-v1i64.ll
…
arm64-shrink-wrapping.ll
Revert "[ShrinkWrap] Modify shrink wrapping to accommodate functions terminated by no-return blocks" (#169852)
2025-11-27 19:12:56 +00:00
arm64-simd-scalar-to-vector.ll
…
arm64-simplest-elf.ll
…
arm64-sincos.ll
…
arm64-sitofp-combine-chains.ll
…
arm64-sli-sri-opt.ll
[AArch64][GlobalISel] Update and cleanup a number of gisel tests. NFC
2024-11-23 18:58:55 +00:00
arm64-smaxv.ll
…
arm64-sminv.ll
…
arm64-spill-lr.ll
…
arm64-spill-remarks-treshold-hotness.ll
…
arm64-spill-remarks.ll
…
arm64-spill.ll
…
arm64-sqshl-uqshl-i64Contant.ll
…
arm64-srl-and.ll
[AArch64][GlobalISel] Add some GISel test coverage for icmp-and tests. NFC
2025-10-30 09:00:36 +00:00
arm64-st1.ll
[AArch64] Generalize integer FPR lane stores for all types (#134117)
2025-04-17 09:25:57 +01:00
arm64-stack-no-frame.ll
…
arm64-stackmap-nops.ll
…
arm64-stackmap.ll
…
arm64-stackpointer.ll
…
arm64-stacksave.ll
…
arm64-storebytesmerge.ll
[AArch64][test] Remove unsafe-fp-math uses (NFC) (#164606)
2025-10-22 12:14:21 +00:00
arm64-stp-aa.ll
…
arm64-stp.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
arm64-strict-align.ll
…
arm64-stur.ll
…
arm64-subsections.ll
…
arm64-subvector-extend.ll
[AArch64][GlobalISel] Use TargetConstant for shift immediates (#161527)
2025-10-03 20:16:08 +01:00
arm64-summary-remarks.ll
…
arm64-swizzle-tbl-i16-layout.ll
…
arm64-tbl.ll
[AArch64] Fix tryToConvertShuffleOfTbl2ToTbl4 with non-buildvector input operands. (#135961)
2025-04-23 08:36:08 +01:00
arm64-this-return.ll
[GISel] Introduce MIFlags::InBounds (#150900)
2025-07-30 13:01:23 +02:00
arm64-tls-darwin.ll
…
arm64-tls-dynamic-together.ll
…
arm64-tls-dynamics.ll
…
arm64-tls-initial-exec.ll
…
arm64-tls-local-exec.ll
…
arm64-trap.ll
[AArch64][GlobalISel] Mark G_TRAP, G_DEBUGTRAP and G_UBSANTRAP as legal. NFC
2025-08-23 08:11:19 +01:00
arm64-triv-disjoint-mem-access.ll
[AArch64][test] Remove unsafe-fp-math uses (NFC) (#164606)
2025-10-22 12:14:21 +00:00
arm64-trn.ll
[AArch64] match TRN starting from undef elements (#167955)
2025-11-19 12:53:12 +00:00
arm64-trunc-store.ll
…
arm64-umaxv.ll
…
arm64-uminv.ll
…
arm64-umov.ll
…
arm64-unaligned_ldst.ll
…
arm64-uzp2-combine.ll
…
arm64-uzp.ll
…
arm64-vaargs.ll
…
arm64-vabs.ll
[AArch64][GlobalISel] Use TargetConstant for shift immediates (#161527)
2025-10-03 20:16:08 +01:00
arm64-vadd.ll
[AArch64][GlobalISel] Prevented llvm.aarch64.neon.saddlp/uaddlp fallback (#160883)
2025-10-07 21:51:57 +01:00
arm64-vaddlv.ll
…
arm64-vaddv.ll
PeepholeOpt: Fix looking for def of current copy to coalesce (#125533)
2025-02-05 23:29:02 +07:00
arm64-variadic-aapcs.ll
…
arm64-vbitwise.ll
…
arm64-vcmp.ll
…
arm64-vcnt.ll
…
arm64-vcombine.ll
…
arm64-vcvt_f32_su32.ll
…
arm64-vcvt_f.ll
[AArch64][GlobalISel] Update checks for arm64-vcvt_f.ll. NFC
2025-10-19 22:40:58 +01:00
arm64-vcvt_n.ll
…
arm64-vcvt_su32_f32.ll
…
arm64-vcvt.ll
[AArch64][GlobalISel] SIMD fpcvt codegen for fptoi(_sat) (#160831)
2025-10-24 11:53:34 +01:00
arm64-vcvtxd_f32_f64.ll
[AArch64][GlobalISel] Prevented llvm.aarch64.sisd.fcvtxn fallback (#159811)
2025-09-22 10:31:27 +01:00
arm64-vecCmpBr.ll
…
arm64-vecFold.ll
…
arm64-vector-ext.ll
…
arm64-vector-imm.ll
[AArch64] Update and cleanup arm64-vector-imm.ll test. NFC
2024-09-11 07:50:39 +01:00
arm64-vector-insertion.ll
[AArch64] Replace expensive move from wzr by two moves via floating point immediate (#146538)
2025-07-16 12:41:59 +02:00
arm64-vector-ldst.ll
…
arm64-vext_reverse.ll
[AArch64] Regnerate and update a number of tests. NFC
2025-08-04 07:41:57 +01:00
arm64-vext.ll
[AArch64] Regnerate and update a number of tests. NFC
2025-08-04 07:41:57 +01:00
arm64-vhadd.ll
[AArch64][GlobalISel] Added support for hadd family of intrinsics (#163985)
2025-11-19 15:44:02 +00:00
arm64-vhsub.ll
…
arm64-virtual_base.ll
…
arm64-vmax.ll
…
arm64-vminmaxnm.ll
…
arm64-vmovn.ll
[GlobalISel] Legalize Saturated Truncate instructions and intrinsics (#154340)
2025-08-20 10:37:22 +01:00
arm64-vmul.ll
[AArch64][GlobalISel] Added pmull/pmull64 intrinsic support (#165740)
2025-11-05 16:53:45 +00:00
arm64-volatile.ll
…
arm64-vqadd.ll
[AArch64] Add v1i64 addsat/subsat (#142342)
2025-06-03 21:47:41 +01:00
arm64-vqsub.ll
[AArch64] Add v1i64 addsat/subsat (#142342)
2025-06-03 21:47:41 +01:00
arm64-vselect.ll
…
arm64-vsetcc_fp.ll
[LLVM][CodeGen][AArch64] Regenerate CHECK lines for arm64-vsetcc_fp.ll and fp16-v4-instructions.ll.
2025-04-10 15:10:56 +00:00
arm64-vshift.ll
[AArch64][GlobalISel] Ensure vector types match in shift instructions
2025-09-06 12:38:28 +01:00
arm64-vshr.ll
…
arm64-vshuffle.ll
…
arm64-vsqrt.ll
…
arm64-vsra.ll
…
arm64-vsub.ll
…
arm64-weak-reference.ll
…
arm64-windows-calls.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
arm64-windows-tailcall.ll
[win/arm64] Enable tail call with inreg arguments when possible (#134671)
2025-04-08 15:25:28 +02:00
arm64-xaluo.ll
…
arm64-zero-cycle-regmove-fpr.ll
[AArch64][NFC] Align ZCM test names to MOVE not MOV (#163069)
2025-10-16 17:57:13 +03:00
arm64-zero-cycle-regmove-gpr.ll
[AArch64][NFC] Align ZCM test names to MOVE not MOV (#163069)
2025-10-16 17:57:13 +03:00
arm64-zero-cycle-zeroing-fpr.ll
[AArch64] Lower zero cycle FPR zeroing (#156261)
2025-09-10 08:32:51 +03:00
arm64-zero-cycle-zeroing-gpr.ll
[AArch64] Widen GPR32 zero cycle zeroing (#164244)
2025-10-25 09:36:56 +03:00
arm64-zeroreg.ll
…
arm64-zext.ll
…
arm64-zextload-unscaled.ll
…
arm64-zip.ll
[AArch64] recognise zip1/zip2 with flipped operands (#167235)
2025-11-27 17:11:56 +00:00
arm64ec-alias.ll
Introduce MCAsmInfo::UsesSetToEquateSymbol and prefer = to .set
2025-06-11 22:19:31 -07:00
arm64ec-available-externally.ll
[win][arm64ec] Handle available_externally functions (#151610)
2025-08-01 14:04:39 -07:00
arm64ec-builtins.ll
AArch64: Add libcall impl declarations for __arm_sc* memory functions (#144977)
2025-06-27 17:53:03 +09:00
arm64ec-dllimport.ll
…
arm64ec-dont-call.ll
[win][arm64ec] Fix duplicate errors with the dontcall attribute (#152810)
2025-08-12 11:05:07 -07:00
arm64ec-eh.ll
[win] Fix EH Cont Guard targets when SEH personality is used (#129612)
2025-03-07 09:07:47 -08:00
arm64ec-empty-name.ll
[win][arm64ec] Handle empty function names (#151609)
2025-08-04 16:20:55 -07:00
arm64ec-entry-thunks-local-linkage.ll
…
arm64ec-entry-thunks.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
arm64ec-exit-thunks.ll
[AArch64] Fix Arm64EC mangling with C++ symbols using MD5 mangling. (#160963)
2025-10-06 15:42:50 -07:00
arm64ec-hybrid-patchable.ll
Introduce MCAsmInfo::UsesSetToEquateSymbol and prefer = to .set
2025-06-11 22:19:31 -07:00
arm64ec-indirect-call.ll
[Arm64EC] Preserve X9 for indirect calls. (#167782)
2025-11-17 16:24:40 -08:00
arm64ec-reservedregs.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
arm64ec-symbols.ll
Introduce MCAsmInfo::UsesSetToEquateSymbol and prefer = to .set
2025-06-11 22:19:31 -07:00
arm64ec-varargs.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
asm-large-immediate.ll
…
asm-ld1-wrong-constraint.ll
…
asm-print-comments.ll
…
asm-srcloc.ll
…
assertion-rc-mismatch.ll
…
atomic-ops-ldapr.ll
…
atomic-ops-lse.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
atomic-ops-msvc.ll
support branch hint for AtomicExpandImpl::expandAtomicCmpXchg (#152366)
2025-09-02 09:33:28 -04:00
atomic-ops-not-barriers.ll
…
atomic-ops.ll
[AArch64] Make the list of outline atomic supported operations explicit (#167760)
2025-11-13 18:05:08 +00:00
atomic-oversize.ll
…
atomicrmw-cond-sub-clamp.ll
Add usub_cond and usub_sat operations to atomicrmw (#105568)
2024-09-06 16:19:20 +01:00
atomicrmw-fadd.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
atomicrmw-fmax.ll
support branch hint for AtomicExpandImpl::expandAtomicCmpXchg (#152366)
2025-09-02 09:33:28 -04:00
atomicrmw-fmin.ll
support branch hint for AtomicExpandImpl::expandAtomicCmpXchg (#152366)
2025-09-02 09:33:28 -04:00
atomicrmw-fsub.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
atomicrmw-O0.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
atomicrmw-uinc-udec-wrap.ll
…
atomicrmw-xchg-fp.ll
PeepholeOpt: Fix looking for def of current copy to coalesce (#125533)
2025-02-05 23:29:02 +07:00
autoupgrade-aarch64-neon-addp-float.ll
…
avg.ll
[DAGCombiner] Add combine avg from shifts (#113909)
2024-10-31 10:57:27 +01:00
avoid-free-ext-promotion.ll
[SimplifyCFG] Extend jump-threading to allow live local defs (#135079)
2025-07-31 09:44:14 -04:00
avoid-pre-trunc.ll
[DAG] visitTRUNCATE - more aggressively fold trunc(add(x,x)) -> add(trunc(x),trunc(x)) (#164227)
2025-10-21 10:17:57 +00:00
avoid-zero-copy.mir
[CodeGen][NewPM] Port MachineCopyPropagation to NPM (#125202)
2025-02-04 15:45:03 +05:30
basic-block-sections-cold.ll
…
basic-block-sections-unsafe.ll
…
basic-pic.ll
…
bcax.ll
[AArch64] Enable using SVE2 bit-sel instructions with Neon types. (#146906)
2025-07-08 09:06:49 +01:00
bcmp-inline-small.ll
…
bcmp.ll
MachineScheduler: Improve instruction clustering (#137784)
2025-06-05 15:28:04 +08:00
bf16_fast_math.ll
[InstrEmitter] Use AddOperand in EmitCopyToRegClassNode. (#146637)
2025-07-02 09:44:54 -07:00
bf16-convert-intrinsics.ll
[AArch64] Improve bcvtn2 and remove aarch64_neon_bfcvt intrinsics (#120363)
2025-01-21 09:16:04 +00:00
bf16-imm.ll
…
bf16-instructions.ll
[AArch64] Use pattern to select bf16 fpextend (#137212)
2025-05-02 12:55:18 +01:00
bf16-select.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
bf16-shuffle.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
bf16-v4-instructions.ll
[AArch64] Don't try to vectorize fixed point to fp narrowing conversion (#130665)
2025-03-25 09:53:27 -07:00
bf16-v8-instructions.ll
[LLVM][SelectionDAG] Simplify SplitVecOp_VSETCC. (#139295)
2025-05-13 12:13:01 +01:00
bf16-vector-bitcast.ll
[AArch64] Add missing bitcast patterns for bf16<->f16 converts. (#159816)
2025-09-29 07:24:57 +01:00
bf16-vector-shuffle.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
bf16.ll
[AArch64] Add pre-index store patterns for bf16.
2025-01-23 21:52:20 +00:00
bfis-in-loop.ll
[PHIElimination] Revert #131837 #146320 #146337 (#146850)
2025-07-03 07:48:08 -04:00
bics.ll
…
big-callframe.ll
…
bisect-post-ra-machine-sink.mir
[CodeGen][NewPM] Port "PostRAMachineSink" pass to NPM (#129690)
2025-07-10 13:10:46 +05:30
bitcast_truncstore.ll
[AArch64] Removed redundant FMOV instruction for truncstores of f64/f32 via bitcast to i64/i32/i8. (#149997)
2025-09-08 10:35:04 +01:00
bitcast-extend.ll
[AArch64] Add some tests for bitcast vector loads and scalarizing loaded vectors. NFC
2025-09-19 07:49:22 +01:00
bitcast-promote-widen.ll
[AArch64] Prefer zip over ushll for anyext. (#133433)
2025-04-01 16:24:54 +01:00
bitcast-v2i8.ll
[AArch64] Generalize integer FPR lane stores for all types (#134117)
2025-04-17 09:25:57 +01:00
bitcast.ll
[AArch64] Optimize extending loads of small vectors (#163064)
2025-11-17 21:39:10 +02:00
bitfield-extract.ll
[AArch64] Fold UBFMXri to UBFMWri when it's an LSR or LSL alias (#106968)
2024-09-17 11:21:23 +01:00
bitfield-insert-0.ll
…
bitfield-insert.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
bitfield.ll
…
bitreverse.ll
[GISel][AArch64] Scalarize i128 bitreverse instructions. Added tests for i128 and v2i128 bitreverse (#142621)
2025-06-04 13:03:00 +01:00
block-placement-optimize-branches.ll
[CodeLayout] Do not flip branch condition when using optsize (#114607)
2024-11-12 09:50:29 -08:00
blockaddress.ll
…
blr-bti-preserves-operands.mir
[CodeGen] Fix handling dead redefs in finalizeBundle (#157427)
2025-09-10 12:48:12 +01:00
bool-ext-inc.ll
…
bool-loads.ll
…
br-cond-not-merge.ll
…
br-to-eh-lpad.ll
[llvm] Remove br i1 undef in some llvm/test/CodeGen tests (#127368)
2025-02-16 18:44:46 +00:00
br-undef-cond.ll
[llvm] Remove br i1 undef in some llvm/test/CodeGen tests (#127368)
2025-02-16 18:44:46 +00:00
branch-folder-merge-mmos.ll
…
branch-folder-oneinst.mir
[CodeGen][NPM] Port BranchFolder to NPM (#128858)
2025-03-13 13:41:28 +05:30
branch-relax-alignment.ll
…
branch-relax-asm.ll
…
branch-relax-b.ll
…
branch-relax-bcc.ll
…
branch-relax-block-size.mir
[CodeGen][NPM] Port BranchRelaxation to NPM (#130067)
2025-04-14 10:19:42 +05:30
branch-relax-cbz.ll
…
branch-relax-cross-section.mir
[CodeGen][NPM] Port BranchRelaxation to NPM (#130067)
2025-04-14 10:19:42 +05:30
branch-relax-xray.ll
…
branch-target-enforcement-indirect-calls.ll
…
breg.ll
…
bsl.ll
[AArch64] Use SVE2 bit-sel instructions for some binary patterns. (#147544)
2025-07-10 11:36:01 +01:00
bsp_implicit_ops.mir
[AArch64] Drop flags from BSP pseudos (#151856)
2025-08-08 07:47:56 +01:00
bswap-known-bits.ll
…
bswap.ll
Revert "[AArch64][GlobalISel] Expand 64bit extracts to 128bit to allow more patterns (#142904)"
2025-06-11 08:32:55 +01:00
bti-branch-relaxation.ll
[AArch64][test] Remove unsafe-fp-math uses (NFC) (#164606)
2025-10-22 12:14:21 +00:00
bti-ehpad.ll
[AArch64][BTI] Add BTI at EH entries. (#155308)
2025-08-30 10:56:03 +01:00
bti-linkage.ll
[AArch64][v8.5A] Omit BTI for non-addr-taken static fns in ELF (#135043)
2025-04-10 17:08:45 +01:00
build-attributes-all.ll
[AArch64][Build Attributes] Improve Parsing and Formatting (#126530)
2025-02-25 09:54:56 +00:00
build-attributes-bti.ll
[AArch64][Build Attributes] Improve Parsing and Formatting (#126530)
2025-02-25 09:54:56 +00:00
build-attributes-gcs.ll
[AArch64][Build Attributes] Improve Parsing and Formatting (#126530)
2025-02-25 09:54:56 +00:00
build-attributes-pac.ll
[AArch64][Build Attributes] Improve Parsing and Formatting (#126530)
2025-02-25 09:54:56 +00:00
build-attributes-pauthabi.ll
[AArch64][Build Attributes] Improve Parsing and Formatting (#126530)
2025-02-25 09:54:56 +00:00
build-one-lane.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
build-pair-isel.ll
…
build-vector-dup-simd.ll
[AArch64] Spare N2I roundtrip when splatting float comparison (#141806)
2025-06-06 19:07:12 +03:00
build-vector-extract.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
build-vector-to-extract-subvec-crash.ll
…
build-vector-two-dup.ll
AArch64: Enable terminal rule (#165959)
2025-11-10 12:49:21 -08:00
byval-type.ll
…
call-rv-marker.ll
[AArch64] Regenerate and update a number of check lines. NFC
2025-09-18 09:54:47 +01:00
callbr-asm-label-bti.ll
[ARM,AArch64] Don't put BTI at asm goto branch targets (#141562)
2025-06-03 08:44:13 +01:00
callbr-asm-label.ll
[ARM,AArch64] Don't put BTI at asm goto branch targets (#141562)
2025-06-03 08:44:13 +01:00
callbr-asm-obj-file.ll
…
callbr-asm-outputs-indirect-isel.ll
[ARM,AArch64] Don't put BTI at asm goto branch targets (#141562)
2025-06-03 08:44:13 +01:00
callbr-prepare.ll
[AArch64] Regenerate and update a number of check lines. NFC
2025-09-18 09:54:47 +01:00
callee-save.ll
…
calleetypeid-directcall-mismatched.ll
[llvm] Extract and propagate callee_type metadata
2025-07-30 14:56:39 -07:00
callsite-emit-calleetypeid-tailcall.ll
[llvm] Extract and propagate callee_type metadata
2025-07-30 14:56:39 -07:00
callsite-emit-calleetypeid.ll
[llvm] Extract and propagate callee_type metadata
2025-07-30 14:56:39 -07:00
cbz_wzr.mir
[AArch64] Some tests for cbz/tbz with wzr. NFC
2025-10-01 12:41:03 +01:00
ccmp-cse.ll
[AArch64] Reorder Comparison Trees to Facilitate CSE (#168064)
2025-11-18 17:36:18 +00:00
ccmp-successor-probs.mir
…
cfguard-arm64ec.ll
[CodeGen][ARM64EC] Don't treat guest exit thunks as indirect calls (#165885)
2025-11-04 00:04:36 +01:00
cfguard-checks.ll
…
cfguard-module-flag.ll
…
cfi_restore.mir
…
cfi-fixup-multi-block-prologue.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
cfi-fixup-multi-section.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
cfi-fixup.ll
…
cfi-fixup.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
cfi-sync-async.ll
…
cfinv-def-nzcv.mir
…
cfinv-use-nzcv.mir
…
cgdata-global-hash.ll
[CGData][MachineOutliner] Global Outlining (#90074)
2024-09-10 06:56:31 -07:00
cgdata-merge-crash.ll
Reland [CGData][GMF] Skip No Params (#116548)
2024-11-25 13:55:02 -08:00
cgdata-merge-gvar-nsconst.ll
Reapply "[StructuralHash] Global Variable (#118412)"
2024-12-03 21:33:03 -08:00
cgdata-merge-gvar-objc.ll
Reapply "[StructuralHash] Global Variable (#118412)"
2024-12-03 21:33:03 -08:00
cgdata-merge-gvar-string.ll
Reapply "[StructuralHash] Global Variable (#118412)"
2024-12-03 21:33:03 -08:00
cgdata-merge-local.ll
AArch64: Convert tests to opaque pointers (#167442)
2025-11-11 02:52:45 +00:00
cgdata-merge-no-params.ll
AArch64: Convert tests to opaque pointers (#167442)
2025-11-11 02:52:45 +00:00
cgdata-no-merge-attached-call-garget.ll
[CGData][Merger] Avoid merging the attached call target (#121030)
2024-12-27 11:59:25 -08:00
cgdata-no-merge-unnamed.ll
AArch64: Convert tests to opaque pointers (#167442)
2025-11-11 02:52:45 +00:00
cgdata-outline-gvar.ll
Reapply "[StructuralHash] Global Variable (#118412)"
2024-12-03 21:33:03 -08:00
cgdata-outlined-name.ll
[CGData][MachineOutliner] Global Outlining (#90074)
2024-09-10 06:56:31 -07:00
cgdata-read-double-outline.ll
[CGData][MachineOutliner] Global Outlining (#90074)
2024-09-10 06:56:31 -07:00
cgdata-read-lto-outline.ll
[CGData][MachineOutliner] Global Outlining (#90074)
2024-09-10 06:56:31 -07:00
cgdata-read-priority.ll
[CGData][MachineOutliner] Global Outlining (#90074)
2024-09-10 06:56:31 -07:00
cgdata-read-single-outline-suffix.ll
[CGData][MachineOutliner] Global Outlining (#90074)
2024-09-10 06:56:31 -07:00
cgdata-read-single-outline.ll
[CGData][MachineOutliner] Global Outlining (#90074)
2024-09-10 06:56:31 -07:00
cgdata-write-outline.ll
[CGData][MachineOutliner] Global Outlining (#90074)
2024-09-10 06:56:31 -07:00
cgp-trivial-phi-node.ll
…
cgp-usubo.ll
…
cheap-as-a-move.ll
…
check-sign-bit-before-extension.ll
[LLVM][AArch64] Optimize sign bit tests with TST instruction for SIGN_EXTEND patterns (#158061)
2025-09-29 09:53:50 +01:00
chkstk.ll
…
clear-dead-implicit-def-impdef.ll
…
clear-dead-implicit-def-impdef.mir
…
cls.ll
…
cluster-frame-index.mir
Reland "CodeGen][NewPM] Port MachineScheduler to NPM. (#125703)" (#126684)
2025-02-12 18:54:39 +05:30
cmp-bool.ll
…
cmp-chains.ll
[AArch64] Update some tests to use a more common check prefix. NFC
2025-07-28 08:26:48 +01:00
cmp-const-max.ll
…
cmp-frameindex.ll
…
cmp-select-sign.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
cmp-to-cmn.ll
[AArch64][GISel] Signed comparison using CMN is safe when the subtraction is nsw (#150480)
2025-07-31 07:48:13 +01:00
cmpbr-branch-relaxation.mir
[AArch64][FEAT_CMPBR] Codegen for Armv9.6-a compare-and-branch (#116465)
2025-02-19 13:58:20 -08:00
cmpbr-early-ifcvt.mir
[AArch64][FEAT_CMPBR] Codegen for Armv9.6-a CBB and CBH (#164899)
2025-11-14 21:46:59 +00:00
cmpbr-reg-imm-at-bounds.ll
[AArch64][FEAT_CMPBR] Codegen for Armv9.6-a compare-and-branch (#116465)
2025-02-19 13:58:20 -08:00
cmpbr-reg-imm.ll
[AArch64][FEAT_CMPBR] Codegen for Armv9.6-a compare-and-branch (#116465)
2025-02-19 13:58:20 -08:00
cmpbr-reg-reg.ll
[AArch64][FEAT_CMPBR] Codegen for Armv9.6-a CBB and CBH (#164899)
2025-11-14 21:46:59 +00:00
cmpbr-zext-sext.ll
[AArch64][FEAT_CMPBR] Codegen for Armv9.6-a CBB and CBH (#164899)
2025-11-14 21:46:59 +00:00
cmpwithshort.ll
…
cmpxchg-idioms.ll
support branch hint for AtomicExpandImpl::expandAtomicCmpXchg (#152366)
2025-09-02 09:33:28 -04:00
cmpxchg-lse-even-regs.ll
…
cmpxchg-O0.ll
…
coalescer-drop-subreg-to-reg-imm-ops.mir
[CodeGen][NewPM] Port RegisterCoalescer to NPM (#124698)
2025-02-03 13:41:51 +07:00
code-model-large.ll
…
code-model-tiny-abs.ll
…
combine_andor_with_cmps.ll
AArch64: Add FMINNUM_IEEE and FMAXNUM_IEEE support (#107855)
2024-10-10 15:09:47 +08:00
combine-and-like.ll
[LLVM][SelectionDAG] Align poison/undef binop folds with IR. (#149334)
2025-07-30 11:20:30 +01:00
combine-andintoload.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
combine-comparisons-by-cse.ll
…
combine-mul.ll
[AArch64] computeKnownBitsForTargetNode - add AArch64ISD::MOVIshift support (#148634)
2025-07-14 20:36:51 +01:00
combine-sdiv.ll
[AArch64] Add patterns for add(x, trunc(shift)) (#168927)
2025-11-25 06:57:09 +00:00
combine-storetomstore.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
commandline-metadata.ll
[CodeGen] Clean up tests that depend on implicit .text in MCAsmStreamer
2024-12-22 21:11:32 -08:00
compare-branch.ll
…
compiler-ident.ll
…
complex-copy-noneon.ll
…
complex-deinterleaving-add-mull-fixed-contract.ll
…
complex-deinterleaving-add-mull-fixed-fast.ll
…
complex-deinterleaving-add-mull-scalable-contract.ll
[AArch64][SVE] Avoid movprfx by reusing register for _UNDEF pseudos. (#166926)
2025-11-10 16:33:59 +00:00
complex-deinterleaving-add-mull-scalable-fast.ll
[AArch64][SVE] Avoid movprfx by reusing register for _UNDEF pseudos. (#166926)
2025-11-10 16:33:59 +00:00
complex-deinterleaving-cdot.ll
[IR] NFC: Remove 'experimental' from partial.reduce.add intrinsic (#158637)
2025-09-17 11:44:47 +01:00
complex-deinterleaving-crash.ll
Reland "[RegAlloc] Fix the terminal rule check for interfere with DstReg (#168661)" (#169219)
2025-11-24 09:27:25 +08:00
complex-deinterleaving-f16-add-scalable.ll
[AArch64][SVE] Avoid movprfx by reusing register for _UNDEF pseudos. (#166926)
2025-11-10 16:33:59 +00:00
complex-deinterleaving-f16-add.ll
[AArch64] Regenerate and update a number of check lines. NFC
2025-09-18 09:54:47 +01:00
complex-deinterleaving-f16-mul-scalable.ll
[LLVM][CodeGen][SVE] Prefer NEON instructions when zeroing Z registers. (#133929)
2025-04-03 13:15:05 +01:00
complex-deinterleaving-f16-mul.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
complex-deinterleaving-f32-add-scalable.ll
…
complex-deinterleaving-f32-add.ll
…
complex-deinterleaving-f32-mul-scalable.ll
[LLVM][CodeGen][SVE] Prefer NEON instructions when zeroing Z registers. (#133929)
2025-04-03 13:15:05 +01:00
complex-deinterleaving-f32-mul.ll
…
complex-deinterleaving-f64-add-scalable.ll
…
complex-deinterleaving-f64-add.ll
…
complex-deinterleaving-f64-mul-scalable.ll
[LLVM][CodeGen][SVE] Prefer NEON instructions when zeroing Z registers. (#133929)
2025-04-03 13:15:05 +01:00
complex-deinterleaving-f64-mul.ll
…
complex-deinterleaving-i8-add-scalable.ll
…
complex-deinterleaving-i16-add-scalable.ll
…
complex-deinterleaving-i16-mul-scalable.ll
[AArch64][SVE] Avoid movprfx by reusing register for _UNDEF pseudos. (#166926)
2025-11-10 16:33:59 +00:00
complex-deinterleaving-i32-add-scalable.ll
…
complex-deinterleaving-i32-mul-scalable.ll
[LLVM][CodeGen][SVE] Prefer NEON instructions when zeroing Z registers. (#133929)
2025-04-03 13:15:05 +01:00
complex-deinterleaving-i64-add-scalable.ll
…
complex-deinterleaving-i64-mul-scalable.ll
[LLVM][CodeGen][SVE] Prefer NEON instructions when zeroing Z registers. (#133929)
2025-04-03 13:15:05 +01:00
complex-deinterleaving-mixed-cases.ll
…
complex-deinterleaving-multiuses.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
complex-deinterleaving-opt-crash.ll
[ComplexDeinterleave] Don't try to combine single FP reductions. (#139469)
2025-05-13 08:44:11 +01:00
complex-deinterleaving-reductions-predicated-scalable.ll
[DAGCombiner] Add combine for vector interleave of splats (#151110)
2025-08-01 09:58:05 +01:00
complex-deinterleaving-reductions-scalable.ll
Reland "[RegAlloc] Fix the terminal rule check for interfere with DstReg (#168661)" (#169219)
2025-11-24 09:27:25 +08:00
complex-deinterleaving-reductions.ll
Reland "[RegAlloc] Fix the terminal rule check for interfere with DstReg (#168661)" (#169219)
2025-11-24 09:27:25 +08:00
complex-deinterleaving-splat-scalable.ll
[LLVM][ComplexDeinterleaving] Update splat identification to include vector ConstantInt/FP. (#144516)
2025-06-18 11:53:27 +01:00
complex-deinterleaving-splat.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
complex-deinterleaving-symmetric-fixed.ll
[AArch64] Support symmetric complex deinterleaving with higher factors (#151295)
2025-08-12 11:05:15 +01:00
complex-deinterleaving-symmetric-scalable.ll
[AArch64] Support symmetric complex deinterleaving with higher factors (#151295)
2025-08-12 11:05:15 +01:00
complex-deinterleaving-uniform-cases.ll
[AArch64][MachineCombiner] Combine sequences of gather patterns (#152979)
2025-08-18 15:10:59 +03:00
complex-deinterleaving-unrolled-cdot.ll
[IR] NFC: Remove 'experimental' from partial.reduce.add intrinsic (#158637)
2025-09-17 11:44:47 +01:00
complex-fp-to-int.ll
…
complex-int-to-fp.ll
[AArch64] Scalarize extracted vector loads. (#159714)
2025-09-23 07:18:46 +00:00
compute-call-frame-size-unreachable-pass.ll
…
concat_vector-scalar-combine.ll
…
concat_vector-truncate-combine.ll
[AArch64][SVE] Lower unpredicated loads/stores as LDR/STR. (#127837)
2025-02-26 13:56:35 +00:00
concat_vector-truncated-scalar-combine.ll
…
concat-vector-add-combine.ll
[SelectionDAG] Deal with POISON for INSERT_VECTOR_ELT/INSERT_SUBVECTOR (#143102)
2025-09-17 21:04:00 +00:00
concat-vector.ll
[AArch64][MachineCombiner] Combine sequences of gather patterns (#152979)
2025-08-18 15:10:59 +03:00
concatbinop.ll
[DAG] Refactor X86 combineVSelectWithAllOnesOrZeros fold into a generic DAG Combine (#145298)
2025-07-02 15:07:48 +01:00
cond-br-tuning-instr-ref.mir
[InstrRef] Preserve debug instr num in aarch64-cond-br-tuning. (#132081)
2025-03-20 23:06:10 -07:00
cond-br-tuning.ll
…
cond-sel-value-prop.ll
…
cond-sel.ll
…
consecutive-stores-of-faddv.ll
[AArch64] Disable consecutive store merging when Neon is unavailable (#111519)
2024-10-11 14:15:01 +01:00
const-isel.ll
…
const-shift-of-constmasked.ll
Reapply "[AArch64] Combine and and lsl into ubfiz" (#123356) (#124576)
2025-01-28 11:27:34 +00:00
constant-pool-partition.ll
[ELF][AsmPrinter] Emit trailing dot for constant pool section when it has a hotness prefix (#150859)
2025-07-29 17:04:59 -07:00
consthoist-gep.ll
[AArch64][test] Remove unsafe-fp-math uses (NFC) (#164606)
2025-10-22 12:14:21 +00:00
convert-highly-predictable-select-to-branch.ll
…
convertphitype.ll
[InstSimplify] Fix incorrect poison propagation when folding phi (#96631)
2024-11-07 14:09:45 +01:00
copyprop.ll
…
copyprop.mir
[AArch64] Correctly detect X reg from W reg in isCopyImpl (#137348)
2025-04-26 11:09:13 +01:00
cpa-globalisel.ll
[AArch64] Add CodeGen support for scalar FEAT_CPA (#105669)
2025-06-20 21:14:52 +01:00
cpa-selectiondag.ll
[AMDGPU][SDAG] Add ISD::PTRADD DAG combines (#142739)
2025-06-26 09:40:04 +02:00
cpus.ll
[AArch64] Add missing test for Qualcomm Oryon-1 processor (#135258)
2025-04-14 14:19:14 -07:00
csel-andor-onebit.ll
…
csel-cmp-cse.ll
[AArch64] Support MI and PL (#150314)
2025-08-11 07:41:38 +01:00
csel-subs-swapped.ll
[AArch64] Check for negative numbers when adjusting icmps (#141151)
2025-05-30 15:22:54 +01:00
csel-zero-float.ll
[CodeGen] Remove -enable-unsafe-fp-math option (#164559)
2025-10-22 15:40:31 +08:00
csinc-cmp-removal.mir
[CodeGen][NewPM] Port PeepholeOptimizer to NPM (#116326)
2024-11-18 11:02:01 +05:30
csr-copy-hint.mir
[RegAlloc] Sort CopyHint by IsCSR (#131046)
2025-04-14 09:58:46 -04:00
csr-split.ll
…
ctlo.ll
[DAGCombine] Count leading ones: refine post DAG/Type Legalisation if promotion (#102877)
2024-09-15 15:48:36 +04:00
ctlz_zero_undef.ll
…
ctlz.ll
[AArch64] Optimize extending loads of small vectors (#163064)
2025-11-17 21:39:10 +02:00
ctpop-nonean.ll
…
ctpop.ll
[AArch64] Optimize extending loads of small vectors (#163064)
2025-11-17 21:39:10 +02:00
cttz.ll
[AArch64] Optimize extending loads of small vectors (#163064)
2025-11-17 21:39:10 +02:00
custom-sections.ll
…
cvt-fp-int-fp.ll
[AArch64] Guard fptosi+sitofp patterns with one use checks. (#156407)
2025-09-03 08:21:27 +01:00
cxx-tlscc.ll
…
dag-combine-concat-vectors.ll
[AArch64] Lower zero cycle FPR zeroing (#156261)
2025-09-10 08:32:51 +03:00
dag-combine-freeze.ll
[DAGCombiner] Fix ReplaceAllUsesOfValueWith mutation bug in visitFREEZE (#104924)
2024-08-21 17:56:27 +02:00
dag-combine-insert-subvector.ll
[LLVM][AArch64] Reduce uses of "undef" in SVE CodeGen tests.
2025-02-26 11:11:03 +00:00
dag-combine-invaraints.ll
[AArch64][test] Remove unsafe-fp-math uses (NFC) (#164606)
2025-10-22 12:14:21 +00:00
dag-combine-lifetime-end-store-typesize.ll
…
dag-combine-mul-shl.ll
…
dag-combine-select.ll
[AArch64] Update some tests to use a more common check prefix. NFC
2025-07-28 08:26:48 +01:00
dag-combine-setcc.ll
Revert "[AArch64] Improve code generation of bool vector reduce operations (#115713)"
2024-12-11 20:06:42 +00:00
dag-combine-trunc-build-vec.ll
…
dag-numsignbits.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
dag-ReplaceAllUsesOfValuesWith.ll
…
DAGCombine_vscale.ll
[LLVM] Port SVE tests in llvm/test/CodeGen/AArch64 to use splat()
2024-10-03 14:35:32 +00:00
darwinpcs-tail.ll
[AArch64] Skip storing of stack arguments when lowering tail calls (#126735)
2025-06-06 11:26:24 +03:00
dbg-assign-tag-offset-mix-loc.ll
[RemoveDIs] Remove "try-debuginfo-iterators..." test flags (#130298)
2025-03-14 15:50:49 +00:00
dbg-assign-tag-offset.ll
[RemoveDIs] Remove "try-debuginfo-iterators..." test flags (#130298)
2025-03-14 15:50:49 +00:00
dbg-declare-swift-async.ll
…
dbg-declare-tag-offset.ll
…
dbg-value-swift-async-non-entry-block.ll
…
dbg-value-swift-async.ll
[RemoveDIs] Remove "try-debuginfo-iterators..." test flags (#130298)
2025-03-14 15:50:49 +00:00
dbg-value-tag-offset.ll
…
deactivation-symbols.ll
Add IR and codegen support for deactivation symbols.
2025-11-26 12:37:09 -08:00
debug-info-sve-dbg-declare.mir
[Codegen] Add a separate stack ID for scalable predicates (#142390)
2025-10-02 14:43:07 +01:00
debug-info-sve-dbg-value.mir
[Codegen] Add a separate stack ID for scalable predicates (#142390)
2025-10-02 14:43:07 +01:00
debug-info-sve-pair.mir
[Debug][AArch64] Do not crash on unknown subreg register sizes. (#160442)
2025-09-24 12:40:12 +02:00
debugtrap.ll
…
directcond.ll
…
div_minsize.ll
…
div-rem-pair-recomposition-signed.ll
…
div-rem-pair-recomposition-unsigned.ll
…
divrem.ll
AArch64: Convert tests to opaque pointers (#167442)
2025-11-11 02:52:45 +00:00
dllexport.ll
[ARM64EC] Add support for function aliases on ARM64EC (#132295)
2025-03-31 12:56:09 +02:00
dllimport.ll
…
dont-shrink-wrap-stack-mayloadorstore.mir
[llvm] Support multiple save/restore points in mir (#119357)
2025-08-12 16:34:29 +03:00
dont-take-over-the-world.ll
…
double_reduct.ll
[DAG] Fold nested add(add(reduce(a), b), add(reduce(c), d)) (#115150)
2025-06-24 13:08:59 +01:00
dp1.ll
[AArch64] Generalize integer FPR lane stores for all types (#134117)
2025-04-17 09:25:57 +01:00
dp2.ll
…
dp-3source.ll
[AArch64][GlobalISel] Add test coverage for dp-3source.ll. NFC
2025-09-25 15:06:05 +01:00
dump-reserved-cycles.mir
Reland "CodeGen][NewPM] Port MachineScheduler to NPM. (#125703)" (#126684)
2025-02-12 18:54:39 +05:30
dump-schedule-trace.mir
CodeGen: Remove redundant REQUIRES registered-target from backend tests (#147475)
2025-07-09 09:25:53 +09:00
dup-ext-load-combine.ll
[AArch64] Optimize splat of extending loads to avoid GPR->FPR transfer (#163067)
2025-10-24 17:47:56 +03:00
dup.ll
[GlobalISel] Combine away G_UNMERGE(G_IMPLICITDEF). (#119183)
2025-10-28 09:57:31 +00:00
duplane-index-patfrags.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
dwarf-cfi.ll
…
dwarf-eh-prepare-dbg.ll
[DwarfEhPrepare] Assign dummy debug location for more inserted _Unwind_Resume calls (#105513)
2024-08-22 08:13:20 -07:00
dynamic-regmask-preserve-none.ll
…
early-ifcvt-likely-predictable.mir
[CodeGen][NewPM] Port EarlyIfConversion pass to NPM. (#108508)
2024-10-16 13:22:57 +05:30
early-ifcvt-on-double-killed-reg.mir
[EarlyIfConverter] Fix reg killed twice after early-if-predicator and ifcvt (#133554)
2025-04-01 12:06:30 +02:00
early-ifcvt-regclass-mismatch.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
early-ifcvt-same-value.mir
[CodeGen][NewPM] Port EarlyIfConversion pass to NPM. (#108508)
2024-10-16 13:22:57 +05:30
eh_recoverfp.ll
…
ehcontguard.ll
Introduce MCAsmInfo::UsesSetToEquateSymbol and prefer = to .set
2025-06-11 22:19:31 -07:00
elf-globals-pic.ll
…
elf-globals-static.ll
…
elf-preemption.ll
…
elim-dead-mi.mir
…
eliminate-trunc.ll
…
emit_fneg_with_non_register_operand.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
emit-prologue-clobber-verification.mir
…
emutls_alias.ll
…
emutls_generic.ll
…
emutls.ll
…
eon.ll
[AArch64] Lower disjoint_or+not to eon. (#147279)
2025-07-09 08:38:16 +01:00
eor3.ll
[AArch64][NEON] Add eor3 patterns for V64 xors (#165376)
2025-10-29 13:22:44 +00:00
exception-handling-windows-elf.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
execute-only-empty.ll
[AArch64] Always add PURECODE flag to empty .text if "+execute-only" is set (#132196)
2025-03-24 11:19:26 +01:00
execute-only-section.ll
[AArch64] Add support for SHF_AARCH64_PURECODE ELF section flag (1/3) (#125687)
2025-02-14 08:56:07 +00:00
exp10-libcall-names.ll
Triple: Add BridgeOS to isOSDarwin (#145636)
2025-06-25 20:06:51 +09:00
expand-blr-rvmarker-pseudo.mir
[AMDGPU] Avoid put implicit_def into bundle that break reg's liveness (#142563)
2025-08-13 10:41:44 +08:00
expand-constructive-zzi.mir
[AArch64] Define constructive EXT_ZZI pseudo instruction (#152552)
2025-08-15 09:05:10 +01:00
expand-load-got-pseudo.mir
[InstrRef] Preserve debug instr num in aarch64-expand-pseudo LOADgot expansion (#128081)
2025-02-24 21:42:02 -08:00
expand-movi-renamable.mir
…
expand-select.ll
[AArch64] Improve select dagcombine (#169925)
2025-12-02 12:29:49 +00:00
expand-sme-pseudos.mir
[AArch64][SME] Add support for zeroing ZT0 to CommitZASavePseudo (#166360)
2025-11-18 09:26:21 +00:00
expand-subs-pseudo.mir
…
expand-vector-rot.ll
…
ext-narrow-index.ll
[AArch64] Lower zero cycle FPR zeroing (#156261)
2025-09-10 08:32:51 +03:00
extbinopload.ll
[AArch64] Optimize extending loads of small vectors (#163064)
2025-11-17 21:39:10 +02:00
extend_inreg_of_concat_subvectors.ll
[AArch64] Regnerate and update a number of tests. NFC
2025-08-04 07:41:57 +01:00
extern-weak.ll
…
extra-callee-save.mir
…
extract-bits.ll
[AArch64] shouldFoldMaskToVariableShiftPair should be true for scalars up to the biggest legal type (#158069)
2025-09-30 17:48:47 +01:00
extract-insert.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
extract-lowbits.ll
[AArch64] shouldFoldMaskToVariableShiftPair should be true for scalars up to the biggest legal type (#158069)
2025-09-30 17:48:47 +01:00
extract-sext-zext.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
extract-subvec-combine.ll
[AArch64] Prefer zip over ushll for anyext. (#133433)
2025-04-01 16:24:54 +01:00
extract-vector-cmp.ll
[AArch64] Use SVE to materialise some 128-bit vector constants (#159101)
2025-09-25 09:36:59 +01:00
extract-vector-elt-sve.ll
[AArch64][GlobalISel] Update and cleanup a number of gisel tests. NFC
2024-11-23 18:58:55 +00:00
extract-vector-elt.ll
[AArch64][GlobalISel] Use TargetConstant for shift immediates (#161527)
2025-10-03 20:16:08 +01:00
extract.ll
…
extractvector-of-load.mir
…
extractvector-oob-load.mir
…
f16-convert.ll
…
f16-imm.ll
[AArch64] Split zero cycle zeoring per register class (#154561)
2025-08-28 15:57:06 +03:00
f16-instructions.ll
[AArch64][GlobalISel] Add G_FPEXT(G_FCONSTANT) folding (#162829)
2025-10-10 12:17:06 +00:00
f16-neon-intrinsics.ll
…
fabd-no-neon.ll
…
fabs-combine.ll
…
fabs-fp128.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
fabs.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
fadd-combines.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
faddp-half.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
faddp.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
faddsub.ll
Revert "[AArch64][GlobalISel] Expand 64bit extracts to 128bit to allow more patterns (#142904)"
2025-06-11 08:32:55 +01:00
falkor-hwpf-fix.ll
…
falkor-hwpf-fix.mir
…
falkor-hwpf.ll
…
fast-isel-address-extends.ll
…
fast-isel-addressing-modes.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
fast-isel-assume.ll
…
fast-isel-atomic-fallback.ll
[AArch64][FastISel] Fallback on atomic stlr/cas with non-reg operands. (#133987)
2025-05-08 14:29:24 -07:00
fast-isel-atomic.ll
…
fast-isel-branch_weights.ll
…
fast-isel-branch-cond-mask.ll
…
fast-isel-branch-cond-split.ll
…
fast-isel-call-return.ll
…
fast-isel-call-struct-return-fallback.ll
…
fast-isel-call-struct-return.ll
…
fast-isel-cbz.ll
…
fast-isel-cmp-branch.ll
…
fast-isel-cmp-vec.ll
[AArch64] computeKnownBitsForTargetNode - add AArch64ISD::MOVIshift support (#148634)
2025-07-14 20:36:51 +01:00
fast-isel-cmpxchg.ll
…
fast-isel-const-float.ll
…
fast-isel-dbg.ll
[Verifier] Require that dbg.declare variable is a ptr (#134355)
2025-04-04 15:34:45 +02:00
fast-isel-erase.ll
…
fast-isel-folded-shift.ll
…
fast-isel-folding.ll
…
fast-isel-fpimm.ll
…
fast-isel-gep.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
fast-isel-int-ext2.ll
…
fast-isel-int-ext3.ll
[AArch64] Fold UBFMXri to UBFMWri when it's an LSR or LSL alias (#106968)
2024-09-17 11:21:23 +01:00
fast-isel-int-ext4.ll
…
fast-isel-int-ext5.ll
…
fast-isel-int-ext.ll
…
fast-isel-intrinsic.ll
…
fast-isel-logic-op.ll
…
fast-isel-memcpy.ll
…
fast-isel-mul.ll
…
fast-isel-runtime-libcall.ll
…
fast-isel-sdiv.ll
[AArch64] Support MI and PL (#150314)
2025-08-11 07:41:38 +01:00
fast-isel-select.ll
…
fast-isel-shift.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
fast-isel-sp-adjust.ll
CodeGen: Convert some assorted errors to use reportFatalUsageError (#142031)
2025-05-30 08:06:53 +02:00
fast-isel-sqrt.ll
…
fast-isel-switch-phi.ll
…
fast-isel-tail-call.ll
…
fast-isel-tbz.ll
…
fast-isel-trunc.ll
…
fast-isel-vector-arithmetic.ll
…
fast-isel-vret.ll
…
fast-regalloc-empty-bb-with-liveins.mir
…
fastcc-reserved.ll
…
fastcc.ll
…
fastisel-debugvalue-undef.ll
[RemoveDIs] Remove "try-debuginfo-iterators..." test flags (#130298)
2025-03-14 15:50:49 +00:00
fcmp-fp128.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
fcmp.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
fcopysign-noneon.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
fcopysign.ll
Revert "[AArch64][GlobalISel] Expand 64bit extracts to 128bit to allow more patterns (#142904)"
2025-06-11 08:32:55 +01:00
fcsel-zero.ll
[AArch64] Remove UnsafeFPMath (#150876)
2025-07-29 12:41:09 +08:00
fcvt_combine.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
fcvt-fixed.ll
[AArch64][GlobalISel] Add G_FPEXT(G_FCONSTANT) folding (#162829)
2025-10-10 12:17:06 +00:00
fcvt-int.ll
…
fcvt.ll
Revert "[AArch64][GlobalISel] Expand 64bit extracts to 128bit to allow more patterns (#142904)"
2025-06-11 08:32:55 +01:00
fdiv-combine.ll
[GlobalISel] fdiv to fmul transform (#144305)
2025-10-08 07:26:25 +01:00
fdiv-const.ll
…
fdiv.ll
Revert "[AArch64][GlobalISel] Expand 64bit extracts to 128bit to allow more patterns (#142904)"
2025-06-11 08:32:55 +01:00
fence-singlethread.ll
…
fexplog.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
fix-shuffle-vector-be-rev.ll
[AArch64] Prefer using DUP instead of INS where possible (#138549)
2025-05-15 10:31:09 +02:00
fixed_masked_deinterleaved_loads.ll
[AArch64] Improve lowering for scalable masked deinterleaving loads (#154338)
2025-09-03 09:51:54 +01:00
fixed_masked_interleaved_stores.ll
[AArch64] Improve lowering for scalable masked interleaving stores (#156718)
2025-09-08 10:34:53 +01:00
fixed-length-bf16-arith.ll
[AArch64] Use SVE for fixed-length bf16 operations with +sve-b16b16 (#169329)
2025-11-27 19:18:00 +00:00
fixed-point-conv-vec-pat.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
fixed-vector-deinterleave.ll
[AArch64] recognise zip1/zip2 with flipped operands (#167235)
2025-11-27 17:11:56 +00:00
fixed-vector-interleave.ll
[DAGCombiner] Add combine for vector interleave of splats (#151110)
2025-08-01 09:58:05 +01:00
fjcvtzs.ll
…
fjcvtzs.mir
…
flags-multiuse.ll
…
float-conv-elim.ll
…
floatdp_1source.ll
…
floatdp_2source.ll
…
fma-fneg-combine.ll
[DAG] SelectionDAG::canCreateUndefOrPoison - add ISD::FMA/FMAD + tests (#152187)
2025-08-12 17:17:46 +09:00
fmaximum-legalization.ll
Revert "[SDAG] Fix fmaximum legalization errors (#142170)"
2025-06-04 14:35:30 +02:00
fminimummaximum.ll
Revert "[AArch64][GlobalISel] Expand 64bit extracts to 128bit to allow more patterns (#142904)"
2025-06-11 08:32:55 +01:00
fminmax.ll
Revert "[AArch64][GlobalISel] Expand 64bit extracts to 128bit to allow more patterns (#142904)"
2025-06-11 08:32:55 +01:00
fmla.ll
[AArch64][GlobalISel] Improve lowering of vector fp16 fpext (#165554)
2025-11-14 20:52:51 -08:00
fmlal-loreg.ll
[LLVM][AArch64] Add assembly/disassembly for FTMOPA and BFTMOPA (#113230)
2024-10-23 15:40:57 +01:00
fmov-imm-licm.ll
…
fmul.ll
Revert "[AArch64][GlobalISel] Expand 64bit extracts to 128bit to allow more patterns (#142904)"
2025-06-11 08:32:55 +01:00
fneg.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
fnmul.ll
[AArch64] Regenerate and update a number of check lines. NFC
2025-09-18 09:54:47 +01:00
fold-constants.ll
…
fold-csel-cttz-and.ll
…
fold-global-offsets.ll
…
fold-int-pow2-with-fmul-or-fdiv.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
force-enable-intervals.mir
CodeGen: Remove redundant REQUIRES registered-target from backend tests (#147475)
2025-07-09 09:25:53 +09:00
fp8-neon-fdot.ll
[AArch64] Add FP8 Neon intrinsics for dot-product (#123613)
2025-01-27 21:14:16 +00:00
fp8-neon-fmla.ll
[AArch64] Implement NEON FP8 intrinsics for fused multiply-add (#123615)
2025-01-28 00:38:44 +00:00
fp8-sme2-cvtn.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
fp8-sve-cvt-cvtlt.ll
[LLVM][AArch64] Relax SVE/SME codegen predicates. (#145322)
2025-07-02 11:39:33 +01:00
fp8-sve-cvtn.ll
[LLVM][AArch64] Relax SVE/SME codegen predicates. (#145322)
2025-07-02 11:39:33 +01:00
fp8-sve-fdot.ll
[AArch64] Change feature dependencies of fp8 features (#122280)
2025-01-13 13:44:15 +00:00
fp8-sve-fmla.ll
[AArch64] Implement FP8 SVE intrinsics for fused multiply-add (#118126)
2024-12-13 21:05:27 +00:00
fp16_fast_math.ll
[DAGCombiner] Eliminate fp casts if we have the right fast math flags (#131345)
2025-04-28 11:21:51 +01:00
fp16_i16_intrinsic_scalar.ll
[AArch64][SDAG] Add f16 -> i16 rounding NEON conversion intrinsics (#155851)
2025-08-31 13:53:55 +01:00
fp16_intrinsic_lane.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
fp16_intrinsic_scalar_1op.ll
[AArch64] Update some tests to use a more common check prefix. NFC
2025-07-28 08:26:48 +01:00
fp16_intrinsic_scalar_2op.ll
[AArch64] Update some tests to use a more common check prefix. NFC
2025-07-28 08:26:48 +01:00
fp16_intrinsic_scalar_3op.ll
…
fp16_intrinsic_vector_1op.ll
[AArch64][SDAG] Add f16 -> i16 rounding NEON conversion intrinsics (#155851)
2025-08-31 13:53:55 +01:00
fp16_intrinsic_vector_2op.ll
…
fp16_intrinsic_vector_3op.ll
…
fp16-fmla.ll
…
fp16-v4-instructions.ll
[AArch64][GlobalISel] Improve lowering of vector fp16 fptrunc (#163398)
2025-11-28 08:32:25 +00:00
fp16-v8-instructions.ll
[AArch64][GlobalISel] Improve lowering of vector fp16 fptrunc (#163398)
2025-11-28 08:32:25 +00:00
fp16-v16-instructions.ll
…
fp16-vector-bitcast.ll
…
fp16-vector-load-store.ll
…
fp16-vector-nvcast.ll
…
fp16-vector-shuffle.ll
[AArch64] Prefer using DUP instead of INS where possible (#138549)
2025-05-15 10:31:09 +02:00
fp128-folding.ll
…
fp-cond-sel.ll
…
fp-const-fold.ll
…
fp-conversion-to-tbl.ll
MachineScheduler: Improve instruction clustering (#137784)
2025-06-05 15:28:04 +08:00
fp-dp3.ll
…
fp-fcanonicalize.ll
AArch64: Select FCANONICALIZE (#104429)
2024-10-11 08:45:14 +08:00
fp-intrinsics-fp16.ll
[AArch64] Regenerate and update a number of check lines. NFC
2025-09-18 09:54:47 +01:00
fp-intrinsics-vector.ll
[AArch64] Regenerate and update a number of check lines. NFC
2025-09-18 09:54:47 +01:00
fp-intrinsics.ll
[AArch64] Regenerate and update a number of check lines. NFC
2025-09-18 09:54:47 +01:00
fp-maximumnum-minimumnum.ll
[AArch64][MachineCombiner] Combine sequences of gather patterns (#152979)
2025-08-18 15:10:59 +03:00
fp-veclib-expansion.ll
…
fpclamptosat_vec.ll
[AArch64][GlobalISel] Improve lowering of vector fp16 fpext (#165554)
2025-11-14 20:52:51 -08:00
fpclamptosat.ll
[LLVM][CodeGen] Check Non Saturate Case in isSaturatingMinMax (#160637)
2025-10-03 20:39:45 +01:00
fpconv-vector-op-scalarize.ll
…
fpenv.ll
Reapply "[AArch64] Combine and and lsl into ubfiz" (#123356) (#124576)
2025-01-28 11:27:34 +00:00
fpext.ll
[AArch64][GlobalISel] Improve lowering of vector fp16 fpext (#165554)
2025-11-14 20:52:51 -08:00
fpimm.ll
Fix regression tests with bad FileCheck checks (#140373)
2025-05-22 07:59:57 +03:00
fpmode.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
fpow.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
fpowi.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
fprcvt-cvtf.ll
[AArch64] Correct SCVTF/UCVTF instructions for vector input (#152974)
2025-09-12 14:53:54 +01:00
fptoi.ll
[AArch64][GlobalISel] Improve lowering of vector fp16 fpext (#165554)
2025-11-14 20:52:51 -08:00
fptosi-sat-scalar.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
fptosi-sat-vector.ll
[AArch64][GlobalISel] Improve lowering of vector fp16 fpext (#165554)
2025-11-14 20:52:51 -08:00
fptosi-strictfp.ll
…
fptoui-sat-scalar.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
fptoui-sat-vector.ll
[AArch64][GlobalISel] Improve lowering of vector fp16 fpext (#165554)
2025-11-14 20:52:51 -08:00
fptouint-i8-zext.ll
…
fptrunc.ll
[AArch64][GlobalISel] Improve lowering of vector fp16 fptrunc (#163398)
2025-11-28 08:32:25 +00:00
frameaddr.ll
…
framelayout-fp-csr.ll
…
framelayout-frame-record.mir
…
framelayout-offset-immediate-change.mir
…
framelayout-scavengingslot-stack-hazard.mir
[AArch64][SME] Fix accessing the emergency spill slot with hazard padding (#142190)
2025-06-02 10:52:10 +01:00
framelayout-scavengingslot.mir
…
framelayout-split-sve.mir
[AArch64][SME] Support aarch64-split-sve-objects with VLAs/realignment (#163816)
2025-11-04 13:39:20 +00:00
framelayout-sve-basepointer.mir
…
framelayout-sve-calleesaves-fix.mir
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
framelayout-sve-fixed-width-access.mir
…
framelayout-sve-scavengingslot.mir
…
framelayout-sve-win.mir
[AArch64][SVE] Avoid extra pop of "FixedObject" with CalleeSavesAboveFrameRecord (#156452)
2025-10-13 08:53:12 +01:00
framelayout-sve.mir
[Codegen] Add a separate stack ID for scalable predicates (#142390)
2025-10-02 14:43:07 +01:00
framelayout-unaligned-fp.ll
…
free-zext.ll
…
freeze.ll
[AArch64][GlobalISel] Added support for hadd family of intrinsics (#163985)
2025-11-19 15:44:02 +00:00
frem-power2.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
frem.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
frexp-arm64ec.ll
[Arm64EC] Add support for half (#152843)
2025-08-12 14:15:52 -07:00
frintn.ll
…
fsh-combiner-disabled.ll
[LLVM][AArch64] Correctly lower funnel shifts by constants. (#140058)
2025-05-20 11:15:21 +01:00
fsh.ll
DAG: Use poison when widening build_vector (#167631)
2025-11-12 20:17:41 +00:00
fsincos.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
fsqrt.ll
Revert "[AArch64][GlobalISel] Expand 64bit extracts to 128bit to allow more patterns (#142904)"
2025-06-11 08:32:55 +01:00
ftrunc.ll
…
func-argpassing.ll
…
func-calls.ll
…
func-sanitizer.ll
…
funclet-local-stack-size.ll
…
funclet-match-add-sub-stack.ll
…
funcptr_cast.ll
…
function-info-noredzone-present.ll
…
function-subtarget-features.ll
…
funnel-shift-rot.ll
…
funnel-shift.ll
[AArch64][GlobalISel] Add a constant funnel shift post-legalizer combine. (#151912)
2025-10-29 07:47:41 +00:00
fuse-addr-mode.mir
[AArch64] Fix invalid address-mode folding (#142167)
2025-06-03 08:23:27 +01:00
gcs-intrinsics.ll
…
gep-nullptr.ll
[llvm] Remove br i1 undef in some llvm/test/CodeGen tests (#127368)
2025-02-16 18:44:46 +00:00
get_vector_length.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
get-active-lane-mask-extract.ll
[AArch64] Combine PTEST_FIRST(PTRUE, CONCAT(A, B)) -> PTEST_FIRST(PTRUE, A) (#161384)
2025-10-02 10:13:06 +01:00
ghc-cc.ll
…
global-alignment.ll
…
global-merge-1.ll
Introduce MCAsmInfo::UsesSetToEquateSymbol and prefer = to .set
2025-06-11 22:19:31 -07:00
global-merge-2.ll
Introduce MCAsmInfo::UsesSetToEquateSymbol and prefer = to .set
2025-06-11 22:19:31 -07:00
global-merge-3.ll
Introduce MCAsmInfo::UsesSetToEquateSymbol and prefer = to .set
2025-06-11 22:19:31 -07:00
global-merge-4.ll
…
global-merge-external.ll
[AArch64] Enable GlobalMerge on externals (#158592)
2025-09-17 17:49:23 +01:00
global-merge-group-by-use.ll
…
global-merge-hidden-minsize.ll
Introduce MCAsmInfo::UsesSetToEquateSymbol and prefer = to .set
2025-06-11 22:19:31 -07:00
global-merge-ignore-single-use-minsize.ll
…
global-merge-ignore-single-use.ll
…
global-merge-minsize.ll
[AArch64] Update and extend some GlobalMerge tests. NFC
2025-09-15 10:39:07 +01:00
global-merge.ll
[GlobalMerge]Prefer use global-merge-max-offset instead of the target-specific constant offset. (#165591)
2025-11-17 15:37:51 +08:00
got-abuse.ll
…
gpr_cttz.ll
…
graalcc.ll
…
hadd-combine.ll
[AArch64] Protect against scalar types in isNVCastToHalfWidthElements.
2025-02-28 19:39:11 +00:00
half-precision-signof-no-assert.ll
[AArch64] Return early rather than asserting when Size of value passed to targetShrinkDemandedConstant is not 32 or 64 (#123084)
2025-01-17 08:41:33 +00:00
half.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
hardened-br-jump-table.ll
…
highextractbitcast.ll
[AArch64][GlobalISel] Added pmull/pmull64 intrinsic support (#165740)
2025-11-05 16:53:45 +00:00
hints.ll
…
hoist-and-by-const-from-lshr-in-eqcmp-zero.ll
[AArch64][GlobalISel] Add some GISel test coverage for icmp-and tests. NFC
2025-10-30 09:00:36 +00:00
hoist-and-by-const-from-shl-in-eqcmp-zero.ll
[AArch64][GlobalISel] Add some GISel test coverage for icmp-and tests. NFC
2025-10-30 09:00:36 +00:00
hwasan-check-memaccess-fixedshadow.ll
…
hwasan-check-memaccess.ll
…
hwasan-prefer-fp.ll
…
hwasan-zero-ptr.ll
[hwasan] Omit tag check for null pointers (#122206)
2025-01-09 13:48:26 -08:00
i1-contents.ll
…
i128_volatile_load_store.ll
…
i128_with_overflow.ll
[CGP]: Optimize mul.overflow. (#148343)
2025-11-18 13:15:47 +00:00
i128-align.ll
…
i128-cmp.ll
…
i128-fast-isel-fallback.ll
[llvm-project] Fix typo "propogate" (#114795)
2024-11-04 15:33:19 +00:00
i128-math.ll
[CGP]: Optimize mul.overflow. (#148343)
2025-11-18 13:15:47 +00:00
i256-math.ll
…
iabs.ll
…
icmp-cst.ll
[AArch64] Adjust comparison constant if adjusting it means less instructions (#151024)
2025-08-18 14:56:45 +01:00
icmp-or-load.ll
[AArch64] Add some tests for icmp eq chains of loads. NFC
2025-05-08 17:31:39 +01:00
icmp-shift-opt.ll
…
icmp-ult-eq-fold.ll
[AArch64] Allow peephole to optimize AND + signed compare with 0 (#153608)
2025-11-10 22:32:31 +00:00
icmp.ll
[LLVM][AArch64] Optimize sign bit tests with TST instruction for SIGN_EXTEND patterns (#158061)
2025-09-29 09:53:50 +01:00
ifcvt-select.ll
…
ifunc-asm.ll
Introduce MCAsmInfo::UsesSetToEquateSymbol and prefer = to .set
2025-06-11 22:19:31 -07:00
illegal-float-ops.ll
[aarch64] atan2 intrinsic lowering (p5) (#112611)
2024-10-24 17:53:12 -07:00
illegal-floating-point-vector-compares.ll
[AArch64] Prevent unnecessary truncation in bool vector reduce code generation (#120096)
2024-12-18 09:14:12 +00:00
ilp32-tlsdesc.ll
…
ilp32-va.ll
…
immcost.ll
…
implicit-def-remat-requires-impdef-check.mir
[RegAlloc][NewPM] Plug Greedy RA in codegen pipeline (#120557)
2025-03-03 11:06:15 +05:30
implicit-def-subreg-to-reg-regression.ll
Revert "Reland "RegisterCoalescer: Add implicit-def of super register when coalescing SUBREG_TO_REG""
2025-11-25 11:01:27 +00:00
implicit-def-with-impdef-greedy-assert.mir
[RegAlloc][NewPM] Plug Greedy RA in codegen pipeline (#120557)
2025-03-03 11:06:15 +05:30
implicit-null-check.ll
…
implicit-sret.ll
…
implicitly-set-zero-high-64-bits.ll
…
inc-of-add.ll
…
init-array.ll
…
init-undef.mir
[CodeGen][NPM] Port InitUndef to NPM (#138495)
2025-07-09 15:31:31 +05:30
inline-asm-blockaddress.ll
…
inline-asm-clobber-arm64ec.ll
…
inline-asm-clobber-base-frame-pointer.ll
…
inline-asm-clobber.ll
…
inline-asm-constraints-bad-sve.ll
…
inline-asm-constraints-badI.ll
…
inline-asm-constraints-badK2.ll
…
inline-asm-constraints-badK.ll
…
inline-asm-constraints-badL.ll
…
inline-asm-flag-output.ll
…
inline-asm-globaladdress.ll
…
inline-asm-i-constraint-i1.ll
…
inline-asm-multilevel-gep.ll
…
inline-asm-speculation.ll
[CodeGen] Fix MachineInstr::isSafeToMove handling of inline asm. (#126807)
2025-02-25 15:29:12 -08:00
inlineasm-illegal-type.ll
…
inlineasm-ldr-pseudo.ll
…
inlineasm-output-template.ll
…
inlineasm-S-constraint.ll
…
inlineasm-Uc-constraint.ll
…
inlineasm-X-allocation.ll
…
inlineasm-X-constraint.ll
…
insert-extend.ll
[AArch64] recognise zip1/zip2 with flipped operands (#167235)
2025-11-27 17:11:56 +00:00
insert-subvector-res-legalization.ll
[AArch64][SVE] Refactor getPTrue to return splat(1) when pattern=all. (#139236)
2025-05-12 10:35:30 +01:00
insert-subvector.ll
[AArch64] recognise zip1/zip2 with flipped operands (#167235)
2025-11-27 17:11:56 +00:00
insertextract.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
insertshuffleload.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
instr-ref-ldv.ll
[DebugInfo][InstrRef] Treat ORRWrr as a copy instr (#123102)
2025-01-17 09:27:36 -08:00
int-to-fp-no-neon.ll
[AArch64] Extend int-to-fp load optimization to support f16 (#168076)
2025-11-23 14:32:03 +02:00
interleaved-load-combine-pr90695.ll
…
intrinsic-cttz-elts-sve.ll
[AArch64] Combine signext_inreg of setcc(... != splat(0)) (#157665)
2025-09-16 11:42:28 +01:00
intrinsic-cttz-elts.ll
…
intrinsic-vector-match-sve2.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
intrinsics-memory-barrier.ll
…
inttoptr_debug_value.ll
…
irg_sp_tagp.ll
…
irg-nomem.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
irg.ll
…
isinf.ll
[AArch64] Simplify some masked integer comparisons. (#153783)
2025-09-30 10:17:07 +01:00
itofp-bf16.ll
[AArch64] Scalarize extracted vector loads. (#159714)
2025-09-23 07:18:46 +00:00
itofp.ll
[AArch64] Extend int-to-fp load optimization to support f16 (#168076)
2025-11-23 14:32:03 +02:00
jti-correct-datatype.mir
…
jump-table-32.ll
…
jump-table-compress.mir
…
jump-table-duplicate.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
jump-table-exynos.ll
…
jump-table-partition.ll
[AArch64AsmPrinter]Place jump tables into hot/unlikely-prefixed data sections for aarch64 (#126018)
2025-04-14 12:57:58 -07:00
jump-table.ll
…
kcfi-bti.ll
…
kcfi-patchable-function-prefix.ll
…
kcfi.ll
…
known-never-nan.ll
…
lack-of-signed-truncation-check.ll
…
landingpad-ifcvt.ll
[win] Fix EH Cont Guard targets when SEH personality is used (#129612)
2025-03-07 09:07:47 -08:00
large_shift.ll
…
large-consts.ll
…
large-offset-ldr-merge.mir
[AArch64] Fix buildbot breakage of ubsan
2024-08-28 14:15:08 +08:00
large-stack-cmp.ll
…
large-stack.ll
…
late-taildup-computed-goto.ll
[TailDup] Delay aggressive computed-goto taildup to after RegAlloc. (#150911)
2025-07-31 19:20:05 +01:00
latency.ll
[llvm][AsmPrinter] Add an option to print instruction latencies (#113243)
2024-11-05 17:28:52 -08:00
ld1postmul.ll
…
ldexp-arm64ec.ll
[AArch64] Regenerate and update a number of check lines. NFC
2025-09-18 09:54:47 +01:00
ldexp.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
ldp-stp-control-features.ll
…
ldp-stp-scaled-unscaled-pairs.ll
AArch64: Convert tests to opaque pointers (#167442)
2025-11-11 02:52:45 +00:00
ldp-stp-unknown-size.mir
…
ldradr.ll
…
ldrpre-ldr-merge.mir
[LiveVariables] Mark use without implicit if defined at instr (#119446)
2025-08-18 08:34:59 -04:00
ldst_update_cfpath.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
ldst-implicitop.mir
[AArch64] Copy implicit def operands when creating LDP. (#164253)
2025-11-04 21:55:57 +00:00
ldst-miflags.mir
…
ldst-nopreidx-sp-redzone.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
ldst-opt-aa.mir
…
ldst-opt-after-block-placement.ll
…
ldst-opt-mte-with-dbg.mir
…
ldst-opt-mte.mir
…
ldst-opt-non-imm-offset.mir
…
ldst-opt-zr-clobber.mir
…
ldst-opt.ll
…
ldst-opt.mir
…
ldst-paired-aliasing.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
ldst-prepost-uses.ll
[DAG][AArch64] Ensure that ResNo is correct for uses of Ptr when considering postinc. (#164810)
2025-10-24 11:33:08 +01:00
ldst-regoffset.ll
…
ldst-unscaledimm.ll
…
ldst-unsignedimm.ll
…
ldst-zero.ll
…
legalize-bug-bogus-cpu.ll
…
licm-regclass-copy.mir
[AArch64] Treat COPY between cross-register banks as expensive (#167661)
2025-11-18 00:05:54 +02:00
lifetime-poison.ll
[IR] Remove size argument from lifetime intrinsics (#150248)
2025-08-08 11:09:34 +02:00
lit.local.cfg
…
literal_pools_float_apple.ll
[AArch64] Add tests for fused FP literals. NFC (#106731)
2024-09-01 21:11:37 +01:00
literal_pools_float.ll
…
live-debugvalues-sve.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
live-interval-analysis.mir
…
llrint-conv-fp16.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
llrint-conv.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
llround-conv-fp16.ll
[AArch64][GlobalISel] Add better basic legalization for llround. (#168427)
2025-11-18 12:05:02 +00:00
llround-conv.ll
[AArch64][GlobalISel] Add better basic legalization for llround. (#168427)
2025-11-18 12:05:02 +00:00
llvm-ir-to-intrinsic.ll
[AArch64][SVE] Avoid movprfx by reusing register for _UNDEF pseudos. (#166926)
2025-11-10 16:33:59 +00:00
llvm-masked-gather-legal-for-sve.ll
…
llvm-masked-scatter-legal-for-sve.ll
…
llvm.exp10.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
llvm.frexp.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
llvm.modf.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
llvm.sincos-fmf.ll
[IR] Add llvm.sincos intrinsic (#109825)
2024-10-29 10:52:20 +00:00
llvm.sincos.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
llvm.sincospi.error.ll
RuntimeLibcalls: Remove incorrect sincospi from most targets (#166982)
2025-11-10 11:05:08 -08:00
llvm.sincospi.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
load-combine-big-endian.ll
…
load-combine.ll
[LLVM][DAGCombiner] Fix size calculations in calculateByteProvider. (#148425)
2025-07-15 11:05:38 +01:00
load-insert-undef.ll
[AArch64] Extend and rewrite load zero and load undef patterns (#108185)
2024-09-19 14:52:52 +01:00
load-insert-zero.ll
[LLVM][CodeGen][SVE] Prefer NEON instructions when zeroing Z registers. (#133929)
2025-04-03 13:15:05 +01:00
load-store-forwarding.ll
…
load-zext-bitcast.ll
[AArch64] Optimize splat of extending loads to avoid GPR->FPR transfer (#163067)
2025-10-24 17:47:56 +03:00
load.ll
[AArch64] Optimize extending loads of small vectors (#163064)
2025-11-17 21:39:10 +02:00
local_vars.ll
…
local-bounds-single-trap.ll
[AArch64] Enable GlobalMerge on externals (#158592)
2025-09-17 17:49:23 +01:00
local-sym-storage-class.ll
…
logic-reassociate.ll
…
logic-shift.ll
PeepholeOpt: Fix looking for def of current copy to coalesce (#125533)
2025-02-05 23:29:02 +07:00
logical_shifted_reg.ll
[AArch64] Support MI and PL (#150314)
2025-08-11 07:41:38 +01:00
logical-imm.ll
…
logical-op-with-not.ll
…
loh-adrp-add-ldr-clobber.mir
[LOH] Don't emit AdrpAddStr when register could be clobbered (#142849)
2025-06-11 14:54:30 -07:00
loh-use-between-adrp-add.mir
…
loh.mir
…
loop-dependence-mask-ccmp.ll
[SelectionDAG] Fix AArch64 machine verifier bug when expanding LOOP_DEPENDENCE_MASK (#168221)
2025-11-15 21:12:11 +00:00
loop-micro-op-buffer-size-t99.ll
…
loop-sink-limit.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
loop-sink.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
lower-ptrmask-arm64_32.ll
…
lower-ptrmask.ll
…
lower-range-metadata-func-call.ll
[SDAG] Remove noundef workaround for range metadata/attributes (#141745)
2025-05-30 10:56:49 +02:00
lowerMUL-newload.ll
…
lr-reserved-for-ra-live-in.ll
[Clang][AArch64] Remove redundant tune args to the backend (#146896)
2025-07-05 09:36:13 +03:00
lrint-conv-fp16-win.ll
[AArch64][GlobalISel] Add GISel coverage for i32 lround and lrint. NFC
2025-12-01 16:53:40 +00:00
lrint-conv-fp16.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
lrint-conv-win.ll
[AArch64][GlobalISel] Add GISel coverage for i32 lround and lrint. NFC
2025-12-01 16:53:40 +00:00
lrint-conv.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
lround-conv-fp16-win.ll
[AArch64][GlobalISel] Add GISel coverage for i32 lround and lrint. NFC
2025-12-01 16:53:40 +00:00
lround-conv-fp16.ll
[AArch64][GlobalISel] Add better basic legalization for llround. (#168427)
2025-11-18 12:05:02 +00:00
lround-conv-win.ll
[AArch64][GlobalISel] Add GISel coverage for i32 lround and lrint. NFC
2025-12-01 16:53:40 +00:00
lround-conv.ll
[AArch64][GlobalISel] Add better basic legalization for llround. (#168427)
2025-11-18 12:05:02 +00:00
ls64-inline-asm.ll
[TargetLowering] Use Correct VT for Multi-out Asm (#116024)
2024-11-14 12:31:31 +00:00
ls64-intrinsics.ll
…
lshr-trunc-lshr.ll
[GISel] Combine shift + trunc + shift pattern (#155583)
2025-09-10 15:01:55 +01:00
lslfast.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
luti-with-sme2.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
machine_cse_illegal_hoist.ll
…
machine_cse_impdef_killflags.ll
[AArch64] Fold UBFMXri to UBFMWri when it's an LSR or LSL alias (#106968)
2024-09-17 11:21:23 +01:00
machine_cse.ll
…
machine-combiner-copy.ll
[RegAlloc] Remove default restriction on non-trivial rematerialization (#159211)
2025-10-04 22:50:44 +00:00
machine-combiner-eor.mir
…
machine-combiner-fmul-dup.mir
…
machine-combiner-instr-fmf.mir
…
machine-combiner-madd.ll
…
machine-combiner-maddimm.mir
[AArch64] Use mov imm pseudo instructions in madd combine. (#147510)
2025-07-11 08:01:14 +01:00
machine-combiner-reassociate-accumulators.mir
[Machine-Combiner] Add a pass to reassociate chains of accumulation instructions into a tree (#132728)
2025-03-25 15:58:20 +02:00
machine-combiner-reassociate-ops-in-different-blocks.mir
…
machine-combiner-reassociate.mir
[AArch64] Remove UnsafeFPMath (#150876)
2025-07-29 12:41:09 +08:00
machine-combiner-subadd2.mir
[AArch64] Use second reg class in genSubAdd2SubSub machine combine.
2024-11-13 09:22:08 +00:00
machine-combiner-subadd.ll
…
machine-combiner-subregs.mir
MachineCombiner: Partially fix losing subregister indexes (#141661)
2025-11-11 02:04:52 +00:00
machine-combiner-transient.ll
…
machine-combiner.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
machine-combiner.mir
[AArch64] Remove UnsafeFPMath (#150876)
2025-07-29 12:41:09 +08:00
machine-copy-prop.ll
…
machine-copy-remove.ll
…
machine-copy-remove.mir
…
machine-cp-backward-uses.mir
[MCP] Optimize copies when src is used during backward propagation (#111130)
2024-10-23 13:37:02 +02:00
machine-cp-clobbers.mir
…
machine-cp-constant-reg.mir
[MCP] Skip invalidating def constant regs during forward propagation (#111129)
2024-10-10 18:05:42 +04:00
machine-cp-sub-reg.mir
[MachineCP] Correctly handle register masks and sub-registers (#122734)
2025-01-16 09:39:27 +00:00
machine-cse-profitable-check.ll
…
machine-dead-copy.mir
…
machine-latecleanup-inlineasm.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
machine-licm-hoist-load.ll
[ExpandMemCmp][AArch64][PowerPC][RISCV][X86] Use llvm.ucmp instead of (sub (zext (icmp ugt)), (zext (icmp ult))). (#121530)
2025-01-03 09:19:32 -08:00
machine-licm-sink-instr.ll
AArch64: Enable terminal rule (#165959)
2025-11-10 12:49:21 -08:00
machine-licm-sub-loop.ll
[RegAlloc] Remove default restriction on non-trivial rematerialization (#159211)
2025-10-04 22:50:44 +00:00
machine-outliner-2fixup-blr-terminator.mir
…
machine-outliner-adrp-got-split.mir
[MachineOutliner] Don't outline ADRP pair to avoid incorrect ICF (#160232)
2025-11-10 11:54:16 -08:00
machine-outliner-all-stack.mir
…
machine-outliner-bad-adrp.mir
…
machine-outliner-bad-register.mir
…
machine-outliner-bti.mir
…
machine-outliner-bundle.mir
[MachineOutliner] Preserve instruction bundles (#106402)
2024-09-04 09:06:48 +01:00
machine-outliner-calls.mir
Reland "[AArch64] Define high bits of FPR and GPR registers (take 2) (#114827)"
2024-11-27 13:31:59 +00:00
machine-outliner-cfi-tail-some.mir
…
machine-outliner-cfi-tail.mir
…
machine-outliner-cfi.mir
…
machine-outliner-compatible-candidates.mir
…
machine-outliner-create-lr-livein.mir
…
machine-outliner-default.mir
…
machine-outliner-drop-stack.mir
…
machine-outliner-flags.ll
[MachineOutliner] Add profile guided outlining (#154437)
2025-09-09 10:06:46 -07:00
machine-outliner-function-annotate.mir
…
machine-outliner-inline-asm-adrp.mir
…
machine-outliner-iterative-2.mir
…
machine-outliner-iterative.mir
AArch64: Convert tests to opaque pointers (#167442)
2025-11-11 02:52:45 +00:00
machine-outliner-labels.mir
…
machine-outliner-leaf-descendants.ll
…
machine-outliner-loh.ll
[MachineOutliner] Remove LOHs from outlined candidates (#143617)
2025-06-30 14:29:06 -07:00
machine-outliner-loh.mir
[MachineOutliner] Remove LOHs from outlined candidates (#143617)
2025-06-30 14:29:06 -07:00
machine-outliner-mapper-debug-output.mir
…
machine-outliner-mapper-stats.mir
…
machine-outliner-mapping-stats.mir
…
machine-outliner-no-noreturn-no-stack.mir
…
machine-outliner-noredzone.ll
…
machine-outliner-noreturn-no-stack.mir
…
machine-outliner-noreturn-save-lr.mir
…
machine-outliner-only-unsafe-ranges.mir
…
machine-outliner-ordering.mir
…
machine-outliner-outline-bti.ll
…
machine-outliner-overlap.mir
…
machine-outliner-patchable.ll
…
machine-outliner-patchable.mir
…
machine-outliner-pgo.ll
[MachineOutliner] Add profile guided outlining (#154437)
2025-09-09 10:06:46 -07:00
machine-outliner-regsave.mir
…
machine-outliner-remarks.ll
…
machine-outliner-retaddr-sign-cfi.ll
[AArch64] Correct position of CFI Instruction for Pointer Authentication (#137795)
2025-05-06 11:31:04 +02:00
machine-outliner-retaddr-sign-diff-scope-same-key.ll
[AArch64] Correct position of CFI Instruction for Pointer Authentication (#137795)
2025-05-06 11:31:04 +02:00
machine-outliner-retaddr-sign-non-leaf.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
machine-outliner-retaddr-sign-regsave.mir
[AArch64] Correct position of CFI Instruction for Pointer Authentication (#137795)
2025-05-06 11:31:04 +02:00
machine-outliner-retaddr-sign-same-scope-diff-key.ll
[AArch64] Correct position of CFI Instruction for Pointer Authentication (#137795)
2025-05-06 11:31:04 +02:00
machine-outliner-retaddr-sign-same-scope-same-key-a.ll
…
machine-outliner-retaddr-sign-same-scope-same-key-b.ll
…
machine-outliner-retaddr-sign-sp-mod.ll
…
machine-outliner-retaddr-sign-sp-mod.mir
[AArch64] Correct position of CFI Instruction for Pointer Authentication (#137795)
2025-05-06 11:31:04 +02:00
machine-outliner-retaddr-sign-subtarget.ll
[AArch64] Correct position of CFI Instruction for Pointer Authentication (#137795)
2025-05-06 11:31:04 +02:00
machine-outliner-retaddr-sign-thunk.ll
[AArch64] Correct position of CFI Instruction for Pointer Authentication (#137795)
2025-05-06 11:31:04 +02:00
machine-outliner-retaddr-sign-v8-3.ll
…
machine-outliner-safe-range-in-middle.mir
[MachineOutliner] Avoid ranges that cross bundle boundary (#148977)
2025-07-16 09:51:25 -07:00
machine-outliner-side-effect-2.mir
…
machine-outliner-side-effect.mir
…
machine-outliner-size-info.mir
…
machine-outliner-sort-per-priority.ll
…
machine-outliner-sort-per-priority.mir
…
machine-outliner-tail.ll
…
machine-outliner-threshold.mir
…
machine-outliner-throw2.ll
…
machine-outliner-throw.ll
…
machine-outliner-thunk.ll
…
machine-outliner-unsafe-range-at-beginning.mir
…
machine-outliner-unsafe-range-at-end.mir
…
machine-outliner-unsafe-stack-call.mir
…
machine-outliner.ll
…
machine-outliner.mir
…
machine-scheduler.mir
Reland "CodeGen][NewPM] Port MachineScheduler to NPM. (#125703)" (#126684)
2025-02-12 18:54:39 +05:30
machine-sink-cache-invalidation.ll
…
machine-sink-getmemoperandwithoffset.mir
[llvm] Remove br i1 undef in some llvm/test/CodeGen tests (#127368)
2025-02-16 18:44:46 +00:00
machine-sink-kill-flags.ll
Reland "[RegAlloc] Fix the terminal rule check for interfere with DstReg (#168661)" (#169219)
2025-11-24 09:27:25 +08:00
machine-sink-zr.mir
…
machine-sme-abi-find-insert-pt.mir
[AArch64][SME] Avoid clobbering X0 in the MachineSMEABIPass (#170131)
2025-12-02 09:16:30 +00:00
machine-zero-copy-remove.mir
…
macho-global-symbols.ll
…
macho-none.ll
…
macho-trap.ll
…
macro-fusion-addsub-2reg-const1.mir
Reland "CodeGen][NewPM] Port MachineScheduler to NPM. (#125703)" (#126684)
2025-02-12 18:54:39 +05:30
macro-fusion-last.mir
Reland "CodeGen][NewPM] Port MachineScheduler to NPM. (#125703)" (#126684)
2025-02-12 18:54:39 +05:30
macro-fusion.ll
…
madd-combiner.ll
[AArch64] Use mov imm pseudo instructions in madd combine. (#147510)
2025-07-11 08:01:14 +01:00
masked-integer-compare.ll
[AArch64] Simplify some masked integer comparisons. (#153783)
2025-09-30 10:17:07 +01:00
mattr-all.ll
…
mature-mc-support.ll
…
max-jump-table.ll
…
memcmp.ll
[ExpandMemCmp] Recognize canonical form of (icmp sle/sge X, 0) in getMemCmpOneBlock. (#121540)
2025-01-03 10:23:13 -08:00
memcpy-f128.ll
[SDAG] Precommit tests for #126207 (NFC) (#126208)
2025-02-10 09:13:02 +00:00
memcpy-scoped-aa.ll
[CGP] Update tests to use autogen scripts, and refresh check lines
2025-07-03 11:36:33 -07:00
memmove-inline.ll
[AArch64] Increase inline memmove limit to 16 stored registers (#111848)
2024-10-14 08:57:32 +01:00
memset-inline.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
memset-vs-memset-inline.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
memset.ll
…
memsize-remarks.ll
[Clang][AArch64] Remove redundant tune args to the backend (#146896)
2025-07-05 09:36:13 +03:00
memtag-compact-unwind.ll
[AArch64] Force dwarf unwind for MTE-tagged stack frames (#168530)
2025-12-02 10:34:04 +00:00
memtag-loop-nzcv.ll
…
memtag-merge-writeback.mir
[AArch64] Fix LDR/STR folding causing memtag failures (#118821)
2024-12-06 13:07:37 +00:00
merge-scoped-aa-store.ll
[X86/AArch64] Autogen two additional tests
2025-07-03 13:11:29 -07:00
merge-store-dependency.ll
…
merge-store.ll
[DAG] shouldReduceLoadWidth - hasOneUse should check just the loaded value - not the chain (#128167)
2025-02-24 11:09:41 +00:00
merge-trunc-store.ll
…
mergestores_noimplicitfloat.ll
…
midpoint-int.ll
[AArch64] Update test from #151180. (#152299)
2025-08-06 13:54:41 +01:00
min-jump-table.ll
[AArch64] Lower jump table cases threshold to 10 (#143632)
2025-06-19 01:53:36 +03:00
min-max-combine.ll
[AArch64] Support MI and PL (#150314)
2025-08-11 07:41:38 +01:00
min-max.ll
…
mingw-refptr.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
minmax-of-minmax.ll
…
minmax.ll
…
mir-yaml-has-streaming-mode-changes.ll
[AArch64PostCoalescer] Propagate undef flag after replacing (#163119)
2025-10-15 10:15:44 +01:00
misched-branch-targets.mir
Reland "CodeGen][NewPM] Port MachineScheduler to NPM. (#125703)" (#126684)
2025-02-12 18:54:39 +05:30
misched-bundle.mir
Reland "CodeGen][NewPM] Port MachineScheduler to NPM. (#125703)" (#126684)
2025-02-12 18:54:39 +05:30
misched-cutoff.mir
[MISched] Fix off-by-one error in debug output with -misched-cutoff=<n> flag (#137988)
2025-05-06 11:12:23 +01:00
misched-detail-resource-booking-01.mir
CodeGen: Remove redundant REQUIRES registered-target from backend tests (#147475)
2025-07-09 09:25:53 +09:00
misched-detail-resource-booking-02.mir
CodeGen: Remove redundant REQUIRES registered-target from backend tests (#147475)
2025-07-09 09:25:53 +09:00
misched-fuse-cset.ll
[AArch64] Add a FeatureFuseCmpCSet (#153189)
2025-08-28 21:26:12 +01:00
misched-fusion-addadrp.ll
…
misched-fusion-addr-tune.ll
…
misched-fusion-addr.ll
…
misched-fusion-aes.ll
…
misched-fusion-arith-logic.mir
Reland "CodeGen][NewPM] Port MachineScheduler to NPM. (#125703)" (#126684)
2025-02-12 18:54:39 +05:30
misched-fusion-cmp-bcc.ll
AArch64: Convert tests to opaque pointers (#167442)
2025-11-11 02:52:45 +00:00
misched-fusion-cmp.mir
Reland "CodeGen][NewPM] Port MachineScheduler to NPM. (#125703)" (#126684)
2025-02-12 18:54:39 +05:30
misched-fusion-crypto-eor.mir
Reland "CodeGen][NewPM] Port MachineScheduler to NPM. (#125703)" (#126684)
2025-02-12 18:54:39 +05:30
misched-fusion-csel.ll
[AArch64] Add FeatureFuseCCSelect to a number of CPU configurations. (#153188)
2025-08-28 19:35:28 +01:00
misched-fusion-lit.ll
…
misched-fusion.ll
…
misched-move-imm.mir
Reland "CodeGen][NewPM] Port MachineScheduler to NPM. (#125703)" (#126684)
2025-02-12 18:54:39 +05:30
misched-predicate-virtreg.mir
Reland "CodeGen][NewPM] Port MachineScheduler to NPM. (#125703)" (#126684)
2025-02-12 18:54:39 +05:30
misched-sort-resource-in-trace.mir
CodeGen: Remove redundant REQUIRES registered-target from backend tests (#147475)
2025-07-09 09:25:53 +09:00
misched-stp.ll
…
mla_mls_merge.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
mlicm-csr-mask.mir
…
mlicm-implicit-defs.mir
MachineLICM: Merge logic for implicit and explicit definitions.
2025-07-09 13:02:15 -07:00
mlicm-stack-write-check.mir
[CodeGen][NFC] Properly split MachineLICM and EarlyMachineLICM (#113573)
2024-10-25 11:19:22 -07:00
mops-register-alias.ll
…
movi64_sve.ll
[AArch64] Use SVE to materialise some 128-bit vector constants (#159101)
2025-09-25 09:36:59 +01:00
movid-no-neon.ll
…
movimm-expand-ldst.ll
Revert "[AArch64] Optimize when storing symmetry constants" (#105474)
2024-08-20 23:37:19 -07:00
movimm-expand-ldst.mir
Revert "[AArch64] Optimize when storing symmetry constants" (#105474)
2024-08-20 23:37:19 -07:00
movimm-wzr.mir
…
movw-consts.ll
…
movw-shift-encoding.ll
…
mul_by_elt.ll
…
mul_pow2.ll
…
mul-cmp.ll
…
mul-i128-overflow.ll
[CGP]: Optimize mul.overflow. (#148343)
2025-11-18 13:15:47 +00:00
mul-lohi.ll
…
mul.ll
[AArch64] Optimize extending loads of small vectors (#163064)
2025-11-17 21:39:10 +02:00
mulcmle.ll
[AArch64][GlobalISel] Update and cleanup a number of gisel tests. NFC
2024-11-23 18:58:55 +00:00
multi-vector-load-size.ll
…
multi-vector-store-size.ll
…
naked-fn-with-frame-pointer.ll
[llvm] Consistently respect naked fn attribute in TargetFrameLowering::hasFP() (#106014)
2024-10-18 09:35:42 +04:00
named-vector-shuffle-reverse-neon.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
named-vector-shuffle-reverse-sve.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
named-vector-shuffles-neon.ll
…
named-vector-shuffles-sve.ll
[AArch64][ISel] Select constructive EXT_ZZI pseudo instruction (#152554)
2025-08-15 14:30:24 +01:00
neg-abs.ll
[AArch64][GlobalISel] Add extra GISel test coverage. NFC
2025-07-30 10:53:47 +01:00
neg-imm.ll
…
neg-selects.ll
[AArch64][GlobalISel] Add extra GISel test coverage. NFC
2025-07-30 10:53:47 +01:00
neon_rbit.ll
…
neon-abd.ll
…
neon-addlv.ll
[AArch64] Regenerate and update a number of check lines. NFC
2025-09-18 09:54:47 +01:00
neon-anyof-splat.ll
[AArch64] Improve select dagcombine (#169925)
2025-12-02 12:29:49 +00:00
neon-bitcast.ll
[AArch64] Prefer using DUP instead of INS where possible (#138549)
2025-05-15 10:31:09 +02:00
neon-bitselect.ll
…
neon-bitwise-instructions.ll
[AArch64][GlobalISel] Use TargetConstant for shift immediates (#161527)
2025-10-03 20:16:08 +01:00
neon-compare-instructions.ll
[AArch64][GlobalISel] Use TargetConstant for shift immediates (#161527)
2025-10-03 20:16:08 +01:00
neon-diagnostics.ll
…
neon-dot-product.ll
[AArch64][GlobalISel] Lower udot/sdot intrinsics to G_UDOT/G_SDOT
2025-07-30 11:02:30 +01:00
neon-dotpattern.ll
…
neon-dotreduce.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
neon-extadd-extract.ll
[AArch64] Guard for 128bit vectors in mull combine. (#169839)
2025-11-28 12:06:17 +00:00
neon-extadd.ll
[AArch64][GlobalISel] Lower G_BUILD_VECTOR to G_INSERT_VECTOR_ELT (#105686)
2024-09-03 18:55:23 -07:00
neon-extmul.ll
[AArch64][GlobalISel] Add push_mul_through_s/zext (#141551)
2025-07-31 07:38:11 +01:00
neon-extract.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
neon-extracttruncate.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
neon-famin-famax.ll
[AArch64] Implement NEON vamin/vamax intrinsics (#99041)
2024-09-09 13:34:41 +01:00
neon-fma-FMF.ll
…
neon-fma.ll
…
neon-fp8-cvt.ll
[AArch64] Add Neon FP8 conversion intrinsics (#123612)
2025-01-27 17:32:47 +00:00
neon-fp8-fscale.ll
[AArch64] Implement NEON vscale intrinsics (#100347)
2024-09-26 16:39:18 +01:00
neon-fp16fml.ll
…
neon-fpextend_f16.ll
…
neon-fpround_f128.ll
…
neon-idiv.ll
…
neon-inline-asm-16-bit-fp.ll
…
neon-ins-trunc-elt.ll
[AArch64] Avoid GPR trip when moving truncated i32 vector elements (#114541)
2024-12-20 11:07:37 +00:00
neon-insert-sve-elt.ll
[AArch64] Prefer using DUP instead of INS where possible (#138549)
2025-05-15 10:31:09 +02:00
neon-insextbitcast.ll
[AArch64] Prefer using DUP instead of INS where possible (#138549)
2025-05-15 10:31:09 +02:00
neon-luti.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
neon-mla-mls.ll
…
neon-mov.ll
[AArch64][GlobalISel] Correct instructions for 64bit fneg constant vectors. (#166537)
2025-11-09 19:10:21 +00:00
neon-or-combine.ll
…
neon-partial-reduce-dot-product.ll
[AArch64] Improve codegen for partial.reduce.add v16i8 -> v2i32 (#161833)
2025-10-09 17:08:10 +01:00
neon-perm.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
neon-reverseshuffle.ll
[AArch64] Add rev codegen tests for bfloat16. NFC
2025-02-24 07:59:08 +00:00
neon-rshrn.ll
[AArch64][SVE] Fold integer lane extract and store to FPR store (#129756)
2025-03-18 10:10:23 +00:00
neon-saba.ll
[AArch64] Transform add(x, abs(y)) -> saba(x, y, 0) (#156615)
2025-09-08 14:14:24 +01:00
neon-sad.ll
[AArch64] Expand UADDLV patterns to handle two-step i8->i16->i32 extends (#146078)
2025-07-08 18:29:11 +01:00
neon-scalar-by-elem-fma.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
neon-scalar-copy.ll
…
neon-scalarize-histogram.ll
[AArch64] Expand llvm.histogram intrinsic to support umax, umin, and uadd.sat operations (#138447)
2025-06-11 15:15:24 +01:00
neon-sha3.ll
…
neon-shift-left-long.ll
[AArch64][GlobalISel] Use TargetConstant for shift immediates (#161527)
2025-10-03 20:16:08 +01:00
neon-shift-neg.ll
…
neon-shuffle-vector-tbl.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
neon-sm4-sm3.ll
…
neon-stepvector.ll
Move stepvector intrinsic out of experimental namespace (#98043)
2024-08-28 12:48:20 +01:00
neon-truncstore.ll
[AArch64] Generalize integer FPR lane stores for all types (#134117)
2025-04-17 09:25:57 +01:00
neon-vcadd.ll
…
neon-vcmla.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
neon-vector-splat.ll
[AArch64][GlobalISel] Legalize ptr shuffle vector to s64 (#116013)
2024-11-23 17:00:51 +00:00
neon-vmull-high-p8.ll
…
neon-vmull-high-p64.ll
…
neon-wide-splat.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
neon-widen-shuffle.ll
[AArch64] recognise zip1/zip2 with flipped operands (#167235)
2025-11-27 17:11:56 +00:00
nest-register.ll
[AArch64] fix trampoline implementation: use X15 (#126743)
2025-06-11 21:49:01 -04:00
nested-iv-regalloc.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
new-load-requires-renaming-in-mssa.ll
…
no_cfi.ll
…
no-fp-asm-clobbers-crash.ll
…
no-promote-scalabale-const-to-global.ll
[AArch64] Do not promote scalable constants to global variables (#146926)
2025-07-07 09:17:31 +01:00
no-quad-ldp-stp.ll
AArch64: Convert tests to opaque pointers (#167442)
2025-11-11 02:52:45 +00:00
no-reorder-cfi-merge-back-load.mir
[AArch64] Prevent the AArch64LoadStoreOptimizer from reordering CFI instructions (#101317)
2024-09-10 13:07:06 +01:00
no-reorder-cfi-merge-back-store.mir
[AArch64] Prevent the AArch64LoadStoreOptimizer from reordering CFI instructions (#101317)
2024-09-10 13:07:06 +01:00
no-reorder-cfi-merge-fwd-load.mir
[AArch64] Prevent the AArch64LoadStoreOptimizer from reordering CFI instructions (#101317)
2024-09-10 13:07:06 +01:00
no-reorder-cfi-merge-fwd.mir
[AArch64] Prevent the AArch64LoadStoreOptimizer from reordering CFI instructions (#101317)
2024-09-10 13:07:06 +01:00
no-reorder-cfi-no-merge.mir
[AArch64] Prevent the AArch64LoadStoreOptimizer from reordering CFI instructions (#101317)
2024-09-10 13:07:06 +01:00
no-reorder-cfi.ll
[AArch64] Prevent the AArch64LoadStoreOptimizer from reordering CFI instructions (#101317)
2024-09-10 13:07:06 +01:00
no-stack-arg-probe.ll
…
no-sve-no-neon.ll
…
no-tail-call-bzero-from-memset.ll
…
nofpclass.ll
CodeGen: Add ISD::AssertNoFPClass (#138839)
2025-05-15 16:05:15 +08:00
nomerge.ll
…
nonlazybind.ll
…
nontemporal-load.ll
MachineScheduler: Reset next cluster candidate for each node (#139513)
2025-05-28 14:53:46 +08:00
nontemporal.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
note-gnu-property-elf-pauthabi.ll
…
note-gnu-property-gcs.ll
…
note-gnu-property-pac-bti-0.ll
…
note-gnu-property-pac-bti-1.ll
…
note-gnu-property-pac-bti-2.ll
…
note-gnu-property-pac-bti-3.ll
…
note-gnu-property-pac-bti-4.ll
…
null-mctargetstreamer.ll
…
nzcv-save.ll
MachineScheduler: Improve instruction clustering (#137784)
2025-06-05 15:28:04 +08:00
O0-pipeline.ll
Rename ExpandLargeFpConvertPass to ExpandFpPass (#131128)
2025-03-14 13:11:45 +01:00
O3-pipeline.ll
Rename ExpandLargeFpConvertPass to ExpandFpPass (#131128)
2025-03-14 13:11:45 +01:00
optimize_combine_large_shifts.ll
…
optimize-cond-branch.ll
Reland [SelectionDAG] Folding ZERO-EXTEND/SIGN_EXTEND poison to Poison value in getNode (#136701)
2025-04-22 17:36:41 -04:00
optimize-imm.ll
…
or-combine.ll
…
outlining-with-streaming-mode-changes.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
overeager_mla_fusing.ll
…
overflow.ll
[AArch64][GlobalISel] Update and cleanup a number of gisel tests. NFC
2024-11-23 18:58:55 +00:00
overlapping-copy-bundle-cycle.mir
…
overlapping-copy-bundle.mir
…
p2align-zero-fillvalue.ll
…
pacbti-llvm-generated-funcs-1.ll
…
pacbti-llvm-generated-funcs-2.ll
[AArch64] Correct position of CFI Instruction for Pointer Authentication (#137795)
2025-05-06 11:31:04 +02:00
pacbti-module-attrs.ll
…
paired-load.ll
…
parity.ll
[AArch64] Fix BE popcount casts. (#129879)
2025-03-05 20:08:34 +00:00
partial-pipeline-execution.ll
[AArch64][test] Remove unsafe-fp-math uses (NFC) (#164606)
2025-10-22 12:14:21 +00:00
partial-reduction-add-predicated.ll
[DAGCombiner] Fold select into partial.reduce.add operands. (#167857)
2025-11-18 09:49:42 +00:00
partial-reduction-add.ll
[IR] NFC: Remove 'experimental' from partial.reduce.add intrinsic (#158637)
2025-09-17 11:44:47 +01:00
patchable-function-entry-bti.ll
[AArch64][v8.5A] Omit BTI for non-addr-taken static fns in ELF (#135043)
2025-04-10 17:08:45 +01:00
patchable-function-entry-empty.mir
[CodeGen][NPM] Port PatchableFunction to NPM (#129866)
2025-03-12 15:11:11 +05:30
patchable-function-entry.ll
…
pauthlr-prologue-duplication.mir
[CodeGen][NPM] Port MachineBlockPlacement to NPM (#129828)
2025-03-14 10:31:53 +05:30
PBQP-chain.ll
…
PBQP-coalesce-benefit.ll
…
PBQP-csr.ll
…
PBQP.ll
…
pcsections.ll
…
peephole-and-tst.ll
[RegAlloc] Remove default restriction on non-trivial rematerialization (#159211)
2025-10-04 22:50:44 +00:00
peephole-csel.ll
[AArch64] Convert CSEL(X, 1) into CSINC(X, XZR) in early-ifcvt (#162993)
2025-10-20 16:14:15 +02:00
peephole-csel.mir
…
peephole-insert-subreg.mir
…
peephole-insvigpr.mir
[AArch64][clang][llvm] Add structured sparsity outer product (TMOP) intrinsics (#135145)
2025-04-16 10:59:07 +01:00
peephole-movd.mir
…
peephole-opt-analyzeCompare-subreg-use.mir
AArch64: Skip analyzeCompare for subregister uses (#141654)
2025-06-04 05:56:51 +09:00
peephole-opt-check-cflags.mir
…
peephole-orr.mir
AArch64: Allow ZEXT+COPY -> FMOV peephole for ZPR registers as well (#135436)
2025-04-14 00:19:09 -07:00
peephole-sxtw.mir
[AArch64] Extend sxtw peephole to uxtw. (#104516)
2024-08-20 14:46:19 +01:00
perm-tb-with-sme2.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
phi-dbg.ll
…
phi.ll
[PHIElimination] Revert #131837 #146320 #146337 (#146850)
2025-07-03 07:48:08 -04:00
PHIElimination-crash.mir
[llc] Provide opt like verifier options (#106665)
2024-09-04 17:37:34 +08:00
PHIElimination-debugloc.mir
[PHIElimination] Revert #131837 #146320 #146337 (#146850)
2025-07-03 07:48:08 -04:00
pic-eh-stubs.ll
…
pie.ll
…
pmull-ldr-merge.ll
…
popcount_vmask.ll
[LLVM][CodeGen][AArch64] Improve lowering of boolean vector popcount operations. (#166401)
2025-11-06 13:42:38 +00:00
popcount.ll
[AArch64] Improve scalar and Neon popcount with SVE CNT. (#143870)
2025-06-30 09:04:45 +01:00
post-ra-machine-sink.mir
[CodeGen][NewPM] Port "PostRAMachineSink" pass to NPM (#129690)
2025-07-10 13:10:46 +05:30
postra-mi-sched.ll
…
pow.75.ll
…
pow.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
powi-arm64ec.ll
[Arm64EC] Add support for half (#152843)
2025-08-12 14:15:52 -07:00
powi-windows.ll
…
powi.ll
AArch64: Add tests for arm64ec for special case math functions (#147234)
2025-07-08 11:11:22 +09:00
pr27816.ll
…
pr33172.ll
…
pr40091.ll
…
pr48188.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
pr49781.ll
[LLVM][AArch64] Change SVE CodeGen tests to use splat().
2025-02-26 11:11:02 +00:00
pr51476.ll
…
pr51516.mir
[RegAlloc][NewPM] Plug Greedy RA in codegen pipeline (#120557)
2025-03-03 11:06:15 +05:30
pr53315-returned-i128.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
pr55178.ll
…
pr55201.ll
…
pr55644.ll
…
pr58350.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
pr58431.ll
[GlobalISel] add KnownBits tracking for G_UMULH and G_SMULH (#158445)
2025-10-10 18:42:14 +09:00
pr58516.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
pr59891-dagcombine-deleted-freeze.ll
…
pr59902.ll
…
pr61111.ll
SelectionDAG: neg (and x, 1) --> SIGN_EXTEND_INREG x, i1 (#131239)
2025-03-14 10:47:56 -07:00
pr61549.ll
…
pr66603.ll
…
pr72777.ll
[AArch64] Support MI and PL (#150314)
2025-08-11 07:41:38 +01:00
pr79100.ll
…
pr86717.ll
…
pr88966.ll
…
pr90936.ll
…
pr92062.ll
…
pr96366.ll
…
pr135776.ll
[LegalizeTypes] Check getTypeAction before calling GetScalarizedVector. (#135838)
2025-04-15 13:56:07 -07:00
pr135821.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
pr142314.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
pr148949.ll
[DAGCombiner][AArch64] Prevent SimplifyVCastOp from creating illegal scalar types after type legalization. (#148970)
2025-07-15 18:22:25 -07:00
pr157118.ll
[TargetInstrInfo][AArch64] Don't assume register came from operand 0 in canCombine (#157210)
2025-09-05 22:00:12 -07:00
pr157252.mir
[AArch64] Unfold adds when eliminating frame index with scalable offset (#158597)
2025-09-16 14:30:57 +00:00
pr161420.ll
[AArch64][SME] Preserve Chain when selecting multi-vector LUT4Is (#161494)
2025-10-02 09:27:48 +01:00
pr164181.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
pr166870.ll
[AArch64][test] Improve pr166870.ll test case (#168194)
2025-11-16 11:09:00 +00:00
pr-cf624b2.ll
[AArch64] Generalize integer FPR lane stores for all types (#134117)
2025-04-17 09:25:57 +01:00
pre-indexed-addrmode-with-constant-offset.ll
…
predicated-add-sub.ll
…
preferred-alignment.ll
…
preferred-function-alignment.ll
Use F.hasOptSize() instead of checking optsize directly (#147348)
2025-07-28 08:38:52 -07:00
prefixdata.ll
…
preserve_mostcc.ll
test: correct typo in RUN line (#166511)
2025-11-05 07:22:47 +00:00
preserve_nonecc_call.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
preserve_nonecc_musttail.ll
…
preserve_nonecc_swift.ll
…
preserve_nonecc_varargs_aapcs.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
preserve_nonecc_varargs_darwin.ll
Revert "Reland "RegisterCoalescer: Add implicit-def of super register when coalescing SUBREG_TO_REG""
2025-11-25 11:01:27 +00:00
preserve_nonecc_varargs_win64.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
preserve_nonecc.ll
…
preserve.ll
Reland "[AArch64] Define high bits of FPR and GPR registers (take 2) (#114827)"
2024-11-27 13:31:59 +00:00
print-pipeline-passes.ll
[LTO][AllocToken] Support AllocToken instrumentation in backend (#169358)
2025-12-02 10:50:39 +01:00
prologue-epilogue-remarks.mir
…
ptradd.ll
[SDAG] Prefer scalar for prefix of vector GEP expansion (#146719)
2025-07-02 18:16:27 -07:00
ptrauth-arm64-tls-dynamics.ll
GlobalISel: Replace use of report_fatal_error (#145866)
2025-06-27 21:16:23 +09:00
ptrauth-basic-pic.ll
[PAC][CodeGen][ELF][AArch64] Support signed GOT (#113811)
2024-11-01 12:21:10 +03:00
ptrauth-bti-call.ll
AArch64: Convert tests to opaque pointers (#167442)
2025-11-11 02:52:45 +00:00
ptrauth-call-rv-marker.ll
AArch64: Convert tests to opaque pointers (#167442)
2025-11-11 02:52:45 +00:00
ptrauth-call.ll
[AArch64][PAC] Fix clobbering registers by BLRA and AUTH_TCRETURN (#155373)
2025-08-27 19:36:00 +03:00
ptrauth-constant-in-code.ll
…
ptrauth-elf-globals-pic.ll
[PAC][CodeGen][ELF][AArch64] Support signed GOT (#113811)
2024-11-01 12:21:10 +03:00
ptrauth-elf-got-function-symbols.ll
[PAC][CodeGen][ELF][AArch64] Support signed GOT (#113811)
2024-11-01 12:21:10 +03:00
ptrauth-extern-weak.ll
[PAC][CodeGen][ELF][AArch64] Support signed GOT with tiny code model (#114525)
2024-12-10 14:43:12 +03:00
ptrauth-fpac.ll
[AArch64] Regenerate and update a number of check lines. NFC
2025-09-18 09:54:47 +01:00
ptrauth-got-abuse.ll
[PAC][CodeGen][ELF][AArch64] Support signed GOT (#113811)
2024-11-01 12:21:10 +03:00
ptrauth-indirectbr.ll
…
ptrauth-init-fini.ll
…
ptrauth-intrinsic-auth-resign-with-blend.ll
AArch64: Relax x16/x17 constraint on AUT in certain cases.
2025-07-09 13:46:44 -07:00
ptrauth-intrinsic-auth-resign.ll
[AArch64][PAC] Do not execute AUT instructions speculatively (#155372)
2025-08-27 16:46:35 +03:00
ptrauth-intrinsic-blend.ll
…
ptrauth-intrinsic-sign-generic.ll
…
ptrauth-intrinsic-sign.ll
…
ptrauth-intrinsic-strip.ll
…
ptrauth-invoke.ll
…
ptrauth-irelative.ll
Add deactivation symbol operand to ConstantPtrAuth.
2025-11-26 12:39:40 -08:00
ptrauth-isel.ll
[AArch64][PAC] Introduce AArch64::PAC pseudo instruction (#146488)
2025-07-25 13:10:37 +03:00
ptrauth-isel.mir
[AArch64][PAC] Introduce AArch64::PAC pseudo instruction (#146488)
2025-07-25 13:10:37 +03:00
ptrauth-reloc.ll
AArch64: Convert tests to opaque pointers (#167442)
2025-11-11 02:52:45 +00:00
ptrauth-ret-trap.ll
[AArch64][PAC] Move emission of LR checks in tail calls to AsmPrinter (#110705)
2024-11-12 18:27:19 +03:00
ptrauth-ret.ll
[RegAlloc] Sort CopyHint by IsCSR (#131046)
2025-04-14 09:58:46 -04:00
ptrauth-sign-personality.ll
[PAC][ELF][AArch64] Support signed personality function pointer (#119361)
2024-12-16 10:24:09 +03:00
ptrauth-tagged-globals-pic.ll
[PAC][CodeGen][ELF][AArch64] Support signed GOT (#113811)
2024-11-01 12:21:10 +03:00
ptrauth-tail-call-regalloc.ll
[AArch64][PAC] Move emission of LR checks in tail calls to AsmPrinter (#110705)
2024-11-12 18:27:19 +03:00
ptrauth-tiny-model-pic.ll
[PAC][CodeGen][ELF][AArch64] Support signed GOT with tiny code model (#114525)
2024-12-10 14:43:12 +03:00
ptrauth-tiny-model-static.ll
[PAC][CodeGen][ELF][AArch64] Support signed GOT with tiny code model (#114525)
2024-12-10 14:43:12 +03:00
ptrauth-tls-darwin.ll
…
ptrauth-type-info-vptr-discr.ll
CodeGen: Optionally emit PAuth relocations as IRELATIVE relocations.
2025-11-26 12:29:30 -08:00
pull-binop-through-shift.ll
…
pull-conditional-binop-through-shift.ll
…
pull-negations-after-concat-of-truncates.ll
…
qmovn.ll
[GlobalISel] Support saturated truncate (#150219)
2025-08-21 15:37:53 +01:00
qshrn.ll
[AArch64] Add some basic patterns for qshrn.
2024-10-21 15:04:20 +01:00
ragreedy-csr.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
ragreedy-local-interval-cost.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
rand.ll
[AArch64] Copy CSNEG, CSINV, and CSINC computeKnownBitsForTargetNode from ARM (#155122)
2025-08-28 08:43:54 +01:00
rax1.ll
[AArch64][GlobalISel] Add rax1.ll test converage. NFC
2025-10-20 12:53:30 +01:00
rbit.ll
…
rcpc3-sve.ll
…
rcpc3.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
read-pc.ll
…
readcyclecounter.ll
…
reassocmls.ll
[AArch64][GlobalISel] Add extra GISel test coverage. NFC
2025-07-30 10:53:47 +01:00
recp-fastmath.ll
[AArch64][test] Remove unsafe-fp-math uses (NFC) (#164606)
2025-10-22 12:14:21 +00:00
reduce-and.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
reduce-or-opt.ll
[PHIElimination] Revert #131837 #146320 #146337 (#146850)
2025-07-03 07:48:08 -04:00
reduce-or.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
reduce-shuffle.ll
[AArch64] recognise zip1/zip2 with flipped operands (#167235)
2025-11-27 17:11:56 +00:00
reduce-xor.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
redundant-copy-elim-empty-mbb.ll
…
redundant-mov-from-zero-extend.ll
…
redundant-orrwrs-from-zero-extend.mir
…
Redundantstore.ll
…
reg-scavenge-frame.mir
…
regalloc-hint-movprfx.mir
[AArch64] Add 'REQUIRES: asserts' to regalloc-hint-movprfx.mir
2025-11-12 12:17:29 +00:00
regalloc-last-chance-recolor-with-split.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
regalloc-spill-weight-basic.ll
[regalloc][basic] Change spill weight for optsize funcs (#112960)
2024-10-21 11:10:50 -07:00
regcoal-physreg.mir
…
register-coalesce-update-subranges-remat.mir
Revert "Reland "RegisterCoalescer: Add implicit-def of super register when coalescing SUBREG_TO_REG""
2025-11-25 11:01:27 +00:00
regress-bitcast-formals.ll
…
regress-combine-extract-vectors.ll
…
regress-f128csel-flags.ll
…
regress-fp128-livein.ll
…
regress-tail-livereg.ll
…
regress-tblgen-chains.ll
…
regress-w29-reserved-with-fp.ll
[win][aarch64] Always reserve frame pointers for Arm64 Windows, take 2 (#147354)
2025-07-08 12:18:13 -07:00
relaxed-fp-atomics.ll
…
reloc-specifiers.mir
…
rem_crash.ll
…
rem-by-const.ll
[AArch64] Add patterns for add(x, trunc(shift)) (#168927)
2025-11-25 06:57:09 +00:00
rem.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
remat-const-float-simd.ll
[AArch64] Regenerate and update a number of check lines. NFC
2025-09-18 09:54:47 +01:00
remat-float0.ll
…
remat-fmov-vector-imm.mir
[AArch64] Mark FMOVvXfY_ns as rematerializable, cheap (#169186)
2025-11-25 18:29:36 +02:00
remat.ll
…
replace-load-with-shrink-store-indexed-crash.ll
…
replace-with-veclib-armpl.ll
[IR] Add new function attribute nocreateundeforpoison (#164809)
2025-11-04 12:00:44 +00:00
replace-with-veclib-libmvec-scalable.ll
[AArch64][VecLib] Add libmvec support for AArch64 targets (#143696)
2025-06-17 11:07:43 +01:00
replace-with-veclib-libmvec.ll
[AArch64][VecLib] Add libmvec support for AArch64 targets (#143696)
2025-06-17 11:07:43 +01:00
replace-with-veclib-sleef-scalable.ll
[LLVM][IR] Use splat syntax when printing ConstantExpr based splats. (#116856)
2024-11-21 11:21:12 +00:00
replace-with-veclib-sleef.ll
[aarch64] atan2 intrinsic lowering (p5) (#112611)
2024-10-24 17:53:12 -07:00
reserveXreg-for-regalloc.ll
[RegAlloc] Remove default restriction on non-trivial rematerialization (#159211)
2025-10-04 22:50:44 +00:00
reserveXreg.ll
[AArch64] Disable machine-verifier for failing test, fix perf regression (#140005)
2025-05-15 11:20:47 -07:00
returnaddr.ll
…
rm_redundant_cmp.ll
…
rmif-def-nzcv.mir
…
rmif-use-nzcv.mir
…
rotate-extract.ll
…
rotate.ll
…
round-conv.ll
…
round-fptosi-sat-scalar.ll
[AArch64] Improve bf16 fp_extend lowering. (#118966)
2025-01-07 11:43:14 +00:00
round-fptoui-sat-scalar.ll
…
rqshrn.ll
[AArch64] Add patterns for combining qxtn+rshr to qrshrn
2024-10-21 21:06:48 +01:00
rvmarker-pseudo-expansion-and-outlining.mir
[AArch64] Allow the clang.arc.attachedcall marker to be optional (#138694)
2025-05-08 16:49:31 +01:00
sadd_sat_plus.ll
[AArch64][GlobalISel] Update and cleanup a number of gisel tests. NFC
2024-11-23 18:58:55 +00:00
sadd_sat_vec.ll
[AArch64] Optimize extending loads of small vectors (#163064)
2025-11-17 21:39:10 +02:00
sadd_sat.ll
[AArch64] Extend test coverage for v1i64 add/sub.sat. NFC
2025-06-02 08:33:27 +01:00
sat-add.ll
[AArch64] Support commuted operands in performFlagSettingCombine (#162496)
2025-10-13 13:09:28 +01:00
saturating-vec-smull.ll
[AArch64][Codegen]Transform saturating smull to sqdmulh (#143671)
2025-07-16 09:50:04 +01:00
sbc.ll
[AArch64] Combine subtract with borrow to SBC. (#165271)
2025-11-10 10:26:05 +00:00
scalable_masked_deinterleaved_loads.ll
[AArch64] Improve lowering for scalable masked deinterleaving loads (#154338)
2025-09-03 09:51:54 +01:00
scalable_masked_interleaved_stores.ll
[AArch64] Improve lowering for scalable masked interleaving stores (#156718)
2025-09-08 10:34:53 +01:00
scalable-vector-promotion.ll
…
scalar-mla-mls.ll
…
scalarize-vector-load.ll
[AArch64] Scalarize extracted vector loads. (#159714)
2025-09-23 07:18:46 +00:00
scavenge-large-call.ll
[AArch64] Skip storing of stack arguments when lowering tail calls (#126735)
2025-06-06 11:26:24 +03:00
sched-loop-align.ll
…
sched-movprfx.ll
…
sched-past-vector-ldst.ll
[AArch64] Remove UnsafeFPMath (#150876)
2025-07-29 12:41:09 +08:00
sched-postidxalias.mir
Reland "CodeGen][NewPM] Port MachineScheduler to NPM. (#125703)" (#126684)
2025-02-12 18:54:39 +05:30
sched-print-cycle.mir
Reland "CodeGen][NewPM] Port MachineScheduler to NPM. (#125703)" (#126684)
2025-02-12 18:54:39 +05:30
scheduledag-constreg.mir
Reland "CodeGen][NewPM] Port MachineScheduler to NPM. (#125703)" (#126684)
2025-02-12 18:54:39 +05:30
scmp.ll
[GlobalISel] Add G_CONCAT_VECTOR handling in computeNumSignBits (#142355)
2025-06-04 11:11:18 +01:00
sdag-no-typesize-warnings-regandsizes.ll
…
sdag-store-merging-bug.ll
…
sdivpow2.ll
[AArch64] Support MI and PL (#150314)
2025-08-11 07:41:38 +01:00
seh_funclet_x1.ll
…
seh-extended-spills.ll
AArch64: align pair-wise spills on WoS to 16-byte (#166902)
2025-11-11 13:37:21 -08:00
seh-finally.ll
Introduce MCAsmInfo::UsesSetToEquateSymbol and prefer = to .set
2025-06-11 22:19:31 -07:00
seh-minimal-prologue-epilogue.ll
Aarch64: Emit a minimal SEH prologue when needed (#158173)
2025-09-30 08:16:54 -07:00
select_cc.ll
[AArch64][GlobalISel] Use TargetConstant for shift immediates (#161527)
2025-10-03 20:16:08 +01:00
select_const.ll
[GlobaISel] Allow expanding of sdiv -> mul by constant (#146504)
2025-07-14 15:01:12 +01:00
select_fmf.ll
[AArch64][GlobalISel] Add some gisel test coverage for existing select tests. NFC
2025-02-21 09:15:41 +00:00
select-constant-xor.ll
[AArch64] Support MI and PL (#150314)
2025-08-11 07:41:38 +01:00
select-to-and-zext.ll
[AArch64][GlobalISel] Add some gisel test coverage for existing select tests. NFC
2025-02-21 09:15:41 +00:00
select-with-and-or.ll
[AArch64][GlobalISel] Add some gisel test coverage for existing select tests. NFC
2025-02-21 09:15:41 +00:00
selectcc-to-shiftand.ll
[AArch64][GlobalISel] Use TargetConstant for shift immediates (#161527)
2025-10-03 20:16:08 +01:00
selectiondag-order.ll
[Verifier][CGP] Allow integer argument to dbg_declare (#134803)
2025-04-10 12:29:56 +02:00
selectopt-cast.ll
[SelectOpt] Support BinOps with SExt operands. (#115879)
2024-12-17 11:52:15 +00:00
selectopt-const.ll
[AArch64] Keep floating-point conversion in SIMD (#147707)
2025-07-30 14:53:56 +03:00
selectopt-logical.ll
…
selectopt-not.ll
…
selectopt.ll
[SelectOpt] Optimise big select groups in the latch of a non-inner loop to branches (#119728)
2024-12-25 12:58:21 +00:00
semantic-interposition-asm.ll
…
semantic-interposition-memtag.ll
[MTE] Do not allow local aliases to MTE globals (#106280)
2024-10-21 17:00:41 -07:00
seqpaircopy.mir
[CodeGen][NPM] Port ExpandPostRAPseudos to NPM (#129509)
2025-03-04 11:49:09 +05:30
seqpairspill.mir
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
setcc_knownbits.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
setcc-fsh.ll
[SelectionDAG] Fix incorrect fold condition in foldSetCCWithFunnelShift. (#137637)
2025-05-12 13:25:07 +08:00
setcc-takes-i32.ll
…
setcc-type-mismatch.ll
[AArch64] Generalize integer FPR lane stores for all types (#134117)
2025-04-17 09:25:57 +01:00
setf8-def-nzcv.mir
…
setf8-use-nzcv.mir
…
setf16-def-nzcv.mir
…
setf16-use-nzcv.mir
…
setjmp-bti-no-enforcement.ll
…
setjmp-bti-outliner.ll
…
setjmp-bti.ll
…
settag-merge-nonaligned-fp.ll
…
settag-merge-order.ll
…
settag-merge.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
settag-merge.mir
…
settag.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
sext.ll
[AArch64][GlobalISel] Ensure we have a insert-subreg v4i32 GPR pattern (#142724)
2025-06-06 17:44:33 +01:00
shadow-call-stack.ll
…
shift_minsize.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
shift-accumulate.ll
…
shift-amount-mod.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
shift-by-signext.ll
PeepholeOpt: Fix looking for def of current copy to coalesce (#125533)
2025-02-05 23:29:02 +07:00
shift-const-ne-0.ll
[AArch64] Fix Fold of Compare with Right-shifted Value (#127209)
2025-02-17 17:44:08 +00:00
shift-logic.ll
…
shift-mod.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
shift.ll
[AArch64][GlobalISel] Don't crash when legalising vector G_SHL (#168848)
2025-12-02 07:57:47 +00:00
shiftregister-from-and.ll
…
shl-to-add.ll
…
shr-exact-demanded-bits.ll
…
shrink-constant-multiple-users.ll
…
shrink-wrap-byval-inalloca-preallocated.ll
…
shrink-wrap-const-pool-access.mir
[ShrinkWrap] Consider constant pool access as non-stack access (#164393)
2025-10-22 04:05:57 -07:00
shrink-wrap.ll
[llvm] Remove br i1 undef in some llvm/test/CodeGen tests (#127368)
2025-02-16 18:44:46 +00:00
shrink-wrapping-vla.ll
…
shrinkwrap-split-restore-point.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
shuffle-extend.ll
[AArch64] Prefer using DUP instead of INS where possible (#138549)
2025-05-15 10:31:09 +02:00
shuffle-mask-legal.ll
…
shuffle-select.ll
[AArch64] Generate BSP instead of TBL for select shuffles. (#121474)
2025-01-13 20:40:16 +00:00
shuffle-tbl34.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
shuffles.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
shufflevector.ll
Revert "[DAGCombiner] Relax condition for extract_vector_elt combine" (#157953)
2025-09-10 21:33:44 +00:00
sibling-call.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
sign-return-address-cfi-negate-ra-state.ll
[AArch64][PAC] Protect the entire function if pac-ret+leaf is requested (#140895)
2025-07-09 18:40:45 +03:00
sign-return-address-pauth-lr.ll
[AArch64] Regenerate and update a number of check lines. NFC
2025-09-18 09:54:47 +01:00
sign-return-address-tailcall.ll
[AArch64][PAC] Protect the entire function if pac-ret+leaf is requested (#140895)
2025-07-09 18:40:45 +03:00
sign-return-address.ll
[AArch64] Fix the emission of WinCFI for pac-ret+leaf and SCS (#147518)
2025-07-12 13:45:48 +03:00
signbit-shift.ll
[AArch64] Support MI and PL (#150314)
2025-08-11 07:41:38 +01:00
signbit-test.ll
[AArch64][GlobalISel] Add some GISel test coverage for icmp-and tests. NFC
2025-10-30 09:00:36 +00:00
signed-truncation-check.ll
[AArch64][GlobalISel] Add some GISel test coverage for icmp-and tests. NFC
2025-10-30 09:00:36 +00:00
simple-macho.ll
…
sincos-expansion.ll
…
sincos-stack-slots.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
sink-addsub-of-const.ll
…
sink-and-fold-clear-kill-flags.mir
…
sink-and-fold-drop-dbg.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
sink-and-fold-illegal-shift.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
sink-and-fold-preserve-debugloc.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
sink-and-fold.ll
[PHIElimination] Revert #131837 #146320 #146337 (#146850)
2025-07-03 07:48:08 -04:00
sink-copy-for-shrink-wrap.ll
…
sink-mul-exts.ll
[AArch64] Improve operand sinking for mul instructions (#116604)
2024-12-06 12:45:18 +00:00
sinksplat.ll
[LLVM][CodeGen][SVE] Prefer NEON instructions when zeroing Z registers. (#133929)
2025-04-03 13:15:05 +01:00
sitofp-to-tbl.ll
[AArch64] Optimize extending loads of small vectors (#163064)
2025-11-17 21:39:10 +02:00
sls-crash.ll
…
sls-stackprotector-outliner.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
sme2-fp8-intrinsics-cvt.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
sme2-fp8-intrinsics-fmopa.ll
[AArch64] Implement intrinsics for SME FP8 FMOPA (#118115)
2024-12-09 11:13:08 +00:00
sme2-fp8-intrinsics-mla.ll
[AArch64] Implement intrinsics for FP8 SME FMLAL/FMLALL (multi) (#119546)
2024-12-17 11:47:20 +00:00
sme2-intrinsics-add-sub-za16.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
sme2-intrinsics-add.ll
[AArch64][SME] Extend FORM_TRANSPOSED pseudos to all multi-vector intrinsics (#124258)
2025-02-04 16:28:06 +00:00
sme2-intrinsics-cvt.ll
…
sme2-intrinsics-cvtl.ll
…
sme2-intrinsics-cvtn.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
sme2-intrinsics-extract-mova.ll
[AArch64] Model ZA array using inaccessible memory (#132058)
2025-04-14 14:55:06 +01:00
sme2-intrinsics-faminmax.ll
[AArch64][SVE] Lower unpredicated loads/stores as LDR/STR. (#127837)
2025-02-26 13:56:35 +00:00
sme2-intrinsics-fclamp.ll
[NFC][LLVM][SME] Seperate streaming mode only intrinsic tests.
2025-06-24 14:18:49 +00:00
sme2-intrinsics-fmlas16.ll
…
sme2-intrinsics-fmlas.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
sme2-intrinsics-fp8-fdot.ll
[AArch64] Add intrinsics for SME FP8 FDOT single and multi instructions (#119845)
2024-12-16 13:14:40 +00:00
sme2-intrinsics-fp8-fvdot.ll
[AArch64] Add intrinsics for SME FP8 FVDOT, FVDOTB and FVDOTT intrinsics (#119922)
2024-12-16 14:42:45 +00:00
sme2-intrinsics-fp-dots.ll
[AArch64][SVE] Lower unpredicated loads/stores as LDR/STR. (#127837)
2025-02-26 13:56:35 +00:00
sme2-intrinsics-frint.ll
…
sme2-intrinsics-fscale.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
sme2-intrinsics-insert-mova.ll
[AArch64][SME] Extend FORM_TRANSPOSED pseudos to all multi-vector intrinsics (#124258)
2025-02-04 16:28:06 +00:00
sme2-intrinsics-int-dots.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
sme2-intrinsics-ld1.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
sme2-intrinsics-ldnt1.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
sme2-intrinsics-luti2-lane-x2.ll
…
sme2-intrinsics-luti2-lane-x4.ll
…
sme2-intrinsics-luti2-lane.ll
…
sme2-intrinsics-luti4-lane-x2.ll
…
sme2-intrinsics-luti4-lane-x4.ll
[AArch64][SME] Preserve Chain when selecting multi-vector LUT4Is (#161494)
2025-10-02 09:27:48 +01:00
sme2-intrinsics-luti4-lane.ll
…
sme2-intrinsics-luti4.ll
[AArch64][SME] Preserve Chain when selecting multi-vector LUT4Is (#161494)
2025-10-02 09:27:48 +01:00
sme2-intrinsics-max.ll
[AArch64][SVE] Lower unpredicated loads/stores as LDR/STR. (#127837)
2025-02-26 13:56:35 +00:00
sme2-intrinsics-min.ll
[AArch64][SVE] Lower unpredicated loads/stores as LDR/STR. (#127837)
2025-02-26 13:56:35 +00:00
sme2-intrinsics-mlall.ll
[AArch64][SVE] Lower unpredicated loads/stores as LDR/STR. (#127837)
2025-02-26 13:56:35 +00:00
sme2-intrinsics-mlals.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
sme2-intrinsics-mop4-fp8.ll
[Clang][llvm] Implement fp8 FMOP4A intrinsics (#130127)
2025-04-23 14:10:13 +01:00
sme2-intrinsics-mop4a_1x1.ll
[Clang][LLVM] Implement single-single vectors MOP4{A/S} (#127797)
2025-04-01 13:35:09 +01:00
sme2-intrinsics-mop4a_1x2.ll
[Clang][LLVM] Implement single-multi vectors MOP4{A/S} (#128854)
2025-04-01 15:05:30 +01:00
sme2-intrinsics-mop4a_2x1.ll
[Clang][LLVM] Implement multi-single vectors MOP4{A/S} (#129226)
2025-04-01 17:04:59 +01:00
sme2-intrinsics-mop4a_2x2.ll
[Clang][LLVM] Implement multi-multi vectors MOP4{A/S} (#129230)
2025-04-01 19:20:27 +01:00
sme2-intrinsics-mop.ll
…
sme2-intrinsics-mopa.ll
…
sme2-intrinsics-qcvt.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
sme2-intrinsics-qcvtn.ll
[NFC][LLVM][SME] Seperate streaming mode only intrinsic tests.
2025-06-24 14:18:49 +00:00
sme2-intrinsics-qrshr.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
sme2-intrinsics-rshl.ll
[AArch64][SVE] Lower unpredicated loads/stores as LDR/STR. (#127837)
2025-02-26 13:56:35 +00:00
sme2-intrinsics-sclamp.ll
[NFC][LLVM][SME] Seperate streaming mode only intrinsic tests.
2025-06-24 14:18:49 +00:00
sme2-intrinsics-select-sme-tileslice.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
sme2-intrinsics-sqdmulh.ll
[AArch64][SVE] Lower unpredicated loads/stores as LDR/STR. (#127837)
2025-02-26 13:56:35 +00:00
sme2-intrinsics-sub.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
sme2-intrinsics-tmop.ll
[AArch64][clang][llvm] Add structured sparsity outer product (TMOP) intrinsics (#135145)
2025-04-16 10:59:07 +01:00
sme2-intrinsics-uclamp.ll
[NFC][LLVM][SME] Seperate streaming mode only intrinsic tests.
2025-06-24 14:18:49 +00:00
sme2-intrinsics-vdot.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
sme2-intrinsics-write-zt.ll
[Clang][LLVM][AArch64] Add intrinsic for MOVT SME2 instruction (#97602)
2024-10-01 10:11:32 +01:00
sme2-intrinsics-zero-zt.ll
…
sme2-intrinsics-zt0.ll
…
sme2-multivec-regalloc.mir
[AArch64][SVE] Tweak how SVE CFI expressions are emitted (#151677)
2025-08-06 09:21:57 +01:00
sme2p1-intrinsics-movaz.ll
…
sme2p1-intrinsics-zero.ll
…
sme-aarch64-svcount-O3.ll
…
sme-aarch64-svcount.ll
[AArch64][SVE] Allow basic use of target("aarch64.svcount") with +sve (#167875)
2025-11-13 16:33:18 +00:00
sme-abi-eh-liveins.mir
[LiveRegUnits] Exclude runtime defined liveins when computing liveouts (#154325)
2025-08-21 09:06:32 +01:00
sme-agnostic-za.ll
[AArch64][SME] Avoid clobbering X0 in the MachineSMEABIPass (#170131)
2025-12-02 09:16:30 +00:00
sme-avoid-coalescing-locally-streaming.ll
[AArch64] Regenerate and update a number of check lines. NFC
2025-09-18 09:54:47 +01:00
sme-call-streaming-compatible-to-normal-fn-wihout-sme-attr.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
sme-callee-save-restore-pairs.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
sme-darwin-no-sve-vg.ll
…
sme-darwin-sve-vg.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
sme-disable-gisel-fisel.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
sme-disable-rematerialize-with-streaming-mode-changes.ll
[LLVM] Port SVE tests in llvm/test/CodeGen/AArch64 to use splat()
2024-10-03 14:35:32 +00:00
sme-dynamic-tls.ll
[AArch64][SME] Avoid clobbering X0 in the MachineSMEABIPass (#170131)
2025-12-02 09:16:30 +00:00
sme-framelower-use-bp.ll
[AArch64][SVE] Fold ADD+CNTB to INCB/DECB (#118280)
2025-04-17 08:41:17 +01:00
sme-intrinsics-add.ll
…
sme-intrinsics-loads.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
sme-intrinsics-mopa.ll
…
sme-intrinsics-mops.ll
…
sme-intrinsics-mova-extract.ll
[AArch64] Model ZA array using inaccessible memory (#132058)
2025-04-14 14:55:06 +01:00
sme-intrinsics-mova-insert.ll
[ISel] Propagate disjoint flag in ShrinkDemandedOp (#114560)
2024-11-03 19:42:04 +00:00
sme-intrinsics-rdsvl.ll
[AArch64] Optimized rdsvl followed by constant mul (#162853)
2025-10-24 11:17:49 +01:00
sme-intrinsics-state.ll
[clang][llvm][aarch64] Add aarch64_sme_in_streaming_mode intrinsic (#120265)
2025-01-07 09:02:26 +00:00
sme-intrinsics-stores.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
sme-intrinsics-zero.ll
…
sme-lazy-save-call-remarks.ll
…
sme-lazy-save-call.ll
[AArch64][SME] Avoid clobbering X0 in the MachineSMEABIPass (#170131)
2025-12-02 09:16:30 +00:00
sme-lazy-save-windows.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
sme-lazy-sve-nzcv-live.mir
[AArch64][SME] Fixup ABI routine insertion points to avoid clobbering NZCV (#161353)
2025-10-15 10:57:02 +01:00
sme-machine-licm-vg.mir
[NewPM][CodeGen] Port MachineLICM to NPM (#107376)
2024-09-20 11:34:18 +05:30
sme-must-save-lr-for-vg.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
sme-new-za-function.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
sme-new-zt0-function.ll
[AArch64][SME] Allow spills of ZT0 around SME ABI routines again (#136726)
2025-04-25 13:33:09 +01:00
sme-peephole-opts.ll
[AArch64][SME] Support saving/restoring ZT0 in the MachineSMEABIPass (#166362)
2025-12-01 09:55:49 +00:00
sme-pstate-sm-changing-call-disable-coalescing.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
sme-read-write-tpidr2.ll
…
sme-shared-za-interface.ll
[AArch64][SME] Simplify initialization of the TPIDR2 block (#141049)
2025-08-27 09:12:49 +01:00
sme-streaming-body-streaming-compatible-interface.ll
[AArch64][SME] Use mrs %reg, SVCR rather than ABI routine with +sme (#156878)
2025-09-05 10:19:05 +01:00
sme-streaming-body.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
sme-streaming-checkvl-mir.ll
[AArch64][SME] Introduce CHECK_MATCHING_VL pseudo for streaming transitions (#157510)
2025-09-17 09:39:30 +01:00
sme-streaming-checkvl.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
sme-streaming-compatible-interface.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
sme-streaming-interface-remarks.ll
[AArch64][SME] Improve codegen for aarch64.sme.cnts* when not in streaming mode (#154761)
2025-09-12 10:23:57 +01:00
sme-streaming-interface.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
sme-streaming-mode-changes-unwindinfo.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
sme-streaming-mode-changing-call-disable-stackslot-scavenging.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
sme-streaming-mode-landingpads.ll
[AArch64][SME] Resume streaming-mode on entry to exception handlers (#156638)
2025-09-04 12:55:12 +01:00
sme-support-routines-calling-convention.ll
AArch64: Fix undefined behavior in sme calling convention test (#165183)
2025-10-27 02:08:42 +00:00
sme-tileslice-addrmodes.ll
[AArch64] Match constants in SelectSMETileSlice (#151494)
2025-08-11 10:19:26 +01:00
sme-toggle-pstateza.ll
[AArch64] Add SME peephole optimizer pass (#104612)
2024-08-21 09:44:01 +01:00
sme-vg-to-stack.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
sme-write-fpmr.ll
[AArch64] Fix FPMR handling when switching streaming mode (#135827)
2025-04-16 11:41:07 +01:00
sme-write-vg.ll
…
sme-za-control-flow.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
sme-za-exceptions.ll
[AArch64][SME] Support saving/restoring ZT0 in the MachineSMEABIPass (#166362)
2025-12-01 09:55:49 +00:00
sme-za-function-with-many-blocks.ll
[AArch64][SME] Propagate desired ZA states in the MachineSMEABIPass (#149510)
2025-10-28 09:41:57 +00:00
sme-za-lazy-save-buffer.ll
[AArch64][SME] Propagate desired ZA states in the MachineSMEABIPass (#149510)
2025-10-28 09:41:57 +00:00
sme-zt0-state.ll
[AArch64][SME] Support saving/restoring ZT0 in the MachineSMEABIPass (#166362)
2025-12-01 09:55:49 +00:00
sms-acceptable-loop1.mir
…
sms-acceptable-loop2.mir
…
sms-acceptable-loop3.mir
…
sms-acceptable-loop4.mir
…
sms-instruction-scheduled-at-correct-cycle.mir
…
sms-loop-carried-fp-exceptions1.mir
[MachinePipeliner] Introduce a new class for loop-carried deps (#137663)
2025-06-05 21:30:27 +09:00
sms-loop-carried-fp-exceptions2.mir
[MachinePipeliner] Introduce a new class for loop-carried deps (#137663)
2025-06-05 21:30:27 +09:00
sms-mve1.mir
…
sms-mve2.mir
…
sms-mve3.mir
…
sms-mve4.mir
…
sms-mve5.mir
…
sms-mve6.mir
…
sms-mve7.mir
…
sms-mve8.mir
…
sms-mve9.mir
…
sms-mve10.mir
…
sms-mve11.mir
…
sms-mve12.mir
…
sms-order-physreg-deps.mir
Reapply [IR] Remove options to make scalable TypeSize access a warning (#156336)
2025-09-03 11:12:11 +02:00
sms-regpress.mir
…
sms-unacceptable-loop1.mir
…
sms-unacceptable-loop2.mir
…
sms-unacceptable-loop3.mir
…
sms-unpipeline-insts1.mir
…
sms-unpipeline-insts2.mir
…
sms-unpipeline-insts3.mir
[MachinePipeliner] Fix incorrect handlings of unpipelineable insts (#126057)
2025-03-21 23:07:41 +09:00
smul_fix_sat.ll
[AArch64] Support MI and PL (#150314)
2025-08-11 07:41:38 +01:00
smul_fix.ll
[AArch64][SDAG] Detect non-zeroes in truncating buildvectors in fshl lowering (#123597)
2025-02-03 10:47:45 +00:00
soft-float-abi.ll
…
space.ll
…
special-reg.ll
…
speculation-hardening-dagisel.ll
…
speculation-hardening-loads.ll
[AArch64] speculation-hardening-loads.ll - regenerate test checks
2025-07-07 18:31:12 +01:00
speculation-hardening-sls-blr-bti.mir
…
speculation-hardening-sls-blr.mir
…
speculation-hardening-sls-blra.mir
…
speculation-hardening-sls.ll
…
speculation-hardening-sls.mir
…
speculation-hardening.ll
…
speculation-hardening.mir
…
spill-fold.ll
…
spill-fold.mir
[LLVM][AArch64InstrInfo] Prevent fill folding when DstReg is SP. (#148885)
2025-07-16 13:19:55 +01:00
spill-reload-remarks.ll
[AArch64][SME] Introduce CHECK_MATCHING_VL pseudo for streaming transitions (#157510)
2025-09-17 09:39:30 +01:00
spill-stack-realignment.mir
…
spill-undef.mir
…
spillfill-sve.ll
[AArch64][SVE] Lower unpredicated loads/stores as LDR/STR. (#127837)
2025-02-26 13:56:35 +00:00
spillfill-sve.mir
[Codegen] Add a separate stack ID for scalable predicates (#142390)
2025-10-02 14:43:07 +01:00
split-deadloop.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
split-sve-stack-frame-layout.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
split-vector-insert.ll
[AArch64][SVE] Tweak how SVE CFI expressions are emitted (#151677)
2025-08-06 09:21:57 +01:00
sponentry.ll
…
sqrt-fastmath.ll
[AArch64] Remove UnsafeFPMath (#150876)
2025-07-29 12:41:09 +08:00
srem-lkk.ll
[AArch64] Add patterns for add(x, trunc(shift)) (#168927)
2025-11-25 06:57:09 +00:00
srem-pow2.ll
[AArch64] Support MI and PL (#150314)
2025-08-11 07:41:38 +01:00
srem-seteq-illegal-types.ll
[DAG] visitAND - Fold (and (srl X, C), 1) -> (srl X, BW-1) for signbit extraction (#114992)
2024-11-05 14:42:15 +00:00
srem-seteq-optsize.ll
…
srem-seteq-vec-nonsplat.ll
…
srem-seteq-vec-splat.ll
…
srem-seteq.ll
[AArch64] Adjust comparison constant if adjusting it means less instructions (#151024)
2025-08-18 14:56:45 +01:00
srem-vec-crash.ll
…
srem-vector-lkk.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
sshl_sat.ll
[AArch64] Support MI and PL (#150314)
2025-08-11 07:41:38 +01:00
ssub_sat_plus.ll
[AArch64][GlobalISel] Update and cleanup a number of gisel tests. NFC
2024-11-23 18:58:55 +00:00
ssub_sat_vec.ll
[AArch64] Optimize extending loads of small vectors (#163064)
2025-11-17 21:39:10 +02:00
ssub_sat.ll
[AArch64] Extend test coverage for v1i64 add/sub.sat. NFC
2025-06-02 08:33:27 +01:00
ssve-stack-hazard-remarks.ll
[AArch64][SME] Remove support for -arch64-enable-zpr-predicate-spills (#161819)
2025-10-06 10:08:10 +01:00
stack_guard_remat.ll
[AArch64][test] Remove unsafe-fp-math uses (NFC) (#164606)
2025-10-22 12:14:21 +00:00
stack-guard-reassign-sve.mir
…
stack-guard-reassign.ll
…
stack-guard-reassign.mir
…
stack-guard-remat-bitcast.ll
…
stack-guard-sve.ll
[AArch64][SVE] Lower unpredicated loads/stores as LDR/STR. (#127837)
2025-02-26 13:56:35 +00:00
stack-guard-sysreg.ll
…
stack-guard-vaarg.ll
…
stack-hazard-defaults.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
stack-hazard-windows.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
stack-hazard.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
stack-id-pei-alloc.mir
…
stack-id-stackslot-scavenging.mir
…
stack-probing-64k.ll
…
stack-probing-dynamic-no-frame-setup.ll
…
stack-probing-dynamic.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
stack-probing-last-in-block.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
stack-probing-no-scratch-reg.mir
…
stack-probing-shrink-wrap.mir
…
stack-probing-sve.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
stack-probing.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
stack-protector-darwin-got.ll
…
stack-protector-musttail.ll
…
stack-protector-target.ll
…
stack-protector-trap-unreachable.ll
[CodeGen] Generalize trap emission after SP check fail (#109744)
2024-10-12 20:01:22 -04:00
stack-size-section.ll
[AsmPrinter] Link .section_sizes to the correct section (#135583)
2025-04-14 20:04:50 +03:00
stack-tagging-cfi.ll
…
stack-tagging-dbg-assign-tag-offset.ll
[RemoveDIs] Remove "try-debuginfo-iterators..." test flags (#130298)
2025-03-14 15:50:49 +00:00
stack-tagging-dbg-declare-tag-offset.ll
[RemoveDIs] Remove "try-debuginfo-iterators..." test flags (#130298)
2025-03-14 15:50:49 +00:00
stack-tagging-dbg-value-tag-offset-nopad.ll
[MTE] Allow stack history for API level >=35 (#110328)
2024-10-01 13:11:24 -07:00
stack-tagging-dbg-value-tag-offset.ll
…
stack-tagging-dbg.ll
[RemoveDIs] Remove "try-debuginfo-iterators..." test flags (#130298)
2025-03-14 15:50:49 +00:00
stack-tagging-epilogue-fold.mir
[AArch64] Fix range check for STGPostIndex (#117146)
2024-12-09 09:25:31 +00:00
stack-tagging-ex-1.ll
[AArch64][test] Remove unsafe-fp-math uses (NFC) (#164606)
2025-10-22 12:14:21 +00:00
stack-tagging-ex-2.ll
[AArch64][test] Remove unsafe-fp-math uses (NFC) (#164606)
2025-10-22 12:14:21 +00:00
stack-tagging-initializer-merge.ll
[IR] Remove size argument from lifetime intrinsics (#150248)
2025-08-08 11:09:34 +02:00
stack-tagging-loop.ll
…
stack-tagging-merge-past-memcpy.mir
[IR] Remove size argument from lifetime intrinsics (#150248)
2025-08-08 11:09:34 +02:00
stack-tagging-musttail.ll
…
stack-tagging-prologue.ll
[clang][IR] Overload @llvm.thread.pointer to support non-AS0 targets (#132489)
2025-05-14 21:51:56 +01:00
stack-tagging-setjmp.ll
…
stack-tagging-split-lifetime.ll
…
stack-tagging-stack-coloring.ll
…
stack-tagging-unchecked-ld-st.ll
…
stack-tagging-untag-placement.ll
[AArch64][test] Remove unsafe-fp-math uses (NFC) (#164606)
2025-10-22 12:14:21 +00:00
stack-tagging.ll
[IR] Only allow lifetime.start/end on allocas (#149310)
2025-07-21 15:04:50 +02:00
stackguard-internal.ll
Introduce MCAsmInfo::UsesSetToEquateSymbol and prefer = to .set
2025-06-11 22:19:31 -07:00
stackmap-args.ll
[CodeGen] @llvm.experimental.stackmap make operands immediate (#117932)
2024-12-11 17:41:19 +08:00
stackmap-dynamic-alloca.ll
…
stackmap-frame-setup.ll
…
stackmap-liveness.ll
…
stackmap.ll
[SelectionDAG] Use GetPromotedInteger when promoting integer operands of PATCHPOINT/STACKMAP. (#165926)
2025-10-31 22:11:13 +00:00
stacksmash-arm64ec.ll
RuntimeLibcalls: Add entries for __security_check_cookie (#151843)
2025-08-06 10:26:36 +09:00
statepoint-call-lowering-lr.ll
…
statepoint-call-lowering-sp.ll
…
statepoint-call-lowering.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
statepoint-twoaddr.mir
CodeGen: Remove redundant REQUIRES registered-target from tests (#111982)
2024-10-11 16:16:12 +04:00
stgp.ll
…
store_merge_pair_offset.ll
…
store-float-conversion.ll
[AArch64] Keep floating-point conversion in SIMD (#147707)
2025-07-30 14:53:56 +03:00
store-swift-async-context-clobber-live-reg.ll
…
store.ll
[AArch64] Optimize extending loads of small vectors (#163064)
2025-11-17 21:39:10 +02:00
storepairsuppress_minsize.ll
…
storepairsuppress.ll
…
stp-opt-with-renaming-debug.mir
…
stp-opt-with-renaming-ld3.mir
…
stp-opt-with-renaming-reserved-regs.mir
…
stp-opt-with-renaming-undef-assert.mir
…
stp-opt-with-renaming.mir
[AArch64] Fix ldp rename through a bundle (#146415)
2025-07-01 15:44:59 +01:00
str-narrow-zero-merge.mir
[AArch64] Merge scaled and unscaled narrow zero stores (#136705)
2025-05-08 21:34:52 +03:00
streaming-compatible-memory-ops.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
streaming-func-no-sme.ll
[AArch64] Use -filetype=null in test (NFC) (#145662)
2025-06-25 11:26:34 +01:00
strict-fp-func.ll
…
strict-fp-int-promote.ll
…
strict-fp-opt.ll
[AArch64] Add global isel coverage for fp16 tests and strict-fp. NFC
2025-09-29 16:54:49 +01:00
strictfp_f16_abi_promote.ll
[CodeGen] Use __extendhfsf2 and __truncsfhf2 by default (#126880)
2025-02-19 10:16:57 +01:00
strictfp-inlineasm.ll
[DAG] Add strictfp implicit def reg after metadata. (#168282)
2025-11-17 10:57:21 +00:00
strpre-str-merge.mir
Reland "[AArch64] Define high bits of FPR and GPR registers (take 2) (#114827)"
2024-11-27 13:31:59 +00:00
strqro.ll
…
strqu.ll
…
sub1.ll
[GlobalISel] Clear nsw flags when converting sub to add. (#137288)
2025-04-26 11:00:53 +01:00
sub-of-bias.ll
…
sub-of-not.ll
…
sub-splat-sub.ll
[LLVM][AArch64] Reduce uses of "undef" in SVE CodeGen tests.
2025-02-26 11:11:03 +00:00
sub.ll
[AArch64] Optimize extending loads of small vectors (#163064)
2025-11-17 21:39:10 +02:00
subs-to-sub-opt.ll
…
sve2-bcax.ll
…
sve2-bf16-converts.ll
[AArch64] Adjust the scheduling info of SVE FCMP on Cortex-A510. (#153810)
2025-08-15 15:45:33 +01:00
sve2-bitwise-ternary.ll
…
sve2-bsl.ll
[AArch64] Use SVE2 bit-sel instructions for some binary patterns. (#147544)
2025-07-10 11:36:01 +01:00
sve2-eor3.ll
…
sve2-fcopysign.ll
[LLVM][SVE] Add isel for scalable vector bfloat copysign operations. (#130098)
2025-03-10 12:34:42 +00:00
sve2-fixed-length-fcopysign.ll
[LLVM][DAGCombine] Remove combiner-vector-fcopysign-extend-round. (#129878)
2025-03-05 15:31:34 +00:00
sve2-histcnt.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
sve2-int-addsub-long.ll
…
sve2-int-mul.ll
[LLVM] Port SVE tests in llvm/test/CodeGen/AArch64 to use splat()
2024-10-03 14:35:32 +00:00
sve2-int-mulh.ll
[LLVM] Port SVE tests in llvm/test/CodeGen/AArch64 to use splat()
2024-10-03 14:35:32 +00:00
sve2-intrinsics-binary-narrowing-add-sub.ll
[LLVM][AArch64] Relax SVE/SME codegen predicates. (#145322)
2025-07-02 11:39:33 +01:00
sve2-intrinsics-binary-narrowing-shr.ll
[LLVM][AArch64] Relax SVE/SME codegen predicates. (#145322)
2025-07-02 11:39:33 +01:00
sve2-intrinsics-bit-permutation.ll
[LLVM][AArch64] Relax SVE/SME codegen predicates for crypto and bitperm instructions. (#145696)
2025-06-26 13:01:07 +01:00
sve2-intrinsics-character-match.ll
…
sve2-intrinsics-combine-rshrnb.ll
[AArch64][SVE] Lower unpredicated loads/stores as LDR/STR. (#127837)
2025-02-26 13:56:35 +00:00
sve2-intrinsics-complex-dot.ll
[LLVM][AArch64] Relax SVE/SME codegen predicates. (#145322)
2025-07-02 11:39:33 +01:00
sve2-intrinsics-contiguous-conflict-detection.ll
[LLVM][AArch64] Relax SVE/SME codegen predicates. (#145322)
2025-07-02 11:39:33 +01:00
sve2-intrinsics-crypto.ll
[LLVM][AArch64] Relax SVE/SME codegen predicates for crypto and bitperm instructions. (#145696)
2025-06-26 13:01:07 +01:00
sve2-intrinsics-faminmax.ll
[LLVM][AArch64] Relax SVE/SME codegen predicates. (#145322)
2025-07-02 11:39:33 +01:00
sve2-intrinsics-fp-converts.ll
[LLVM][AArch64] Relax SVE/SME codegen predicates. (#145322)
2025-07-02 11:39:33 +01:00
sve2-intrinsics-fp-int-binary-logarithm-zeroing.ll
…
sve2-intrinsics-fp-int-binary-logarithm.ll
[LLVM][AArch64] Relax SVE/SME codegen predicates. (#145322)
2025-07-02 11:39:33 +01:00
sve2-intrinsics-fp-widening-mul-acc.ll
[LLVM][AArch64] Relax SVE/SME codegen predicates. (#145322)
2025-07-02 11:39:33 +01:00
sve2-intrinsics-int-arith-imm.ll
[LLVM] Port SVE tests in llvm/test/CodeGen/AArch64 to use splat()
2024-10-03 14:35:32 +00:00
sve2-intrinsics-int-mul-lane.ll
[LLVM][AArch64] Relax SVE/SME codegen predicates. (#145322)
2025-07-02 11:39:33 +01:00
sve2-intrinsics-luti.ll
[LLVM][AArch64] Relax SVE/SME codegen predicates. (#145322)
2025-07-02 11:39:33 +01:00
sve2-intrinsics-non-widening-pairwise-arith.ll
[LLVM][AArch64] Relax SVE/SME codegen predicates. (#145322)
2025-07-02 11:39:33 +01:00
sve2-intrinsics-nt-gather-loads-32bit-unscaled-offset.ll
…
sve2-intrinsics-nt-gather-loads-64bit-scaled-offset.ll
…
sve2-intrinsics-nt-gather-loads-64bit-unscaled-offset.ll
…
sve2-intrinsics-nt-gather-loads-vector-base-scalar-offset.ll
…
sve2-intrinsics-nt-scatter-stores-32bit-unscaled-offset.ll
…
sve2-intrinsics-nt-scatter-stores-64bit-scaled-offset.ll
…
sve2-intrinsics-nt-scatter-stores-64bit-unscaled-offset.ll
…
sve2-intrinsics-nt-scatter-stores-vector-base-scalar-offset.ll
…
sve2-intrinsics-perm-tb.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
sve2-intrinsics-polynomial-arithmetic-128.ll
[AArch64][Clang] Update predication of SVE2-AES/PMULL Pair Intrinsics and add Test Coverage (#153825)
2025-08-28 09:21:06 +01:00
sve2-intrinsics-polynomial-arithmetic.ll
[LLVM][AArch64] Relax SVE/SME codegen predicates. (#145322)
2025-07-02 11:39:33 +01:00
sve2-intrinsics-psel.ll
[LLVM][AArch64] Relax SVE/SME codegen predicates. (#145322)
2025-07-02 11:39:33 +01:00
sve2-intrinsics-rax1.ll
[LLVM][AArch64] Relax SVE/SME codegen predicates for crypto and bitperm instructions. (#145696)
2025-06-26 13:01:07 +01:00
sve2-intrinsics-reinterpret.ll
…
sve2-intrinsics-revd.ll
[LLVM][AArch64] Relax SVE/SME codegen predicates. (#145322)
2025-07-02 11:39:33 +01:00
sve2-intrinsics-sm4.ll
[SVE ACLE] Remove explicit sve2 requirement from crypto and b16b16 builtins. (#156456)
2025-09-04 12:46:56 +01:00
sve2-intrinsics-unary-narrowing.ll
[LLVM][AArch64] Relax SVE/SME codegen predicates. (#145322)
2025-07-02 11:39:33 +01:00
sve2-intrinsics-uniform-complex-arith.ll
[LLVM][AArch64] Relax SVE/SME codegen predicates. (#145322)
2025-07-02 11:39:33 +01:00
sve2-intrinsics-uniform-dsp-undef.ll
[AArch64] Regenerate and update a number of check lines. NFC
2025-09-18 09:54:47 +01:00
sve2-intrinsics-uniform-dsp-zeroing.ll
…
sve2-intrinsics-uniform-dsp.ll
…
sve2-intrinsics-vec-hist-count.ll
…
sve2-intrinsics-while-reversed.ll
[LLVM][AArch64] Relax SVE/SME codegen predicates. (#145322)
2025-07-02 11:39:33 +01:00
sve2-intrinsics-while.ll
[LLVM][AArch64] Relax SVE/SME codegen predicates. (#145322)
2025-07-02 11:39:33 +01:00
sve2-intrinsics-widening-complex-int-arith.ll
[LLVM][AArch64] Relax SVE/SME codegen predicates. (#145322)
2025-07-02 11:39:33 +01:00
sve2-intrinsics-widening-dsp.ll
[LLVM][AArch64] Relax SVE/SME codegen predicates. (#145322)
2025-07-02 11:39:33 +01:00
sve2-intrinsics-widening-pairwise-arith.ll
[LLVM][AArch64] Relax SVE/SME codegen predicates. (#145322)
2025-07-02 11:39:33 +01:00
sve2-min-max-clamp.ll
…
sve2-mla-indexed.ll
…
sve2-mla-unpredicated.ll
…
sve2-rsh.ll
[AArch64][SVE] Lower unpredicated loads/stores as LDR/STR. (#127837)
2025-02-26 13:56:35 +00:00
sve2-rsra.ll
…
sve2-sli-sri.ll
…
sve2-sra.ll
[LLVM] Port SVE tests in llvm/test/CodeGen/AArch64 to use splat()
2024-10-03 14:35:32 +00:00
sve2-unary-movprfx.ll
[LLVM][AArch64] Reduce uses of "undef" in SVE CodeGen tests.
2025-02-26 11:11:03 +00:00
sve2-vscale-sinking.ll
[IR] Replace alignment argument with attribute on masked intrinsics (#163802)
2025-10-20 08:50:09 +00:00
sve2-xar.ll
[AArch64][SVE] Avoid movprfx by reusing register for _UNDEF pseudos. (#166926)
2025-11-10 16:33:59 +00:00
sve2p1_copy_pnr.mir
…
sve2p1-dots-partial-reduction.ll
[IR] NFC: Remove 'experimental' from partial.reduce.add intrinsic (#158637)
2025-09-17 11:44:47 +01:00
sve2p1-fdot.ll
Add llvm.vector.partial.reduce.fadd intrinsic (#159776)
2025-11-07 15:36:54 +00:00
sve2p1-fixed-length-fdot.ll
[AArch64] Use SVE fdot for partial.reduce.fadd for NEON types. (#167856)
2025-11-13 10:50:29 +00:00
sve2p1-intrinsics-bfadd.ll
[LLVM][CodeGen][SVE] Prefer NEON instructions when zeroing Z registers. (#133929)
2025-04-03 13:15:05 +01:00
sve2p1-intrinsics-bfclamp.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
sve2p1-intrinsics-bfmax.ll
[LLVM][CodeGen][SVE] Prefer NEON instructions when zeroing Z registers. (#133929)
2025-04-03 13:15:05 +01:00
sve2p1-intrinsics-bfmaxnm.ll
[LLVM][CodeGen][SVE] Prefer NEON instructions when zeroing Z registers. (#133929)
2025-04-03 13:15:05 +01:00
sve2p1-intrinsics-bfmin.ll
[LLVM][CodeGen][SVE] Prefer NEON instructions when zeroing Z registers. (#133929)
2025-04-03 13:15:05 +01:00
sve2p1-intrinsics-bfminnm.ll
[LLVM][CodeGen][SVE] Prefer NEON instructions when zeroing Z registers. (#133929)
2025-04-03 13:15:05 +01:00
sve2p1-intrinsics-bfmla_lane.ll
…
sve2p1-intrinsics-bfmla.ll
[LLVM][CodeGen][SVE] Prefer NEON instructions when zeroing Z registers. (#133929)
2025-04-03 13:15:05 +01:00
sve2p1-intrinsics-bfmls_lane.ll
…
sve2p1-intrinsics-bfmls.ll
[LLVM][CodeGen][SVE] Prefer NEON instructions when zeroing Z registers. (#133929)
2025-04-03 13:15:05 +01:00
sve2p1-intrinsics-bfmlsl.ll
[LLVM][AArch64] Relax SVE/SME codegen predicates. (#145322)
2025-07-02 11:39:33 +01:00
sve2p1-intrinsics-bfmul_lane.ll
…
sve2p1-intrinsics-bfmul.ll
[LLVM][CodeGen][SVE] Prefer NEON instructions when zeroing Z registers. (#133929)
2025-04-03 13:15:05 +01:00
sve2p1-intrinsics-bfsub.ll
[LLVM][CodeGen][SVE] Prefer NEON instructions when zeroing Z registers. (#133929)
2025-04-03 13:15:05 +01:00
sve2p1-intrinsics-cntp.ll
[LLVM][AArch64] Relax SVE/SME codegen predicates. (#145322)
2025-07-02 11:39:33 +01:00
sve2p1-intrinsics-dots.ll
[LLVM][AArch64] Relax SVE/SME codegen predicates. (#145322)
2025-07-02 11:39:33 +01:00
sve2p1-intrinsics-dupq.ll
[LLVM][AArch64] Relax SVE/SME codegen predicates. (#145322)
2025-07-02 11:39:33 +01:00
sve2p1-intrinsics-extq.ll
[LLVM][AArch64] Relax SVE/SME codegen predicates. (#145322)
2025-07-02 11:39:33 +01:00
sve2p1-intrinsics-fclamp.ll
[LLVM][AArch64] Relax SVE/SME codegen predicates. (#145322)
2025-07-02 11:39:33 +01:00
sve2p1-intrinsics-fp-reduce.ll
[LLVM][AArch64] Relax SVE/SME codegen predicates. (#145322)
2025-07-02 11:39:33 +01:00
sve2p1-intrinsics-gather-loads-128bit-index.ll
…
sve2p1-intrinsics-gather-loads-128bit-unscaled-offset.ll
…
sve2p1-intrinsics-int-reduce.ll
[LLVM][AArch64] Relax SVE/SME codegen predicates. (#145322)
2025-07-02 11:39:33 +01:00
sve2p1-intrinsics-ld1-single.ll
[AArch64][SVE] Fold ADD+CNTB to INCB/DECB (#118280)
2025-04-17 08:41:17 +01:00
sve2p1-intrinsics-loads.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
sve2p1-intrinsics-multivec-loads.ll
[LLVM][AArch64] Relax SVE/SME codegen predicates. (#145322)
2025-07-02 11:39:33 +01:00
sve2p1-intrinsics-multivec-stores.ll
[LLVM][AArch64] Relax SVE/SME codegen predicates. (#145322)
2025-07-02 11:39:33 +01:00
sve2p1-intrinsics-pmov-to-pred.ll
[AArch64] Regenerate and update a number of check lines. NFC
2025-09-18 09:54:47 +01:00
sve2p1-intrinsics-pmov-to-vector.ll
[LLVM][AArch64] Relax SVE/SME codegen predicates. (#145322)
2025-07-02 11:39:33 +01:00
sve2p1-intrinsics-predicate-as-counter.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
sve2p1-intrinsics-qcvtn.ll
[LLVM][AArch64] Relax SVE/SME codegen predicates. (#145322)
2025-07-02 11:39:33 +01:00
sve2p1-intrinsics-qrshr.ll
[LLVM][AArch64] Relax SVE/SME codegen predicates. (#145322)
2025-07-02 11:39:33 +01:00
sve2p1-intrinsics-scatter-stores-128bit-index.ll
…
sve2p1-intrinsics-scatter-stores-128bit-unscaled-offset.ll
…
sve2p1-intrinsics-sclamp.ll
[LLVM][AArch64] Relax SVE/SME codegen predicates. (#145322)
2025-07-02 11:39:33 +01:00
sve2p1-intrinsics-selx2.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
sve2p1-intrinsics-selx4.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
sve2p1-intrinsics-st1-single.ll
[AArch64][SVE] Fold ADD+CNTB to INCB/DECB (#118280)
2025-04-17 08:41:17 +01:00
sve2p1-intrinsics-stores.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
sve2p1-intrinsics-tblq.ll
…
sve2p1-intrinsics-tbxq.ll
…
sve2p1-intrinsics-uclamp.ll
[LLVM][AArch64] Relax SVE/SME codegen predicates. (#145322)
2025-07-02 11:39:33 +01:00
sve2p1-intrinsics-unpk.ll
…
sve2p1-intrinsics-uzpq1.ll
…
sve2p1-intrinsics-uzpq2.ll
…
sve2p1-intrinsics-uzpx2.ll
…
sve2p1-intrinsics-uzpx4.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
sve2p1-intrinsics-while-pn.ll
[LLVM][AArch64] Relax SVE/SME codegen predicates. (#145322)
2025-07-02 11:39:33 +01:00
sve2p1-intrinsics-while-pp.ll
[LLVM][AArch64] Relax SVE/SME codegen predicates. (#145322)
2025-07-02 11:39:33 +01:00
sve2p1-intrinsics-zipq1.ll
…
sve2p1-intrinsics-zipq2.ll
…
sve2p1-intrinsics-zipx2.ll
…
sve2p1-intrinsics-zipx4.ll
…
sve2p1-vector-shuffles.ll
[AArch64][CostModel] Lower cost of dupq (SVE2.1) (#144918)
2025-06-25 13:26:56 +01:00
sve2p2-intrinsics.ll
[NFC][LLVM][SVE2p2] Add RUN lines to fully verify codegen predicates.
2025-06-24 15:48:16 +00:00
sve-aba.ll
…
sve-abd.ll
[DAG] foldABSToABD - fallback to value tracking if the (ABS (SUB LHS, RHS)) operands aren't extended (#147053)
2025-07-06 08:36:46 +01:00
sve-adr.ll
[LLVM] Port SVE tests in llvm/test/CodeGen/AArch64 to use splat()
2024-10-03 14:35:32 +00:00
sve-aliasing.ll
[AArch64][SVE] Lower unpredicated loads/stores as LDR/STR. (#127837)
2025-02-26 13:56:35 +00:00
sve-aliasing.mir
Reland "CodeGen][NewPM] Port MachineScheduler to NPM. (#125703)" (#126684)
2025-02-12 18:54:39 +05:30
sve-alloca-stackid.ll
…
sve-alloca.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
sve-asrd.ll
[LLVM][CodeGen][SVE] ASRD cannot represent sdiv-by-one. (#162708)
2025-10-10 12:37:43 +01:00
sve-bad-intrinsics.ll
…
sve-bad-select.ll
…
sve-bf16-arith.ll
[AArch64][SVE] Add custom lowering for bfloat FMUL (with +bf16) (#167502)
2025-11-24 10:00:17 +00:00
sve-bf16-combines.ll
[AArch64][SVE] Add custom lowering for bfloat FMUL (with +bf16) (#167502)
2025-11-24 10:00:17 +00:00
sve-bf16-compares.ll
[LLVM][CodeGen][SVE] Add ISel for bfloat scalable vector compares. (#138707)
2025-05-08 10:57:15 +01:00
sve-bf16-converts.ll
[AArch64] Adjust the scheduling info of SVE FCMP on Cortex-A510. (#153810)
2025-08-15 15:45:33 +01:00
sve-bf16-int-converts.ll
[LLVM][CodeGen][SVE] Prefer NEON instructions when zeroing Z registers. (#133929)
2025-04-03 13:15:05 +01:00
sve-bf16-reductions.ll
[LLVM][CodeGen][SVE] Add isel for bfloat unordered reductions. (#143540)
2025-06-20 11:46:25 +01:00
sve-bf16-rounding.ll
[LLVM][CodeGen] Add lowering for scalable vector bfloat operations. (#109803)
2024-10-07 13:01:59 +01:00
sve-bit-counting-pred.ll
…
sve-bit-counting.ll
…
sve-bitcast.ll
[LLVM][SVE] Improve code generation for vector.insert into posion. (#105665)
2024-08-28 11:51:11 +01:00
sve-breakdown-scalable-vectortype.ll
[InstSimplify] Fix incorrect poison propagation when folding phi (#96631)
2024-11-07 14:09:45 +01:00
sve-callbyref-notailcall.ll
…
sve-callee-save-restore-pairs.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
sve-calling-convention-byref.ll
[Codegen] Add a separate stack ID for scalable predicates (#142390)
2025-10-02 14:43:07 +01:00
sve-calling-convention-mixed.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
sve-calling-convention.ll
[AArch64] Basic SVE PCS support for handling scalable vectors on Darwin.
2024-08-20 17:10:51 -07:00
sve-cmp-folds.ll
[AArch64][SVE2p1] Remove redundant PTESTs when predicate is a WHILEcc_x2 (#156478)
2025-09-11 13:53:22 +01:00
sve-cmp-select.ll
…
sve-cntp-combine-i32.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
sve-cntp-combine-i64.ll
…
sve-coalesce-ptrue-intrinsics.ll
…
sve-copy-zprpair.mir
…
sve-dead-masked-store.ll
[AArch64][SVE] Lower unpredicated loads/stores as LDR/STR. (#127837)
2025-02-26 13:56:35 +00:00
sve-doublereduct.ll
[AArch64] Avoid GPR trip when moving truncated i32 vector elements (#114541)
2024-12-20 11:07:37 +00:00
sve-expand-div.ll
[LLVM][CodeGen] Lower ConstantInt vectors like shufflevector base splats. (#144395)
2025-06-17 11:09:22 +01:00
sve-extload-icmp.ll
[AArch64][SVE] Lower unpredicated loads/stores as LDR/STR. (#127837)
2025-02-26 13:56:35 +00:00
sve-extract-element.ll
[AArch64][SVE] Avoid redundant extend of unsigned i8/i16 extracts. (#165863)
2025-11-10 10:07:15 +00:00
sve-extract-fixed-from-scalable-vector.ll
Reland "[RegAlloc] Fix the terminal rule check for interfere with DstReg (#168661)" (#169219)
2025-11-24 09:27:25 +08:00
sve-extract-fixed-vector.ll
Reland "[RegAlloc] Fix the terminal rule check for interfere with DstReg (#168661)" (#169219)
2025-11-24 09:27:25 +08:00
sve-extract-scalable-vector.ll
[LLVM][CodeGen] Remove failure cases when widening EXTRACT/INSERT_SUBVECTOR. (#162308)
2025-12-01 12:32:58 +00:00
sve-extract-vector-to-predicate-store.ll
…
sve-fadda-select.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
sve-fcmp.ll
[LLVM][CodeGen][SVE] Prefer NEON instructions when zeroing Z registers. (#133929)
2025-04-03 13:15:05 +01:00
sve-fcopysign.ll
[LLVM][SVE] Add isel for scalable vector bfloat copysign operations. (#130098)
2025-03-10 12:34:42 +00:00
sve-fcvt.ll
[LLVM][CodeGen][SVE] Prefer NEON instructions when zeroing Z registers. (#133929)
2025-04-03 13:15:05 +01:00
sve-fix-length-and-combine-512.ll
…
sve-fixed-ld2-alloca.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
sve-fixed-length-addressing-modes.ll
[LLVM][AArch64] Reduce uses of "undef" in SVE CodeGen tests.
2025-02-26 11:11:03 +00:00
sve-fixed-length-bit-counting.ll
[AArch64] Improve scalar and Neon popcount with SVE CNT. (#143870)
2025-06-30 09:04:45 +01:00
sve-fixed-length-bitcast.ll
…
sve-fixed-length-bitselect.ll
[AArch64] Add patterns for sub from add negative immediates (#156024)
2025-08-31 15:12:33 +01:00
sve-fixed-length-build-vector.ll
…
sve-fixed-length-concat.ll
[LLVM][AArch64] Reduce uses of "undef" in SVE CodeGen tests.
2025-02-26 11:11:03 +00:00
sve-fixed-length-ext-loads.ll
[AArch64] Optimize extending loads of small vectors (#163064)
2025-11-17 21:39:10 +02:00
sve-fixed-length-extract-subvector.ll
[AArch64][ISel] Select constructive EXT_ZZI pseudo instruction (#152554)
2025-08-15 14:30:24 +01:00
sve-fixed-length-extract-vector-elt.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
sve-fixed-length-fcopysign.ll
[LLVM][DAGCombine] Remove combiner-vector-fcopysign-extend-round. (#129878)
2025-03-05 15:31:34 +00:00
sve-fixed-length-fp128.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
sve-fixed-length-fp-arith.ll
[AArch64][SVE] Avoid movprfx by reusing register for _UNDEF pseudos. (#166926)
2025-11-10 16:33:59 +00:00
sve-fixed-length-fp-compares.ll
…
sve-fixed-length-fp-convert.ll
[AArch64][SVE] Refactor getPTrue to return splat(1) when pattern=all. (#139236)
2025-05-12 10:35:30 +01:00
sve-fixed-length-fp-extend-trunc.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
sve-fixed-length-fp-fma.ll
[AArch64][SVE] Avoid movprfx by reusing register for _UNDEF pseudos. (#166926)
2025-11-10 16:33:59 +00:00
sve-fixed-length-fp-minmax.ll
[AArch64][SVE] Avoid movprfx by reusing register for _UNDEF pseudos. (#166926)
2025-11-10 16:33:59 +00:00
sve-fixed-length-fp-reduce.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
sve-fixed-length-fp-rounding.ll
…
sve-fixed-length-fp-select.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
sve-fixed-length-fp-to-int.ll
[AArch64][ISel] Select constructive EXT_ZZI pseudo instruction (#152554)
2025-08-15 14:30:24 +01:00
sve-fixed-length-fp-vselect.ll
[DAG] Combine store + vselect to masked_store (#145176)
2025-08-04 19:05:36 +05:30
sve-fixed-length-frame-offests-crash.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
sve-fixed-length-frame-offests.ll
[AArch64][SVE] Refactor getPTrue to return splat(1) when pattern=all. (#139236)
2025-05-12 10:35:30 +01:00
sve-fixed-length-function-calls.ll
…
sve-fixed-length-functions.ll
…
sve-fixed-length-insert-vector-elt.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
sve-fixed-length-int-abd.ll
[AArch64][SVE] Avoid movprfx by reusing register for _UNDEF pseudos. (#166926)
2025-11-10 16:33:59 +00:00
sve-fixed-length-int-arith.ll
[AArch64][SVE] Avoid movprfx by reusing register for _UNDEF pseudos. (#166926)
2025-11-10 16:33:59 +00:00
sve-fixed-length-int-compares.ll
…
sve-fixed-length-int-div.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
sve-fixed-length-int-extends.ll
[AArch64][ISel] Select constructive EXT_ZZI pseudo instruction (#152554)
2025-08-15 14:30:24 +01:00
sve-fixed-length-int-immediates.ll
[LLVM][AArch64] Change SVE CodeGen tests to use splat().
2025-02-26 11:11:02 +00:00
sve-fixed-length-int-log.ll
…
sve-fixed-length-int-minmax.ll
[AArch64][SVE] Avoid movprfx by reusing register for _UNDEF pseudos. (#166926)
2025-11-10 16:33:59 +00:00
sve-fixed-length-int-mulh.ll
[AArch64][SVE] Avoid movprfx by reusing register for _UNDEF pseudos. (#166926)
2025-11-10 16:33:59 +00:00
sve-fixed-length-int-reduce.ll
[AArch64] Avoid GPR trip when moving truncated i32 vector elements (#114541)
2024-12-20 11:07:37 +00:00
sve-fixed-length-int-rem.ll
[AArch64][SVE] Avoid movprfx by reusing register for _UNDEF pseudos. (#166926)
2025-11-10 16:33:59 +00:00
sve-fixed-length-int-select.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
sve-fixed-length-int-shifts.ll
[AArch64][SVE] Avoid movprfx by reusing register for _UNDEF pseudos. (#166926)
2025-11-10 16:33:59 +00:00
sve-fixed-length-int-to-fp.ll
[AArch64][ISel] Select constructive EXT_ZZI pseudo instruction (#152554)
2025-08-15 14:30:24 +01:00
sve-fixed-length-int-vselect.ll
[DAG] Combine store + vselect to masked_store (#145176)
2025-08-04 19:05:36 +05:30
sve-fixed-length-limit-duplane.ll
[AArch64][ISel] Select constructive EXT_ZZI pseudo instruction (#152554)
2025-08-15 14:30:24 +01:00
sve-fixed-length-loads-stores.ll
[AArch64] Remove old non-power2 aarch64-sve-vector-bits-min tests. NFC
2025-11-03 07:58:01 +00:00
sve-fixed-length-log-reduce.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
sve-fixed-length-mask-opt.ll
[LLVM][AArch64] Reduce uses of "undef" in SVE CodeGen tests.
2025-02-26 11:11:03 +00:00
sve-fixed-length-masked-128bit-loads.ll
[AArch64] Combine signext_inreg of setcc(... != splat(0)) (#157665)
2025-09-16 11:42:28 +01:00
sve-fixed-length-masked-128bit-stores.ll
[AArch64] Combine signext_inreg of setcc(... != splat(0)) (#157665)
2025-09-16 11:42:28 +01:00
sve-fixed-length-masked-gather.ll
[AArch64] Optimize extending loads of small vectors (#163064)
2025-11-17 21:39:10 +02:00
sve-fixed-length-masked-loads.ll
[AArch64][ISel] Select constructive EXT_ZZI pseudo instruction (#152554)
2025-08-15 14:30:24 +01:00
sve-fixed-length-masked-scatter.ll
[AArch64] Optimize extending loads of small vectors (#163064)
2025-11-17 21:39:10 +02:00
sve-fixed-length-masked-stores.ll
…
sve-fixed-length-no-vscale-range.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
sve-fixed-length-offsets.ll
[AArch64][SVE] Refactor getPTrue to return splat(1) when pattern=all. (#139236)
2025-05-12 10:35:30 +01:00
sve-fixed-length-optimize-ptrue.ll
[AArch64][SVE] Refactor getPTrue to return splat(1) when pattern=all. (#139236)
2025-05-12 10:35:30 +01:00
sve-fixed-length-partial-reduce.ll
[IR] NFC: Remove 'experimental' from partial.reduce.add intrinsic (#158637)
2025-09-17 11:44:47 +01:00
sve-fixed-length-permute-rev.ll
[AArch64] Don't use LowerToPredicatedOp to shufflevector -> SVE lowerings (#140713)
2025-05-23 08:43:10 +01:00
sve-fixed-length-permute-zip-uzp-trn.ll
[AArch64][SVE] Refactor getPTrue to return splat(1) when pattern=all. (#139236)
2025-05-12 10:35:30 +01:00
sve-fixed-length-ptest.ll
[AArch64][SVE] Refactor getPTrue to return splat(1) when pattern=all. (#139236)
2025-05-12 10:35:30 +01:00
sve-fixed-length-reshuffle.ll
Reland "[RegAlloc] Fix the terminal rule check for interfere with DstReg (#168661)" (#169219)
2025-11-24 09:27:25 +08:00
sve-fixed-length-rev.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
sve-fixed-length-sdiv-pow2.ll
[LLVM][CodeGen] Lower ConstantInt vectors like shufflevector base splats. (#144395)
2025-06-17 11:09:22 +01:00
sve-fixed-length-shuffles.ll
AArch64: Enable terminal rule (#165959)
2025-11-10 12:49:21 -08:00
sve-fixed-length-splat-segment.ll
[AArch64] Use indexed dup for 128b segmented splat (#144688)
2025-06-20 14:23:26 +01:00
sve-fixed-length-splat-vector.ll
[AArch64] Scalarize extracted vector loads. (#159714)
2025-09-23 07:18:46 +00:00
sve-fixed-length-subvector.ll
PeepholeOpt: Fix looking for def of current copy to coalesce (#125533)
2025-02-05 23:29:02 +07:00
sve-fixed-length-trunc-stores.ll
…
sve-fixed-length-trunc.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
sve-fixed-length-vector-shuffle-tbl.ll
[AArch64][SVE] Refactor getPTrue to return splat(1) when pattern=all. (#139236)
2025-05-12 10:35:30 +01:00
sve-fixed-length-vector-shuffle.ll
…
sve-fixed-vector-llrint.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
sve-fixed-vector-lrint.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
sve-fixed-vector-zext.ll
…
sve-fold-loadext-and-splat-vector.ll
[LLVM] Port SVE tests in llvm/test/CodeGen/AArch64 to use splat()
2024-10-03 14:35:32 +00:00
sve-fold-vscale.ll
…
sve-forward-st-to-ld.ll
[AArch64][SVE] Lower unpredicated loads/stores as LDR/STR. (#127837)
2025-02-26 13:56:35 +00:00
sve-fp-combine.ll
[LLVM][CodeGen][SVE] Use DUPM for constantfp splats. (#168391)
2025-11-18 12:15:38 +00:00
sve-fp-immediates-merging.ll
[LLVM][SelectionDAG] Ensure Constant[FP]SDnode only store references to scalar Constant{Int,FP}. (#111005)
2024-10-15 10:56:41 +01:00
sve-fp-int-min-max.ll
…
sve-fp-reciprocal.ll
…
sve-fp-reduce-fadda.ll
[LLVM][CodeGen][SVE] Use DUPM for constantfp splats. (#168391)
2025-11-18 12:15:38 +00:00
sve-fp-reduce.ll
[LLVM][CodeGen][SVE] Add lowering for ISD::VECREDUCE_MUL/FMUL. (#161842)
2025-10-16 11:03:16 +01:00
sve-fp-rounding.ll
…
sve-fp-vselect.ll
…
sve-fp.ll
[AArch64][SVE] Lower unpredicated loads/stores as LDR/STR. (#127837)
2025-02-26 13:56:35 +00:00
sve-fpext-load.ll
[AArch64][SVE] Lower unpredicated loads/stores as LDR/STR. (#127837)
2025-02-26 13:56:35 +00:00
sve-fptosi-sat.ll
[LLVM][CodeGen][SVE] Use DUPM for constantfp splats. (#168391)
2025-11-18 12:15:38 +00:00
sve-fptoui-sat.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
sve-fptrunc-store.ll
[AArch64][SVE] Lower unpredicated loads/stores as LDR/STR. (#127837)
2025-02-26 13:56:35 +00:00
sve-gather-scatter-addr-opts.ll
[LLVM][AArch64] Reduce uses of "undef" in SVE CodeGen tests.
2025-02-26 11:11:03 +00:00
sve-gather-scatter-dag-combine.ll
[LLVM][AArch64] Reduce uses of "undef" in SVE CodeGen tests.
2025-02-26 11:11:03 +00:00
sve-gep.ll
[LLVM][AArch64] Change SVE CodeGen tests to use splat().
2025-02-26 11:11:02 +00:00
sve-hadd.ll
[SelectionDAG] Add support for extending masked loads in computeKnownBits (#115450)
2024-11-11 09:17:49 +00:00
sve-i1-add-reduce.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
sve-implicit-zero-filling.ll
[LLVM][CodeGen][SVE] Prefer NEON instructions when zeroing Z registers. (#133929)
2025-04-03 13:15:05 +01:00
sve-index-const-step-vector.ll
[AArch64] Add patterns for sub from add negative immediates (#156024)
2025-08-31 15:12:33 +01:00
sve-indexed-arithmetic.ll
[AArch64] Use SVE for fixed-length bf16 operations with +sve-b16b16 (#169329)
2025-11-27 19:18:00 +00:00
sve-insert-element.ll
[AArch64][SVE] Tweak how SVE CFI expressions are emitted (#151677)
2025-08-06 09:21:57 +01:00
sve-insert-scalable-vector.ll
[LLVM][SVE] Improve code generation for vector.insert into posion. (#105665)
2024-08-28 11:51:11 +01:00
sve-insert-vector-to-predicate-load.ll
[LLVM][AArch64] Reduce uses of "undef" in SVE CodeGen tests.
2025-02-26 11:11:03 +00:00
sve-insert-vector.ll
[LLVM][CodeGen] Remove failure cases when widening EXTRACT/INSERT_SUBVECTOR. (#162308)
2025-12-01 12:32:58 +00:00
sve-insr.ll
…
sve-int-arith-imm.ll
[LLVM] Port SVE tests in llvm/test/CodeGen/AArch64 to use splat()
2024-10-03 14:35:32 +00:00
sve-int-arith-pred.ll
…
sve-int-arith.ll
[AArch64][SVE] Lower unpredicated loads/stores as LDR/STR. (#127837)
2025-02-26 13:56:35 +00:00
sve-int-div-pred.ll
…
sve-int-imm.ll
[AArch64] Add patterns for sub from add negative immediates (#156024)
2025-08-31 15:12:33 +01:00
sve-int-log-imm.ll
[LLVM] Port SVE tests in llvm/test/CodeGen/AArch64 to use splat()
2024-10-03 14:35:32 +00:00
sve-int-log-pred.ll
…
sve-int-log.ll
[LLVM][CodeGen][SVE] Prefer NEON instructions when zeroing Z registers. (#133929)
2025-04-03 13:15:05 +01:00
sve-int-mad-pred.ll
…
sve-int-mul-neg.ll
Fold SVE mul and mul_u to neg during isel (#160828)
2025-10-03 15:52:43 +01:00
sve-int-mul-pred.ll
…
sve-int-mulh-pred.ll
[LLVM] Port SVE tests in llvm/test/CodeGen/AArch64 to use splat()
2024-10-03 14:35:32 +00:00
sve-int-pred-reduce.ll
…
sve-int-reduce-pred.ll
…
sve-int-reduce.ll
[LLVM][CodeGen][SVE] Add lowering for ISD::VECREDUCE_MUL/FMUL. (#161842)
2025-10-16 11:03:16 +01:00
sve-intrinsics-adr.ll
…
sve-intrinsics-bfloat.ll
[AArch64][SVE] Fix definition of bfloat fcvt intrinsics. (#110281)
2024-10-03 12:36:01 +01:00
sve-intrinsics-contiguous-prefetches.ll
…
sve-intrinsics-conversion.ll
…
sve-intrinsics-counting-bits.ll
…
sve-intrinsics-counting-elems-i32.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
sve-intrinsics-counting-elems.ll
[AArch64] Remove FeatureUseScalarIncVL
2024-11-10 14:51:55 +00:00
sve-intrinsics-dup-x.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
sve-intrinsics-fexpa.ll
[LLVM][AArch64] Relax SVE/SME codegen predicates. (#145322)
2025-07-02 11:39:33 +01:00
sve-intrinsics-ff-gather-loads-32bit-scaled-offsets.ll
…
sve-intrinsics-ff-gather-loads-32bit-unscaled-offsets.ll
…
sve-intrinsics-ff-gather-loads-64bit-scaled-offset.ll
…
sve-intrinsics-ff-gather-loads-64bit-unscaled-offset.ll
…
sve-intrinsics-ff-gather-loads-vector-base-imm-offset.ll
…
sve-intrinsics-ff-gather-loads-vector-base-scalar-offset.ll
…
sve-intrinsics-ffr-manipulation.ll
…
sve-intrinsics-fp-arith-imm.ll
[LLVM] Port SVE tests in llvm/test/CodeGen/AArch64 to use splat()
2024-10-03 14:35:32 +00:00
sve-intrinsics-fp-arith-merging.ll
…
sve-intrinsics-fp-arith-undef.ll
…
sve-intrinsics-fp-arith.ll
[LLVM][CodeGen][SVE] Make bf16 fabs/fneg isel consistent with fp16. (#147543)
2025-07-10 11:54:19 +01:00
sve-intrinsics-fp-compares.ll
…
sve-intrinsics-fp-converts.ll
…
sve-intrinsics-fp-reduce.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
sve-intrinsics-gather-loads-32bit-scaled-offsets.ll
…
sve-intrinsics-gather-loads-32bit-unscaled-offsets.ll
…
sve-intrinsics-gather-loads-64bit-scaled-offset.ll
[LLVM][AArch64] Reduce uses of "undef" in SVE CodeGen tests.
2025-02-26 11:11:03 +00:00
sve-intrinsics-gather-loads-64bit-unscaled-offset.ll
[LLVM][AArch64] Reduce uses of "undef" in SVE CodeGen tests.
2025-02-26 11:11:03 +00:00
sve-intrinsics-gather-loads-vector-base-imm-offset.ll
…
sve-intrinsics-gather-loads-vector-base-scalar-offset.ll
…
sve-intrinsics-gather-prefetches-scalar-base-vector-indexes.ll
…
sve-intrinsics-gather-prefetches-vect-base-imm-offset.ll
…
sve-intrinsics-gather-prefetches-vect-base-invalid-imm-offset.ll
…
sve-intrinsics-index.ll
[AArch64] Regenerate and update a number of check lines. NFC
2025-09-18 09:54:47 +01:00
sve-intrinsics-int-arith-imm-zero.ll
[LLVM] Port SVE tests in llvm/test/CodeGen/AArch64 to use splat()
2024-10-03 14:35:32 +00:00
sve-intrinsics-int-arith-imm.ll
[LLVM][CodeGen][SVE] Prefer NEON instructions when zeroing Z registers. (#133929)
2025-04-03 13:15:05 +01:00
sve-intrinsics-int-arith-merging.ll
[LLVM][CodeGen][SVE] Prefer NEON instructions when zeroing Z registers. (#133929)
2025-04-03 13:15:05 +01:00
sve-intrinsics-int-arith-merging.mir
[AMDGPU] Avoid put implicit_def into bundle that break reg's liveness (#142563)
2025-08-13 10:41:44 +08:00
sve-intrinsics-int-arith-undef.ll
[LLVM] Port SVE tests in llvm/test/CodeGen/AArch64 to use splat()
2024-10-03 14:35:32 +00:00
sve-intrinsics-int-arith.ll
…
sve-intrinsics-int-binaryComm-merging.mir
[AMDGPU] Avoid put implicit_def into bundle that break reg's liveness (#142563)
2025-08-13 10:41:44 +08:00
sve-intrinsics-int-binaryCommWithRev-merging.mir
[AMDGPU] Avoid put implicit_def into bundle that break reg's liveness (#142563)
2025-08-13 10:41:44 +08:00
sve-intrinsics-int-compares-with-imm.ll
[LLVM] Port SVE tests in llvm/test/CodeGen/AArch64 to use splat()
2024-10-03 14:35:32 +00:00
sve-intrinsics-int-compares.ll
[LLVM][AArch64] Change SVE CodeGen tests to use splat().
2025-02-26 11:11:02 +00:00
sve-intrinsics-ld1-addressing-mode-reg-imm.ll
…
sve-intrinsics-ld1-addressing-mode-reg-reg.ll
…
sve-intrinsics-ld1.ll
…
sve-intrinsics-ld1ro-addressing-mode-reg-imm.ll
…
sve-intrinsics-ld1ro-addressing-mode-reg-reg.ll
…
sve-intrinsics-ld1ro.ll
…
sve-intrinsics-ldN-sret-reg+imm-addr-mode.ll
…
sve-intrinsics-ldN-sret-reg+reg-addr-mode.ll
…
sve-intrinsics-ldst-ext.ll
[LLVM][CodeGen][SVE] List MVTs that are desirable for extending loads. (#149153)
2025-07-18 15:34:48 +01:00
sve-intrinsics-loads-ff.ll
…
sve-intrinsics-loads-nf.ll
…
sve-intrinsics-loads.ll
[LLVM][AArch64] Reduce uses of "undef" in SVE CodeGen tests.
2025-02-26 11:11:03 +00:00
sve-intrinsics-logical-imm.ll
[LLVM][AArch64] Change SVE CodeGen tests to use splat().
2025-02-26 11:11:02 +00:00
sve-intrinsics-logical-undef.ll
[LLVM] Port SVE tests in llvm/test/CodeGen/AArch64 to use splat()
2024-10-03 14:35:32 +00:00
sve-intrinsics-logical.ll
…
sve-intrinsics-mask-ldst-ext.ll
[LLVM][AArch64] Reduce uses of "undef" in SVE CodeGen tests.
2025-02-26 11:11:03 +00:00
sve-intrinsics-matmul-fp32.ll
…
sve-intrinsics-matmul-fp64.ll
…
sve-intrinsics-matmul-int8.ll
…
sve-intrinsics-perm-select-matmul-fp64.ll
…
sve-intrinsics-perm-select.ll
[LLVM][AArch64] Reduce uses of "undef" in SVE CodeGen tests.
2025-02-26 11:11:03 +00:00
sve-intrinsics-pred-creation.ll
…
sve-intrinsics-pred-operations.ll
…
sve-intrinsics-pred-testing.ll
…
sve-intrinsics-reinterpret-no-streaming.ll
[LLVM] Port SVE tests in llvm/test/CodeGen/AArch64 to use splat()
2024-10-03 14:35:32 +00:00
sve-intrinsics-reinterpret.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
sve-intrinsics-reversal.ll
…
sve-intrinsics-scalar-to-vec.ll
[LLVM][CodeGen][SVE] Prefer NEON instructions when zeroing Z registers. (#133929)
2025-04-03 13:15:05 +01:00
sve-intrinsics-scatter-stores-32bit-scaled-offsets.ll
…
sve-intrinsics-scatter-stores-32bit-unscaled-offsets.ll
…
sve-intrinsics-scatter-stores-64bit-scaled-offset.ll
…
sve-intrinsics-scatter-stores-64bit-unscaled-offset.ll
…
sve-intrinsics-scatter-stores-vector-base-imm-offset.ll
…
sve-intrinsics-scatter-stores-vector-base-scalar-offset.ll
…
sve-intrinsics-sel.ll
…
sve-intrinsics-shifts-merging.ll
[LLVM][CodeGen][SVE] Prefer NEON instructions when zeroing Z registers. (#133929)
2025-04-03 13:15:05 +01:00
sve-intrinsics-shifts-undef.ll
[LLVM] Port SVE tests in llvm/test/CodeGen/AArch64 to use splat()
2024-10-03 14:35:32 +00:00
sve-intrinsics-shifts.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
sve-intrinsics-sqdec.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
sve-intrinsics-sqinc.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
sve-intrinsics-st1-addressing-mode-reg-imm.ll
…
sve-intrinsics-st1-addressing-mode-reg-reg.ll
…
sve-intrinsics-st1.ll
…
sve-intrinsics-stN-reg-imm-addr-mode.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
sve-intrinsics-stN-reg-reg-addr-mode.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
sve-intrinsics-stores.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
sve-intrinsics-unpred-form.ll
…
sve-intrinsics-uqdec.ll
…
sve-intrinsics-uqinc.ll
…
sve-intrinsics-while.ll
[LLVM][SVE] Relax optimizeIncrementingWhile constant operand requirements. (#140037)
2025-05-16 11:43:56 +01:00
sve-knownbits.ll
[LLVM][CodeGen][SVE] Prefer NEON instructions when zeroing Z registers. (#133929)
2025-04-03 13:15:05 +01:00
sve-ld1-addressing-mode-reg-imm.ll
[AArch64][SVE] Lower unpredicated loads/stores as LDR/STR. (#127837)
2025-02-26 13:56:35 +00:00
sve-ld1-addressing-mode-reg-reg.ll
[LLVM][CodeGen][SVE] Don't combine shifts at the expense of addressing modes. (#149873)
2025-07-24 10:54:48 +01:00
sve-ld1r.ll
[LLVM][CodeGen][SVE] Prefer NEON instructions when zeroing Z registers. (#133929)
2025-04-03 13:15:05 +01:00
sve-ld1r.mir
…
sve-ld-post-inc.ll
[AArch64][SVE] Refactor getPTrue to return splat(1) when pattern=all. (#139236)
2025-05-12 10:35:30 +01:00
sve-ldN.mir
…
sve-ldnf1.mir
[AArch64][SVE] Tweak how SVE CFI expressions are emitted (#151677)
2025-08-06 09:21:57 +01:00
sve-ldstnt1.mir
[AArch64][SVE] Tweak how SVE CFI expressions are emitted (#151677)
2025-08-06 09:21:57 +01:00
sve-llrint.ll
[LLVM][CodeGen][SVE] Use DUPM for constantfp splats. (#168391)
2025-11-18 12:15:38 +00:00
sve-load-compare-store.ll
…
sve-load-store-legalisation.ll
[LLVM][CodeGen][SVE] Remove failure cases when widening vector load/store ops. (#160515)
2025-10-02 12:24:23 +01:00
sve-load-store-strict-align.ll
[AArch64][SVE] Lower unpredicated loads/stores as LDR/STR. (#127837)
2025-02-26 13:56:35 +00:00
sve-localstackalloc.mir
…
sve-lrint.ll
[LLVM][CodeGen][SVE] Use DUPM for constantfp splats. (#168391)
2025-11-18 12:15:38 +00:00
sve-lsr-scaled-index-addressing-mode.ll
[IR] Replace alignment argument with attribute on masked intrinsics (#163802)
2025-10-20 08:50:09 +00:00
sve-lsrchain.ll
[PHIElimination] Revert #131837 #146320 #146337 (#146850)
2025-07-03 07:48:08 -04:00
sve-masked-compressstore-sve2p2.ll
[AArch64][SVE] Add basic support for @llvm.masked.compressstore (#168350)
2025-11-28 10:17:36 +00:00
sve-masked-compressstore.ll
[AArch64][SVE] Add basic support for @llvm.masked.compressstore (#168350)
2025-11-28 10:17:36 +00:00
sve-masked-gather-32b-signed-scaled.ll
[LLVM][AArch64] Reduce uses of "undef" in SVE CodeGen tests.
2025-02-26 11:11:03 +00:00
sve-masked-gather-32b-signed-unscaled.ll
[LLVM][AArch64] Reduce uses of "undef" in SVE CodeGen tests.
2025-02-26 11:11:03 +00:00
sve-masked-gather-32b-unsigned-scaled.ll
[LLVM][AArch64] Reduce uses of "undef" in SVE CodeGen tests.
2025-02-26 11:11:03 +00:00
sve-masked-gather-32b-unsigned-unscaled.ll
[LLVM][AArch64] Reduce uses of "undef" in SVE CodeGen tests.
2025-02-26 11:11:03 +00:00
sve-masked-gather-64b-scaled.ll
[LLVM][AArch64] Reduce uses of "undef" in SVE CodeGen tests.
2025-02-26 11:11:03 +00:00
sve-masked-gather-64b-unscaled.ll
[LLVM][AArch64] Reduce uses of "undef" in SVE CodeGen tests.
2025-02-26 11:11:03 +00:00
sve-masked-gather-legalize.ll
[LLVM][AArch64] Reduce uses of "undef" in SVE CodeGen tests.
2025-02-26 11:11:03 +00:00
sve-masked-gather-vec-plus-imm.ll
[LLVM][AArch64] Reduce uses of "undef" in SVE CodeGen tests.
2025-02-26 11:11:03 +00:00
sve-masked-gather-vec-plus-reg.ll
[LLVM][AArch64] Reduce uses of "undef" in SVE CodeGen tests.
2025-02-26 11:11:03 +00:00
sve-masked-gather.ll
[LLVM][AArch64] Reduce uses of "undef" in SVE CodeGen tests.
2025-02-26 11:11:03 +00:00
sve-masked-int-arith.ll
…
sve-masked-ldst-nonext.ll
[LLVM][AArch64] Reduce uses of "undef" in SVE CodeGen tests.
2025-02-26 11:11:03 +00:00
sve-masked-ldst-sext.ll
[LLVM][AArch64] Reduce uses of "undef" in SVE CodeGen tests.
2025-02-26 11:11:03 +00:00
sve-masked-ldst-trunc.ll
…
sve-masked-ldst-zext.ll
[LLVM][AArch64] Reduce uses of "undef" in SVE CodeGen tests.
2025-02-26 11:11:03 +00:00
sve-masked-scatter-32b-scaled.ll
…
sve-masked-scatter-32b-unscaled.ll
…
sve-masked-scatter-64b-scaled.ll
…
sve-masked-scatter-64b-unscaled.ll
…
sve-masked-scatter-legalize.ll
[AArch64][SVE] Lower unpredicated loads/stores as LDR/STR. (#127837)
2025-02-26 13:56:35 +00:00
sve-masked-scatter-vec-plus-imm.ll
…
sve-masked-scatter-vec-plus-reg.ll
…
sve-masked-scatter.ll
[LLVM][CodeGen][SVE] Prefer NEON instructions when zeroing Z registers. (#133929)
2025-04-03 13:15:05 +01:00
sve-merging-stores.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
sve-merging-unary.ll
[LLVM][CodeGen][SVE] Make bf16 fabs/fneg isel consistent with fp16. (#147543)
2025-07-10 11:54:19 +01:00
sve-min-max-pred.ll
[AArch64][SVE] Lower unpredicated loads/stores as LDR/STR. (#127837)
2025-02-26 13:56:35 +00:00
sve-mov-imm-pred.ll
[AArch64][SVE] Detect MOV (imm, pred, zeroing/merging) (#116032)
2024-11-15 08:50:13 +00:00
sve-no-typesize-warnings.ll
…
sve-nontemporal-masked-ldst.ll
[AArch64] Combine signext_inreg of setcc(... != splat(0)) (#157665)
2025-09-16 11:42:28 +01:00
sve-partial-reduce-dot-product.ll
[IR] NFC: Remove 'experimental' from partial.reduce.add intrinsic (#158637)
2025-09-17 11:44:47 +01:00
sve-partial-reduce-wide-add.ll
[IR] NFC: Remove 'experimental' from partial.reduce.add intrinsic (#158637)
2025-09-17 11:44:47 +01:00
sve-pfalse-machine-cse.mir
[CodeGen][NewPM] Port MachineCSE pass to new pass manager. (#106605)
2024-09-04 18:54:07 +05:30
sve-pr62151.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
sve-pr92779.ll
[AArch64][ISel] Select constructive EXT_ZZI pseudo instruction (#152554)
2025-08-15 14:30:24 +01:00
sve-pred-arith.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
sve-pred-contiguous-ldst-addressing-mode-reg-imm.ll
[LLVM][AArch64] Reduce uses of "undef" in SVE CodeGen tests.
2025-02-26 11:11:03 +00:00
sve-pred-contiguous-ldst-addressing-mode-reg-reg.ll
[LLVM][AArch64] Reduce uses of "undef" in SVE CodeGen tests.
2025-02-26 11:11:03 +00:00
sve-pred-log.ll
…
sve-pred-non-temporal-ldst-addressing-mode-reg-imm.ll
…
sve-pred-non-temporal-ldst-addressing-mode-reg-reg.ll
…
sve-pred-pair-spill-fill.ll
…
sve-pred-selectop2.ll
[DAG] Handle truncated splat in isBoolConstant (#145473)
2025-07-10 20:59:34 +01:00
sve-pred-selectop3.ll
[DAG] Handle truncated splat in isBoolConstant (#145473)
2025-07-10 20:59:34 +01:00
sve-pred-selectop.ll
[AArch64] Use SVE2 bit-sel instructions for some binary patterns. (#147544)
2025-07-10 11:36:01 +01:00
sve-pseudos-expand-undef.mir
[LLVM][AArch64ExpandPseudo] Preserve undef flags when expanding SVE 1/2/3-op pseudo instructions. (#149104)
2025-07-17 11:20:47 +01:00
sve-ptest-removal-brk.ll
…
sve-ptest-removal-cmpeq.ll
…
sve-ptest-removal-cmpeq.mir
[LLVM][CodeGen][AArch64] Improve PTEST removal by looking through copies. (#132041)
2025-03-20 12:43:11 +00:00
sve-ptest-removal-cmpge.ll
…
sve-ptest-removal-cmpgt.ll
…
sve-ptest-removal-cmphi.ll
…
sve-ptest-removal-cmphs.ll
…
sve-ptest-removal-cmple.ll
…
sve-ptest-removal-cmplo.ll
…
sve-ptest-removal-cmpls.ll
…
sve-ptest-removal-cmplt.ll
…
sve-ptest-removal-cmpne.ll
…
sve-ptest-removal-log.ll
…
sve-ptest-removal-match.ll
…
sve-ptest-removal-pfirst-pnext.ll
…
sve-ptest-removal-ptrue.ll
…
sve-ptest-removal-rdffr.mir
[LLVM] Regenerate CHECK lines for CodeGen/AArch64/sve-ptest-removal-*.mir
2025-03-19 13:33:53 +00:00
sve-ptest-removal-sink.ll
AArch64: Enable terminal rule (#165959)
2025-11-10 12:49:21 -08:00
sve-ptest-removal-whilege.mir
[LLVM] Regenerate CHECK lines for CodeGen/AArch64/sve-ptest-removal-*.mir
2025-03-19 13:33:53 +00:00
sve-ptest-removal-whilegt.mir
[LLVM] Regenerate CHECK lines for CodeGen/AArch64/sve-ptest-removal-*.mir
2025-03-19 13:33:53 +00:00
sve-ptest-removal-whilehi.mir
[LLVM] Regenerate CHECK lines for CodeGen/AArch64/sve-ptest-removal-*.mir
2025-03-19 13:33:53 +00:00
sve-ptest-removal-whilehs.mir
[LLVM] Regenerate CHECK lines for CodeGen/AArch64/sve-ptest-removal-*.mir
2025-03-19 13:33:53 +00:00
sve-ptest-removal-whilele.mir
[LLVM] Regenerate CHECK lines for CodeGen/AArch64/sve-ptest-removal-*.mir
2025-03-19 13:33:53 +00:00
sve-ptest-removal-whilelo.mir
[AArch64][SVE2p1] Remove redundant PTESTs when predicate is a WHILEcc_x2 (#156478)
2025-09-11 13:53:22 +01:00
sve-ptest-removal-whilels.mir
[LLVM] Regenerate CHECK lines for CodeGen/AArch64/sve-ptest-removal-*.mir
2025-03-19 13:33:53 +00:00
sve-ptest-removal-whilelt.mir
[LLVM] Regenerate CHECK lines for CodeGen/AArch64/sve-ptest-removal-*.mir
2025-03-19 13:33:53 +00:00
sve-ptest-removal-whilerw.mir
[LLVM] Regenerate CHECK lines for CodeGen/AArch64/sve-ptest-removal-*.mir
2025-03-19 13:33:53 +00:00
sve-ptest-removal-whilewr.mir
[LLVM] Regenerate CHECK lines for CodeGen/AArch64/sve-ptest-removal-*.mir
2025-03-19 13:33:53 +00:00
sve-ptest.ll
…
sve-punpklo-combine.ll
…
sve-reassocadd.ll
[AArch64][SVE] Lower unpredicated loads/stores as LDR/STR. (#127837)
2025-02-26 13:56:35 +00:00
sve-redundant-store.ll
[AArch64][SVE] Lower unpredicated loads/stores as LDR/STR. (#127837)
2025-02-26 13:56:35 +00:00
sve-rev.ll
…
sve-saba.ll
…
sve-saddv_64.ll
[AArch64] Use unsigned variant of <s|u>addv_64 SVE vector reduction intrinsic for 64 bit values (#157418)
2025-09-09 06:14:32 +00:00
sve-saturating-arith.ll
[GlobalISel][AArch64] Legalize G_UADDSAT, G_SADDSAT, G_USUBSAT, and G… (#114664)
2024-11-04 08:18:37 +01:00
sve-scmp.ll
[AArch64] Add a selection for vector scmp/ucmp tests. NFC
2024-09-16 14:25:15 +01:00
sve-sdiv-pow2.ll
[LLVM][CodeGen] Lower ConstantInt vectors like shufflevector base splats. (#144395)
2025-06-17 11:09:22 +01:00
sve-select.ll
[LLVM][SVE] Add isel for bfloat based select operations. (#128881)
2025-02-28 10:56:09 +00:00
sve-setcc.ll
…
sve-sext-zext.ll
[LLVM][CodeGen][SVE] Add lowering for ISD::[ANY,SIGN,ZERO]_EXTEND_VECTOR_INREG. (#169847)
2025-12-02 11:31:52 +00:00
sve-smulo-sdnode.ll
…
sve-splat-one-and-ptrue.ll
[LLVM] Port SVE tests in llvm/test/CodeGen/AArch64 to use splat()
2024-10-03 14:35:32 +00:00
sve-splat-sext.ll
[LLVM] Port SVE tests in llvm/test/CodeGen/AArch64 to use splat()
2024-10-03 14:35:32 +00:00
sve-split-extract-elt.ll
[AArch64][SVE] Tweak how SVE CFI expressions are emitted (#151677)
2025-08-06 09:21:57 +01:00
sve-split-fcvt.ll
[LLVM][CodeGen][SVE] Prefer NEON instructions when zeroing Z registers. (#133929)
2025-04-03 13:15:05 +01:00
sve-split-fp-reduce.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
sve-split-insert-elt.ll
[AArch64][SVE] Tweak how SVE CFI expressions are emitted (#151677)
2025-08-06 09:21:57 +01:00
sve-split-int-pred-reduce.ll
…
sve-split-int-reduce.ll
[AArch64] Avoid GPR trip when moving truncated i32 vector elements (#114541)
2024-12-20 11:07:37 +00:00
sve-split-load.ll
[AArch64][SVE] Lower unpredicated loads/stores as LDR/STR. (#127837)
2025-02-26 13:56:35 +00:00
sve-split-store.ll
[AArch64][SVE] Lower unpredicated loads/stores as LDR/STR. (#127837)
2025-02-26 13:56:35 +00:00
sve-split-trunc.ll
…
sve-srem-combine-loop.ll
…
sve-st1-addressing-mode-reg-imm.ll
[AArch64][SVE] Lower unpredicated loads/stores as LDR/STR. (#127837)
2025-02-26 13:56:35 +00:00
sve-st1-addressing-mode-reg-reg.ll
[LLVM][AArch64ISel] Fix IsLE predicate setting so it does not affect BE codegen. (#135978)
2025-04-17 11:43:10 +01:00
sve-stack-frame-layout-win.ll
[AArch64] Initial compiler support for SVE unwind on Windows. (#138609)
2025-06-02 18:28:23 -07:00
sve-stack-frame-layout.ll
[AArch64][SME] Avoid clobbering X0 in the MachineSMEABIPass (#170131)
2025-12-02 09:16:30 +00:00
sve-stepvector.ll
[LLVM] Port SVE tests in llvm/test/CodeGen/AArch64 to use splat()
2024-10-03 14:35:32 +00:00
sve-stN.mir
…
sve-streaming-mode-cvt-fp-int-fp.ll
[DAGCombiner] Extend FP-to-Int cast without requiring nsz (#161093)
2025-10-11 00:34:33 +09:00
sve-streaming-mode-cvt-fp-to-int.ll
[AArch64][SVE] Use SVE for scalar FP converts in streaming[-compatible] functions (1/n) (#118505)
2024-12-19 13:16:31 +00:00
sve-streaming-mode-cvt-int-to-fp.ll
[AArch64][SVE] Use SVE for scalar FP converts in streaming[-compatible] functions (1/n) (#118505)
2024-12-19 13:16:31 +00:00
sve-streaming-mode-fixed-length-and-combine.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
sve-streaming-mode-fixed-length-bit-counting.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
sve-streaming-mode-fixed-length-bitcast.ll
[AArch64] Enable aggressivelyPreferBuildVectorSources (#142729)
2025-06-06 17:03:10 +01:00
sve-streaming-mode-fixed-length-bitselect.ll
[AArch64] Add patterns for sub from add negative immediates (#156024)
2025-08-31 15:12:33 +01:00
sve-streaming-mode-fixed-length-build-vector.ll
[AArch64] Add patterns for sub from add negative immediates (#156024)
2025-08-31 15:12:33 +01:00
sve-streaming-mode-fixed-length-concat.ll
[LLVM][AArch64] Reduce uses of "undef" in SVE CodeGen tests.
2025-02-26 11:11:03 +00:00
sve-streaming-mode-fixed-length-ext-loads.ll
[AArch64] Scalarize extracted vector loads. (#159714)
2025-09-23 07:18:46 +00:00
sve-streaming-mode-fixed-length-extract-subvector.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
sve-streaming-mode-fixed-length-extract-vector-elt.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
sve-streaming-mode-fixed-length-fcopysign.ll
[AArch64] Use pattern to select bf16 fpextend (#137212)
2025-05-02 12:55:18 +01:00
sve-streaming-mode-fixed-length-fp-arith.ll
[AArch64][SVE] Avoid movprfx by reusing register for _UNDEF pseudos. (#166926)
2025-11-10 16:33:59 +00:00
sve-streaming-mode-fixed-length-fp-compares.ll
[AArch64] Adjust the scheduling info of SVE FCMP on Cortex-A510. (#153810)
2025-08-15 15:45:33 +01:00
sve-streaming-mode-fixed-length-fp-convert.ll
MachineScheduler: Improve instruction clustering (#137784)
2025-06-05 15:28:04 +08:00
sve-streaming-mode-fixed-length-fp-extend-trunc.ll
[AArch64][ISel] Select constructive EXT_ZZI pseudo instruction (#152554)
2025-08-15 14:30:24 +01:00
sve-streaming-mode-fixed-length-fp-fma.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
sve-streaming-mode-fixed-length-fp-minmax.ll
[AArch64][SVE] Avoid movprfx by reusing register for _UNDEF pseudos. (#166926)
2025-11-10 16:33:59 +00:00
sve-streaming-mode-fixed-length-fp-reduce-fa64.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
sve-streaming-mode-fixed-length-fp-reduce.ll
MachineScheduler: Reset next cluster candidate for each node (#139513)
2025-05-28 14:53:46 +08:00
sve-streaming-mode-fixed-length-fp-rounding.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
sve-streaming-mode-fixed-length-fp-select.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
sve-streaming-mode-fixed-length-fp-to-int.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
sve-streaming-mode-fixed-length-fp-vselect.ll
[DAG] Combine store + vselect to masked_store (#145176)
2025-08-04 19:05:36 +05:30
sve-streaming-mode-fixed-length-insert-vector-elt.ll
[LLVM][AArch64][SVE] Mark DUP immediate instructions with isAsCheapAsAMove. (#133945)
2025-04-03 11:42:07 +01:00
sve-streaming-mode-fixed-length-int-abd.ll
[AArch64] Add SVE lowering of fixed-length UABD/SABD (#104991)
2024-08-21 20:34:03 +01:00
sve-streaming-mode-fixed-length-int-arith.ll
[AArch64][SVE] Avoid movprfx by reusing register for _UNDEF pseudos. (#166926)
2025-11-10 16:33:59 +00:00
sve-streaming-mode-fixed-length-int-compares.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
sve-streaming-mode-fixed-length-int-div.ll
[AArch64][SVE] Avoid movprfx by reusing register for _UNDEF pseudos. (#166926)
2025-11-10 16:33:59 +00:00
sve-streaming-mode-fixed-length-int-extends.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
sve-streaming-mode-fixed-length-int-immediates.ll
[LLVM][AArch64] Change SVE CodeGen tests to use splat().
2025-02-26 11:11:02 +00:00
sve-streaming-mode-fixed-length-int-log.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
sve-streaming-mode-fixed-length-int-minmax.ll
[AArch64][SVE] Avoid movprfx by reusing register for _UNDEF pseudos. (#166926)
2025-11-10 16:33:59 +00:00
sve-streaming-mode-fixed-length-int-mla-neon-fa64.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
sve-streaming-mode-fixed-length-int-mul.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
sve-streaming-mode-fixed-length-int-mulh.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
sve-streaming-mode-fixed-length-int-reduce.ll
MachineScheduler: Reset next cluster candidate for each node (#139513)
2025-05-28 14:53:46 +08:00
sve-streaming-mode-fixed-length-int-rem.ll
[AArch64][SVE] Avoid movprfx by reusing register for _UNDEF pseudos. (#166926)
2025-11-10 16:33:59 +00:00
sve-streaming-mode-fixed-length-int-select.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
sve-streaming-mode-fixed-length-int-shifts.ll
[AArch64][SVE] Avoid movprfx by reusing register for _UNDEF pseudos. (#166926)
2025-11-10 16:33:59 +00:00
sve-streaming-mode-fixed-length-int-to-fp.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
sve-streaming-mode-fixed-length-int-vselect.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
sve-streaming-mode-fixed-length-ld2-alloca.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
sve-streaming-mode-fixed-length-limit-duplane.ll
[AArch64][ISel] Select constructive EXT_ZZI pseudo instruction (#152554)
2025-08-15 14:30:24 +01:00
sve-streaming-mode-fixed-length-loads.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
sve-streaming-mode-fixed-length-log-reduce.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
sve-streaming-mode-fixed-length-masked-gather-scatter.ll
[AArch64] Generalize integer FPR lane stores for all types (#134117)
2025-04-17 09:25:57 +01:00
sve-streaming-mode-fixed-length-masked-load.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
sve-streaming-mode-fixed-length-masked-store.ll
[AArch64] Lower zero cycle FPR zeroing (#156261)
2025-09-10 08:32:51 +03:00
sve-streaming-mode-fixed-length-optimize-ptrue.ll
[AArch64][SVE] Avoid movprfx by reusing register for _UNDEF pseudos. (#166926)
2025-11-10 16:33:59 +00:00
sve-streaming-mode-fixed-length-permute-rev.ll
[AArch64] Don't use LowerToPredicatedOp to shufflevector -> SVE lowerings (#140713)
2025-05-23 08:43:10 +01:00
sve-streaming-mode-fixed-length-permute-zip-uzp-trn.ll
[AArch64][SVE] Avoid movprfx by reusing register for _UNDEF pseudos. (#166926)
2025-11-10 16:33:59 +00:00
sve-streaming-mode-fixed-length-ptest.ll
[AArch64] Adjust the scheduling info of SVE FCMP on Cortex-A510. (#153810)
2025-08-15 15:45:33 +01:00
sve-streaming-mode-fixed-length-reductions.ll
[AArch64][ISel] Select constructive EXT_ZZI pseudo instruction (#152554)
2025-08-15 14:30:24 +01:00
sve-streaming-mode-fixed-length-reshuffle.ll
[LLVM][AArch64] Reduce uses of "undef" in SVE CodeGen tests.
2025-02-26 11:11:03 +00:00
sve-streaming-mode-fixed-length-rev.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
sve-streaming-mode-fixed-length-sdiv-pow2.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
sve-streaming-mode-fixed-length-shuffle.ll
[LLVM][AArch64] Reduce uses of "undef" in SVE CodeGen tests.
2025-02-26 11:11:03 +00:00
sve-streaming-mode-fixed-length-splat-vector.ll
[LLVM][AArch64] Reduce uses of "undef" in SVE CodeGen tests.
2025-02-26 11:11:03 +00:00
sve-streaming-mode-fixed-length-stores.ll
[AArch64][SVE] Fold integer lane extract and store to FPR store (#129756)
2025-03-18 10:10:23 +00:00
sve-streaming-mode-fixed-length-subvector.ll
…
sve-streaming-mode-fixed-length-trunc-stores.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
sve-streaming-mode-fixed-length-trunc.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
sve-streaming-mode-fixed-length-vector-shuffle.ll
[AArch64] Scalarize extracted vector loads. (#159714)
2025-09-23 07:18:46 +00:00
sve-streaming-mode-test-register-mov.ll
[LLVM][AArch64][SVE] Mark DUP immediate instructions with isAsCheapAsAMove. (#133945)
2025-04-03 11:42:07 +01:00
sve-tailcall.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
sve-trunc.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
sve-ucmp.ll
[AArch64] Add a selection for vector scmp/ucmp tests. NFC
2024-09-16 14:25:15 +01:00
sve-umulo-sdnode.ll
…
sve-unaligned-load-store-strict-align.ll
Reapply [IR] Remove options to make scalable TypeSize access a warning (#156336)
2025-09-03 11:12:11 +02:00
sve-unary-movprfx.ll
[LLVM][AArch64] Reduce uses of "undef" in SVE CodeGen tests.
2025-02-26 11:11:03 +00:00
sve-uunpklo-load-uzp1-store-combine.ll
[AArch64][SVE] Refactor getPTrue to return splat(1) when pattern=all. (#139236)
2025-05-12 10:35:30 +01:00
sve-varargs-callee-broken.ll
…
sve-varargs-caller-broken.ll
[AArch64] Allow variadic calls with SVE argument if it is named. (#136833)
2025-04-24 07:57:09 +01:00
sve-varargs.ll
[AArch64] Allow variadic calls with SVE argument if it is named. (#136833)
2025-04-24 07:57:09 +01:00
sve-vecreduce-dot.ll
[AArch64][SVE] Avoid movprfx by reusing register for _UNDEF pseudos. (#166926)
2025-11-10 16:33:59 +00:00
sve-vecreduce-fold.ll
[LLVM] Port SVE tests in llvm/test/CodeGen/AArch64 to use splat()
2024-10-03 14:35:32 +00:00
sve-vector-compress.ll
[AArch64][SVE] Implement demanded bits for @llvm.aarch64.sve.cntp (#168714)
2025-11-20 11:23:05 +00:00
sve-vector-deinterleave.ll
[LLVM][CodeGen][SVE] Add lowering for 3-way VECTOR_(DE)INTERLEAVE operations. (#162502)
2025-10-10 11:12:50 +01:00
sve-vector-interleave.ll
[LLVM][CodeGen][SVE] Add lowering for 3-way VECTOR_(DE)INTERLEAVE operations. (#162502)
2025-10-10 11:12:50 +01:00
sve-vector-splat.ll
[LLVM][CodeGen][SVE] Use DUPM for constantfp splats. (#168391)
2025-11-18 12:15:38 +00:00
sve-vl-arith.ll
[AArch64][SVE] Fold ADD+CNTB to INCB/DECB (#118280)
2025-04-17 08:41:17 +01:00
sve-vls-ldst-opt.mir
[AArch64] Fix stp kill when merging forward. (#152994)
2025-08-12 14:19:43 +01:00
sve-vscale-attr.ll
[AArch64][SVE] Refactor getPTrue to return splat(1) when pattern=all. (#139236)
2025-05-12 10:35:30 +01:00
sve-vscale-combine.ll
[LLVM][DAGCombiner] fold (shl (X * vscale(C0)), C1) -> (X * vscale(C0 << C1)). (#150651)
2025-08-01 11:42:45 +01:00
sve-vscale.ll
[AArch64] sve-vscale.ll - cleanup test checks
2025-07-07 15:50:26 +01:00
sve-vselect-fold.ll
…
sve-vselect-imm.ll
[LLVM][CodeGen][SVE] Use DUPM for constantfp splats. (#168391)
2025-11-18 12:15:38 +00:00
sve-widen-scalable-vectortype.ll
…
sve-zeroinit.ll
[LLVM][CodeGen][SVE] Prefer NEON instructions when zeroing Z registers. (#133929)
2025-04-03 13:15:05 +01:00
svtcf-fmul-fdiv-combine.ll
[CodeGen] Remove -enable-unsafe-fp-math option (#164559)
2025-10-22 15:40:31 +08:00
swap-compare-operands.ll
…
swift-async-context-seh.ll
…
swift-async-context-slot-offset-win.ll
…
swift-async-pei.ll
…
swift-async-reg.ll
…
swift-async-unwind.ll
…
swift-async-win.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
swift-async.ll
…
swift-csr-win.ll
…
swift-dynamic-async-frame.ll
…
swift-error-unreachable-use.ll
[llvm] Remove br i1 undef from some llvm/test/CodeGen tests (#128272)
2025-02-23 09:23:33 +00:00
swift-error.ll
…
swift-return.ll
…
swiftcc.ll
…
swifterror.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
swiftself-scavenger.ll
…
swiftself.ll
…
swifttail-arm64_32.ll
…
swifttail-async.ll
…
swifttail-call.ll
…
swifttail-funclet.ll
…
switch-cases-to-branch-and.ll
[AArch64] Add another switch clustering test with power-of-2 constants.
2025-08-26 21:51:53 +01:00
switch-unreachable-default.ll
…
tagged-globals-pic.ll
…
tagged-globals-static.ll
…
tagp.ll
…
tail-call-stack-args.ll
[AArch64] Skip storing of stack arguments when lowering tail calls (#126735)
2025-06-06 11:26:24 +03:00
tail-call-unused-zext.ll
[llvm] Remove br i1 undef in some llvm/test/CodeGen tests (#127368)
2025-02-16 18:44:46 +00:00
tail-call.ll
…
tail-dup-redundant-phi.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
tail-duplicate-debug-variance.mir
…
tailcall_misched_graph.ll
…
tailcall-bitcast-memcpy.ll
…
tailcall-ccmismatch2.ll
…
tailcall-ccmismatch.ll
…
tailcall-explicit-sret.ll
…
tailcall-fastisel.ll
…
tailcall-implicit-sret.ll
…
tailcall-mem-intrinsics.ll
…
tailcall-ssp-split-debug.ll
[llvm] Remove br i1 undef in some llvm/test/CodeGen tests (#127368)
2025-02-16 18:44:46 +00:00
tailcall-string-rvo.ll
…
tailcc-notail.ll
…
tailcc-tail-call.ll
…
taildup-addrtaken.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
taildup-cfi.ll
…
taildup-inst-dup-loc.mir
…
taildup-ssa-update-pr62712.mir
…
taildup-subreg-compose.mir
…
tailmerging_in_mbp.ll
…
tbi.ll
…
tbl-loops.ll
[RegAlloc] Remove default restriction on non-trivial rematerialization (#159211)
2025-10-04 22:50:44 +00:00
tbz-tbnz.ll
[AArch64] Some tests for cbz/tbz with wzr. NFC
2025-10-01 12:41:03 +01:00
tiny_supported.ll
…
tiny-model-pic.ll
…
tiny-model-static.ll
…
trampoline.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
trunc-avg-fold.ll
[AArch64][GlobalISel] Added support for hadd family of intrinsics (#163985)
2025-11-19 15:44:02 +00:00
trunc-nsw-nuw.ll
[DAGCombiner] Add basic support for trunc nsw/nuw (#113808)
2024-11-07 00:23:53 +08:00
trunc-to-tbl.ll
[AArch64] Generalize integer FPR lane stores for all types (#134117)
2025-04-17 09:25:57 +01:00
trunc-v1i64.ll
…
trunc.ll
[AArch64][GlobalISel] Ensure we have a insert-subreg v4i32 GPR pattern (#142724)
2025-06-06 17:44:33 +01:00
tst-br.ll
…
typepromotion-cost.ll
…
typepromotion-gep.ll
[TypePromotion] Do not zero-extend getelementptr indexes since signed
2025-04-05 16:49:05 +02:00
typepromotion-overflow.ll
…
typepromotion-phisret.ll
[TypePromotion] Do not zero-extend getelementptr indexes since signed
2025-04-05 16:49:05 +02:00
typepromotion-signed.ll
[AArch64] Check for negative numbers when adjusting icmps (#141151)
2025-05-30 15:22:54 +01:00
uadd_sat_plus.ll
[AArch64][GlobalISel] Update and cleanup a number of gisel tests. NFC
2024-11-23 18:58:55 +00:00
uadd_sat_vec.ll
[AArch64] Optimize extending loads of small vectors (#163064)
2025-11-17 21:39:10 +02:00
uadd_sat.ll
[AArch64] Extend test coverage for v1i64 add/sub.sat. NFC
2025-06-02 08:33:27 +01:00
uaddlv-vaddlp-combine.ll
[AArch64] Avoid GPR trip when moving truncated i32 vector elements (#114541)
2024-12-20 11:07:37 +00:00
uaddo.ll
…
ubsantrap.ll
…
ucmp.ll
[GlobalISel] Add G_CONCAT_VECTOR handling in computeNumSignBits (#142355)
2025-06-04 11:11:18 +01:00
udivmodei5.ll
…
umin-sub-to-usubo-select-combine.ll
[DAG] Add baseline test coverage for #161036 (#168278)
2025-11-16 17:00:24 +00:00
umul_fix_sat.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
umul_fix.ll
[AArch64][SDAG] Detect non-zeroes in truncating buildvectors in fshl lowering (#123597)
2025-02-03 10:47:45 +00:00
umulo-128-legalisation-lowering.ll
[CGP]: Optimize mul.overflow. (#148343)
2025-11-18 13:15:47 +00:00
unfold-masked-merge-scalar-constmask-innerouter.ll
…
unfold-masked-merge-scalar-constmask-interleavedbits.ll
…
unfold-masked-merge-scalar-constmask-interleavedbytehalves.ll
…
unfold-masked-merge-scalar-constmask-lowhigh.ll
…
unfold-masked-merge-scalar-variablemask.ll
…
unfold-masked-merge-vector-variablemask-const.ll
…
unfold-masked-merge-vector-variablemask.ll
…
unreachable-emergency-spill-slot.mir
…
unsupported-cc-call.ll
AArch64: Use reportFatalUsageError for unsupported calling conv (#144840)
2025-06-20 15:43:39 +09:00
unsupported-cc-func.ll
AArch64: Use reportFatalUsageError for unsupported calling conv (#144840)
2025-06-20 15:43:39 +09:00
unsupported-object-format-err.ll
MC: Use reportFatalUsageError for COFF with non-windows (#147911)
2025-07-15 16:27:09 +09:00
unwind-preserved-from-mir.mir
…
unwind-preserved.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
urem-lkk.ll
[GISel] Combine shift + trunc + shift pattern (#155583)
2025-09-10 15:01:55 +01:00
urem-seteq-illegal-types.ll
…
urem-seteq-nonzero.ll
…
urem-seteq-optsize.ll
[AArch64] Adjust comparison constant if adjusting it means less instructions (#151024)
2025-08-18 14:56:45 +01:00
urem-seteq-vec-nonsplat.ll
…
urem-seteq-vec-nonzero.ll
…
urem-seteq-vec-splat.ll
…
urem-seteq-vec-tautological.ll
…
urem-seteq.ll
[AArch64] Adjust comparison constant if adjusting it means less instructions (#151024)
2025-08-18 14:56:45 +01:00
urem-vector-lkk.ll
[AArch64] Move BSL generation to lowering. (#151855)
2025-08-21 09:54:42 +01:00
use-cr-result-of-dom-icmp-st.ll
[AArch64] Check for negative numbers when adjusting icmps (#141151)
2025-05-30 15:22:54 +01:00
ushl_sat.ll
…
usub_sat_plus.ll
[AArch64][GlobalISel] Update and cleanup a number of gisel tests. NFC
2024-11-23 18:58:55 +00:00
usub_sat_vec.ll
[AArch64] Optimize extending loads of small vectors (#163064)
2025-11-17 21:39:10 +02:00
usub_sat.ll
[AArch64] Extend test coverage for v1i64 add/sub.sat. NFC
2025-06-02 08:33:27 +01:00
v3f-to-int.ll
[AArch64] Optimize extending loads of small vectors (#163064)
2025-11-17 21:39:10 +02:00
v8.2a-neon-intrinsics-constrained.ll
[AARCH64][Neon] switch to using bitcasts in arm_neon.h where appropriate (#127043)
2025-04-01 09:45:16 +01:00
v8.4-atomic-128.ll
…
v8.4-atomic.ll
[NFC][AArch64] move AArch64 non auto-generated tests to static file (#126312)
2025-02-10 00:03:05 +00:00
v8.5a-neon-frint3264-intrinsic.ll
…
v8.5a-scalar-frint3264-intrinsic.ll
…
vacg.ll
…
vararg-tallcall.ll
[AArch64] Fixes for Windows varargs handling. (#139972)
2025-05-16 11:30:51 -07:00
vararg.ll
[AArch64][GlobalISel] Implement selectVaStartAAPCS (#106979)
2024-09-19 11:48:14 +05:30
varargs-fixed-i16.ll
…
variant-pcs.ll
[AArch64] Restrict .variant_pcs directive to ELF targets (#138924)
2025-05-16 09:21:55 +01:00
vcvt-oversize.ll
…
vec3-loads-ext-trunc-stores.ll
[AArch64] Optimize extending loads of small vectors (#163064)
2025-11-17 21:39:10 +02:00
vec_uaddo.ll
MachineScheduler: Reset next cluster candidate for each node (#139513)
2025-05-28 14:53:46 +08:00
vec_umulo.ll
MachineScheduler: Reset next cluster candidate for each node (#139513)
2025-05-28 14:53:46 +08:00
vec-combine-compare-to-bitmask.ll
[AArch64] Optimize extending loads of small vectors (#163064)
2025-11-17 21:39:10 +02:00
vec-combine-compare-truncate-store.ll
[AArch64] Generalize integer FPR lane stores for all types (#134117)
2025-04-17 09:25:57 +01:00
vec-extract-branch.ll
…
vec-libcalls.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
veclib-llvm.modf.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
veclib-llvm.sincos.ll
[SDAG] Support expanding FSINCOS to vector library calls (#114039)
2024-10-31 12:41:43 +00:00
veclib-llvm.sincospi.ll
[IR] Add llvm.sincospi intrinsic (#125873)
2025-02-11 09:01:30 +00:00
vecreduce-add-legalization.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
vecreduce-add.ll
[AArch64][GlobalISel] Fix vecreduce(zext) fold from illegal types. (#167944)
2025-11-17 10:52:59 +00:00
vecreduce-and-legalization.ll
[DAG] visitINSERT_VECTOR_ELT - convert to or mask if all insertions are -1 (#138213)
2025-05-13 17:10:54 +01:00
vecreduce-bitext.ll
[DAG] Fold vecreduce.or(sext(x)) to sext(vecreduce.or(x)) (#108959)
2024-09-17 15:24:00 +01:00
vecreduce-bool.ll
[LLVM][AArch64] Optimize sign bit tests with TST instruction for SIGN_EXTEND patterns (#158061)
2025-09-29 09:53:50 +01:00
vecreduce-fadd-legalization-strict.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
vecreduce-fadd-legalization.ll
[AArch64][GlobalISel] Add additional vecreduce.fadd and fadd 0.0 tests. NFC
2025-08-19 11:52:50 +01:00
vecreduce-fadd-strict.ll
[AArch64][GlobalISel] Add G_FPEXT(G_FCONSTANT) folding (#162829)
2025-10-10 12:17:06 +00:00
vecreduce-fadd.ll
[AArch64][GlobalISel] Legalize s16 G_FCONSTANT to avoid widening to G_CONSTANT (#161205)
2025-10-08 08:15:11 +01:00
vecreduce-fmax-legalization-nan.ll
[AArch64][GlobalISel] Legalize more G_VECREDUCE_FMIN/FMAX operations. (#159082)
2025-09-17 17:19:10 +01:00
vecreduce-fmax-legalization.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
vecreduce-fmaximum.ll
[AArch64][GlobalISel] Legalize more G_VECREDUCE_FMIN/FMAX operations. (#159082)
2025-09-17 17:19:10 +01:00
vecreduce-fmin-legalization.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
vecreduce-fminimum.ll
[AArch64][GlobalISel] Legalize more G_VECREDUCE_FMIN/FMAX operations. (#159082)
2025-09-17 17:19:10 +01:00
vecreduce-fmul-legalization-strict.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
vecreduce-fmul-strict.ll
[AArch64][GlobalISel] Add G_FPEXT(G_FCONSTANT) folding (#162829)
2025-10-10 12:17:06 +00:00
vecreduce-fmul.ll
Revert "[AArch64][GlobalISel] Expand 64bit extracts to 128bit to allow more patterns (#142904)"
2025-06-11 08:32:55 +01:00
vecreduce-propagate-sd-flags.ll
[DAG] visitFREEZE - always allow freezing multiple operands (#145939)
2025-07-02 11:28:37 +01:00
vecreduce-umax-legalization.ll
Revert "[AArch64][GlobalISel] Expand 64bit extracts to 128bit to allow more patterns (#142904)"
2025-06-11 08:32:55 +01:00
vector_merge_dep_check.ll
[AArch64][test] Remove unsafe-fp-math uses (NFC) (#164606)
2025-10-22 12:14:21 +00:00
vector_splat-const-shift-of-constmasked.ll
…
vector-compress.ll
[AArch64] Scalarize extracted vector loads. (#159714)
2025-09-23 07:18:46 +00:00
vector-extract-last-active.ll
[AArch64][SelectionDAG] Generate clastb for extract.last.active (#112738)
2025-02-06 13:38:53 +00:00
vector-fcopysign.ll
Revert "[AArch64] Enable subreg liveness tracking by default."
2024-12-12 17:22:15 +00:00
vector-fcvt.ll
[AArch64] Prefer using DUP instead of INS where possible (#138549)
2025-05-15 10:31:09 +02:00
vector-gep.ll
…
vector-global-i1.ll
…
vector-insert-dag-combines.ll
Reland "[SelectionDAG] Introducing a new ISD::POISON SDNode to represent the poison value in the IR." (#135056)
2025-04-10 11:29:14 -04:00
vector-insert-shuffle-cycle.ll
…
vector-ldst-offset.ll
[AArch64] Add ISel for postindex ld1/st1 in big-endian (#144387)
2025-06-18 16:16:52 +01:00
vector-llrint.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
vector-lrint.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
vector-minmax.ll
[AArch64] Lower v1i64 and v2i64 [S|U][MIN|MAX] to SVE when available (#166735)
2025-11-06 13:33:55 +00:00
vector-op-scalarize-strict.ll
…
vector-popcnt-128-ult-ugt.ll
…
vector-to-scalar-bitmask.ll
[AArch64] Fix vectorToScalarBitmask BE (#156314)
2025-09-07 13:33:13 +01:00
verify-imm.mir
[AArch64] Verify OPERAND_SHIFT_MSL and OPERAND_IMPLICIT_IMM_0 (#157031)
2025-09-11 16:56:25 +01:00
verify-memop.mir
…
vldn_shuffle.ll
[AArch64] match TRN starting from undef elements (#167955)
2025-11-19 12:53:12 +00:00
volatile-combine.ll
…
vscale-and-sve-cnt-demandedbits.ll
[AArch64][SVE] Implement demanded bits for @llvm.aarch64.sve.cntp (#168714)
2025-11-20 11:23:05 +00:00
vscale-power-of-two.ll
…
vselect-constants.ll
[DAG] combineVSelectWithAllOnesOrZeros - fold select Cond, 0, x -> and not(Cond), x (#147472)
2025-07-08 14:45:40 +01:00
vselect-ext.ll
[DAG] visitFREEZE - replace multiple frozen/unfrozen uses of an SDValue with just the frozen node (#150017)
2025-08-05 09:24:09 +01:00
wide-scalar-shift-by-byte-multiple-legalization.ll
[Codegen][LegalizeIntegerTypes] Improve shift through stack (#96151)
2024-09-23 11:45:43 +02:00
wide-scalar-shift-legalization.ll
MachineScheduler: Reset next cluster candidate for each node (#139513)
2025-05-28 14:53:46 +08:00
win64_vararg2.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
win64_vararg_float_cc.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
win64_vararg_float.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
win64_vararg.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
win64-fpowi.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
win64-jumptable.ll
…
win64-no-uwtable.ll
…
win64-nocfi.ll
…
win64cc-backup-x18.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
win64cc-darwin-backup-x18.ll
…
win64cc-x18.ll
[AArch64] fix trampoline implementation: use X15 (#126743)
2025-06-11 21:49:01 -04:00
win_cst_pool.ll
…
win-align-chkstk.ll
…
win-alloca-no-stack-probe.ll
…
win-alloca.ll
…
win-catchpad-nested-cxx.ll
[MC] Don't print () around $ names
2025-03-30 16:38:16 -07:00
win-import-call-optimization-nocalls.ll
[clang][llvm][aarch64][win] Add a clang flag and module attribute for import call optimization, and remove LLVM flag (#122831)
2025-01-30 09:51:43 -08:00
win-import-call-optimization.ll
[clang][llvm][aarch64][win] Add a clang flag and module attribute for import call optimization, and remove LLVM flag (#122831)
2025-01-30 09:51:43 -08:00
win-loader-replaceable-function.ll
[aarch64][x86][win] Add compiler support for MSVC's /funcoverride flag (Windows kernel loader replaceable functions) (#125320)
2025-05-09 14:56:38 -07:00
win-realign.ll
…
win-sve.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
win-tls.ll
…
wincfi-minimal-seh-prologue.ll
Aarch64: Emit a minimal SEH prologue when needed (#158173)
2025-09-30 08:16:54 -07:00
wincfi-missing-seh-directives.ll
[AArch64][DebugInfo]Add Target hooks for InstrRef on AArch64 (#165953)
2025-11-14 10:36:47 -08:00
windows-extern-weak.ll
…
windows-SEH-support.ll
…
windows-trap.ll
…
wineh1.mir
…
wineh2.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
wineh3.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
wineh4.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
wineh5.mir
[AArch64][test] Remove unsafe-fp-math uses (NFC) (#164606)
2025-10-22 12:14:21 +00:00
wineh6.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
wineh7.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
wineh8.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
wineh9.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
wineh_shrinkwrap.mir
[AArch64][test] Remove unsafe-fp-math uses (NFC) (#164606)
2025-10-22 12:14:21 +00:00
wineh-align-stack.ll
…
wineh-aligned-stack-obj.ll
[win][aarch64] Place catch objects in the fixed object area (#147421)
2025-07-08 12:44:09 -07:00
wineh-bti-funclet.ll
[AArch64][BTI] Add BTI at EH entries. (#155308)
2025-08-30 10:56:03 +01:00
wineh-bti.ll
[AArch64][BTI] Add BTI at EH entries. (#155308)
2025-08-30 10:56:03 +01:00
wineh-catchret-label-generation.ll
[MC] Don't print () around $ names
2025-03-30 16:38:16 -07:00
wineh-frame0.mir
…
wineh-frame1.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
wineh-frame2.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
wineh-frame3.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
wineh-frame4.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
wineh-frame5.mir
[AArch64][test] Remove unsafe-fp-math uses (NFC) (#164606)
2025-10-22 12:14:21 +00:00
wineh-frame6.mir
[AArch64][test] Remove unsafe-fp-math uses (NFC) (#164606)
2025-10-22 12:14:21 +00:00
wineh-frame7.mir
[AArch64][test] Remove unsafe-fp-math uses (NFC) (#164606)
2025-10-22 12:14:21 +00:00
wineh-frame8.mir
[AArch64][test] Remove unsafe-fp-math uses (NFC) (#164606)
2025-10-22 12:14:21 +00:00
wineh-frame-predecrement.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
wineh-frame-scavenge.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
wineh-mingw.ll
…
wineh-pac.ll
…
wineh-save-lrpair1.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
wineh-save-lrpair2.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
wineh-save-lrpair3.mir
[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)
2025-08-12 11:23:05 -07:00
wineh-try-catch-cbz.ll
…
wineh-try-catch-nobase.ll
…
wineh-try-catch-realign.ll
…
wineh-try-catch-vla.ll
…
wineh-try-catch.ll
[win][aarch64] Place catch objects in the fixed object area (#147421)
2025-07-08 12:44:09 -07:00
wineh-unwindhelp-via-fp.ll
…
wrong_debug_loc_after_regalloc.ll
…
wrong-callee-save-size-after-livedebugvariables.mir
…
xar.ll
[AArch64] Extend usage of XAR instruction for fixed-length operations (#139460)
2025-06-12 10:54:01 +05:30
xbfiz.ll
Reapply "[AArch64] Combine and and lsl into ubfiz" (#123356) (#124576)
2025-01-28 11:27:34 +00:00
xor-min-max.ll
[DAGCombiner] add fold (xor (smin(x, C), C)) and fold (xor (smax(x, C), C)) (#155141)
2025-09-16 15:30:57 +00:00
xor.ll
…
xray-attribute-instrumentation.ll
…
xray-custom-log.ll
[DebugInfo][DWARF] Don't emit bogus DW_AT_call_target for complex calls (#151378)
2025-08-05 13:25:01 -07:00
xray-omit-function-index.ll
…
xray-partial-instrumentation-skip-entry.ll
…
xray-partial-instrumentation-skip-exit.ll
…
xray-tail-call-sled.ll
[XRay] Fix tail call sleds for AArch64 (#141403)
2025-05-29 21:54:15 -07:00
xtn.ll
[AArch64][GlobalISel] Ensure we have a insert-subreg v4i32 GPR pattern (#142724)
2025-06-06 17:44:33 +01:00
zero-call-used-regs.ll
[AArch64] fix trampoline implementation: use X15 (#126743)
2025-06-11 21:49:01 -04:00
zero-reg.ll
…
zeroing-forms-abs-neg.ll
[NFC][LLVM][SVE2p2] Add RUN lines to fully verify codegen predicates.
2025-06-24 15:48:16 +00:00
zeroing-forms-counts-not.ll
[NFC][LLVM][SVE2p2] Add RUN lines to fully verify codegen predicates.
2025-06-24 15:48:16 +00:00
zeroing-forms-ext.ll
[NFC][LLVM][SVE2p2] Add RUN lines to fully verify codegen predicates.
2025-06-24 15:48:16 +00:00
zeroing-forms-fcvt-bfcvt.ll
[NFC][LLVM][SVE2p2] Add RUN lines to fully verify codegen predicates.
2025-06-24 15:48:16 +00:00
zeroing-forms-fcvtlt-fcvtx.ll
[NFC][LLVM][SVE2p2] Add RUN lines to fully verify codegen predicates.
2025-06-24 15:48:16 +00:00
zeroing-forms-fcvtzsu.ll
[NFC][LLVM][SVE2p2] Add RUN lines to fully verify codegen predicates.
2025-06-24 15:48:16 +00:00
zeroing-forms-flogb.ll
[NFC][LLVM][SVE2p2] Add RUN lines to fully verify codegen predicates.
2025-06-24 15:48:16 +00:00
zeroing-forms-frint-frecpx-fsqrt.ll
[NFC][LLVM][SVE2p2] Add RUN lines to fully verify codegen predicates.
2025-06-24 15:48:16 +00:00
zeroing-forms-rev.ll
[NFC][LLVM][SVE2p2] Add RUN lines to fully verify codegen predicates.
2025-06-24 15:48:16 +00:00
zeroing-forms-urecpe-ursqrte-sqabs-sqneg.ll
[NFC][LLVM][SVE2p2] Add RUN lines to fully verify codegen predicates.
2025-06-24 15:48:16 +00:00
zeroing-forms-uscvtf.ll
[NFC][LLVM][SVE2p2] Add RUN lines to fully verify codegen predicates.
2025-06-24 15:48:16 +00:00
zext-logic-shift-load.ll
…
zext-reg-coalesce.mir
…
zext-shuffle.ll
[DAG] visitTRUNCATE - more aggressively fold trunc(add(x,x)) -> add(trunc(x),trunc(x)) (#164227)
2025-10-21 10:17:57 +00:00
zext-to-tbl.ll
Reland "[RegAlloc] Fix the terminal rule check for interfere with DstReg (#168661)" (#169219)
2025-11-24 09:27:25 +08:00
zext.ll
[AArch64][GlobalISel] Ensure we have a insert-subreg v4i32 GPR pattern (#142724)
2025-06-06 17:44:33 +01:00