AZero13 e5baf073cb

[AArch64] Generalize CSEL a, b, cc, SUBS(SUB(x,y), 0) -> CSEL a, b, cc, SUBS(x,y) transform to peephole (#167527) ...

This transform should have never been done in ISel in the first place.
It should have been done in peephole, but a few cases were missing.

2025-11-13 13:36:14 +00:00

..

Atomics

[PHIElimination] Revert #131837 #146320 #146337 (#146850)

2025-07-03 07:48:08 -04:00

GlobalISel

[GlobalISel] Add G_EXTRACT_VECTOR_ELT for computeKnownBits (#164825)

2025-11-05 23:26:22 +00:00

2s-complement-asm.ll

…

16bit-float-promotion-with-nofp.ll

[AArch64] Support MI and PL (#150314)

2025-08-11 07:41:38 +01:00

128bit_load_store.ll

…

a55-fuse-address.mir

…

a57-csel.ll

…

aarch64_be-global-const.ll

…

aarch64_f16_be.ll

…

aarch64_fnmadd.ll

…

aarch64_tree_tests.ll

…

aarch64_win64cc_vararg.ll

…

aarch64-2014-08-11-MachineCombinerCrash.ll

[AArch64][test] Remove unsafe-fp-math uses (NFC) (#164606)

2025-10-22 12:14:21 +00:00

aarch64-2014-12-02-combine-soften.ll

…

aarch64-a57-fp-load-balancing.ll

[AArch64][test] Remove unsafe-fp-math uses (NFC) (#164606)

2025-10-22 12:14:21 +00:00

aarch64-address-type-promotion-assertion.ll

…

aarch64-address-type-promotion.ll

…

aarch64-addv.ll

[AArch64] Fold uaddv(a) to a if the all lanes except the 0th are zeros (#159086)

2025-09-17 17:20:41 +08:00

aarch64-avoid-illegal-extract-subvector.ll

…

aarch64-be-bv.ll

…

aarch64-bf16-dotprod-intrinsics.ll

…

aarch64-bf16-ldst-intrinsics.ll

…

aarch64-bif-gen.ll

Revert "[AArch64][GlobalISel] Expand 64bit extracts to 128bit to allow more patterns (#142904)"

2025-06-11 08:32:55 +01:00

aarch64-bit-gen.ll

Revert "[AArch64][GlobalISel] Expand 64bit extracts to 128bit to allow more patterns (#142904)"

2025-06-11 08:32:55 +01:00

aarch64-bitwisenot-fold.ll

[TargetLowering] Fold (a | b) ==/!= b -> (a & ~b) ==/!= 0 when and-not exists (#145368)

2025-06-27 14:47:52 +01:00

aarch64-bswap-ext.ll

…

aarch64-checkMergeStoreCandidatesForDependencies.ll

…

aarch64-codegen-prepare-atp.ll

…

aarch64-combine-add-sub-mul.ll

[AArch64][SVE] Avoid movprfx by reusing register for _UNDEF pseudos. (#166926)

2025-11-10 16:33:59 +00:00

aarch64-combine-add-zext.ll

…

aarch64-combine-fmul-fsub.mir

[AArch64] Remove UnsafeFPMath (#150876)

2025-07-29 12:41:09 +08:00

aarch64-combine-gather-lanes-limit-size.mir

[AArch64][MachineCombiner] Combine sequences of gather patterns (#152979)

2025-08-18 15:10:59 +03:00

aarch64-combine-gather-lanes-with-call.mir

[AArch64][MachineCombiner] Combine sequences of gather patterns (#152979)

2025-08-18 15:10:59 +03:00

aarch64-combine-gather-lanes.mir

[AArch64][MachineCombiner] Combine sequences of gather patterns (#152979)

2025-08-18 15:10:59 +03:00

aarch64-DAGCombine-findBetterNeighborChains-crash.ll

…

aarch64-dup-dot-crash.ll

…

aarch64-dup-ext-crash.ll

…

aarch64-dup-ext-scalable.ll

…

aarch64-dup-ext-vectortype-crash.ll

…

aarch64-dup-ext.ll

[GlobalISel] Add computeNumSignBits for ASHR (#139503)

2025-07-21 10:23:26 +01:00

aarch64-dup-extract-scalable.ll

…

aarch64-dynamic-stack-layout.ll

[AArch64][test] Remove unsafe-fp-math uses (NFC) (#164606)

2025-10-22 12:14:21 +00:00

aarch64-fastcc-stackup.ll

…

aarch64-fix-cortex-a53-835769.ll

[AArch64][test] Remove unsafe-fp-math uses (NFC) (#164606)

2025-10-22 12:14:21 +00:00

aarch64-fixup-statepoint-regs-crash.ll

…

aarch64-fold-lslfast.ll

…

aarch64-gep-opt.ll

[SeparateConstOffsetFromGEP] Remove support for arithmetic lowering (#151477)

2025-08-01 09:35:48 +02:00

aarch64-histcnt-dag-combine-hang.ll

[AArch64][SVE] Fix hang in VECTOR_HISTOGRAM DAG combine (#152539)

2025-08-08 09:59:24 +01:00

aarch64-icmp-opt.ll

…

aarch64-insert-subvector-undef.ll

…

aarch64-interleaved-access-w-undef.ll

…

aarch64-interleaved-ld-combine.ll

…

aarch64-isel-csinc-type.ll

[AArch64][GlobalISel] Add extra GISel test coverage. NFC

2025-07-30 10:53:47 +01:00

aarch64-isel-csinc.ll

…

aarch64-known-bits-hadd.ll

[AArch64] Regenerate and update a number of check lines. NFC

2025-09-18 09:54:47 +01:00

aarch64-large-stack-spbump.mir

[CodeGen][NewPM] Port "PrologEpilogInserter" to NPM (#130550)

2025-04-29 13:13:45 +05:30

aarch64-ldst-modified-baseReg.mir

…

aarch64-ldst-no-premature-sp-pop.mir

[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)

2025-08-12 11:23:05 -07:00

aarch64-ldst-opt-instr-ref.mir

[InstrRef] Preserve debug instr num in aarch64-ldst-opt. (#136009)

2025-04-30 14:17:22 -07:00

aarch64-ldst-subsuperReg-no-ldp.mir

…

aarch64-load-ext.ll

…

aarch64-loop-gep-opt.ll

…

aarch64-lsr-bfi.ll

…

aarch64-matmul-fp16.ll

[AArch64][llvm] Add support for Neon vmmlaq_{f16,f32}_mf8_fpm intrinsics (#165431)

2025-11-07 15:24:13 +00:00

aarch64-matmul-fp32.ll

[AArch64][llvm] Add support for Neon vmmlaq_{f16,f32}_mf8_fpm intrinsics (#165431)

2025-11-07 15:24:13 +00:00

aarch64-matmul.ll

[AArch64][GlobalISel] Added usdot intrinsic support (#162615)

2025-10-15 19:16:54 +01:00

aarch64-matrix-umull-smull.ll

[AArch64] Sink mismatching wide extends to mul (#164986)

2025-11-03 10:14:23 +00:00

aarch64-minmaxv.ll

…

aarch64-mixed-ptr-sizes.ll

…

aarch64-mops-consecutive.ll

…

aarch64-mops-mte.ll

…

aarch64-mops.ll

[GlobalISel] Allow Legalizer to lower volatile memcpy family. (#145997)

2025-07-22 00:42:23 -07:00

aarch64-mov-debug-locs.mir

[AArch64][test] Remove unsafe-fp-math uses (NFC) (#164606)

2025-10-22 12:14:21 +00:00

aarch64-mull-masks.ll

[GISel][AArch64] Allow PatLeafs to be imported in GISel which were previously causing warnings (#140935)

2025-06-09 09:02:56 +01:00

aarch64-mulv.ll

[AArch64] Regenerate and update a number of check lines. NFC

2025-09-18 09:54:47 +01:00

aarch64-named-reg-w18.ll

…

aarch64-named-reg-x18.ll

…

aarch64-neon-faminmax.ll

…

aarch64-neon-vector-insert-uaddlv.ll

…

aarch64-p2align-max-bytes-neoverse.ll

…

aarch64-p2align-max-bytes.ll

…

aarch64-pmull2.ll

…

aarch64-post-coalescer.mir

[AArch64PostCoalescer] Propagate undef flag after replacing (#163119)

2025-10-15 10:15:44 +01:00

aarch64-reassociate-accumulators-sve.ll

[AArch64][NFC] Rewrite aarch64-reassociate-accumulators tests (#142625)

2025-06-04 08:56:21 +01:00

aarch64-reassociate-accumulators.ll

AArch64: Convert tests to opaque pointers (#167442)

2025-11-11 02:52:45 +00:00

aarch64-saturating-arithmetic.ll

…

aarch64-scalarize-vec-load-ext.ll

…

aarch64-sched-store.ll

…

aarch64-signedreturnaddress.ll

…

aarch64-smax-constantfold.ll

…

aarch64-sme2-asm.ll

[AArch64] Observe Z-reg inline asm clobbers without SVE (#143742)

2025-06-13 09:07:09 +01:00

aarch64-sme-stubs.ll

Reland "[AArch64][SME] Split SMECallAttrs out of SMEAttrs" (#138671)

2025-05-15 08:37:08 +01:00

aarch64-sme-za-call-lowering.ll

[AArch64][SME] Rework VG CFI information for streaming-mode changes (#152283)

2025-08-20 14:06:12 +01:00

aarch64-smov-gen.ll

…

aarch64-smull.ll

[AArch64][GlobalISel] Added pmull/pmull64 intrinsic support (#165740)

2025-11-05 16:53:45 +00:00

aarch64-split-logic-bitmask-immediate.ll

[AArch64] Allow splitting bitmasks for EOR/ORR. (#150394)

2025-08-07 10:42:30 +01:00

aarch64-stp-cluster.ll

…

aarch64-sve2-faminmax.ll

…

aarch64-sve-and-combine-crash.ll

…

aarch64-sve-asm-negative.ll

…

aarch64-sve-asm.ll

…

aarch64-sve-fill-spill-pair.ll

…

aarch64-sve-ldst-one.ll

…

aarch64-swp-ws-live-intervals-1.mir

…

aarch64-swp-ws-live-intervals.mir

…

aarch64-sysreg128.ll

…

aarch64-tail-dup-size.ll

[AArch64] Enable GlobalMerge on externals (#158592)

2025-09-17 17:49:23 +01:00

aarch64-tbz.ll

…

aarch64-tls-flags.ll

…

aarch64-tryBitfieldInsertOpFromOr-crash.ll

…

aarch64-unroll-and-jam.ll

…

aarch64-uzp1-combine.ll

…

aarch64-v1f32-arg.ll

…

aarch64-vcvtfp2fxs-combine.ll

…

aarch64-vector-pcs.mir

…

aarch64-vectorcombine-invalid-extract-index-crash.ll

…

aarch64-vuzp.ll

…

aarch64-wide-mul.ll

[AArch64][GlobalISel] Add push_mul_through_s/zext (#141551)

2025-07-31 07:38:11 +01:00

aarch64-wide-shuffle.ll

…

aarch64-za-clobber.ll

…

aarch64st1.mir

[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)

2025-08-12 11:23:05 -07:00

aarch-multipart.ll

…

abd-combine.ll

[DAG] Fold trunc(abdu(x,y)) and trunc(abds(x,y)) if they have sufficient leading zero/sign bits (#151471)

2025-08-08 10:43:14 +01:00

abds-neg.ll

[AArch64] Combine ADDS and SUBS nodes with the non-flag setting versions (#157563)

2025-09-13 11:03:46 +01:00

abds.ll

[AArch64] Fold uaddv(a) to a if the all lanes except the 0th are zeros (#159086)

2025-09-17 17:20:41 +08:00

abdu-neg.ll

[TargetLowering][ExpandABD] Prefer selects over usubo if we do the same for ucmp (#159889)

2025-09-25 10:33:05 +09:00

abdu.ll

[TargetLowering][ExpandABD] Prefer selects over usubo if we do the same for ucmp (#159889)

2025-09-25 10:33:05 +09:00

abs.ll

Revert "[AArch64][GlobalISel] Expand 64bit extracts to 128bit to allow more patterns (#142904)"

2025-06-11 08:32:55 +01:00

active_lane_mask.ll

[LLVM][CodeGen] Ensure optimizeIncrementingWhile only accepts scalable vectors. (#148351)

2025-07-14 12:03:51 +01:00

adc.ll

[AArch64][GlobalISel] Add a constant funnel shift post-legalizer combine. (#151912)

2025-10-29 07:47:41 +00:00

add-extract.ll

[AArch64][GlobalISel] Add extra GISel test coverage. NFC

2025-07-30 10:53:47 +01:00

add-i256.ll

…

add-negative.ll

…

add.ll

[GlobalISel] Widen vector loads from aligned ptrs (#144309)

2025-06-21 07:42:54 +01:00

addcarry-crash.ll

[AArch64][GlobalISel] Add test coverage for more adc / ands instructions. NFC

2025-07-31 07:35:13 +01:00

addg_subg.mir

…

addimm-mulimm.ll

…

addp-shuffle.ll

…

addr-of-ret-addr.ll

…

addrsig-macho.ll

…

adds_cmn.ll

[AArch64] Support commuted operands in performFlagSettingCombine (#162496)

2025-10-13 13:09:28 +01:00

addsub_ext.ll

…

addsub-24bit-imm.mir

…

addsub-constant-folding.ll

…

addsub-shifted-reg-cheap-as-move.ll

…

addsub-shifted.ll

…

addsub.ll

[AArch64][GlobalISel] Add extra GISel test coverage. NFC

2025-07-30 10:53:47 +01:00

aes.ll

…

alias_mask_nosve.ll

[Intrinsics][AArch64] Add intrinsics for masking off aliasing vector lanes (#117007)

2025-09-02 15:35:15 +01:00

alias_mask_scalable_nosve2.ll

[Intrinsics][AArch64] Add intrinsics for masking off aliasing vector lanes (#117007)

2025-09-02 15:35:15 +01:00

alias_mask_scalable.ll

[Intrinsics][AArch64] Add intrinsics for masking off aliasing vector lanes (#117007)

2025-09-02 15:35:15 +01:00

alias_mask.ll

[AArch64] Generalize CSEL a, b, cc, SUBS(SUB(x,y), 0) -> CSEL a, b, cc, SUBS(x,y) transform to peephole (#167527)

2025-11-13 13:36:14 +00:00

align-down.ll

…

alloca-load-store-scalable-array.ll

[AArch64][SVE] Tweak how SVE CFI expressions are emitted (#151677)

2025-08-06 09:21:57 +01:00

alloca-load-store-scalable-struct.ll

[AArch64][SVE] Tweak how SVE CFI expressions are emitted (#151677)

2025-08-06 09:21:57 +01:00

alloca-oversized.ll

[DataLayout] Specialize the getTypeAllocSize() implementation (#156687)

2025-09-04 09:27:33 +02:00

alloca.ll

…

allow-check.ll

…

ampere1-sched-add.mir

…

analyze-branch.ll

…

analyzecmp.ll

…

and-mask-removal.ll

…

and-mask-variable.ll

[AArch64] shouldFoldMaskToVariableShiftPair should be true for scalars up to the biggest legal type (#158069)

2025-09-30 17:48:47 +01:00

and-sink.ll

…

andandshift.ll

…

andcompare.ll

[AArch64] Update some tests to use a more common check prefix. NFC

2025-07-28 08:26:48 +01:00

andorbrcompare.ll

[AArch64] Update some tests to use a more common check prefix. NFC

2025-07-28 08:26:48 +01:00

andorxor.ll

[GlobalISel] Widen vector loads from aligned ptrs (#144309)

2025-06-21 07:42:54 +01:00

apple-latest-cpu.ll

…

apply-disjoint-flag-in-dagcombine.ll

…

arg_promotion.ll

…

argument-blocks-array-of-struct.ll

MachineScheduler: Improve instruction clustering (#137784)

2025-06-05 15:28:04 +08:00

argument-blocks.ll

…

arithmetic_fence.ll

…

arm64_32-addrs.ll

…

arm64_32-atomics.ll

…

arm64_32-fastisel.ll

…

arm64_32-frame-pointers.ll

…

arm64_32-gep-sink.ll

…

arm64_32-memcpy.ll

…

arm64_32-neon.ll

[AArch64] arm64_32-neon.ll - regenerate test checks

2025-07-07 18:31:11 +01:00

arm64_32-null.ll

…

arm64_32-pointer-extend.ll

…

arm64_32-stack-pointers.ll

…

arm64_32-tls.ll

…

arm64_32-va.ll

…

arm64_32.ll

…

arm64-2011-03-09-CPSRSpill.ll

…

arm64-2011-03-17-AsmPrinterCrash.ll

…

arm64-2011-03-21-Unaligned-Frame-Index.ll

…

arm64-2011-04-21-CPSRBug.ll

…

arm64-2011-10-18-LdStOptBug.ll

…

arm64-2012-01-11-ComparisonDAGCrash.ll

…

arm64-2012-05-07-DAGCombineVectorExtract.ll

…

arm64-2012-05-07-MemcpyAlignBug.ll

…

arm64-2012-05-09-LOADgot-bug.ll

…

arm64-2012-05-22-LdStOptBug.ll

…

arm64-2012-06-06-FPToUI.ll

…

arm64-2012-07-11-InstrEmitterBug.ll

…

arm64-2013-01-13-ffast-fcmp.ll

…

arm64-2013-01-23-frem-crash.ll

…

arm64-2013-01-23-sext-crash.ll

…

arm64-2013-02-12-shufv8i8.ll

…

arm64-aapcs-be.ll

…

arm64-aapcs.ll

…

arm64-abi_align.ll

…

arm64-abi-hfa-args.ll

…

arm64-abi-varargs.ll

…

arm64-abi.ll

…

arm64-addp.ll

…

arm64-addr-mode-folding.ll

…

arm64-addr-type-promotion.ll

…

arm64-addrmode.ll

…

arm64-AdvSIMD-Scalar.ll

[AArch64] Lower zero cycle FPR zeroing (#156261)

2025-09-10 08:32:51 +03:00

arm64-alloc-no-stack-realign.ll

…

arm64-alloca-frame-pointer-offset.ll

…

arm64-andCmpBrToTBZ.ll

…

arm64-ands-bad-peephole.ll

…

arm64-AnInfiniteLoopInDAGCombine.ll

…

arm64-anyregcc-crash.ll

…

arm64-anyregcc.ll

…

arm64-arith-saturating.ll

[AArch64] Prefer using DUP instead of INS where possible (#138549)

2025-05-15 10:31:09 +02:00

arm64-arith.ll

…

arm64-arm64-dead-def-elimination-flag.ll

…

arm64-assert-zext-sext.ll

…

arm64-atomic-128.ll

…

arm64-atomic.ll

…

arm64-bcc.ll

…

arm64-big-endian-bitconverts.ll

…

arm64-big-endian-eh.ll

…

arm64-big-endian-varargs.ll

…

arm64-big-endian-vector-callee.ll

…

arm64-big-endian-vector-caller.ll

…

arm64-big-imm-offsets.ll

…

arm64-big-stack.ll

…

arm64-bitfield-extract.ll

[AArch64] arm64-bitfield-extract.ll - regenerate test checks

2025-07-07 16:04:57 +01:00

arm64-blockaddress.ll

…

arm64-break.ll

…

arm64-build-vector.ll

…

arm64-builtins-linux.ll

…

arm64-call-tailcalls.ll

…

arm64-cast-opt.ll

…

arm64-ccmp-heuristics.ll

…

arm64-ccmp.ll

[SimplifyCFG] Eliminate dead edges of switches according to the domain of conditions (#165748)

2025-11-04 20:55:33 +08:00

arm64-clrsb.ll

…

arm64-coalesce-ext.ll

…

arm64-coalescing-MOVi32imm.ll

…

arm64-code-model-large-darwin.ll

…

arm64-codegen-prepare-extload.ll

…

arm64-collect-loh-garbage-crash.ll

…

arm64-collect-loh-str.ll

…

arm64-collect-loh.ll

…

arm64-complex-ret.ll

…

arm64-const-addr.ll

…

arm64-constrained-fcmp-no-nans-opt.ll

…

arm64-convert-v4f64.ll

[AArch64] Scalarize extracted vector loads. (#159714)

2025-09-23 07:18:46 +00:00

arm64-copy-phys-zero-reg.mir

[AArch64] Widen GPR32 zero cycle zeroing (#164244)

2025-10-25 09:36:56 +03:00

arm64-copy-tuple.ll

…

arm64-crc32.ll

…

arm64-crypto.ll

[AArch64][GlobalISel] Add regbank information to other sha1 intrinsics.

2025-09-07 13:50:25 +01:00

arm64-cse.ll

…

arm64-csel.ll

[AArch64] Check for negative numbers when adjusting icmps (#141151)

2025-05-30 15:22:54 +01:00

arm64-csldst-mmo.ll

…

arm64-custom-call-saved-reg.ll

…

arm64-cvt-simd-fptoi.ll

[AArch64][GlobalISel] SIMD fpcvt codegen for fptoi(_sat) (#160831)

2025-10-24 11:53:34 +01:00

arm64-cvt-simd-intrinsics.ll

[AArch64][GlobalISel] Add codegen for simd fpcvt intrinsics (#157680)

2025-09-25 14:39:30 +01:00

arm64-cvt.ll

…

arm64-dagcombiner-convergence.ll

…

arm64-dagcombiner-dead-indexed-load.ll

…

arm64-dagcombiner-load-slicing.ll

MachineScheduler: Improve instruction clustering (#137784)

2025-06-05 15:28:04 +08:00

arm64-darwin-cc.ll

…

arm64-dead-def-frame-index.ll

…

arm64-dead-register-def-bug.ll

…

arm64-detect-vec-redux.ll

[AArch64][test] Remove unsafe-fp-math uses (NFC) (#164606)

2025-10-22 12:14:21 +00:00

arm64-dup.ll

[AArch64][GlobalISel] Combine G_UNMERGE(G_DUPLANE16) -> G_DUPLANE16 (#142731)

2025-06-09 20:57:45 +01:00

arm64-early-ifcvt.ll

[AArch64] Convert CSEL(X, 1) into CSINC(X, XZR) in early-ifcvt (#162993)

2025-10-20 16:14:15 +02:00

arm64-elf-calls.ll

…

arm64-elf-constpool.ll

…

arm64-EXT-undef-mask.ll

…

arm64-ext.ll

[AArch64] Treat single-vector ext as legal shuffle masks. (#151909)

2025-08-06 20:54:11 +01:00

arm64-extend-int-to-fp.ll

…

arm64-extend.ll

…

arm64-extload-knownzero.ll

…

arm64-extract_subvector.ll

…

arm64-extract-insert-varidx.ll

[GISel][AArch64] Allow PatLeafs to be imported in GISel which were previously causing warnings (#140935)

2025-06-09 09:02:56 +01:00

arm64-extract.ll

…

arm64-fast-isel-addr-offset.ll

…

arm64-fast-isel-alloca.ll

…

arm64-fast-isel-br.ll

…

arm64-fast-isel-call.ll

…

arm64-fast-isel-conversion-fallback.ll

[AArch64] Use pattern to select bf16 fpextend (#137212)

2025-05-02 12:55:18 +01:00

arm64-fast-isel-conversion.ll

…

arm64-fast-isel-crc32.ll

…

arm64-fast-isel-fcmp.ll

…

arm64-fast-isel-gv.ll

…

arm64-fast-isel-icmp.ll

…

arm64-fast-isel-indirectbr.ll

…

arm64-fast-isel-intrinsic.ll

…

arm64-fast-isel-materialize.ll

…

arm64-fast-isel-noconvert.ll

…

arm64-fast-isel-rem.ll

…

arm64-fast-isel-ret.ll

…

arm64-fast-isel-store.ll

…

arm64-fast-isel-tag.ll

…

arm64-fast-isel.ll

…

arm64-fastcc-tailcall.ll

…

arm64-fastisel-gep-promote-before-add.ll

…

arm64-fcmp-opt.ll

…

arm64-fcopysign.ll

…

arm64-fixed-point-scalar-cvt-dagcombine.ll

…

arm64-fma-combine-with-fpfusion.ll

[AArch64][test] Remove unsafe-fp-math uses (NFC) (#164606)

2025-10-22 12:14:21 +00:00

arm64-fma-combines.ll

[CodeGen] Remove -enable-unsafe-fp-math option (#164559)

2025-10-22 15:40:31 +08:00

arm64-fmadd.ll

…

arm64-fmax-safe.ll

[ValueTracking] Do not use FMF from fcmp (#142266)

2025-06-02 18:21:14 +08:00

arm64-fmax.ll

[AArch64] Support MI and PL (#150314)

2025-08-11 07:41:38 +01:00

arm64-fminv.ll

…

arm64-fml-combines.ll

[AArch64] Remove UnsafeFPMath (#150876)

2025-07-29 12:41:09 +08:00

arm64-fmuladd.ll

…

arm64-fold-address.ll

…

arm64-fold-lshr.ll

[LLVM][CodeGen][SVE] Don't combine shifts at the expense of addressing modes. (#149873)

2025-07-24 10:54:48 +01:00

arm64-fold-lsl.ll

…

arm64-fp128-folding.ll

…

arm64-fp128.ll

[AArch64] Support MI and PL (#150314)

2025-08-11 07:41:38 +01:00

arm64-fp-contract-zero.ll

[AArch64] Regenerate and update a number of check lines. NFC

2025-09-18 09:54:47 +01:00

arm64-fp-imm-size.ll

…

arm64-fp-imm.ll

…

arm64-fp.ll

…

arm64-fpcr.ll

…

arm64-fpenv.ll

…

arm64-frame-index.ll

…

arm64-global-address.ll

…

arm64-hello.ll

…

arm64-hlt.ll

…

arm64-homogeneous-prolog-epilog-bad-outline.mir

…

arm64-homogeneous-prolog-epilog-frame-tail.ll

…

arm64-homogeneous-prolog-epilog-no-helper.ll

…

arm64-homogeneous-prolog-epilog-odd-csrs.ll

…

arm64-homogeneous-prolog-epilog.ll

…

arm64-i16-subreg-extract.ll

[AArch64] Scalarize extracted vector loads. (#159714)

2025-09-23 07:18:46 +00:00

arm64-icmp-opt.ll

…

arm64-indexed-memory.ll

[AArch64][GlobalISel] Add G_FPEXT(G_FCONSTANT) folding (#162829)

2025-10-10 12:17:06 +00:00

arm64-indexed-vector-ldst-2.ll

[AArch64][test] Remove unsafe-fp-math uses (NFC) (#164606)

2025-10-22 12:14:21 +00:00

arm64-indexed-vector-ldst.ll

[AArch64] Do not generate ld1IndexPost when inserting into lane 0 of a zero vector (#145723)

2025-06-27 12:47:16 +01:00

arm64-inline-asm-error-I.ll

…

arm64-inline-asm-error-J.ll

…

arm64-inline-asm-error-K.ll

…

arm64-inline-asm-error-L.ll

…

arm64-inline-asm-error-M.ll

…

arm64-inline-asm-error-N.ll

…

arm64-inline-asm-zero-reg-error.ll

…

arm64-inline-asm.ll

…

arm64-instruction-mix-remarks.ll

…

arm64-isel-or.ll

…

arm64-join-reserved.ll

…

arm64-jumptable.ll

…

arm64-large-frame.ll

…

arm64-ld1.ll

[LLVM][CodeGen][AArch64] Fix global-isel for LD1R. (#164418)

2025-10-22 12:22:49 +01:00

arm64-ld-from-st.ll

…

arm64-ldp-aa.ll

…

arm64-ldp-cluster.ll

[AArch64] Scalarize extracted vector loads. (#159714)

2025-09-23 07:18:46 +00:00

arm64-ldp.ll

…

arm64-ldst-unscaled-pre-post.mir

…

arm64-ldur.ll

…

arm64-ldxr-stxr.ll

…

arm64-leaf.ll

…

arm64-long-shift.ll

…

arm64-memcpy-inline.ll

…

arm64-memset-inline.ll

…

arm64-memset-to-bzero-pgso.ll

…

arm64-memset-to-bzero.ll

…

arm64-misaligned-memcpy-inline.ll

…

arm64-misched-basic-A53.ll

[AArch64][test] Remove unsafe-fp-math uses (NFC) (#164606)

2025-10-22 12:14:21 +00:00

arm64-misched-basic-A57.ll

[AArch64][test] Remove unsafe-fp-math uses (NFC) (#164606)

2025-10-22 12:14:21 +00:00

arm64-misched-forwarding-A53.ll

…

arm64-misched-memdep-bug.ll

…

arm64-misched-multimmo.ll

…

arm64-movi.ll

…

arm64-mte.ll

…

arm64-mul.ll

…

arm64-named-reg-alloc.ll

CodeGen: Emit error if getRegisterByName fails (#145194)

2025-06-23 16:33:35 +09:00

arm64-named-reg-notareg.ll

CodeGen: Emit error if getRegisterByName fails (#145194)

2025-06-23 16:33:35 +09:00

arm64-narrow-st-merge.ll

…

arm64-neg.ll

…

arm64-neon-2velem-high.ll

…

arm64-neon-2velem.ll

[AArch64][GlobalISel] Combine G_UNMERGE(G_DUPLANE16) -> G_DUPLANE16 (#142731)

2025-06-09 20:57:45 +01:00

arm64-neon-3vdiff.ll

[AArch64][GlobalISel] Added pmull/pmull64 intrinsic support (#165740)

2025-11-05 16:53:45 +00:00

arm64-neon-aba-abd.ll

[DAG] Fold trunc(abdu(x,y)) and trunc(abds(x,y)) if they have sufficient leading zero/sign bits (#151471)

2025-08-08 10:43:14 +01:00

arm64-neon-across.ll

…

arm64-neon-add-pairwise.ll

[AArch64][GlobalISel] Prefer DUPLANE to REV and other shuffles (#142725)

2025-06-09 07:47:17 +01:00

arm64-neon-add-sub.ll

…

arm64-neon-copy.ll

[AArch64][GlobalISel] SIMD fpcvt codegen for fptoi(_sat) (#160831)

2025-10-24 11:53:34 +01:00

arm64-neon-copyPhysReg-tuple.ll

…

arm64-neon-mul-div-cte.ll

[GlobaISel] Allow expanding of sdiv -> mul by constant (#146504)

2025-07-14 15:01:12 +01:00

arm64-neon-mul-div.ll

[AArch64] Mark [usp]mull, [us]addl, [us]abdl as commutative (#152158)

2025-08-08 09:35:28 +01:00

arm64-neon-scalar-by-elem-mul.ll

…

arm64-neon-select_cc.ll

…

arm64-neon-simd-ldst-one.ll

Revert "[AArch64][GlobalISel] Expand 64bit extracts to 128bit to allow more patterns (#142904)"

2025-06-11 08:32:55 +01:00

arm64-neon-simd-shift.ll

…

arm64-neon-simd-vget.ll

…

arm64-neon-st-lane-aa.ll

…

arm64-neon-v1i1-setcc.ll

[AArch64] Spare N2I roundtrip when splatting float comparison (#141806)

2025-06-06 19:07:12 +03:00

arm64-neon-v8.1a.ll

Revert "[AArch64][GlobalISel] Expand 64bit extracts to 128bit to allow more patterns (#142904)"

2025-06-11 08:32:55 +01:00

arm64-neon-vector-list-spill.ll

…

arm64-neon-vector-shuffle-extract.ll

…

arm64-non-pow2-ldst.ll

…

arm64-nvcast.ll

…

arm64-opt-remarks-lazy-bfi.ll

…

arm64-patchpoint-scratch-regs.ll

…

arm64-patchpoint.ll

…

arm64-pic-local-symbol.ll

…

arm64-platform-reg.ll

…

arm64-popcnt.ll

…

arm64-prefetch-addrmode.ll

…

arm64-prefetch-new.ll

…

arm64-prefetch.ll

…

arm64-preserve-all.ll

Revert "[GlobalISel] Diagnose inline assembly constraint lowering errors (#135782)"

2025-05-07 14:50:45 +02:00

arm64-preserve-most.ll

Revert "[GlobalISel] Diagnose inline assembly constraint lowering errors (#135782)"

2025-05-07 14:50:45 +02:00

arm64-promote-const-complex-initializers.ll

…

arm64-promote-const.ll

…

arm64-raddhn-combine.ll

…

arm64-redzone.ll

…

arm64-reg-copy-noneon.ll

…

arm64-register-offset-addressing.ll

…

arm64-register-pairing.ll

…

arm64-regress-f128csel-flags.ll

…

arm64-regress-interphase-shift.ll

…

arm64-regress-opt-cmp-signed.mir

[AArch64] Allow peephole to optimize AND + signed compare with 0 (#153608)

2025-11-10 22:32:31 +00:00

arm64-regress-opt-cmp.mir

…

arm64-reserve-call-saved-reg.ll

…

arm64-reserved-arg-reg-call-error.ll

…

arm64-return-vector.ll

…

arm64-returnaddr.ll

…

arm64-rev.ll

[GISel][AArch64] Allow PatLeafs to be imported in GISel which were previously causing warnings (#140935)

2025-06-09 09:02:56 +01:00

arm64-rounding.ll

[AArch64][test] Remove unsafe-fp-math uses (NFC) (#164606)

2025-10-22 12:14:21 +00:00

arm64-saddlp1d-uaddlp1d.mir

[AArch64][GlobalISel] Prevented llvm.aarch64.neon.saddlp/uaddlp fallback (#160883)

2025-10-07 21:51:57 +01:00

arm64-scaled_iv.ll

…

arm64-scvt.ll

…

arm64-setcc-int-to-fp-combine.ll

…

arm64-setcc-swap-infloop.ll

…

arm64-shifted-sext.ll

…

arm64-shrink-v1i64.ll

…

arm64-shrink-wrapping.ll

…

arm64-simd-scalar-to-vector.ll

…

arm64-simplest-elf.ll

…

arm64-sincos.ll

…

arm64-sitofp-combine-chains.ll

…

arm64-sli-sri-opt.ll

…

arm64-smaxv.ll

…

arm64-sminv.ll

…

arm64-spill-lr.ll

…

arm64-spill-remarks-treshold-hotness.ll

…

arm64-spill-remarks.ll

…

arm64-spill.ll

…

arm64-sqshl-uqshl-i64Contant.ll

…

arm64-srl-and.ll

[AArch64][GlobalISel] Add some GISel test coverage for icmp-and tests. NFC

2025-10-30 09:00:36 +00:00

arm64-st1.ll

…

arm64-stack-no-frame.ll

…

arm64-stackmap-nops.ll

…

arm64-stackmap.ll

…

arm64-stackpointer.ll

…

arm64-stacksave.ll

…

arm64-storebytesmerge.ll

[AArch64][test] Remove unsafe-fp-math uses (NFC) (#164606)

2025-10-22 12:14:21 +00:00

arm64-stp-aa.ll

…

arm64-stp.ll

…

arm64-strict-align.ll

…

arm64-stur.ll

…

arm64-subsections.ll

…

arm64-subvector-extend.ll

[AArch64][GlobalISel] Use TargetConstant for shift immediates (#161527)

2025-10-03 20:16:08 +01:00

arm64-summary-remarks.ll

…

arm64-swizzle-tbl-i16-layout.ll

…

arm64-tbl.ll

…

arm64-this-return.ll

[GISel] Introduce MIFlags::InBounds (#150900)

2025-07-30 13:01:23 +02:00

arm64-tls-darwin.ll

…

arm64-tls-dynamic-together.ll

…

arm64-tls-dynamics.ll

…

arm64-tls-initial-exec.ll

…

arm64-tls-local-exec.ll

…

arm64-trap.ll

[AArch64][GlobalISel] Mark G_TRAP, G_DEBUGTRAP and G_UBSANTRAP as legal. NFC

2025-08-23 08:11:19 +01:00

arm64-triv-disjoint-mem-access.ll

[AArch64][test] Remove unsafe-fp-math uses (NFC) (#164606)

2025-10-22 12:14:21 +00:00

arm64-trn.ll

…

arm64-trunc-store.ll

…

arm64-umaxv.ll

…

arm64-uminv.ll

…

arm64-umov.ll

…

arm64-unaligned_ldst.ll

…

arm64-uzp2-combine.ll

…

arm64-uzp.ll

…

arm64-vaargs.ll

…

arm64-vabs.ll

[AArch64][GlobalISel] Use TargetConstant for shift immediates (#161527)

2025-10-03 20:16:08 +01:00

arm64-vadd.ll

[AArch64][GlobalISel] Prevented llvm.aarch64.neon.saddlp/uaddlp fallback (#160883)

2025-10-07 21:51:57 +01:00

arm64-vaddlv.ll

…

arm64-vaddv.ll

…

arm64-variadic-aapcs.ll

…

arm64-vbitwise.ll

…

arm64-vcmp.ll

…

arm64-vcnt.ll

…

arm64-vcombine.ll

…

arm64-vcvt_f32_su32.ll

…

arm64-vcvt_f.ll

[AArch64][GlobalISel] Update checks for arm64-vcvt_f.ll. NFC

2025-10-19 22:40:58 +01:00

arm64-vcvt_n.ll

…

arm64-vcvt_su32_f32.ll

…

arm64-vcvt.ll

[AArch64][GlobalISel] SIMD fpcvt codegen for fptoi(_sat) (#160831)

2025-10-24 11:53:34 +01:00

arm64-vcvtxd_f32_f64.ll

[AArch64][GlobalISel] Prevented llvm.aarch64.sisd.fcvtxn fallback (#159811)

2025-09-22 10:31:27 +01:00

arm64-vecCmpBr.ll

…

arm64-vecFold.ll

…

arm64-vector-ext.ll

…

arm64-vector-imm.ll

…

arm64-vector-insertion.ll

[AArch64] Replace expensive move from wzr by two moves via floating point immediate (#146538)

2025-07-16 12:41:59 +02:00

arm64-vector-ldst.ll

…

arm64-vext_reverse.ll

[AArch64] Regnerate and update a number of tests. NFC

2025-08-04 07:41:57 +01:00

arm64-vext.ll

[AArch64] Regnerate and update a number of tests. NFC

2025-08-04 07:41:57 +01:00

arm64-vhadd.ll

[DAG] Fold mismatched widened avg idioms to narrow form (#147946) (#163366)

2025-10-27 12:24:41 +00:00

arm64-vhsub.ll

…

arm64-virtual_base.ll

…

arm64-vmax.ll

…

arm64-vminmaxnm.ll

…

arm64-vmovn.ll

[GlobalISel] Legalize Saturated Truncate instructions and intrinsics (#154340)

2025-08-20 10:37:22 +01:00

arm64-vmul.ll

[AArch64][GlobalISel] Added pmull/pmull64 intrinsic support (#165740)

2025-11-05 16:53:45 +00:00

arm64-volatile.ll

…

arm64-vqadd.ll

[AArch64] Add v1i64 addsat/subsat (#142342)

2025-06-03 21:47:41 +01:00

arm64-vqsub.ll

[AArch64] Add v1i64 addsat/subsat (#142342)

2025-06-03 21:47:41 +01:00

arm64-vselect.ll

…

arm64-vsetcc_fp.ll

…

arm64-vshift.ll

[AArch64][GlobalISel] Ensure vector types match in shift instructions

2025-09-06 12:38:28 +01:00

arm64-vshr.ll

…

arm64-vshuffle.ll

…

arm64-vsqrt.ll

…

arm64-vsra.ll

…

arm64-vsub.ll

…

arm64-weak-reference.ll

…

arm64-windows-calls.ll

…

arm64-windows-tailcall.ll

…

arm64-xaluo.ll

…

arm64-zero-cycle-regmove-fpr.ll

[AArch64][NFC] Align ZCM test names to MOVE not MOV (#163069)

2025-10-16 17:57:13 +03:00

arm64-zero-cycle-regmove-gpr.ll

[AArch64][NFC] Align ZCM test names to MOVE not MOV (#163069)

2025-10-16 17:57:13 +03:00

arm64-zero-cycle-zeroing-fpr.ll

[AArch64] Lower zero cycle FPR zeroing (#156261)

2025-09-10 08:32:51 +03:00

arm64-zero-cycle-zeroing-gpr.ll

[AArch64] Widen GPR32 zero cycle zeroing (#164244)

2025-10-25 09:36:56 +03:00

arm64-zeroreg.ll

…

arm64-zext.ll

…

arm64-zextload-unscaled.ll

…

arm64-zip.ll

[AArch64] computeKnownBitsForTargetNode - add AArch64ISD::MOVIshift support (#148634)

2025-07-14 20:36:51 +01:00

arm64ec-alias.ll

Introduce MCAsmInfo::UsesSetToEquateSymbol and prefer = to .set

2025-06-11 22:19:31 -07:00

arm64ec-available-externally.ll

[win][arm64ec] Handle available_externally functions (#151610)

2025-08-01 14:04:39 -07:00

arm64ec-builtins.ll

AArch64: Add libcall impl declarations for __arm_sc* memory functions (#144977)

2025-06-27 17:53:03 +09:00

arm64ec-dllimport.ll

…

arm64ec-dont-call.ll

[win][arm64ec] Fix duplicate errors with the dontcall attribute (#152810)

2025-08-12 11:05:07 -07:00

arm64ec-eh.ll

…

arm64ec-empty-name.ll

[win][arm64ec] Handle empty function names (#151609)

2025-08-04 16:20:55 -07:00

arm64ec-entry-thunks-local-linkage.ll

…

arm64ec-entry-thunks.ll

[Arm64EC] Add support for half (#152843)

2025-08-12 14:15:52 -07:00

arm64ec-exit-thunks.ll

[AArch64] Fix Arm64EC mangling with C++ symbols using MD5 mangling. (#160963)

2025-10-06 15:42:50 -07:00

arm64ec-hybrid-patchable.ll

Introduce MCAsmInfo::UsesSetToEquateSymbol and prefer = to .set

2025-06-11 22:19:31 -07:00

arm64ec-reservedregs.ll

…

arm64ec-symbols.ll

Introduce MCAsmInfo::UsesSetToEquateSymbol and prefer = to .set

2025-06-11 22:19:31 -07:00

arm64ec-varargs.ll

Introduce MCAsmInfo::UsesSetToEquateSymbol and prefer = to .set

2025-06-11 22:19:31 -07:00

asm-large-immediate.ll

…

asm-ld1-wrong-constraint.ll

…

asm-print-comments.ll

…

asm-srcloc.ll

…

assertion-rc-mismatch.ll

…

atomic-ops-ldapr.ll

…

atomic-ops-lse.ll

…

atomic-ops-msvc.ll

support branch hint for AtomicExpandImpl::expandAtomicCmpXchg (#152366)

2025-09-02 09:33:28 -04:00

atomic-ops-not-barriers.ll

…

atomic-ops.ll

support branch hint for AtomicExpandImpl::expandAtomicCmpXchg (#152366)

2025-09-02 09:33:28 -04:00

atomic-oversize.ll

…

atomicrmw-cond-sub-clamp.ll

…

atomicrmw-fadd.ll

support branch hint for AtomicExpandImpl::expandAtomicCmpXchg (#152366)

2025-09-02 09:33:28 -04:00

atomicrmw-fmax.ll

support branch hint for AtomicExpandImpl::expandAtomicCmpXchg (#152366)

2025-09-02 09:33:28 -04:00

atomicrmw-fmin.ll

support branch hint for AtomicExpandImpl::expandAtomicCmpXchg (#152366)

2025-09-02 09:33:28 -04:00

atomicrmw-fsub.ll

support branch hint for AtomicExpandImpl::expandAtomicCmpXchg (#152366)

2025-09-02 09:33:28 -04:00

atomicrmw-O0.ll

[PHIElimination] Revert #131837 #146320 #146337 (#146850)

2025-07-03 07:48:08 -04:00

atomicrmw-uinc-udec-wrap.ll

…

atomicrmw-xchg-fp.ll

…

autoupgrade-aarch64-neon-addp-float.ll

…

avg.ll

…

avoid-free-ext-promotion.ll

[SimplifyCFG] Extend jump-threading to allow live local defs (#135079)

2025-07-31 09:44:14 -04:00

avoid-pre-trunc.ll

[DAG] visitTRUNCATE - more aggressively fold trunc(add(x,x)) -> add(trunc(x),trunc(x)) (#164227)

2025-10-21 10:17:57 +00:00

avoid-zero-copy.mir

…

basic-block-sections-cold.ll

…

basic-block-sections-unsafe.ll

…

basic-pic.ll

…

bcax.ll

[AArch64] Enable using SVE2 bit-sel instructions with Neon types. (#146906)

2025-07-08 09:06:49 +01:00

bcmp-inline-small.ll

…

bcmp.ll

MachineScheduler: Improve instruction clustering (#137784)

2025-06-05 15:28:04 +08:00

bf16_fast_math.ll

[InstrEmitter] Use AddOperand in EmitCopyToRegClassNode. (#146637)

2025-07-02 09:44:54 -07:00

bf16-convert-intrinsics.ll

…

bf16-imm.ll

…

bf16-instructions.ll

[AArch64] Use pattern to select bf16 fpextend (#137212)

2025-05-02 12:55:18 +01:00

bf16-select.ll

…

bf16-shuffle.ll

…

bf16-v4-instructions.ll

…

bf16-v8-instructions.ll

[LLVM][SelectionDAG] Simplify SplitVecOp_VSETCC. (#139295)

2025-05-13 12:13:01 +01:00

bf16-vector-bitcast.ll

[AArch64] Add missing bitcast patterns for bf16<->f16 converts. (#159816)

2025-09-29 07:24:57 +01:00

bf16-vector-shuffle.ll

…

bf16.ll

…

bfis-in-loop.ll

[PHIElimination] Revert #131837 #146320 #146337 (#146850)

2025-07-03 07:48:08 -04:00

bics.ll

…

big-callframe.ll

…

bisect-post-ra-machine-sink.mir

[CodeGen][NewPM] Port "PostRAMachineSink" pass to NPM (#129690)

2025-07-10 13:10:46 +05:30

bitcast_truncstore.ll

[AArch64] Removed redundant FMOV instruction for truncstores of f64/f32 via bitcast to i64/i32/i8. (#149997)

2025-09-08 10:35:04 +01:00

bitcast-extend.ll

[AArch64] Add some tests for bitcast vector loads and scalarizing loaded vectors. NFC

2025-09-19 07:49:22 +01:00

bitcast-promote-widen.ll

…

bitcast-v2i8.ll

…

bitcast.ll

[GlobalISel] Fix bitcast fewerElements with scalar narrow types. (#153364)

2025-08-13 22:27:53 +01:00

bitfield-extract.ll

…

bitfield-insert-0.ll

…

bitfield-insert.ll

…

bitfield.ll

…

bitreverse.ll

[GISel][AArch64] Scalarize i128 bitreverse instructions. Added tests for i128 and v2i128 bitreverse (#142621)

2025-06-04 13:03:00 +01:00

block-placement-optimize-branches.ll

…

blockaddress.ll

…

blr-bti-preserves-operands.mir

[CodeGen] Fix handling dead redefs in finalizeBundle (#157427)

2025-09-10 12:48:12 +01:00

bool-ext-inc.ll

…

bool-loads.ll

…

br-cond-not-merge.ll

…

br-to-eh-lpad.ll

…

br-undef-cond.ll

…

branch-folder-merge-mmos.ll

…

branch-folder-oneinst.mir

…

branch-relax-alignment.ll

…

branch-relax-asm.ll

…

branch-relax-b.ll

…

branch-relax-bcc.ll

…

branch-relax-block-size.mir

…

branch-relax-cbz.ll

…

branch-relax-cross-section.mir

…

branch-relax-xray.ll

…

branch-target-enforcement-indirect-calls.ll

…

breg.ll

…

bsl.ll

[AArch64] Use SVE2 bit-sel instructions for some binary patterns. (#147544)

2025-07-10 11:36:01 +01:00

bsp_implicit_ops.mir

[AArch64] Drop flags from BSP pseudos (#151856)

2025-08-08 07:47:56 +01:00

bswap-known-bits.ll

…

bswap.ll

Revert "[AArch64][GlobalISel] Expand 64bit extracts to 128bit to allow more patterns (#142904)"

2025-06-11 08:32:55 +01:00

bti-branch-relaxation.ll

[AArch64][test] Remove unsafe-fp-math uses (NFC) (#164606)

2025-10-22 12:14:21 +00:00

bti-ehpad.ll

[AArch64][BTI] Add BTI at EH entries. (#155308)

2025-08-30 10:56:03 +01:00

bti-linkage.ll

…

build-attributes-all.ll

…

build-attributes-bti.ll

…

build-attributes-gcs.ll

…

build-attributes-pac.ll

…

build-attributes-pauthabi.ll

…

build-one-lane.ll

…

build-pair-isel.ll

…

build-vector-dup-simd.ll

[AArch64] Spare N2I roundtrip when splatting float comparison (#141806)

2025-06-06 19:07:12 +03:00

build-vector-extract.ll

…

build-vector-to-extract-subvec-crash.ll

…

build-vector-two-dup.ll

AArch64: Enable terminal rule (#165959)

2025-11-10 12:49:21 -08:00

byval-type.ll

…

call-rv-marker.ll

[AArch64] Regenerate and update a number of check lines. NFC

2025-09-18 09:54:47 +01:00

callbr-asm-label-bti.ll

[ARM,AArch64] Don't put BTI at asm goto branch targets (#141562)

2025-06-03 08:44:13 +01:00

callbr-asm-label.ll

[ARM,AArch64] Don't put BTI at asm goto branch targets (#141562)

2025-06-03 08:44:13 +01:00

callbr-asm-obj-file.ll

…

callbr-asm-outputs-indirect-isel.ll

[ARM,AArch64] Don't put BTI at asm goto branch targets (#141562)

2025-06-03 08:44:13 +01:00

callbr-prepare.ll

[AArch64] Regenerate and update a number of check lines. NFC

2025-09-18 09:54:47 +01:00

callee-save.ll

…

calleetypeid-directcall-mismatched.ll

[llvm] Extract and propagate callee_type metadata

2025-07-30 14:56:39 -07:00

callsite-emit-calleetypeid-tailcall.ll

[llvm] Extract and propagate callee_type metadata

2025-07-30 14:56:39 -07:00

callsite-emit-calleetypeid.ll

[llvm] Extract and propagate callee_type metadata

2025-07-30 14:56:39 -07:00

cbz_wzr.mir

[AArch64] Some tests for cbz/tbz with wzr. NFC

2025-10-01 12:41:03 +01:00

ccmp-successor-probs.mir

…

cfguard-arm64ec.ll

[CodeGen][ARM64EC] Don't treat guest exit thunks as indirect calls (#165885)

2025-11-04 00:04:36 +01:00

cfguard-checks.ll

…

cfguard-module-flag.ll

…

cfi_restore.mir

…

cfi-fixup-multi-block-prologue.mir

[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)

2025-08-12 11:23:05 -07:00

cfi-fixup-multi-section.mir

[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)

2025-08-12 11:23:05 -07:00

cfi-fixup.ll

…

cfi-fixup.mir

[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)

2025-08-12 11:23:05 -07:00

cfi-sync-async.ll

…

cfinv-def-nzcv.mir

…

cfinv-use-nzcv.mir

…

cgdata-global-hash.ll

…

cgdata-merge-crash.ll

…

cgdata-merge-gvar-nsconst.ll

…

cgdata-merge-gvar-objc.ll

…

cgdata-merge-gvar-string.ll

…

cgdata-merge-local.ll

AArch64: Convert tests to opaque pointers (#167442)

2025-11-11 02:52:45 +00:00

cgdata-merge-no-params.ll

AArch64: Convert tests to opaque pointers (#167442)

2025-11-11 02:52:45 +00:00

cgdata-no-merge-attached-call-garget.ll

…

cgdata-no-merge-unnamed.ll

AArch64: Convert tests to opaque pointers (#167442)

2025-11-11 02:52:45 +00:00

cgdata-outline-gvar.ll

…

cgdata-outlined-name.ll

…

cgdata-read-double-outline.ll

…

cgdata-read-lto-outline.ll

…

cgdata-read-priority.ll

…

cgdata-read-single-outline-suffix.ll

…

cgdata-read-single-outline.ll

…

cgdata-write-outline.ll

…

cgp-trivial-phi-node.ll

…

cgp-usubo.ll

…

cheap-as-a-move.ll

…

check-sign-bit-before-extension.ll

[LLVM][AArch64] Optimize sign bit tests with TST instruction for SIGN_EXTEND patterns (#158061)

2025-09-29 09:53:50 +01:00

chkstk.ll

…

clear-dead-implicit-def-impdef.ll

…

clear-dead-implicit-def-impdef.mir

…

cls.ll

…

cluster-frame-index.mir

…

cmp-bool.ll

…

cmp-chains.ll

[AArch64] Update some tests to use a more common check prefix. NFC

2025-07-28 08:26:48 +01:00

cmp-const-max.ll

…

cmp-frameindex.ll

…

cmp-select-sign.ll

[DAG] Refactor X86 combineVSelectWithAllOnesOrZeros fold into a generic DAG Combine (#145298)

2025-07-02 15:07:48 +01:00

cmp-to-cmn.ll

[AArch64][GISel] Signed comparison using CMN is safe when the subtraction is nsw (#150480)

2025-07-31 07:48:13 +01:00

cmpbr-branch-relaxation.mir

…

cmpbr-early-ifcvt.mir

…

cmpbr-reg-imm-at-bounds.ll

…

cmpbr-reg-imm.ll

…

cmpbr-reg-reg.ll

…

cmpwithshort.ll

…

cmpxchg-idioms.ll

support branch hint for AtomicExpandImpl::expandAtomicCmpXchg (#152366)

2025-09-02 09:33:28 -04:00

cmpxchg-lse-even-regs.ll

…

cmpxchg-O0.ll

…

coalescer-drop-subreg-to-reg-imm-ops.mir

…

code-model-large.ll

…

code-model-tiny-abs.ll

…

combine_andor_with_cmps.ll

…

combine-and-like.ll

[LLVM][SelectionDAG] Align poison/undef binop folds with IR. (#149334)

2025-07-30 11:20:30 +01:00

combine-andintoload.ll

…

combine-comparisons-by-cse.ll

…

combine-mul.ll

[AArch64] computeKnownBitsForTargetNode - add AArch64ISD::MOVIshift support (#148634)

2025-07-14 20:36:51 +01:00

combine-sdiv.ll

[LLVM][DAGCombiner] Improve simplifyDivRem's effectiveness after type legalisation. (#162706)

2025-10-14 11:23:53 +01:00

combine-storetomstore.ll

[DAG] Skip mstore combine for <1 x ty> vectors (#159915)

2025-09-21 11:06:49 -07:00

commandline-metadata.ll

…

compare-branch.ll

…

compiler-ident.ll

…

complex-copy-noneon.ll

…

complex-deinterleaving-add-mull-fixed-contract.ll

…

complex-deinterleaving-add-mull-fixed-fast.ll

…

complex-deinterleaving-add-mull-scalable-contract.ll

[AArch64][SVE] Avoid movprfx by reusing register for _UNDEF pseudos. (#166926)

2025-11-10 16:33:59 +00:00

complex-deinterleaving-add-mull-scalable-fast.ll

[AArch64][SVE] Avoid movprfx by reusing register for _UNDEF pseudos. (#166926)

2025-11-10 16:33:59 +00:00

complex-deinterleaving-cdot.ll

[IR] NFC: Remove 'experimental' from partial.reduce.add intrinsic (#158637)

2025-09-17 11:44:47 +01:00

complex-deinterleaving-crash.ll

[PHIElimination] Revert #131837 #146320 #146337 (#146850)

2025-07-03 07:48:08 -04:00

complex-deinterleaving-f16-add-scalable.ll

[AArch64][SVE] Avoid movprfx by reusing register for _UNDEF pseudos. (#166926)

2025-11-10 16:33:59 +00:00

complex-deinterleaving-f16-add.ll

[AArch64] Regenerate and update a number of check lines. NFC

2025-09-18 09:54:47 +01:00

complex-deinterleaving-f16-mul-scalable.ll

…

complex-deinterleaving-f16-mul.ll

…

complex-deinterleaving-f32-add-scalable.ll

…

complex-deinterleaving-f32-add.ll

…

complex-deinterleaving-f32-mul-scalable.ll

…

complex-deinterleaving-f32-mul.ll

…

complex-deinterleaving-f64-add-scalable.ll

…

complex-deinterleaving-f64-add.ll

…

complex-deinterleaving-f64-mul-scalable.ll

…

complex-deinterleaving-f64-mul.ll

…

complex-deinterleaving-i8-add-scalable.ll

…

complex-deinterleaving-i16-add-scalable.ll

…

complex-deinterleaving-i16-mul-scalable.ll

[AArch64][SVE] Avoid movprfx by reusing register for _UNDEF pseudos. (#166926)

2025-11-10 16:33:59 +00:00

complex-deinterleaving-i32-add-scalable.ll

…

complex-deinterleaving-i32-mul-scalable.ll

…

complex-deinterleaving-i64-add-scalable.ll

…

complex-deinterleaving-i64-mul-scalable.ll

…

complex-deinterleaving-mixed-cases.ll

…

complex-deinterleaving-multiuses.ll

…

complex-deinterleaving-opt-crash.ll

[ComplexDeinterleave] Don't try to combine single FP reductions. (#139469)

2025-05-13 08:44:11 +01:00

complex-deinterleaving-reductions-predicated-scalable.ll

[DAGCombiner] Add combine for vector interleave of splats (#151110)

2025-08-01 09:58:05 +01:00

complex-deinterleaving-reductions-scalable.ll

[AArch64] Support symmetric complex deinterleaving with higher factors (#151295)

2025-08-12 11:05:15 +01:00

complex-deinterleaving-reductions.ll

[PHIElimination] Revert #131837 #146320 #146337 (#146850)

2025-07-03 07:48:08 -04:00

complex-deinterleaving-splat-scalable.ll

[LLVM][ComplexDeinterleaving] Update splat identification to include vector ConstantInt/FP. (#144516)

2025-06-18 11:53:27 +01:00

complex-deinterleaving-splat.ll

…

complex-deinterleaving-symmetric-fixed.ll

[AArch64] Support symmetric complex deinterleaving with higher factors (#151295)

2025-08-12 11:05:15 +01:00

complex-deinterleaving-symmetric-scalable.ll

[AArch64] Support symmetric complex deinterleaving with higher factors (#151295)

2025-08-12 11:05:15 +01:00

complex-deinterleaving-uniform-cases.ll

[AArch64][MachineCombiner] Combine sequences of gather patterns (#152979)

2025-08-18 15:10:59 +03:00

complex-deinterleaving-unrolled-cdot.ll

[IR] NFC: Remove 'experimental' from partial.reduce.add intrinsic (#158637)

2025-09-17 11:44:47 +01:00

complex-fp-to-int.ll

…

complex-int-to-fp.ll

[AArch64] Scalarize extracted vector loads. (#159714)

2025-09-23 07:18:46 +00:00

compute-call-frame-size-unreachable-pass.ll

…

concat_vector-scalar-combine.ll

…

concat_vector-truncate-combine.ll

…

concat_vector-truncated-scalar-combine.ll

…

concat-vector-add-combine.ll

[SelectionDAG] Deal with POISON for INSERT_VECTOR_ELT/INSERT_SUBVECTOR (#143102)

2025-09-17 21:04:00 +00:00

concat-vector.ll

[AArch64][MachineCombiner] Combine sequences of gather patterns (#152979)

2025-08-18 15:10:59 +03:00

concatbinop.ll

[DAG] Refactor X86 combineVSelectWithAllOnesOrZeros fold into a generic DAG Combine (#145298)

2025-07-02 15:07:48 +01:00

cond-br-tuning-instr-ref.mir

…

cond-br-tuning.ll

…

cond-sel-value-prop.ll

…

cond-sel.ll

…

consecutive-stores-of-faddv.ll

…

const-isel.ll

…

const-shift-of-constmasked.ll

…

constant-pool-partition.ll

[ELF][AsmPrinter] Emit trailing dot for constant pool section when it has a hotness prefix (#150859)

2025-07-29 17:04:59 -07:00

consthoist-gep.ll

[AArch64][test] Remove unsafe-fp-math uses (NFC) (#164606)

2025-10-22 12:14:21 +00:00

convert-highly-predictable-select-to-branch.ll

…

convertphitype.ll

…

copyprop.ll

…

copyprop.mir

[AArch64] Correctly detect X reg from W reg in isCopyImpl (#137348)

2025-04-26 11:09:13 +01:00

cpa-globalisel.ll

[AArch64] Add CodeGen support for scalar FEAT_CPA (#105669)

2025-06-20 21:14:52 +01:00

cpa-selectiondag.ll

[AMDGPU][SDAG] Add ISD::PTRADD DAG combines (#142739)

2025-06-26 09:40:04 +02:00

cpus.ll

…

csel-andor-onebit.ll

…

csel-cmp-cse.ll

[AArch64] Support MI and PL (#150314)

2025-08-11 07:41:38 +01:00

csel-subs-swapped.ll

[AArch64] Check for negative numbers when adjusting icmps (#141151)

2025-05-30 15:22:54 +01:00

csel-zero-float.ll

[CodeGen] Remove -enable-unsafe-fp-math option (#164559)

2025-10-22 15:40:31 +08:00

csinc-cmp-removal.mir

…

csr-copy-hint.mir

…

csr-split.ll

…

ctlo.ll

…

ctlz_zero_undef.ll

…

ctlz.ll

[GlobalISel] Widen vector loads from aligned ptrs (#144309)

2025-06-21 07:42:54 +01:00

ctpop-nonean.ll

…

ctpop.ll

[AArch64] Fold uaddv(a) to a if the all lanes except the 0th are zeros (#159086)

2025-09-17 17:20:41 +08:00

cttz.ll

[GlobalISel] Widen vector loads from aligned ptrs (#144309)

2025-06-21 07:42:54 +01:00

custom-sections.ll

…

cvt-fp-int-fp.ll

[AArch64] Guard fptosi+sitofp patterns with one use checks. (#156407)

2025-09-03 08:21:27 +01:00

cxx-tlscc.ll

…

dag-combine-concat-vectors.ll

[AArch64] Lower zero cycle FPR zeroing (#156261)

2025-09-10 08:32:51 +03:00

dag-combine-freeze.ll

…

dag-combine-insert-subvector.ll

…

dag-combine-invaraints.ll

[AArch64][test] Remove unsafe-fp-math uses (NFC) (#164606)

2025-10-22 12:14:21 +00:00

dag-combine-lifetime-end-store-typesize.ll

…

dag-combine-mul-shl.ll

…

dag-combine-select.ll

[AArch64] Update some tests to use a more common check prefix. NFC

2025-07-28 08:26:48 +01:00

dag-combine-setcc.ll

…

dag-combine-trunc-build-vec.ll

…

dag-numsignbits.ll

…

dag-ReplaceAllUsesOfValuesWith.ll

…

DAGCombine_vscale.ll

…

darwinpcs-tail.ll

[AArch64] Skip storing of stack arguments when lowering tail calls (#126735)

2025-06-06 11:26:24 +03:00

dbg-assign-tag-offset-mix-loc.ll

…

dbg-assign-tag-offset.ll

…

dbg-declare-swift-async.ll

…

dbg-declare-tag-offset.ll

…

dbg-value-swift-async-non-entry-block.ll

…

dbg-value-swift-async.ll

…

dbg-value-tag-offset.ll

…

debug-info-sve-dbg-declare.mir

[Codegen] Add a separate stack ID for scalable predicates (#142390)

2025-10-02 14:43:07 +01:00

debug-info-sve-dbg-value.mir

[Codegen] Add a separate stack ID for scalable predicates (#142390)

2025-10-02 14:43:07 +01:00

debug-info-sve-pair.mir

[Debug][AArch64] Do not crash on unknown subreg register sizes. (#160442)

2025-09-24 12:40:12 +02:00

debugtrap.ll

…

directcond.ll

…

div_minsize.ll

…

div-rem-pair-recomposition-signed.ll

…

div-rem-pair-recomposition-unsigned.ll

…

divrem.ll

AArch64: Convert tests to opaque pointers (#167442)

2025-11-11 02:52:45 +00:00

dllexport.ll

…

dllimport.ll

…

dont-shrink-wrap-stack-mayloadorstore.mir

[llvm] Support multiple save/restore points in mir (#119357)

2025-08-12 16:34:29 +03:00

dont-take-over-the-world.ll

…

double_reduct.ll

[DAG] Fold nested add(add(reduce(a), b), add(reduce(c), d)) (#115150)

2025-06-24 13:08:59 +01:00

dp1.ll

…

dp2.ll

…

dp-3source.ll

[AArch64][GlobalISel] Add test coverage for dp-3source.ll. NFC

2025-09-25 15:06:05 +01:00

dump-reserved-cycles.mir

…

dump-schedule-trace.mir

CodeGen: Remove redundant REQUIRES registered-target from backend tests (#147475)

2025-07-09 09:25:53 +09:00

dup-ext-load-combine.ll

[AArch64] Optimize splat of extending loads to avoid GPR->FPR transfer (#163067)

2025-10-24 17:47:56 +03:00

dup.ll

[GlobalISel] Combine away G_UNMERGE(G_IMPLICITDEF). (#119183)

2025-10-28 09:57:31 +00:00

duplane-index-patfrags.ll

…

dwarf-cfi.ll

…

dwarf-eh-prepare-dbg.ll

…

dynamic-regmask-preserve-none.ll

…

early-ifcvt-likely-predictable.mir

…

early-ifcvt-on-double-killed-reg.mir

…

early-ifcvt-regclass-mismatch.mir

[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)

2025-08-12 11:23:05 -07:00

early-ifcvt-same-value.mir

…

eh_recoverfp.ll

…

ehcontguard.ll

Introduce MCAsmInfo::UsesSetToEquateSymbol and prefer = to .set

2025-06-11 22:19:31 -07:00

elf-globals-pic.ll

…

elf-globals-static.ll

…

elf-preemption.ll

…

elim-dead-mi.mir

…

eliminate-trunc.ll

…

emit_fneg_with_non_register_operand.mir

[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)

2025-08-12 11:23:05 -07:00

emit-prologue-clobber-verification.mir

…

emutls_alias.ll

…

emutls_generic.ll

…

emutls.ll

…

eon.ll

[AArch64] Lower disjoint_or+not to eon. (#147279)

2025-07-09 08:38:16 +01:00

eor3.ll

[AArch64][NEON] Add eor3 patterns for V64 xors (#165376)

2025-10-29 13:22:44 +00:00

exception-handling-windows-elf.ll

AArch64: Base MCAsmInfo type on binary format before OS (#147875)

2025-07-10 13:06:14 +09:00

execute-only-empty.ll

…

execute-only-section.ll

…

exp10-libcall-names.ll

Triple: Add BridgeOS to isOSDarwin (#145636)

2025-06-25 20:06:51 +09:00

expand-blr-rvmarker-pseudo.mir

[AMDGPU] Avoid put implicit_def into bundle that break reg's liveness (#142563)

2025-08-13 10:41:44 +08:00

expand-constructive-zzi.mir

[AArch64] Define constructive EXT_ZZI pseudo instruction (#152552)

2025-08-15 09:05:10 +01:00

expand-load-got-pseudo.mir

…

expand-movi-renamable.mir

…

expand-select.ll

[AArch64] Lower zero cycle FPR zeroing (#156261)

2025-09-10 08:32:51 +03:00

expand-sme-pseudos.mir

[AArch64][SME] Implement the SME ABI (ZA state management) in Machine IR (#149062)

2025-08-19 10:00:28 +01:00

expand-subs-pseudo.mir

…

expand-vector-rot.ll

…

ext-narrow-index.ll

[AArch64] Lower zero cycle FPR zeroing (#156261)

2025-09-10 08:32:51 +03:00

extbinopload.ll

MachineScheduler: Improve instruction clustering (#137784)

2025-06-05 15:28:04 +08:00

extend_inreg_of_concat_subvectors.ll

[AArch64] Regnerate and update a number of tests. NFC

2025-08-04 07:41:57 +01:00

extern-weak.ll

…

extra-callee-save.mir

…

extract-bits.ll

[AArch64] shouldFoldMaskToVariableShiftPair should be true for scalars up to the biggest legal type (#158069)

2025-09-30 17:48:47 +01:00

extract-insert.ll

…

extract-lowbits.ll

[AArch64] shouldFoldMaskToVariableShiftPair should be true for scalars up to the biggest legal type (#158069)

2025-09-30 17:48:47 +01:00

extract-sext-zext.ll

…

extract-subvec-combine.ll

…

extract-vector-cmp.ll

[AArch64] Use SVE to materialise some 128-bit vector constants (#159101)

2025-09-25 09:36:59 +01:00

extract-vector-elt-sve.ll

…

extract-vector-elt.ll

[AArch64][GlobalISel] Use TargetConstant for shift immediates (#161527)

2025-10-03 20:16:08 +01:00

extract.ll

…

extractvector-of-load.mir

…

extractvector-oob-load.mir

…

f16-convert.ll

…

f16-imm.ll

[AArch64] Split zero cycle zeoring per register class (#154561)

2025-08-28 15:57:06 +03:00

f16-instructions.ll

[AArch64][GlobalISel] Add G_FPEXT(G_FCONSTANT) folding (#162829)

2025-10-10 12:17:06 +00:00

f16-neon-intrinsics.ll

…

fabd-no-neon.ll

…

fabs-combine.ll

…

fabs-fp128.ll

…

fabs.ll

…

fadd-combines.ll

[GlobalISel] Add a fadd 0.0 combine with nsz (#153748)

2025-08-21 10:19:39 +01:00

faddp-half.ll

…

faddp.ll

…

faddsub.ll

Revert "[AArch64][GlobalISel] Expand 64bit extracts to 128bit to allow more patterns (#142904)"

2025-06-11 08:32:55 +01:00

falkor-hwpf-fix.ll

…

falkor-hwpf-fix.mir

…

falkor-hwpf.ll

…

fast-isel-address-extends.ll

…

fast-isel-addressing-modes.ll

…

fast-isel-assume.ll

…

fast-isel-atomic-fallback.ll

[AArch64][FastISel] Fallback on atomic stlr/cas with non-reg operands. (#133987)

2025-05-08 14:29:24 -07:00

fast-isel-atomic.ll

…

fast-isel-branch_weights.ll

…

fast-isel-branch-cond-mask.ll

…

fast-isel-branch-cond-split.ll

…

fast-isel-call-return.ll

…

fast-isel-call-struct-return-fallback.ll

…

fast-isel-call-struct-return.ll

…

fast-isel-cbz.ll

…

fast-isel-cmp-branch.ll

…

fast-isel-cmp-vec.ll

[AArch64] computeKnownBitsForTargetNode - add AArch64ISD::MOVIshift support (#148634)

2025-07-14 20:36:51 +01:00

fast-isel-cmpxchg.ll

…

fast-isel-const-float.ll

…

fast-isel-dbg.ll

…

fast-isel-erase.ll

…

fast-isel-folded-shift.ll

…

fast-isel-folding.ll

…

fast-isel-fpimm.ll

…

fast-isel-gep.ll

…

fast-isel-int-ext2.ll

…

fast-isel-int-ext3.ll

…

fast-isel-int-ext4.ll

…

fast-isel-int-ext5.ll

…

fast-isel-int-ext.ll

…

fast-isel-intrinsic.ll

…

fast-isel-logic-op.ll

…

fast-isel-memcpy.ll

…

fast-isel-mul.ll

…

fast-isel-runtime-libcall.ll

…

fast-isel-sdiv.ll

[AArch64] Support MI and PL (#150314)

2025-08-11 07:41:38 +01:00

fast-isel-select.ll

…

fast-isel-shift.ll

…

fast-isel-sp-adjust.ll

CodeGen: Convert some assorted errors to use reportFatalUsageError (#142031)

2025-05-30 08:06:53 +02:00

fast-isel-sqrt.ll

…

fast-isel-switch-phi.ll

…

fast-isel-tail-call.ll

…

fast-isel-tbz.ll

…

fast-isel-trunc.ll

…

fast-isel-vector-arithmetic.ll

…

fast-isel-vret.ll

…

fast-regalloc-empty-bb-with-liveins.mir

…

fastcc-reserved.ll

…

fastcc.ll

…

fastisel-debugvalue-undef.ll

…

fcmp-fp128.ll

[AArch64] Support MI and PL (#150314)

2025-08-11 07:41:38 +01:00

fcmp.ll

[AArch64][GlobalISel] Use TargetConstant for shift immediates (#161527)

2025-10-03 20:16:08 +01:00

fcopysign-noneon.ll

…

fcopysign.ll

Revert "[AArch64][GlobalISel] Expand 64bit extracts to 128bit to allow more patterns (#142904)"

2025-06-11 08:32:55 +01:00

fcsel-zero.ll

[AArch64] Remove UnsafeFPMath (#150876)

2025-07-29 12:41:09 +08:00

fcvt_combine.ll

…

fcvt-fixed.ll

[AArch64][GlobalISel] Add G_FPEXT(G_FCONSTANT) folding (#162829)

2025-10-10 12:17:06 +00:00

fcvt-int.ll

…

fcvt.ll

Revert "[AArch64][GlobalISel] Expand 64bit extracts to 128bit to allow more patterns (#142904)"

2025-06-11 08:32:55 +01:00

fdiv-combine.ll

[GlobalISel] fdiv to fmul transform (#144305)

2025-10-08 07:26:25 +01:00

fdiv-const.ll

…

fdiv.ll

Revert "[AArch64][GlobalISel] Expand 64bit extracts to 128bit to allow more patterns (#142904)"

2025-06-11 08:32:55 +01:00

fence-singlethread.ll

…

fexplog.ll

…

fix-shuffle-vector-be-rev.ll

[AArch64] Prefer using DUP instead of INS where possible (#138549)

2025-05-15 10:31:09 +02:00

fixed_masked_deinterleaved_loads.ll

[AArch64] Improve lowering for scalable masked deinterleaving loads (#154338)

2025-09-03 09:51:54 +01:00

fixed_masked_interleaved_stores.ll

[AArch64] Improve lowering for scalable masked interleaving stores (#156718)

2025-09-08 10:34:53 +01:00

fixed-point-conv-vec-pat.ll

…

fixed-vector-deinterleave.ll

…

fixed-vector-interleave.ll

[DAGCombiner] Add combine for vector interleave of splats (#151110)

2025-08-01 09:58:05 +01:00

fjcvtzs.ll

…

fjcvtzs.mir

…

flags-multiuse.ll

…

float-conv-elim.ll

…

floatdp_1source.ll

…

floatdp_2source.ll

…

fma-fneg-combine.ll

[DAG] SelectionDAG::canCreateUndefOrPoison - add ISD::FMA/FMAD + tests (#152187)

2025-08-12 17:17:46 +09:00

fmaximum-legalization.ll

Revert "[SDAG] Fix fmaximum legalization errors (#142170)"

2025-06-04 14:35:30 +02:00

fminimummaximum.ll

Revert "[AArch64][GlobalISel] Expand 64bit extracts to 128bit to allow more patterns (#142904)"

2025-06-11 08:32:55 +01:00

fminmax.ll

Revert "[AArch64][GlobalISel] Expand 64bit extracts to 128bit to allow more patterns (#142904)"

2025-06-11 08:32:55 +01:00

fmla.ll

Revert "[AArch64][GlobalISel] Expand 64bit extracts to 128bit to allow more patterns (#142904)"

2025-06-11 08:32:55 +01:00

fmlal-loreg.ll

…

fmov-imm-licm.ll

…

fmul.ll

Revert "[AArch64][GlobalISel] Expand 64bit extracts to 128bit to allow more patterns (#142904)"

2025-06-11 08:32:55 +01:00

fneg.ll

…

fnmul.ll

[AArch64] Regenerate and update a number of check lines. NFC

2025-09-18 09:54:47 +01:00

fold-constants.ll

…

fold-csel-cttz-and.ll

…

fold-global-offsets.ll

…

fold-int-pow2-with-fmul-or-fdiv.ll

…

force-enable-intervals.mir

CodeGen: Remove redundant REQUIRES registered-target from backend tests (#147475)

2025-07-09 09:25:53 +09:00

fp8-neon-fdot.ll

…

fp8-neon-fmla.ll

…

fp8-sme2-cvtn.ll

[AArch64][SVE] Tweak how SVE CFI expressions are emitted (#151677)

2025-08-06 09:21:57 +01:00

fp8-sve-cvt-cvtlt.ll

[LLVM][AArch64] Relax SVE/SME codegen predicates. (#145322)

2025-07-02 11:39:33 +01:00

fp8-sve-cvtn.ll

[LLVM][AArch64] Relax SVE/SME codegen predicates. (#145322)

2025-07-02 11:39:33 +01:00

fp8-sve-fdot.ll

…

fp8-sve-fmla.ll

…

fp16_fast_math.ll

[DAGCombiner] Eliminate fp casts if we have the right fast math flags (#131345)

2025-04-28 11:21:51 +01:00

fp16_i16_intrinsic_scalar.ll

[AArch64][SDAG] Add f16 -> i16 rounding NEON conversion intrinsics (#155851)

2025-08-31 13:53:55 +01:00

fp16_intrinsic_lane.ll

…

fp16_intrinsic_scalar_1op.ll

[AArch64] Update some tests to use a more common check prefix. NFC

2025-07-28 08:26:48 +01:00

fp16_intrinsic_scalar_2op.ll

[AArch64] Update some tests to use a more common check prefix. NFC

2025-07-28 08:26:48 +01:00

fp16_intrinsic_scalar_3op.ll

…

fp16_intrinsic_vector_1op.ll

[AArch64][SDAG] Add f16 -> i16 rounding NEON conversion intrinsics (#155851)

2025-08-31 13:53:55 +01:00

fp16_intrinsic_vector_2op.ll

…

fp16_intrinsic_vector_3op.ll

…

fp16-fmla.ll

…

fp16-v4-instructions.ll

[AArch64] Add global isel coverage for fp16 tests and strict-fp. NFC

2025-09-29 16:54:49 +01:00

fp16-v8-instructions.ll

[AArch64] Add global isel coverage for fp16 tests and strict-fp. NFC

2025-09-29 16:54:49 +01:00

fp16-v16-instructions.ll

…

fp16-vector-bitcast.ll

…

fp16-vector-load-store.ll

…

fp16-vector-nvcast.ll

…

fp16-vector-shuffle.ll

[AArch64] Prefer using DUP instead of INS where possible (#138549)

2025-05-15 10:31:09 +02:00

fp128-folding.ll

…

fp-cond-sel.ll

…

fp-const-fold.ll

…

fp-conversion-to-tbl.ll

MachineScheduler: Improve instruction clustering (#137784)

2025-06-05 15:28:04 +08:00

fp-dp3.ll

…

fp-fcanonicalize.ll

…

fp-intrinsics-fp16.ll

[AArch64] Regenerate and update a number of check lines. NFC

2025-09-18 09:54:47 +01:00

fp-intrinsics-vector.ll

[AArch64] Regenerate and update a number of check lines. NFC

2025-09-18 09:54:47 +01:00

fp-intrinsics.ll

[AArch64] Regenerate and update a number of check lines. NFC

2025-09-18 09:54:47 +01:00

fp-maximumnum-minimumnum.ll

[AArch64][MachineCombiner] Combine sequences of gather patterns (#152979)

2025-08-18 15:10:59 +03:00

fp-veclib-expansion.ll

…

fpclamptosat_vec.ll

[LLVM][CodeGen] Check Non Saturate Case in isSaturatingMinMax (#160637)

2025-10-03 20:39:45 +01:00

fpclamptosat.ll

[LLVM][CodeGen] Check Non Saturate Case in isSaturatingMinMax (#160637)

2025-10-03 20:39:45 +01:00

fpconv-vector-op-scalarize.ll

…

fpenv.ll

…

fpext.ll

…

fpimm.ll

Fix regression tests with bad FileCheck checks (#140373)

2025-05-22 07:59:57 +03:00

fpmode.ll

…

fpow.ll

…

fpowi.ll

…

fprcvt-cvtf.ll

[AArch64] Correct SCVTF/UCVTF instructions for vector input (#152974)

2025-09-12 14:53:54 +01:00

fptoi.ll

[AArch64] Regenerate and update itofp.ll and fptoi.ll

2025-08-20 08:43:10 +01:00

fptosi-sat-scalar.ll

[AArch64][GlobalISel] Select *v1f16 for f16->s16 to_int_sat_gi (#154562)

2025-08-29 17:01:58 +01:00

fptosi-sat-vector.ll

[AArch64][GlobalISel] SIMD fpcvt codegen for fptoi(_sat) (#160831)

2025-10-24 11:53:34 +01:00

fptosi-strictfp.ll

…

fptoui-sat-scalar.ll

[AArch64][GlobalISel] Select *v1f16 for f16->s16 to_int_sat_gi (#154562)

2025-08-29 17:01:58 +01:00

fptoui-sat-vector.ll

[AArch64][GlobalISel] SIMD fpcvt codegen for fptoi(_sat) (#160831)

2025-10-24 11:53:34 +01:00

fptouint-i8-zext.ll

…

fptrunc.ll

Revert "[AArch64][GlobalISel] Expand 64bit extracts to 128bit to allow more patterns (#142904)"

2025-06-11 08:32:55 +01:00

frameaddr.ll

…

framelayout-fp-csr.ll

…

framelayout-frame-record.mir

…

framelayout-offset-immediate-change.mir

…

framelayout-scavengingslot-stack-hazard.mir

[AArch64][SME] Fix accessing the emergency spill slot with hazard padding (#142190)

2025-06-02 10:52:10 +01:00

framelayout-scavengingslot.mir

…

framelayout-split-sve.mir

[AArch64][SME] Support aarch64-split-sve-objects with VLAs/realignment (#163816)

2025-11-04 13:39:20 +00:00

framelayout-sve-basepointer.mir

…

framelayout-sve-calleesaves-fix.mir

[AArch64][SVE] Tweak how SVE CFI expressions are emitted (#151677)

2025-08-06 09:21:57 +01:00

framelayout-sve-fixed-width-access.mir

…

framelayout-sve-scavengingslot.mir

…

framelayout-sve-win.mir

[AArch64][SVE] Avoid extra pop of "FixedObject" with CalleeSavesAboveFrameRecord (#156452)

2025-10-13 08:53:12 +01:00

framelayout-sve.mir

[Codegen] Add a separate stack ID for scalable predicates (#142390)

2025-10-02 14:43:07 +01:00

framelayout-unaligned-fp.ll

…

free-zext.ll

…

freeze.ll

[DAG] Add ComputeNumSignBits(FREEZE(X)) handling (#161507)

2025-10-02 07:27:17 +00:00

frem-power2.ll

DAG: exp opcodes cannotBeOrderedNegativeFP (#167604)

2025-11-12 19:50:46 +00:00

frem.ll

…

frexp-arm64ec.ll

[Arm64EC] Add support for half (#152843)

2025-08-12 14:15:52 -07:00

frintn.ll

…

fsh-combiner-disabled.ll

[LLVM][AArch64] Correctly lower funnel shifts by constants. (#140058)

2025-05-20 11:15:21 +01:00

fsh.ll

DAG: Use poison when widening build_vector (#167631)

2025-11-12 20:17:41 +00:00

fsincos.ll

[Test] Mark a number of libcall tests nounwind (#148329)

2025-07-12 11:57:28 +02:00

fsqrt.ll

Revert "[AArch64][GlobalISel] Expand 64bit extracts to 128bit to allow more patterns (#142904)"

2025-06-11 08:32:55 +01:00

ftrunc.ll

…

func-argpassing.ll

…

func-calls.ll

…

func-sanitizer.ll

…

funclet-local-stack-size.ll

…

funclet-match-add-sub-stack.ll

…

funcptr_cast.ll

…

function-info-noredzone-present.ll

…

function-subtarget-features.ll

…

funnel-shift-rot.ll

…

funnel-shift.ll

[AArch64][GlobalISel] Add a constant funnel shift post-legalizer combine. (#151912)

2025-10-29 07:47:41 +00:00

fuse-addr-mode.mir

[AArch64] Fix invalid address-mode folding (#142167)

2025-06-03 08:23:27 +01:00

gcs-intrinsics.ll

…

gep-nullptr.ll

…

get_vector_length.ll

…

get-active-lane-mask-extract.ll

[AArch64] Combine PTEST_FIRST(PTRUE, CONCAT(A, B)) -> PTEST_FIRST(PTRUE, A) (#161384)

2025-10-02 10:13:06 +01:00

ghc-cc.ll

…

global-alignment.ll

…

global-merge-1.ll

Introduce MCAsmInfo::UsesSetToEquateSymbol and prefer = to .set

2025-06-11 22:19:31 -07:00

global-merge-2.ll

Introduce MCAsmInfo::UsesSetToEquateSymbol and prefer = to .set

2025-06-11 22:19:31 -07:00

global-merge-3.ll

Introduce MCAsmInfo::UsesSetToEquateSymbol and prefer = to .set

2025-06-11 22:19:31 -07:00

global-merge-4.ll

…

global-merge-external.ll

[AArch64] Enable GlobalMerge on externals (#158592)

2025-09-17 17:49:23 +01:00

global-merge-group-by-use.ll

…

global-merge-hidden-minsize.ll

Introduce MCAsmInfo::UsesSetToEquateSymbol and prefer = to .set

2025-06-11 22:19:31 -07:00

global-merge-ignore-single-use-minsize.ll

…

global-merge-ignore-single-use.ll

…

global-merge-minsize.ll

[AArch64] Update and extend some GlobalMerge tests. NFC

2025-09-15 10:39:07 +01:00

global-merge.ll

…

got-abuse.ll

…

gpr_cttz.ll

…

graalcc.ll

…

hadd-combine.ll

…

half-precision-signof-no-assert.ll

…

half.ll

…

hardened-br-jump-table.ll

…

highextractbitcast.ll

[AArch64][GlobalISel] Added pmull/pmull64 intrinsic support (#165740)

2025-11-05 16:53:45 +00:00

hints.ll

…

hoist-and-by-const-from-lshr-in-eqcmp-zero.ll

[AArch64][GlobalISel] Add some GISel test coverage for icmp-and tests. NFC

2025-10-30 09:00:36 +00:00

hoist-and-by-const-from-shl-in-eqcmp-zero.ll

[AArch64][GlobalISel] Add some GISel test coverage for icmp-and tests. NFC

2025-10-30 09:00:36 +00:00

hwasan-check-memaccess-fixedshadow.ll

…

hwasan-check-memaccess.ll

…

hwasan-prefer-fp.ll

…

hwasan-zero-ptr.ll

…

i1-contents.ll

…

i128_volatile_load_store.ll

…

i128_with_overflow.ll

[AArch64] Add SUBS(CSEL) fold from brcond. (#142103)

2025-06-06 18:00:00 +01:00

i128-align.ll

…

i128-cmp.ll

…

i128-fast-isel-fallback.ll

…

i128-math.ll

…

i256-math.ll

…

iabs.ll

…

icmp-cst.ll

[AArch64] Adjust comparison constant if adjusting it means less instructions (#151024)

2025-08-18 14:56:45 +01:00

icmp-or-load.ll

[AArch64] Add some tests for icmp eq chains of loads. NFC

2025-05-08 17:31:39 +01:00

icmp-shift-opt.ll

…

icmp-ult-eq-fold.ll

[AArch64] Allow peephole to optimize AND + signed compare with 0 (#153608)

2025-11-10 22:32:31 +00:00

icmp.ll

[LLVM][AArch64] Optimize sign bit tests with TST instruction for SIGN_EXTEND patterns (#158061)

2025-09-29 09:53:50 +01:00

ifcvt-select.ll

…

ifunc-asm.ll

Introduce MCAsmInfo::UsesSetToEquateSymbol and prefer = to .set

2025-06-11 22:19:31 -07:00

illegal-float-ops.ll

…

illegal-floating-point-vector-compares.ll

…

ilp32-tlsdesc.ll

…

ilp32-va.ll

…

immcost.ll

…

implicit-def-remat-requires-impdef-check.mir

…

implicit-def-subreg-to-reg-regression.ll

Revert "Reland "RegisterCoalescer: Add implicit-def of super register when coalescing SUBREG_TO_REG" (#134408)"

2025-08-04 12:07:30 +00:00

implicit-def-with-impdef-greedy-assert.mir

…

implicit-null-check.ll

…

implicit-sret.ll

…

implicitly-set-zero-high-64-bits.ll

…

inc-of-add.ll

…

init-array.ll

…

init-undef.mir

[CodeGen][NPM] Port InitUndef to NPM (#138495)

2025-07-09 15:31:31 +05:30

inline-asm-blockaddress.ll

…

inline-asm-clobber-arm64ec.ll

…

inline-asm-clobber-base-frame-pointer.ll

…

inline-asm-clobber.ll

…

inline-asm-constraints-bad-sve.ll

…

inline-asm-constraints-badI.ll

…

inline-asm-constraints-badK2.ll

…

inline-asm-constraints-badK.ll

…

inline-asm-constraints-badL.ll

…

inline-asm-flag-output.ll

…

inline-asm-globaladdress.ll

…

inline-asm-i-constraint-i1.ll

…

inline-asm-multilevel-gep.ll

…

inline-asm-speculation.ll

…

inlineasm-illegal-type.ll

…

inlineasm-ldr-pseudo.ll

…

inlineasm-output-template.ll

…

inlineasm-S-constraint.ll

…

inlineasm-Uc-constraint.ll

…

inlineasm-X-allocation.ll

…

inlineasm-X-constraint.ll

…

insert-extend.ll

…

insert-subvector-res-legalization.ll

[AArch64][SVE] Refactor getPTrue to return splat(1) when pattern=all. (#139236)

2025-05-12 10:35:30 +01:00

insert-subvector.ll

…

insertextract.ll

[GlobalISel] Add support for scalarizing vector insert and extract elements (#153274)

2025-08-27 10:21:58 +01:00

insertshuffleload.ll

…

instr-ref-ldv.ll

…

int-to-fp-no-neon.ll

…

interleaved-load-combine-pr90695.ll

…

intrinsic-cttz-elts-sve.ll

[AArch64] Combine signext_inreg of setcc(... != splat(0)) (#157665)

2025-09-16 11:42:28 +01:00

intrinsic-cttz-elts.ll

…

intrinsic-vector-match-sve2.ll

[AArch64] Combine signext_inreg of setcc(... != splat(0)) (#157665)

2025-09-16 11:42:28 +01:00

intrinsics-memory-barrier.ll

…

inttoptr_debug_value.ll

…

irg_sp_tagp.ll

…

irg-nomem.mir

[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)

2025-08-12 11:23:05 -07:00

irg.ll

…

isinf.ll

[AArch64] Simplify some masked integer comparisons. (#153783)

2025-09-30 10:17:07 +01:00

itofp-bf16.ll

[AArch64] Scalarize extracted vector loads. (#159714)

2025-09-23 07:18:46 +00:00

itofp.ll

[AArch64][GlobalISel] Be more precise in RegBankSelect for s/uitofp (#154489)

2025-08-21 17:41:01 +00:00

jti-correct-datatype.mir

…

jump-table-32.ll

…

jump-table-compress.mir

…

jump-table-duplicate.mir

[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)

2025-08-12 11:23:05 -07:00

jump-table-exynos.ll

…

jump-table-partition.ll

…

jump-table.ll

…

kcfi-bti.ll

…

kcfi-patchable-function-prefix.ll

…

kcfi.ll

…

known-never-nan.ll

…

lack-of-signed-truncation-check.ll

…

landingpad-ifcvt.ll

…

large_shift.ll

…

large-consts.ll

…

large-offset-ldr-merge.mir

…

large-stack-cmp.ll

…

large-stack.ll

…

late-taildup-computed-goto.ll

[TailDup] Delay aggressive computed-goto taildup to after RegAlloc. (#150911)

2025-07-31 19:20:05 +01:00

latency.ll

…

ld1postmul.ll

…

ldexp-arm64ec.ll

[AArch64] Regenerate and update a number of check lines. NFC

2025-09-18 09:54:47 +01:00

ldexp.ll

[AArch64][GlobalISel] Add support for ldexp (#160517)

2025-09-26 15:11:50 +01:00

ldp-stp-control-features.ll

…

ldp-stp-scaled-unscaled-pairs.ll

AArch64: Convert tests to opaque pointers (#167442)

2025-11-11 02:52:45 +00:00

ldp-stp-unknown-size.mir

…

ldradr.ll

…

ldrpre-ldr-merge.mir

[LiveVariables] Mark use without implicit if defined at instr (#119446)

2025-08-18 08:34:59 -04:00

ldst_update_cfpath.mir

[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)

2025-08-12 11:23:05 -07:00

ldst-implicitop.mir

[AArch64] Copy implicit def operands when creating LDP. (#164253)

2025-11-04 21:55:57 +00:00

ldst-miflags.mir

…

ldst-nopreidx-sp-redzone.mir

[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)

2025-08-12 11:23:05 -07:00

ldst-opt-aa.mir

…

ldst-opt-after-block-placement.ll

…

ldst-opt-mte-with-dbg.mir

…

ldst-opt-mte.mir

…

ldst-opt-non-imm-offset.mir

…

ldst-opt-zr-clobber.mir

…

ldst-opt.ll

…

ldst-opt.mir

…

ldst-paired-aliasing.ll

…

ldst-prepost-uses.ll

[DAG][AArch64] Ensure that ResNo is correct for uses of Ptr when considering postinc. (#164810)

2025-10-24 11:33:08 +01:00

ldst-regoffset.ll

…

ldst-unscaledimm.ll

…

ldst-unsignedimm.ll

…

ldst-zero.ll

…

legalize-bug-bogus-cpu.ll

…

lifetime-poison.ll

[IR] Remove size argument from lifetime intrinsics (#150248)

2025-08-08 11:09:34 +02:00

lit.local.cfg

…

literal_pools_float_apple.ll

…

literal_pools_float.ll

…

live-debugvalues-sve.mir

[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)

2025-08-12 11:23:05 -07:00

live-interval-analysis.mir

…

llrint-conv-fp16.ll

…

llrint-conv.ll

…

llround-conv-fp16.ll

…

llround-conv.ll

…

llvm-ir-to-intrinsic.ll

[AArch64][SVE] Avoid movprfx by reusing register for _UNDEF pseudos. (#166926)

2025-11-10 16:33:59 +00:00

llvm-masked-gather-legal-for-sve.ll

…

llvm-masked-scatter-legal-for-sve.ll

…

llvm.exp10.ll

Revert "[AArch64][GlobalISel] Expand 64bit extracts to 128bit to allow more patterns (#142904)"

2025-06-11 08:32:55 +01:00

llvm.frexp.ll

[AArch64][MachineCombiner] Combine sequences of gather patterns (#152979)

2025-08-18 15:10:59 +03:00

llvm.modf.ll

[AArch64][GlobalISel] Add G_FMODF instruction (#160061)

2025-10-02 10:30:31 +01:00

llvm.sincos-fmf.ll

…

llvm.sincos.ll

AArch64: Add more 3 element vector sincos tests (#165816)

2025-10-30 22:49:44 -07:00

llvm.sincospi.error.ll

RuntimeLibcalls: Remove incorrect sincospi from most targets (#166982)

2025-11-10 11:05:08 -08:00

llvm.sincospi.ll

RuntimeLibcalls: Remove incorrect sincospi from most targets (#166982)

2025-11-10 11:05:08 -08:00

load-combine-big-endian.ll

…

load-combine.ll

[LLVM][DAGCombiner] Fix size calculations in calculateByteProvider. (#148425)

2025-07-15 11:05:38 +01:00

load-insert-undef.ll

…

load-insert-zero.ll

…

load-store-forwarding.ll

…

load-zext-bitcast.ll

[AArch64] Optimize splat of extending loads to avoid GPR->FPR transfer (#163067)

2025-10-24 17:47:56 +03:00

load.ll

[GlobalISel] Widen vector loads from aligned ptrs (#144309)

2025-06-21 07:42:54 +01:00

local_vars.ll

…

local-bounds-single-trap.ll

[AArch64] Enable GlobalMerge on externals (#158592)

2025-09-17 17:49:23 +01:00

local-sym-storage-class.ll

…

logic-reassociate.ll

…

logic-shift.ll

…

logical_shifted_reg.ll

[AArch64] Support MI and PL (#150314)

2025-08-11 07:41:38 +01:00

logical-imm.ll

…

logical-op-with-not.ll

…

loh-adrp-add-ldr-clobber.mir

[LOH] Don't emit AdrpAddStr when register could be clobbered (#142849)

2025-06-11 14:54:30 -07:00

loh-use-between-adrp-add.mir

…

loh.mir

…

loop-micro-op-buffer-size-t99.ll

…

loop-sink-limit.mir

[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)

2025-08-12 11:23:05 -07:00

loop-sink.mir

[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)

2025-08-12 11:23:05 -07:00

lower-ptrmask-arm64_32.ll

…

lower-ptrmask.ll

…

lower-range-metadata-func-call.ll

[SDAG] Remove noundef workaround for range metadata/attributes (#141745)

2025-05-30 10:56:49 +02:00

lowerMUL-newload.ll

…

lr-reserved-for-ra-live-in.ll

[Clang][AArch64] Remove redundant tune args to the backend (#146896)

2025-07-05 09:36:13 +03:00

lrint-conv-fp16-win.ll

…

lrint-conv-fp16.ll

…

lrint-conv-win.ll

…

lrint-conv.ll

…

lround-conv-fp16-win.ll

…

lround-conv-fp16.ll

…

lround-conv-win.ll

…

lround-conv.ll

…

ls64-inline-asm.ll

…

ls64-intrinsics.ll

…

lshr-trunc-lshr.ll

[GISel] Combine shift + trunc + shift pattern (#155583)

2025-09-10 15:01:55 +01:00

lslfast.ll

…

luti-with-sme2.ll

[AArch64][SVE] Tweak how SVE CFI expressions are emitted (#151677)

2025-08-06 09:21:57 +01:00

machine_cse_illegal_hoist.ll

…

machine_cse_impdef_killflags.ll

…

machine_cse.ll

…

machine-combiner-copy.ll

[RegAlloc] Remove default restriction on non-trivial rematerialization (#159211)

2025-10-04 22:50:44 +00:00

machine-combiner-eor.mir

…

machine-combiner-fmul-dup.mir

…

machine-combiner-instr-fmf.mir

…

machine-combiner-madd.ll

…

machine-combiner-maddimm.mir

[AArch64] Use mov imm pseudo instructions in madd combine. (#147510)

2025-07-11 08:01:14 +01:00

machine-combiner-reassociate-accumulators.mir

…

machine-combiner-reassociate-ops-in-different-blocks.mir

…

machine-combiner-reassociate.mir

[AArch64] Remove UnsafeFPMath (#150876)

2025-07-29 12:41:09 +08:00

machine-combiner-subadd2.mir

…

machine-combiner-subadd.ll

…

machine-combiner-subregs.mir

MachineCombiner: Partially fix losing subregister indexes (#141661)

2025-11-11 02:04:52 +00:00

machine-combiner-transient.ll

…

machine-combiner.ll

[AArch64] Remove UnsafeFPMath (#150876)

2025-07-29 12:41:09 +08:00

machine-combiner.mir

[AArch64] Remove UnsafeFPMath (#150876)

2025-07-29 12:41:09 +08:00

machine-copy-prop.ll

…

machine-copy-remove.ll

…

machine-copy-remove.mir

…

machine-cp-backward-uses.mir

…

machine-cp-clobbers.mir

…

machine-cp-constant-reg.mir

…

machine-cp-sub-reg.mir

…

machine-cse-profitable-check.ll

…

machine-dead-copy.mir

…

machine-latecleanup-inlineasm.mir

[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)

2025-08-12 11:23:05 -07:00

machine-licm-hoist-load.ll

…

machine-licm-sink-instr.ll

AArch64: Enable terminal rule (#165959)

2025-11-10 12:49:21 -08:00

machine-licm-sub-loop.ll

[RegAlloc] Remove default restriction on non-trivial rematerialization (#159211)

2025-10-04 22:50:44 +00:00

machine-outliner-2fixup-blr-terminator.mir

…

machine-outliner-adrp-got-split.mir

[MachineOutliner] Don't outline ADRP pair to avoid incorrect ICF (#160232)

2025-11-10 11:54:16 -08:00

machine-outliner-all-stack.mir

…

machine-outliner-bad-adrp.mir

…

machine-outliner-bad-register.mir

…

machine-outliner-bti.mir

…

machine-outliner-bundle.mir

…

machine-outliner-calls.mir

…

machine-outliner-cfi-tail-some.mir

…

machine-outliner-cfi-tail.mir

…

machine-outliner-cfi.mir

…

machine-outliner-compatible-candidates.mir

…

machine-outliner-create-lr-livein.mir

…

machine-outliner-default.mir

…

machine-outliner-drop-stack.mir

…

machine-outliner-flags.ll

[MachineOutliner] Add profile guided outlining (#154437)

2025-09-09 10:06:46 -07:00

machine-outliner-function-annotate.mir

…

machine-outliner-inline-asm-adrp.mir

…

machine-outliner-iterative-2.mir

…

machine-outliner-iterative.mir

AArch64: Convert tests to opaque pointers (#167442)

2025-11-11 02:52:45 +00:00

machine-outliner-labels.mir

…

machine-outliner-leaf-descendants.ll

…

machine-outliner-loh.ll

[MachineOutliner] Remove LOHs from outlined candidates (#143617)

2025-06-30 14:29:06 -07:00

machine-outliner-loh.mir

[MachineOutliner] Remove LOHs from outlined candidates (#143617)

2025-06-30 14:29:06 -07:00

machine-outliner-mapper-debug-output.mir

…

machine-outliner-mapper-stats.mir

…

machine-outliner-mapping-stats.mir

…

machine-outliner-no-noreturn-no-stack.mir

…

machine-outliner-noredzone.ll

…

machine-outliner-noreturn-no-stack.mir

…

machine-outliner-noreturn-save-lr.mir

…

machine-outliner-only-unsafe-ranges.mir

…

machine-outliner-ordering.mir

…

machine-outliner-outline-bti.ll

…

machine-outliner-overlap.mir

…

machine-outliner-patchable.ll

…

machine-outliner-patchable.mir

…

machine-outliner-pgo.ll

[MachineOutliner] Add profile guided outlining (#154437)

2025-09-09 10:06:46 -07:00

machine-outliner-regsave.mir

…

machine-outliner-remarks.ll

…

machine-outliner-retaddr-sign-cfi.ll

[AArch64] Correct position of CFI Instruction for Pointer Authentication (#137795)

2025-05-06 11:31:04 +02:00

machine-outliner-retaddr-sign-diff-scope-same-key.ll

[AArch64] Correct position of CFI Instruction for Pointer Authentication (#137795)

2025-05-06 11:31:04 +02:00

machine-outliner-retaddr-sign-non-leaf.ll

[AArch64] Correct position of CFI Instruction for Pointer Authentication (#137795)

2025-05-06 11:31:04 +02:00

machine-outliner-retaddr-sign-regsave.mir

[AArch64] Correct position of CFI Instruction for Pointer Authentication (#137795)

2025-05-06 11:31:04 +02:00

machine-outliner-retaddr-sign-same-scope-diff-key.ll

[AArch64] Correct position of CFI Instruction for Pointer Authentication (#137795)

2025-05-06 11:31:04 +02:00

machine-outliner-retaddr-sign-same-scope-same-key-a.ll

…

machine-outliner-retaddr-sign-same-scope-same-key-b.ll

…

machine-outliner-retaddr-sign-sp-mod.ll

…

machine-outliner-retaddr-sign-sp-mod.mir

[AArch64] Correct position of CFI Instruction for Pointer Authentication (#137795)

2025-05-06 11:31:04 +02:00

machine-outliner-retaddr-sign-subtarget.ll

[AArch64] Correct position of CFI Instruction for Pointer Authentication (#137795)

2025-05-06 11:31:04 +02:00

machine-outliner-retaddr-sign-thunk.ll

[AArch64] Correct position of CFI Instruction for Pointer Authentication (#137795)

2025-05-06 11:31:04 +02:00

machine-outliner-retaddr-sign-v8-3.ll

…

machine-outliner-safe-range-in-middle.mir

[MachineOutliner] Avoid ranges that cross bundle boundary (#148977)

2025-07-16 09:51:25 -07:00

machine-outliner-side-effect-2.mir

…

machine-outliner-side-effect.mir

…

machine-outliner-size-info.mir

…

machine-outliner-sort-per-priority.ll

…

machine-outliner-sort-per-priority.mir

…

machine-outliner-tail.ll

…

machine-outliner-threshold.mir

…

machine-outliner-throw2.ll

…

machine-outliner-throw.ll

…

machine-outliner-thunk.ll

…

machine-outliner-unsafe-range-at-beginning.mir

…

machine-outliner-unsafe-range-at-end.mir

…

machine-outliner-unsafe-stack-call.mir

…

machine-outliner.ll

…

machine-outliner.mir

…

machine-scheduler.mir

…

machine-sink-cache-invalidation.ll

…

machine-sink-getmemoperandwithoffset.mir

…

machine-sink-kill-flags.ll

AArch64: Enable terminal rule (#165959)

2025-11-10 12:49:21 -08:00

machine-sink-zr.mir

…

machine-sme-abi-find-insert-pt.mir

[AArch64][SME] Fixup ABI routine insertion points to avoid clobbering NZCV (#161353)

2025-10-15 10:57:02 +01:00

machine-zero-copy-remove.mir

…

macho-global-symbols.ll

…

macho-none.ll

…

macho-trap.ll

…

macro-fusion-addsub-2reg-const1.mir

…

macro-fusion-last.mir

…

macro-fusion.ll

…

madd-combiner.ll

[AArch64] Use mov imm pseudo instructions in madd combine. (#147510)

2025-07-11 08:01:14 +01:00

masked-integer-compare.ll

[AArch64] Simplify some masked integer comparisons. (#153783)

2025-09-30 10:17:07 +01:00

mattr-all.ll

…

mature-mc-support.ll

…

max-jump-table.ll

…

memcmp.ll

…

memcpy-f128.ll

…

memcpy-scoped-aa.ll

[CGP] Update tests to use autogen scripts, and refresh check lines

2025-07-03 11:36:33 -07:00

memmove-inline.ll

…

memset-inline.ll

…

memset-vs-memset-inline.ll

…

memset.ll

…

memsize-remarks.ll

[Clang][AArch64] Remove redundant tune args to the backend (#146896)

2025-07-05 09:36:13 +03:00

memtag-loop-nzcv.ll

…

memtag-merge-writeback.mir

…

merge-scoped-aa-store.ll

[X86/AArch64] Autogen two additional tests

2025-07-03 13:11:29 -07:00

merge-store-dependency.ll

…

merge-store.ll

…

merge-trunc-store.ll

…

mergestores_noimplicitfloat.ll

…

midpoint-int.ll

[AArch64] Update test from #151180. (#152299)

2025-08-06 13:54:41 +01:00

min-jump-table.ll

[AArch64] Lower jump table cases threshold to 10 (#143632)

2025-06-19 01:53:36 +03:00

min-max-combine.ll

[AArch64] Support MI and PL (#150314)

2025-08-11 07:41:38 +01:00

min-max.ll

…

mingw-refptr.ll

…

minmax-of-minmax.ll

…

minmax.ll

…

mir-yaml-has-streaming-mode-changes.ll

[AArch64PostCoalescer] Propagate undef flag after replacing (#163119)

2025-10-15 10:15:44 +01:00

misched-branch-targets.mir

…

misched-bundle.mir

…

misched-cutoff.mir

[MISched] Fix off-by-one error in debug output with -misched-cutoff=<n> flag (#137988)

2025-05-06 11:12:23 +01:00

misched-detail-resource-booking-01.mir

CodeGen: Remove redundant REQUIRES registered-target from backend tests (#147475)

2025-07-09 09:25:53 +09:00

misched-detail-resource-booking-02.mir

CodeGen: Remove redundant REQUIRES registered-target from backend tests (#147475)

2025-07-09 09:25:53 +09:00

misched-fuse-cset.ll

[AArch64] Add a FeatureFuseCmpCSet (#153189)

2025-08-28 21:26:12 +01:00

misched-fusion-addadrp.ll

…

misched-fusion-addr-tune.ll

…

misched-fusion-addr.ll

…

misched-fusion-aes.ll

…

misched-fusion-arith-logic.mir

…

misched-fusion-cmp-bcc.ll

AArch64: Convert tests to opaque pointers (#167442)

2025-11-11 02:52:45 +00:00

misched-fusion-cmp.mir

…

misched-fusion-crypto-eor.mir

…

misched-fusion-csel.ll

[AArch64] Add FeatureFuseCCSelect to a number of CPU configurations. (#153188)

2025-08-28 19:35:28 +01:00

misched-fusion-lit.ll

…

misched-fusion.ll

…

misched-move-imm.mir

…

misched-predicate-virtreg.mir

…

misched-sort-resource-in-trace.mir

CodeGen: Remove redundant REQUIRES registered-target from backend tests (#147475)

2025-07-09 09:25:53 +09:00

misched-stp.ll

…

mla_mls_merge.ll

…

mlicm-csr-mask.mir

…

mlicm-implicit-defs.mir

MachineLICM: Merge logic for implicit and explicit definitions.

2025-07-09 13:02:15 -07:00

mlicm-stack-write-check.mir

…

mops-register-alias.ll

…

movi64_sve.ll

[AArch64] Use SVE to materialise some 128-bit vector constants (#159101)

2025-09-25 09:36:59 +01:00

movid-no-neon.ll

…

movimm-expand-ldst.ll

…

movimm-expand-ldst.mir

…

movimm-wzr.mir

…

movw-consts.ll

…

movw-shift-encoding.ll

…

mul_by_elt.ll

…

mul_pow2.ll

…

mul-cmp.ll

…

mul-lohi.ll

…

mul.ll

[GlobalISel] Widen vector loads from aligned ptrs (#144309)

2025-06-21 07:42:54 +01:00

mulcmle.ll

…

multi-vector-load-size.ll

…

multi-vector-store-size.ll

…

naked-fn-with-frame-pointer.ll

…

named-vector-shuffle-reverse-neon.ll

…

named-vector-shuffle-reverse-sve.ll

…

named-vector-shuffles-neon.ll

…

named-vector-shuffles-sve.ll

[AArch64][ISel] Select constructive EXT_ZZI pseudo instruction (#152554)

2025-08-15 14:30:24 +01:00

neg-abs.ll

[AArch64][GlobalISel] Add extra GISel test coverage. NFC

2025-07-30 10:53:47 +01:00

neg-imm.ll

…

neg-selects.ll

[AArch64][GlobalISel] Add extra GISel test coverage. NFC

2025-07-30 10:53:47 +01:00

neon_rbit.ll

…

neon-abd.ll

…

neon-addlv.ll

[AArch64] Regenerate and update a number of check lines. NFC

2025-09-18 09:54:47 +01:00

neon-bitcast.ll

[AArch64] Prefer using DUP instead of INS where possible (#138549)

2025-05-15 10:31:09 +02:00

neon-bitselect.ll

…

neon-bitwise-instructions.ll

[AArch64][GlobalISel] Use TargetConstant for shift immediates (#161527)

2025-10-03 20:16:08 +01:00

neon-compare-instructions.ll

[AArch64][GlobalISel] Use TargetConstant for shift immediates (#161527)

2025-10-03 20:16:08 +01:00

neon-diagnostics.ll

…

neon-dot-product.ll

[AArch64][GlobalISel] Lower udot/sdot intrinsics to G_UDOT/G_SDOT

2025-07-30 11:02:30 +01:00

neon-dotpattern.ll

…

neon-dotreduce.ll

[AArch64] Lower zero cycle FPR zeroing (#156261)

2025-09-10 08:32:51 +03:00

neon-extadd-extract.ll

[GlobalISel] Add G_EXTRACT_VECTOR_ELT for computeKnownBits (#164825)

2025-11-05 23:26:22 +00:00

neon-extadd.ll

…

neon-extmul.ll

[AArch64][GlobalISel] Add push_mul_through_s/zext (#141551)

2025-07-31 07:38:11 +01:00

neon-extract.ll

…

neon-extracttruncate.ll

…

neon-famin-famax.ll

…

neon-fma-FMF.ll

…

neon-fma.ll

…

neon-fp8-cvt.ll

…

neon-fp8-fscale.ll

…

neon-fp16fml.ll

…

neon-fpextend_f16.ll

…

neon-fpround_f128.ll

…

neon-idiv.ll

…

neon-inline-asm-16-bit-fp.ll

…

neon-ins-trunc-elt.ll

…

neon-insert-sve-elt.ll

[AArch64] Prefer using DUP instead of INS where possible (#138549)

2025-05-15 10:31:09 +02:00

neon-insextbitcast.ll

[AArch64] Prefer using DUP instead of INS where possible (#138549)

2025-05-15 10:31:09 +02:00

neon-luti.ll

…

neon-mla-mls.ll

…

neon-mov.ll

[AArch64][GlobalISel] Correct instructions for 64bit fneg constant vectors. (#166537)

2025-11-09 19:10:21 +00:00

neon-or-combine.ll

…

neon-partial-reduce-dot-product.ll

[AArch64] Improve codegen for partial.reduce.add v16i8 -> v2i32 (#161833)

2025-10-09 17:08:10 +01:00

neon-perm.ll

…

neon-reverseshuffle.ll

…

neon-rshrn.ll

…

neon-saba.ll

[AArch64] Transform add(x, abs(y)) -> saba(x, y, 0) (#156615)

2025-09-08 14:14:24 +01:00

neon-sad.ll

[AArch64] Expand UADDLV patterns to handle two-step i8->i16->i32 extends (#146078)

2025-07-08 18:29:11 +01:00

neon-scalar-by-elem-fma.ll

…

neon-scalar-copy.ll

…

neon-scalarize-histogram.ll

[AArch64] Expand llvm.histogram intrinsic to support umax, umin, and uadd.sat operations (#138447)

2025-06-11 15:15:24 +01:00

neon-sha3.ll

…

neon-shift-left-long.ll

[AArch64][GlobalISel] Use TargetConstant for shift immediates (#161527)

2025-10-03 20:16:08 +01:00

neon-shift-neg.ll

…

neon-shuffle-vector-tbl.ll

…

neon-sm4-sm3.ll

…

neon-stepvector.ll

…

neon-truncstore.ll

…

neon-vcadd.ll

…

neon-vcmla.ll

…

neon-vector-splat.ll

…

neon-vmull-high-p8.ll

…

neon-vmull-high-p64.ll

…

neon-wide-splat.ll

…

neon-widen-shuffle.ll

…

nest-register.ll

[AArch64] fix trampoline implementation: use X15 (#126743)

2025-06-11 21:49:01 -04:00

nested-iv-regalloc.mir

[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)

2025-08-12 11:23:05 -07:00

new-load-requires-renaming-in-mssa.ll

…

no_cfi.ll

…

no-fp-asm-clobbers-crash.ll

…

no-promote-scalabale-const-to-global.ll

[AArch64] Do not promote scalable constants to global variables (#146926)

2025-07-07 09:17:31 +01:00

no-quad-ldp-stp.ll

AArch64: Convert tests to opaque pointers (#167442)

2025-11-11 02:52:45 +00:00

no-reorder-cfi-merge-back-load.mir

…

no-reorder-cfi-merge-back-store.mir

…

no-reorder-cfi-merge-fwd-load.mir

…

no-reorder-cfi-merge-fwd.mir

…

no-reorder-cfi-no-merge.mir

…

no-reorder-cfi.ll

…

no-stack-arg-probe.ll

…

no-sve-no-neon.ll

…

no-tail-call-bzero-from-memset.ll

…

nofpclass.ll

CodeGen: Add ISD::AssertNoFPClass (#138839)

2025-05-15 16:05:15 +08:00

nomerge.ll

…

nonlazybind.ll

…

nontemporal-load.ll

MachineScheduler: Reset next cluster candidate for each node (#139513)

2025-05-28 14:53:46 +08:00

nontemporal.ll

[AArch64][MachineCombiner] Combine sequences of gather patterns (#152979)

2025-08-18 15:10:59 +03:00

note-gnu-property-elf-pauthabi.ll

…

note-gnu-property-gcs.ll

…

note-gnu-property-pac-bti-0.ll

…

note-gnu-property-pac-bti-1.ll

…

note-gnu-property-pac-bti-2.ll

…

note-gnu-property-pac-bti-3.ll

…

note-gnu-property-pac-bti-4.ll

…

null-mctargetstreamer.ll

…

nzcv-save.ll

MachineScheduler: Improve instruction clustering (#137784)

2025-06-05 15:28:04 +08:00

O0-pipeline.ll

…

O3-pipeline.ll

…

optimize_combine_large_shifts.ll

…

optimize-cond-branch.ll

…

optimize-imm.ll

…

or-combine.ll

…

outlining-with-streaming-mode-changes.ll

[AArch64][SME] Rework VG CFI information for streaming-mode changes (#152283)

2025-08-20 14:06:12 +01:00

overeager_mla_fusing.ll

…

overflow.ll

…

overlapping-copy-bundle-cycle.mir

…

overlapping-copy-bundle.mir

…

p2align-zero-fillvalue.ll

…

pacbti-llvm-generated-funcs-1.ll

…

pacbti-llvm-generated-funcs-2.ll

[AArch64] Correct position of CFI Instruction for Pointer Authentication (#137795)

2025-05-06 11:31:04 +02:00

pacbti-module-attrs.ll

…

paired-load.ll

…

parity.ll

…

partial-pipeline-execution.ll

[AArch64][test] Remove unsafe-fp-math uses (NFC) (#164606)

2025-10-22 12:14:21 +00:00

partial-reduction-add.ll

[IR] NFC: Remove 'experimental' from partial.reduce.add intrinsic (#158637)

2025-09-17 11:44:47 +01:00

patchable-function-entry-bti.ll

…

patchable-function-entry-empty.mir

…

patchable-function-entry.ll

…

pauthlr-prologue-duplication.mir

…

PBQP-chain.ll

…

PBQP-coalesce-benefit.ll

…

PBQP-csr.ll

…

PBQP.ll

…

pcsections.ll

…

peephole-and-tst.ll

[RegAlloc] Remove default restriction on non-trivial rematerialization (#159211)

2025-10-04 22:50:44 +00:00

peephole-csel.ll

[AArch64] Convert CSEL(X, 1) into CSINC(X, XZR) in early-ifcvt (#162993)

2025-10-20 16:14:15 +02:00

peephole-csel.mir

…

peephole-insert-subreg.mir

…

peephole-insvigpr.mir

…

peephole-movd.mir

…

peephole-opt-analyzeCompare-subreg-use.mir

AArch64: Skip analyzeCompare for subregister uses (#141654)

2025-06-04 05:56:51 +09:00

peephole-opt-check-cflags.mir

…

peephole-orr.mir

…

peephole-sxtw.mir

…

perm-tb-with-sme2.ll

[AArch64][SVE] Tweak how SVE CFI expressions are emitted (#151677)

2025-08-06 09:21:57 +01:00

phi-dbg.ll

…

phi.ll

[PHIElimination] Revert #131837 #146320 #146337 (#146850)

2025-07-03 07:48:08 -04:00

PHIElimination-crash.mir

…

PHIElimination-debugloc.mir

[PHIElimination] Revert #131837 #146320 #146337 (#146850)

2025-07-03 07:48:08 -04:00

pic-eh-stubs.ll

…

pie.ll

…

pmull-ldr-merge.ll

…

popcount_vmask.ll

[LLVM][CodeGen][AArch64] Improve lowering of boolean vector popcount operations. (#166401)

2025-11-06 13:42:38 +00:00

popcount.ll

[AArch64] Improve scalar and Neon popcount with SVE CNT. (#143870)

2025-06-30 09:04:45 +01:00

post-ra-machine-sink.mir

[CodeGen][NewPM] Port "PostRAMachineSink" pass to NPM (#129690)

2025-07-10 13:10:46 +05:30

postra-mi-sched.ll

…

pow.75.ll

…

pow.ll

…

powi-arm64ec.ll

[Arm64EC] Add support for half (#152843)

2025-08-12 14:15:52 -07:00

powi-windows.ll

…

powi.ll

AArch64: Add tests for arm64ec for special case math functions (#147234)

2025-07-08 11:11:22 +09:00

pr27816.ll

…

pr33172.ll

…

pr40091.ll

…

pr48188.ll

[PHIElimination] Revert #131837 #146320 #146337 (#146850)

2025-07-03 07:48:08 -04:00

pr49781.ll

…

pr51476.ll

…

pr51516.mir

…

pr53315-returned-i128.ll

…

pr55178.ll

…

pr55201.ll

…

pr55644.ll

…

pr58350.ll

…

pr58431.ll

[GlobalISel] add KnownBits tracking for G_UMULH and G_SMULH (#158445)

2025-10-10 18:42:14 +09:00

pr58516.ll

…

pr59891-dagcombine-deleted-freeze.ll

…

pr59902.ll

…

pr61111.ll

…

pr61549.ll

…

pr66603.ll

…

pr72777.ll

[AArch64] Support MI and PL (#150314)

2025-08-11 07:41:38 +01:00

pr79100.ll

…

pr86717.ll

…

pr88966.ll

…

pr90936.ll

…

pr92062.ll

…

pr96366.ll

…

pr135776.ll

…

pr135821.ll

…

pr142314.ll

[StatepointLowering] Use FrameIndex instead of TargetFrameIndex (#153555)

2025-08-15 08:02:31 +01:00

pr148949.ll

[DAGCombiner][AArch64] Prevent SimplifyVCastOp from creating illegal scalar types after type legalization. (#148970)

2025-07-15 18:22:25 -07:00

pr157118.ll

[TargetInstrInfo][AArch64] Don't assume register came from operand 0 in canCombine (#157210)

2025-09-05 22:00:12 -07:00

pr157252.mir

[AArch64] Unfold adds when eliminating frame index with scalable offset (#158597)

2025-09-16 14:30:57 +00:00

pr161420.ll

[AArch64][SME] Preserve Chain when selecting multi-vector LUT4Is (#161494)

2025-10-02 09:27:48 +01:00

pr164181.ll

[RegAlloc] Constrain rematted regclass to use (#164386)

2025-10-23 03:05:39 +00:00

pr166870.ll

[MachineCopyPropagation] Remove logic to recognise and delete no-op moves produced after forwarded uses (#167336)

2025-11-11 15:44:54 +00:00

pr-cf624b2.ll

…

pre-indexed-addrmode-with-constant-offset.ll

…

predicated-add-sub.ll

…

preferred-alignment.ll

…

preferred-function-alignment.ll

Use F.hasOptSize() instead of checking optsize directly (#147348)

2025-07-28 08:38:52 -07:00

prefixdata.ll

…

preserve_mostcc.ll

test: correct typo in RUN line (#166511)

2025-11-05 07:22:47 +00:00

preserve_nonecc_call.ll

…

preserve_nonecc_musttail.ll

…

preserve_nonecc_swift.ll

…

preserve_nonecc_varargs_aapcs.ll

…

preserve_nonecc_varargs_darwin.ll

Revert "Reland "RegisterCoalescer: Add implicit-def of super register when coalescing SUBREG_TO_REG" (#134408)"

2025-08-04 12:07:30 +00:00

preserve_nonecc_varargs_win64.ll

…

preserve_nonecc.ll

…

preserve.ll

…

print-pipeline-passes.ll

[AArch64] Don't run loop-idiom-vectorize pass in the O0 pipeline (#156802)

2025-09-06 00:12:36 -07:00

prologue-epilogue-remarks.mir

…

ptradd.ll

[SDAG] Prefer scalar for prefix of vector GEP expansion (#146719)

2025-07-02 18:16:27 -07:00

ptrauth-arm64-tls-dynamics.ll

GlobalISel: Replace use of report_fatal_error (#145866)

2025-06-27 21:16:23 +09:00

ptrauth-basic-pic.ll

…

ptrauth-bti-call.ll

AArch64: Convert tests to opaque pointers (#167442)

2025-11-11 02:52:45 +00:00

ptrauth-call-rv-marker.ll

AArch64: Convert tests to opaque pointers (#167442)

2025-11-11 02:52:45 +00:00

ptrauth-call.ll

[AArch64][PAC] Fix clobbering registers by BLRA and AUTH_TCRETURN (#155373)

2025-08-27 19:36:00 +03:00

ptrauth-constant-in-code.ll

…

ptrauth-elf-globals-pic.ll

…

ptrauth-elf-got-function-symbols.ll

…

ptrauth-extern-weak.ll

…

ptrauth-fpac.ll

[AArch64] Regenerate and update a number of check lines. NFC

2025-09-18 09:54:47 +01:00

ptrauth-got-abuse.ll

…

ptrauth-indirectbr.ll

…

ptrauth-init-fini.ll

…

ptrauth-intrinsic-auth-resign-with-blend.ll

AArch64: Relax x16/x17 constraint on AUT in certain cases.

2025-07-09 13:46:44 -07:00

ptrauth-intrinsic-auth-resign.ll

[AArch64][PAC] Do not execute AUT instructions speculatively (#155372)

2025-08-27 16:46:35 +03:00

ptrauth-intrinsic-blend.ll

…

ptrauth-intrinsic-sign-generic.ll

…

ptrauth-intrinsic-sign.ll

…

ptrauth-intrinsic-strip.ll

…

ptrauth-invoke.ll

…

ptrauth-isel.ll

[AArch64][PAC] Introduce AArch64::PAC pseudo instruction (#146488)

2025-07-25 13:10:37 +03:00

ptrauth-isel.mir

[AArch64][PAC] Introduce AArch64::PAC pseudo instruction (#146488)

2025-07-25 13:10:37 +03:00

ptrauth-reloc.ll

AArch64: Convert tests to opaque pointers (#167442)

2025-11-11 02:52:45 +00:00

ptrauth-ret-trap.ll

…

ptrauth-ret.ll

…

ptrauth-sign-personality.ll

…

ptrauth-tagged-globals-pic.ll

…

ptrauth-tail-call-regalloc.ll

…

ptrauth-tiny-model-pic.ll

…

ptrauth-tiny-model-static.ll

…

ptrauth-tls-darwin.ll

…

ptrauth-type-info-vptr-discr.ll

…

pull-binop-through-shift.ll

…

pull-conditional-binop-through-shift.ll

…

pull-negations-after-concat-of-truncates.ll

…

qmovn.ll

[GlobalISel] Support saturated truncate (#150219)

2025-08-21 15:37:53 +01:00

qshrn.ll

…

ragreedy-csr.ll

[PHIElimination] Revert #131837 #146320 #146337 (#146850)

2025-07-03 07:48:08 -04:00

ragreedy-local-interval-cost.ll

[AArch64] Scalarize extracted vector loads. (#159714)

2025-09-23 07:18:46 +00:00

rand.ll

[AArch64] Copy CSNEG, CSINV, and CSINC computeKnownBitsForTargetNode from ARM (#155122)

2025-08-28 08:43:54 +01:00

rax1.ll

[AArch64][GlobalISel] Add rax1.ll test converage. NFC

2025-10-20 12:53:30 +01:00

rbit.ll

…

rcpc3-sve.ll

…

rcpc3.ll

…

read-pc.ll

…

readcyclecounter.ll

…

reassocmls.ll

[AArch64][GlobalISel] Add extra GISel test coverage. NFC

2025-07-30 10:53:47 +01:00

recp-fastmath.ll

[AArch64][test] Remove unsafe-fp-math uses (NFC) (#164606)

2025-10-22 12:14:21 +00:00

reduce-and.ll

…

reduce-or-opt.ll

[PHIElimination] Revert #131837 #146320 #146337 (#146850)

2025-07-03 07:48:08 -04:00

reduce-or.ll

…

reduce-shuffle.ll

…

reduce-xor.ll

…

redundant-copy-elim-empty-mbb.ll

…

redundant-mov-from-zero-extend.ll

…

redundant-orrwrs-from-zero-extend.mir

…

Redundantstore.ll

…

reg-scavenge-frame.mir

…

regalloc-hint-movprfx.mir

[AArch64] Add 'REQUIRES: asserts' to regalloc-hint-movprfx.mir

2025-11-12 12:17:29 +00:00

regalloc-last-chance-recolor-with-split.mir

[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)

2025-08-12 11:23:05 -07:00

regalloc-spill-weight-basic.ll

…

regcoal-physreg.mir

…

register-coalesce-update-subranges-remat.mir

Revert "Reland "RegisterCoalescer: Add implicit-def of super register when coalescing SUBREG_TO_REG" (#134408)"

2025-08-04 12:07:30 +00:00

regress-bitcast-formals.ll

…

regress-combine-extract-vectors.ll

…

regress-f128csel-flags.ll

…

regress-fp128-livein.ll

…

regress-tail-livereg.ll

…

regress-tblgen-chains.ll

…

regress-w29-reserved-with-fp.ll

[win][aarch64] Always reserve frame pointers for Arm64 Windows, take 2 (#147354)

2025-07-08 12:18:13 -07:00

relaxed-fp-atomics.ll

…

reloc-specifiers.mir

…

rem_crash.ll

…

rem-by-const.ll

[AArch64][GlobalISel] Add a constant funnel shift post-legalizer combine. (#151912)

2025-10-29 07:47:41 +00:00

rem.ll

[AArch64][GlobalISel] Ensure we have a insert-subreg v4i32 GPR pattern (#142724)

2025-06-06 17:44:33 +01:00

remat-const-float-simd.ll

[AArch64] Regenerate and update a number of check lines. NFC

2025-09-18 09:54:47 +01:00

remat-float0.ll

…

remat.ll

…

replace-load-with-shrink-store-indexed-crash.ll

…

replace-with-veclib-armpl.ll

[IR] Add new function attribute nocreateundeforpoison (#164809)

2025-11-04 12:00:44 +00:00

replace-with-veclib-libmvec-scalable.ll

[AArch64][VecLib] Add libmvec support for AArch64 targets (#143696)

2025-06-17 11:07:43 +01:00

replace-with-veclib-libmvec.ll

[AArch64][VecLib] Add libmvec support for AArch64 targets (#143696)

2025-06-17 11:07:43 +01:00

replace-with-veclib-sleef-scalable.ll

…

replace-with-veclib-sleef.ll

…

reserveXreg-for-regalloc.ll

[RegAlloc] Remove default restriction on non-trivial rematerialization (#159211)

2025-10-04 22:50:44 +00:00

reserveXreg.ll

[AArch64] Disable machine-verifier for failing test, fix perf regression (#140005)

2025-05-15 11:20:47 -07:00

returnaddr.ll

…

rm_redundant_cmp.ll

…

rmif-def-nzcv.mir

…

rmif-use-nzcv.mir

…

rotate-extract.ll

…

rotate.ll

…

round-conv.ll

…

round-fptosi-sat-scalar.ll

…

round-fptoui-sat-scalar.ll

…

rqshrn.ll

…

rvmarker-pseudo-expansion-and-outlining.mir

[AArch64] Allow the clang.arc.attachedcall marker to be optional (#138694)

2025-05-08 16:49:31 +01:00

sadd_sat_plus.ll

…

sadd_sat_vec.ll

[AArch64] Add v1i64 addsat/subsat (#142342)

2025-06-03 21:47:41 +01:00

sadd_sat.ll

[AArch64] Extend test coverage for v1i64 add/sub.sat. NFC

2025-06-02 08:33:27 +01:00

sat-add.ll

[AArch64] Support commuted operands in performFlagSettingCombine (#162496)

2025-10-13 13:09:28 +01:00

saturating-vec-smull.ll

[AArch64][Codegen]Transform saturating smull to sqdmulh (#143671)

2025-07-16 09:50:04 +01:00

sbc.ll

[AArch64] Combine subtract with borrow to SBC. (#165271)

2025-11-10 10:26:05 +00:00

scalable_masked_deinterleaved_loads.ll

[AArch64] Improve lowering for scalable masked deinterleaving loads (#154338)

2025-09-03 09:51:54 +01:00

scalable_masked_interleaved_stores.ll

[AArch64] Improve lowering for scalable masked interleaving stores (#156718)

2025-09-08 10:34:53 +01:00

scalable-vector-promotion.ll

…

scalar-mla-mls.ll

…

scalarize-vector-load.ll

[AArch64] Scalarize extracted vector loads. (#159714)

2025-09-23 07:18:46 +00:00

scavenge-large-call.ll

[AArch64] Skip storing of stack arguments when lowering tail calls (#126735)

2025-06-06 11:26:24 +03:00

sched-loop-align.ll

…

sched-movprfx.ll

…

sched-past-vector-ldst.ll

[AArch64] Remove UnsafeFPMath (#150876)

2025-07-29 12:41:09 +08:00

sched-postidxalias.mir

…

sched-print-cycle.mir

…

scheduledag-constreg.mir

…

scmp.ll

[GlobalISel] Add G_CONCAT_VECTOR handling in computeNumSignBits (#142355)

2025-06-04 11:11:18 +01:00

sdag-no-typesize-warnings-regandsizes.ll

…

sdag-store-merging-bug.ll

…

sdivpow2.ll

[AArch64] Support MI and PL (#150314)

2025-08-11 07:41:38 +01:00

seh_funclet_x1.ll

…

seh-extended-spills.ll

AArch64: align pair-wise spills on WoS to 16-byte (#166902)

2025-11-11 13:37:21 -08:00

seh-finally.ll

Introduce MCAsmInfo::UsesSetToEquateSymbol and prefer = to .set

2025-06-11 22:19:31 -07:00

seh-minimal-prologue-epilogue.ll

Aarch64: Emit a minimal SEH prologue when needed (#158173)

2025-09-30 08:16:54 -07:00

select_cc.ll

[AArch64][GlobalISel] Use TargetConstant for shift immediates (#161527)

2025-10-03 20:16:08 +01:00

select_const.ll

[GlobaISel] Allow expanding of sdiv -> mul by constant (#146504)

2025-07-14 15:01:12 +01:00

select_fmf.ll

…

select-constant-xor.ll

[AArch64] Support MI and PL (#150314)

2025-08-11 07:41:38 +01:00

select-to-and-zext.ll

…

select-with-and-or.ll

…

selectcc-to-shiftand.ll

[AArch64][GlobalISel] Use TargetConstant for shift immediates (#161527)

2025-10-03 20:16:08 +01:00

selectiondag-order.ll

…

selectopt-cast.ll

…

selectopt-const.ll

[AArch64] Keep floating-point conversion in SIMD (#147707)

2025-07-30 14:53:56 +03:00

selectopt-logical.ll

…

selectopt-not.ll

…

selectopt.ll

…

semantic-interposition-asm.ll

…

semantic-interposition-memtag.ll

…

seqpaircopy.mir

…

seqpairspill.mir

…

setcc_knownbits.ll

…

setcc-fsh.ll

[SelectionDAG] Fix incorrect fold condition in foldSetCCWithFunnelShift. (#137637)

2025-05-12 13:25:07 +08:00

setcc-takes-i32.ll

…

setcc-type-mismatch.ll

…

setf8-def-nzcv.mir

…

setf8-use-nzcv.mir

…

setf16-def-nzcv.mir

…

setf16-use-nzcv.mir

…

setjmp-bti-no-enforcement.ll

…

setjmp-bti-outliner.ll

…

setjmp-bti.ll

…

settag-merge-nonaligned-fp.ll

…

settag-merge-order.ll

…

settag-merge.ll

…

settag-merge.mir

…

settag.ll

…

sext.ll

[AArch64][GlobalISel] Ensure we have a insert-subreg v4i32 GPR pattern (#142724)

2025-06-06 17:44:33 +01:00

shadow-call-stack.ll

…

shift_minsize.ll

…

shift-accumulate.ll

…

shift-amount-mod.ll

…

shift-by-signext.ll

…

shift-const-ne-0.ll

…

shift-logic.ll

…

shift-mod.ll

…

shift.ll

Revert "[AArch64][GlobalISel] Expand 64bit extracts to 128bit to allow more patterns (#142904)"

2025-06-11 08:32:55 +01:00

shiftregister-from-and.ll

…

shl-to-add.ll

…

shr-exact-demanded-bits.ll

…

shrink-constant-multiple-users.ll

…

shrink-wrap-byval-inalloca-preallocated.ll

…

shrink-wrap-const-pool-access.mir

[ShrinkWrap] Consider constant pool access as non-stack access (#164393)

2025-10-22 04:05:57 -07:00

shrink-wrap.ll

…

shrink-wrapping-vla.ll

…

shrinkwrap-split-restore-point.mir

[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)

2025-08-12 11:23:05 -07:00

shuffle-extend.ll

[AArch64] Prefer using DUP instead of INS where possible (#138549)

2025-05-15 10:31:09 +02:00

shuffle-mask-legal.ll

…

shuffle-select.ll

…

shuffle-tbl34.ll

…

shuffles.ll

…

shufflevector.ll

Revert "[DAGCombiner] Relax condition for extract_vector_elt combine" (#157953)

2025-09-10 21:33:44 +00:00

sibling-call.ll

…

sign-return-address-cfi-negate-ra-state.ll

[AArch64][PAC] Protect the entire function if pac-ret+leaf is requested (#140895)

2025-07-09 18:40:45 +03:00

sign-return-address-pauth-lr.ll

[AArch64] Regenerate and update a number of check lines. NFC

2025-09-18 09:54:47 +01:00

sign-return-address-tailcall.ll

[AArch64][PAC] Protect the entire function if pac-ret+leaf is requested (#140895)

2025-07-09 18:40:45 +03:00

sign-return-address.ll

[AArch64] Fix the emission of WinCFI for pac-ret+leaf and SCS (#147518)

2025-07-12 13:45:48 +03:00

signbit-shift.ll

[AArch64] Support MI and PL (#150314)

2025-08-11 07:41:38 +01:00

signbit-test.ll

[AArch64][GlobalISel] Add some GISel test coverage for icmp-and tests. NFC

2025-10-30 09:00:36 +00:00

signed-truncation-check.ll

[AArch64][GlobalISel] Add some GISel test coverage for icmp-and tests. NFC

2025-10-30 09:00:36 +00:00

simple-macho.ll

…

sincos-expansion.ll

…

sincos-stack-slots.ll

…

sink-addsub-of-const.ll

…

sink-and-fold-clear-kill-flags.mir

…

sink-and-fold-drop-dbg.mir

[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)

2025-08-12 11:23:05 -07:00

sink-and-fold-illegal-shift.mir

[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)

2025-08-12 11:23:05 -07:00

sink-and-fold-preserve-debugloc.mir

[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)

2025-08-12 11:23:05 -07:00

sink-and-fold.ll

[PHIElimination] Revert #131837 #146320 #146337 (#146850)

2025-07-03 07:48:08 -04:00

sink-copy-for-shrink-wrap.ll

…

sink-mul-exts.ll

…

sinksplat.ll

…

sitofp-to-tbl.ll

…

sls-crash.ll

…

sls-stackprotector-outliner.ll

…

sme2-fp8-intrinsics-cvt.ll

[AArch64][SVE] Tweak how SVE CFI expressions are emitted (#151677)

2025-08-06 09:21:57 +01:00

sme2-fp8-intrinsics-fmopa.ll

…

sme2-fp8-intrinsics-mla.ll

…

sme2-intrinsics-add-sub-za16.ll

…

sme2-intrinsics-add.ll

…

sme2-intrinsics-cvt.ll

…

sme2-intrinsics-cvtl.ll

…

sme2-intrinsics-cvtn.ll

…

sme2-intrinsics-extract-mova.ll

…

sme2-intrinsics-faminmax.ll

…

sme2-intrinsics-fclamp.ll

[NFC][LLVM][SME] Seperate streaming mode only intrinsic tests.

2025-06-24 14:18:49 +00:00

sme2-intrinsics-fmlas16.ll

…

sme2-intrinsics-fmlas.ll

…

sme2-intrinsics-fp8-fdot.ll

…

sme2-intrinsics-fp8-fvdot.ll

…

sme2-intrinsics-fp-dots.ll

…

sme2-intrinsics-frint.ll

…

sme2-intrinsics-fscale.ll

…

sme2-intrinsics-insert-mova.ll

…

sme2-intrinsics-int-dots.ll

…

sme2-intrinsics-ld1.ll

[LLVM][CodeGen][SME] Only emit strided loads in streaming mode. (#150445)

2025-07-30 11:41:46 +01:00

sme2-intrinsics-ldnt1.ll

[LLVM][CodeGen][SME] Only emit strided loads in streaming mode. (#150445)

2025-07-30 11:41:46 +01:00

sme2-intrinsics-luti2-lane-x2.ll

…

sme2-intrinsics-luti2-lane-x4.ll

…

sme2-intrinsics-luti2-lane.ll

…

sme2-intrinsics-luti4-lane-x2.ll

…

sme2-intrinsics-luti4-lane-x4.ll

[AArch64][SME] Preserve Chain when selecting multi-vector LUT4Is (#161494)

2025-10-02 09:27:48 +01:00

sme2-intrinsics-luti4-lane.ll

…

sme2-intrinsics-luti4.ll

[AArch64][SME] Preserve Chain when selecting multi-vector LUT4Is (#161494)

2025-10-02 09:27:48 +01:00

sme2-intrinsics-max.ll

…

sme2-intrinsics-min.ll

…

sme2-intrinsics-mlall.ll

…

sme2-intrinsics-mlals.ll

…

sme2-intrinsics-mop4-fp8.ll

[Clang][llvm] Implement fp8 FMOP4A intrinsics (#130127)

2025-04-23 14:10:13 +01:00

sme2-intrinsics-mop4a_1x1.ll

…

sme2-intrinsics-mop4a_1x2.ll

…

sme2-intrinsics-mop4a_2x1.ll

…

sme2-intrinsics-mop4a_2x2.ll

…

sme2-intrinsics-mop.ll

…

sme2-intrinsics-mopa.ll

…

sme2-intrinsics-qcvt.ll

[AArch64][SVE] Tweak how SVE CFI expressions are emitted (#151677)

2025-08-06 09:21:57 +01:00

sme2-intrinsics-qcvtn.ll

[NFC][LLVM][SME] Seperate streaming mode only intrinsic tests.

2025-06-24 14:18:49 +00:00

sme2-intrinsics-qrshr.ll

[AArch64][SVE] Tweak how SVE CFI expressions are emitted (#151677)

2025-08-06 09:21:57 +01:00

sme2-intrinsics-rshl.ll

…

sme2-intrinsics-sclamp.ll

[NFC][LLVM][SME] Seperate streaming mode only intrinsic tests.

2025-06-24 14:18:49 +00:00

sme2-intrinsics-select-sme-tileslice.ll

…

sme2-intrinsics-sqdmulh.ll

…

sme2-intrinsics-sub.ll

…

sme2-intrinsics-tmop.ll

…

sme2-intrinsics-uclamp.ll

[NFC][LLVM][SME] Seperate streaming mode only intrinsic tests.

2025-06-24 14:18:49 +00:00

sme2-intrinsics-vdot.ll

…

sme2-intrinsics-write-zt.ll

…

sme2-intrinsics-zero-zt.ll

…

sme2-intrinsics-zt0.ll

…

sme2-multivec-regalloc.mir

[AArch64][SVE] Tweak how SVE CFI expressions are emitted (#151677)

2025-08-06 09:21:57 +01:00

sme2p1-intrinsics-movaz.ll

…

sme2p1-intrinsics-zero.ll

…

sme-aarch64-svcount-O3.ll

…

sme-aarch64-svcount.ll

…

sme-abi-eh-liveins.mir

[LiveRegUnits] Exclude runtime defined liveins when computing liveouts (#154325)

2025-08-21 09:06:32 +01:00

sme-agnostic-za.ll

[AArch64][SME] Propagate desired ZA states in the MachineSMEABIPass (#149510)

2025-10-28 09:41:57 +00:00

sme-avoid-coalescing-locally-streaming.ll

[AArch64] Regenerate and update a number of check lines. NFC

2025-09-18 09:54:47 +01:00

sme-call-streaming-compatible-to-normal-fn-wihout-sme-attr.ll

[AArch64][SME] Rework VG CFI information for streaming-mode changes (#152283)

2025-08-20 14:06:12 +01:00

sme-callee-save-restore-pairs.ll

[AArch64][SME] Introduce CHECK_MATCHING_VL pseudo for streaming transitions (#157510)

2025-09-17 09:39:30 +01:00

sme-darwin-no-sve-vg.ll

…

sme-darwin-sve-vg.ll

[AArch64][SME] Rework VG CFI information for streaming-mode changes (#152283)

2025-08-20 14:06:12 +01:00

sme-disable-gisel-fisel.ll

[AArch64][SME] Use mrs %reg, SVCR rather than ABI routine with +sme (#156878)

2025-09-05 10:19:05 +01:00

sme-disable-rematerialize-with-streaming-mode-changes.ll

…

sme-framelower-use-bp.ll

…

sme-intrinsics-add.ll

…

sme-intrinsics-loads.ll

…

sme-intrinsics-mopa.ll

…

sme-intrinsics-mops.ll

…

sme-intrinsics-mova-extract.ll

…

sme-intrinsics-mova-insert.ll

…

sme-intrinsics-rdsvl.ll

[AArch64] Optimized rdsvl followed by constant mul (#162853)

2025-10-24 11:17:49 +01:00

sme-intrinsics-state.ll

…

sme-intrinsics-stores.ll

…

sme-intrinsics-zero.ll

…

sme-lazy-save-call-remarks.ll

…

sme-lazy-save-call.ll

[AArch64][SME] Use mrs %reg, SVCR rather than ABI routine with +sme (#156878)

2025-09-05 10:19:05 +01:00

sme-lazy-save-windows.ll

[AArch64][SME] Support Windows/stack probes in MachineSMEABIPass (#149063)

2025-09-08 10:17:07 +01:00

sme-lazy-sve-nzcv-live.mir

[AArch64][SME] Fixup ABI routine insertion points to avoid clobbering NZCV (#161353)

2025-10-15 10:57:02 +01:00

sme-machine-licm-vg.mir

…

sme-must-save-lr-for-vg.ll

[AArch64][SME] Rework VG CFI information for streaming-mode changes (#152283)

2025-08-20 14:06:12 +01:00

sme-new-za-function.ll

[AArch64][SME] Implement the SME ABI (ZA state management) in Machine IR (#149062)

2025-08-19 10:00:28 +01:00

sme-new-zt0-function.ll

[AArch64][SME] Allow spills of ZT0 around SME ABI routines again (#136726)

2025-04-25 13:33:09 +01:00

sme-peephole-opts.ll

[AArch64][SME] Allow SME peephole optimizations across SME pseudos (#157655)

2025-09-24 12:14:53 +01:00

sme-pstate-sm-changing-call-disable-coalescing.ll

AArch64: Enable terminal rule (#165959)

2025-11-10 12:49:21 -08:00

sme-read-write-tpidr2.ll

…

sme-shared-za-interface.ll

[AArch64][SME] Simplify initialization of the TPIDR2 block (#141049)

2025-08-27 09:12:49 +01:00

sme-streaming-body-streaming-compatible-interface.ll

[AArch64][SME] Use mrs %reg, SVCR rather than ABI routine with +sme (#156878)

2025-09-05 10:19:05 +01:00

sme-streaming-body.ll

[AArch64][SME] Rework VG CFI information for streaming-mode changes (#152283)

2025-08-20 14:06:12 +01:00

sme-streaming-checkvl-mir.ll

[AArch64][SME] Introduce CHECK_MATCHING_VL pseudo for streaming transitions (#157510)

2025-09-17 09:39:30 +01:00

sme-streaming-checkvl.ll

[AArch64][SME] Introduce CHECK_MATCHING_VL pseudo for streaming transitions (#157510)

2025-09-17 09:39:30 +01:00

sme-streaming-compatible-interface.ll

AArch64: Enable terminal rule (#165959)

2025-11-10 12:49:21 -08:00

sme-streaming-interface-remarks.ll

[AArch64][SME] Improve codegen for aarch64.sme.cnts* when not in streaming mode (#154761)

2025-09-12 10:23:57 +01:00

sme-streaming-interface.ll

[AArch64] Scalarize extracted vector loads. (#159714)

2025-09-23 07:18:46 +00:00

sme-streaming-mode-changes-unwindinfo.ll

[AArch64][SME] Use mrs %reg, SVCR rather than ABI routine with +sme (#156878)

2025-09-05 10:19:05 +01:00

sme-streaming-mode-changing-call-disable-stackslot-scavenging.ll

[AArch64][SME] Rework VG CFI information for streaming-mode changes (#152283)

2025-08-20 14:06:12 +01:00

sme-streaming-mode-landingpads.ll

[AArch64][SME] Resume streaming-mode on entry to exception handlers (#156638)

2025-09-04 12:55:12 +01:00

sme-support-routines-calling-convention.ll

AArch64: Fix undefined behavior in sme calling convention test (#165183)

2025-10-27 02:08:42 +00:00

sme-tileslice-addrmodes.ll

[AArch64] Match constants in SelectSMETileSlice (#151494)

2025-08-11 10:19:26 +01:00

sme-toggle-pstateza.ll

…

sme-vg-to-stack.ll

[AArch64][SME] Introduce CHECK_MATCHING_VL pseudo for streaming transitions (#157510)

2025-09-17 09:39:30 +01:00

sme-write-fpmr.ll

…

sme-write-vg.ll

…

sme-za-control-flow.ll

[AArch64][SME] Propagate desired ZA states in the MachineSMEABIPass (#149510)

2025-10-28 09:41:57 +00:00

sme-za-exceptions.ll

[AArch64][SME] Propagate desired ZA states in the MachineSMEABIPass (#149510)

2025-10-28 09:41:57 +00:00

sme-za-function-with-many-blocks.ll

[AArch64][SME] Propagate desired ZA states in the MachineSMEABIPass (#149510)

2025-10-28 09:41:57 +00:00

sme-za-lazy-save-buffer.ll

[AArch64][SME] Propagate desired ZA states in the MachineSMEABIPass (#149510)

2025-10-28 09:41:57 +00:00

sme-zt0-state.ll

[AArch64][SME] Disable tail calls for callees that require saving ZT0 (#165371)

2025-10-28 14:53:08 +00:00

sms-acceptable-loop1.mir

…

sms-acceptable-loop2.mir

…

sms-acceptable-loop3.mir

…

sms-acceptable-loop4.mir

…

sms-instruction-scheduled-at-correct-cycle.mir

…

sms-loop-carried-fp-exceptions1.mir

[MachinePipeliner] Introduce a new class for loop-carried deps (#137663)

2025-06-05 21:30:27 +09:00

sms-loop-carried-fp-exceptions2.mir

[MachinePipeliner] Introduce a new class for loop-carried deps (#137663)

2025-06-05 21:30:27 +09:00

sms-mve1.mir

…

sms-mve2.mir

…

sms-mve3.mir

…

sms-mve4.mir

…

sms-mve5.mir

…

sms-mve6.mir

…

sms-mve7.mir

…

sms-mve8.mir

…

sms-mve9.mir

…

sms-mve10.mir

…

sms-mve11.mir

…

sms-mve12.mir

…

sms-order-physreg-deps.mir

Reapply [IR] Remove options to make scalable TypeSize access a warning (#156336)

2025-09-03 11:12:11 +02:00

sms-regpress.mir

…

sms-unacceptable-loop1.mir

…

sms-unacceptable-loop2.mir

…

sms-unacceptable-loop3.mir

…

sms-unpipeline-insts1.mir

…

sms-unpipeline-insts2.mir

…

sms-unpipeline-insts3.mir

…

smul_fix_sat.ll

[AArch64] Support MI and PL (#150314)

2025-08-11 07:41:38 +01:00

smul_fix.ll

…

soft-float-abi.ll

…

space.ll

…

special-reg.ll

…

speculation-hardening-dagisel.ll

…

speculation-hardening-loads.ll

[AArch64] speculation-hardening-loads.ll - regenerate test checks

2025-07-07 18:31:12 +01:00

speculation-hardening-sls-blr-bti.mir

…

speculation-hardening-sls-blr.mir

…

speculation-hardening-sls-blra.mir

…

speculation-hardening-sls.ll

…

speculation-hardening-sls.mir

…

speculation-hardening.ll

…

speculation-hardening.mir

…

spill-fold.ll

…

spill-fold.mir

[LLVM][AArch64InstrInfo] Prevent fill folding when DstReg is SP. (#148885)

2025-07-16 13:19:55 +01:00

spill-reload-remarks.ll

[AArch64][SME] Introduce CHECK_MATCHING_VL pseudo for streaming transitions (#157510)

2025-09-17 09:39:30 +01:00

spill-stack-realignment.mir

…

spill-undef.mir

…

spillfill-sve.ll

…

spillfill-sve.mir

[Codegen] Add a separate stack ID for scalable predicates (#142390)

2025-10-02 14:43:07 +01:00

split-deadloop.mir

[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)

2025-08-12 11:23:05 -07:00

split-sve-stack-frame-layout.ll

[AArch64][SME] Enable split SVE for hazard padding in SVE CC functions (#166561)

2025-11-12 10:58:05 +00:00

split-vector-insert.ll

[AArch64][SVE] Tweak how SVE CFI expressions are emitted (#151677)

2025-08-06 09:21:57 +01:00

sponentry.ll

…

sqrt-fastmath.ll

[AArch64] Remove UnsafeFPMath (#150876)

2025-07-29 12:41:09 +08:00

srem-lkk.ll

…

srem-pow2.ll

[AArch64] Support MI and PL (#150314)

2025-08-11 07:41:38 +01:00

srem-seteq-illegal-types.ll

…

srem-seteq-optsize.ll

…

srem-seteq-vec-nonsplat.ll

…

srem-seteq-vec-splat.ll

…

srem-seteq.ll

[AArch64] Adjust comparison constant if adjusting it means less instructions (#151024)

2025-08-18 14:56:45 +01:00

srem-vec-crash.ll

…

srem-vector-lkk.ll

…

sshl_sat.ll

[AArch64] Support MI and PL (#150314)

2025-08-11 07:41:38 +01:00

ssub_sat_plus.ll

…

ssub_sat_vec.ll

[AArch64] Add v1i64 addsat/subsat (#142342)

2025-06-03 21:47:41 +01:00

ssub_sat.ll

[AArch64] Extend test coverage for v1i64 add/sub.sat. NFC

2025-06-02 08:33:27 +01:00

ssve-stack-hazard-remarks.ll

[AArch64][SME] Remove support for -arch64-enable-zpr-predicate-spills (#161819)

2025-10-06 10:08:10 +01:00

stack_guard_remat.ll

[AArch64][test] Remove unsafe-fp-math uses (NFC) (#164606)

2025-10-22 12:14:21 +00:00

stack-guard-reassign-sve.mir

…

stack-guard-reassign.ll

…

stack-guard-reassign.mir

…

stack-guard-remat-bitcast.ll

…

stack-guard-sve.ll

…

stack-guard-sysreg.ll

…

stack-guard-vaarg.ll

…

stack-hazard-defaults.ll

…

stack-hazard-windows.ll

…

stack-hazard.ll

[AArch64][SME] Enable split SVE for hazard padding in SVE CC functions (#166561)

2025-11-12 10:58:05 +00:00

stack-id-pei-alloc.mir

…

stack-id-stackslot-scavenging.mir

…

stack-probing-64k.ll

…

stack-probing-dynamic-no-frame-setup.ll

…

stack-probing-dynamic.ll

…

stack-probing-last-in-block.mir

[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)

2025-08-12 11:23:05 -07:00

stack-probing-no-scratch-reg.mir

…

stack-probing-shrink-wrap.mir

…

stack-probing-sve.ll

[AArch64][SVE] Tweak how SVE CFI expressions are emitted (#151677)

2025-08-06 09:21:57 +01:00

stack-probing.ll

…

stack-protector-darwin-got.ll

…

stack-protector-musttail.ll

…

stack-protector-target.ll

…

stack-protector-trap-unreachable.ll

…

stack-size-section.ll

…

stack-tagging-cfi.ll

…

stack-tagging-dbg-assign-tag-offset.ll

…

stack-tagging-dbg-declare-tag-offset.ll

…

stack-tagging-dbg-value-tag-offset-nopad.ll

…

stack-tagging-dbg-value-tag-offset.ll

…

stack-tagging-dbg.ll

…

stack-tagging-epilogue-fold.mir

…

stack-tagging-ex-1.ll

[AArch64][test] Remove unsafe-fp-math uses (NFC) (#164606)

2025-10-22 12:14:21 +00:00

stack-tagging-ex-2.ll

[AArch64][test] Remove unsafe-fp-math uses (NFC) (#164606)

2025-10-22 12:14:21 +00:00

stack-tagging-initializer-merge.ll

[IR] Remove size argument from lifetime intrinsics (#150248)

2025-08-08 11:09:34 +02:00

stack-tagging-loop.ll

…

stack-tagging-merge-past-memcpy.mir

[IR] Remove size argument from lifetime intrinsics (#150248)

2025-08-08 11:09:34 +02:00

stack-tagging-musttail.ll

…

stack-tagging-prologue.ll

[clang][IR] Overload @llvm.thread.pointer to support non-AS0 targets (#132489)

2025-05-14 21:51:56 +01:00

stack-tagging-setjmp.ll

…

stack-tagging-split-lifetime.ll

…

stack-tagging-stack-coloring.ll

…

stack-tagging-unchecked-ld-st.ll

…

stack-tagging-untag-placement.ll

[AArch64][test] Remove unsafe-fp-math uses (NFC) (#164606)

2025-10-22 12:14:21 +00:00

stack-tagging.ll

[IR] Only allow lifetime.start/end on allocas (#149310)

2025-07-21 15:04:50 +02:00

stackguard-internal.ll

Introduce MCAsmInfo::UsesSetToEquateSymbol and prefer = to .set

2025-06-11 22:19:31 -07:00

stackmap-args.ll

…

stackmap-dynamic-alloca.ll

…

stackmap-frame-setup.ll

…

stackmap-liveness.ll

…

stackmap.ll

[SelectionDAG] Use GetPromotedInteger when promoting integer operands of PATCHPOINT/STACKMAP. (#165926)

2025-10-31 22:11:13 +00:00

stacksmash-arm64ec.ll

RuntimeLibcalls: Add entries for __security_check_cookie (#151843)

2025-08-06 10:26:36 +09:00

statepoint-call-lowering-lr.ll

…

statepoint-call-lowering-sp.ll

…

statepoint-call-lowering.ll

[AArch64] fix trampoline implementation: use X15 (#126743)

2025-06-11 21:49:01 -04:00

statepoint-twoaddr.mir

…

stgp.ll

…

store_merge_pair_offset.ll

…

store-float-conversion.ll

[AArch64] Keep floating-point conversion in SIMD (#147707)

2025-07-30 14:53:56 +03:00

store-swift-async-context-clobber-live-reg.ll

…

store.ll

Revert "[AArch64][GlobalISel] Expand 64bit extracts to 128bit to allow more patterns (#142904)"

2025-06-11 08:32:55 +01:00

storepairsuppress_minsize.ll

…

storepairsuppress.ll

…

stp-opt-with-renaming-debug.mir

…

stp-opt-with-renaming-ld3.mir

…

stp-opt-with-renaming-reserved-regs.mir

…

stp-opt-with-renaming-undef-assert.mir

…

stp-opt-with-renaming.mir

[AArch64] Fix ldp rename through a bundle (#146415)

2025-07-01 15:44:59 +01:00

str-narrow-zero-merge.mir

[AArch64] Merge scaled and unscaled narrow zero stores (#136705)

2025-05-08 21:34:52 +03:00

streaming-compatible-memory-ops.ll

[AArch64][SME] Use mrs %reg, SVCR rather than ABI routine with +sme (#156878)

2025-09-05 10:19:05 +01:00

streaming-func-no-sme.ll

[AArch64] Use -filetype=null in test (NFC) (#145662)

2025-06-25 11:26:34 +01:00

strict-fp-func.ll

…

strict-fp-int-promote.ll

…

strict-fp-opt.ll

[AArch64] Add global isel coverage for fp16 tests and strict-fp. NFC

2025-09-29 16:54:49 +01:00

strictfp_f16_abi_promote.ll

…

strpre-str-merge.mir

…

strqro.ll

…

strqu.ll

…

sub1.ll

[GlobalISel] Clear nsw flags when converting sub to add. (#137288)

2025-04-26 11:00:53 +01:00

sub-of-bias.ll

…

sub-of-not.ll

…

sub-splat-sub.ll

…

sub.ll

[GlobalISel] Widen vector loads from aligned ptrs (#144309)

2025-06-21 07:42:54 +01:00

subs-to-sub-opt.ll

…

sve2-bcax.ll

…

sve2-bf16-converts.ll

[AArch64] Adjust the scheduling info of SVE FCMP on Cortex-A510. (#153810)

2025-08-15 15:45:33 +01:00

sve2-bitwise-ternary.ll

…

sve2-bsl.ll

[AArch64] Use SVE2 bit-sel instructions for some binary patterns. (#147544)

2025-07-10 11:36:01 +01:00

sve2-eor3.ll

…

sve2-fcopysign.ll

…

sve2-fixed-length-fcopysign.ll

…

sve2-histcnt.ll

…

sve2-int-addsub-long.ll

…

sve2-int-mul.ll

…

sve2-int-mulh.ll

…

sve2-intrinsics-binary-narrowing-add-sub.ll

[LLVM][AArch64] Relax SVE/SME codegen predicates. (#145322)

2025-07-02 11:39:33 +01:00

sve2-intrinsics-binary-narrowing-shr.ll

[LLVM][AArch64] Relax SVE/SME codegen predicates. (#145322)

2025-07-02 11:39:33 +01:00

sve2-intrinsics-bit-permutation.ll

[LLVM][AArch64] Relax SVE/SME codegen predicates for crypto and bitperm instructions. (#145696)

2025-06-26 13:01:07 +01:00

sve2-intrinsics-character-match.ll

…

sve2-intrinsics-combine-rshrnb.ll

…

sve2-intrinsics-complex-dot.ll

[LLVM][AArch64] Relax SVE/SME codegen predicates. (#145322)

2025-07-02 11:39:33 +01:00

sve2-intrinsics-contiguous-conflict-detection.ll

[LLVM][AArch64] Relax SVE/SME codegen predicates. (#145322)

2025-07-02 11:39:33 +01:00

sve2-intrinsics-crypto.ll

[LLVM][AArch64] Relax SVE/SME codegen predicates for crypto and bitperm instructions. (#145696)

2025-06-26 13:01:07 +01:00

sve2-intrinsics-faminmax.ll

[LLVM][AArch64] Relax SVE/SME codegen predicates. (#145322)

2025-07-02 11:39:33 +01:00

sve2-intrinsics-fp-converts.ll

[LLVM][AArch64] Relax SVE/SME codegen predicates. (#145322)

2025-07-02 11:39:33 +01:00

sve2-intrinsics-fp-int-binary-logarithm-zeroing.ll

…

sve2-intrinsics-fp-int-binary-logarithm.ll

[LLVM][AArch64] Relax SVE/SME codegen predicates. (#145322)

2025-07-02 11:39:33 +01:00

sve2-intrinsics-fp-widening-mul-acc.ll

[LLVM][AArch64] Relax SVE/SME codegen predicates. (#145322)

2025-07-02 11:39:33 +01:00

sve2-intrinsics-int-arith-imm.ll

…

sve2-intrinsics-int-mul-lane.ll

[LLVM][AArch64] Relax SVE/SME codegen predicates. (#145322)

2025-07-02 11:39:33 +01:00

sve2-intrinsics-luti.ll

[LLVM][AArch64] Relax SVE/SME codegen predicates. (#145322)

2025-07-02 11:39:33 +01:00

sve2-intrinsics-non-widening-pairwise-arith.ll

[LLVM][AArch64] Relax SVE/SME codegen predicates. (#145322)

2025-07-02 11:39:33 +01:00

sve2-intrinsics-nt-gather-loads-32bit-unscaled-offset.ll

…

sve2-intrinsics-nt-gather-loads-64bit-scaled-offset.ll

…

sve2-intrinsics-nt-gather-loads-64bit-unscaled-offset.ll

…

sve2-intrinsics-nt-gather-loads-vector-base-scalar-offset.ll

…

sve2-intrinsics-nt-scatter-stores-32bit-unscaled-offset.ll

…

sve2-intrinsics-nt-scatter-stores-64bit-scaled-offset.ll

…

sve2-intrinsics-nt-scatter-stores-64bit-unscaled-offset.ll

…

sve2-intrinsics-nt-scatter-stores-vector-base-scalar-offset.ll

…

sve2-intrinsics-perm-tb.ll

…

sve2-intrinsics-polynomial-arithmetic-128.ll

[AArch64][Clang] Update predication of SVE2-AES/PMULL Pair Intrinsics and add Test Coverage (#153825)

2025-08-28 09:21:06 +01:00

sve2-intrinsics-polynomial-arithmetic.ll

[LLVM][AArch64] Relax SVE/SME codegen predicates. (#145322)

2025-07-02 11:39:33 +01:00

sve2-intrinsics-psel.ll

[LLVM][AArch64] Relax SVE/SME codegen predicates. (#145322)

2025-07-02 11:39:33 +01:00

sve2-intrinsics-rax1.ll

[LLVM][AArch64] Relax SVE/SME codegen predicates for crypto and bitperm instructions. (#145696)

2025-06-26 13:01:07 +01:00

sve2-intrinsics-reinterpret.ll

…

sve2-intrinsics-revd.ll

[LLVM][AArch64] Relax SVE/SME codegen predicates. (#145322)

2025-07-02 11:39:33 +01:00

sve2-intrinsics-sm4.ll

[SVE ACLE] Remove explicit sve2 requirement from crypto and b16b16 builtins. (#156456)

2025-09-04 12:46:56 +01:00

sve2-intrinsics-unary-narrowing.ll

[LLVM][AArch64] Relax SVE/SME codegen predicates. (#145322)

2025-07-02 11:39:33 +01:00

sve2-intrinsics-uniform-complex-arith.ll

[LLVM][AArch64] Relax SVE/SME codegen predicates. (#145322)

2025-07-02 11:39:33 +01:00

sve2-intrinsics-uniform-dsp-undef.ll

[AArch64] Regenerate and update a number of check lines. NFC

2025-09-18 09:54:47 +01:00

sve2-intrinsics-uniform-dsp-zeroing.ll

…

sve2-intrinsics-uniform-dsp.ll

…

sve2-intrinsics-vec-hist-count.ll

…

sve2-intrinsics-while-reversed.ll

[LLVM][AArch64] Relax SVE/SME codegen predicates. (#145322)

2025-07-02 11:39:33 +01:00

sve2-intrinsics-while.ll

[LLVM][AArch64] Relax SVE/SME codegen predicates. (#145322)

2025-07-02 11:39:33 +01:00

sve2-intrinsics-widening-complex-int-arith.ll

[LLVM][AArch64] Relax SVE/SME codegen predicates. (#145322)

2025-07-02 11:39:33 +01:00

sve2-intrinsics-widening-dsp.ll

[LLVM][AArch64] Relax SVE/SME codegen predicates. (#145322)

2025-07-02 11:39:33 +01:00

sve2-intrinsics-widening-pairwise-arith.ll

[LLVM][AArch64] Relax SVE/SME codegen predicates. (#145322)

2025-07-02 11:39:33 +01:00

sve2-min-max-clamp.ll

…

sve2-mla-indexed.ll

…

sve2-mla-unpredicated.ll

…

sve2-rsh.ll

…

sve2-rsra.ll

…

sve2-sli-sri.ll

…

sve2-sra.ll

…

sve2-unary-movprfx.ll

…

sve2-vscale-sinking.ll

[IR] Replace alignment argument with attribute on masked intrinsics (#163802)

2025-10-20 08:50:09 +00:00

sve2-xar.ll

[AArch64][SVE] Avoid movprfx by reusing register for _UNDEF pseudos. (#166926)

2025-11-10 16:33:59 +00:00

sve2p1_copy_pnr.mir

…

sve2p1-dots-partial-reduction.ll

[IR] NFC: Remove 'experimental' from partial.reduce.add intrinsic (#158637)

2025-09-17 11:44:47 +01:00

sve2p1-fdot.ll

Add llvm.vector.partial.reduce.fadd intrinsic (#159776)

2025-11-07 15:36:54 +00:00

sve2p1-fixed-length-fdot.ll

[AArch64] Use SVE fdot for partial.reduce.fadd for NEON types. (#167856)

2025-11-13 10:50:29 +00:00

sve2p1-intrinsics-bfadd.ll

…

sve2p1-intrinsics-bfclamp.ll

…

sve2p1-intrinsics-bfmax.ll

…

sve2p1-intrinsics-bfmaxnm.ll

…

sve2p1-intrinsics-bfmin.ll

…

sve2p1-intrinsics-bfminnm.ll

…

sve2p1-intrinsics-bfmla_lane.ll

…

sve2p1-intrinsics-bfmla.ll

…

sve2p1-intrinsics-bfmls_lane.ll

…

sve2p1-intrinsics-bfmls.ll

…

sve2p1-intrinsics-bfmlsl.ll

[LLVM][AArch64] Relax SVE/SME codegen predicates. (#145322)

2025-07-02 11:39:33 +01:00

sve2p1-intrinsics-bfmul_lane.ll

…

sve2p1-intrinsics-bfmul.ll

…

sve2p1-intrinsics-bfsub.ll

…

sve2p1-intrinsics-cntp.ll

[LLVM][AArch64] Relax SVE/SME codegen predicates. (#145322)

2025-07-02 11:39:33 +01:00

sve2p1-intrinsics-dots.ll

[LLVM][AArch64] Relax SVE/SME codegen predicates. (#145322)

2025-07-02 11:39:33 +01:00

sve2p1-intrinsics-dupq.ll

[LLVM][AArch64] Relax SVE/SME codegen predicates. (#145322)

2025-07-02 11:39:33 +01:00

sve2p1-intrinsics-extq.ll

[LLVM][AArch64] Relax SVE/SME codegen predicates. (#145322)

2025-07-02 11:39:33 +01:00

sve2p1-intrinsics-fclamp.ll

[LLVM][AArch64] Relax SVE/SME codegen predicates. (#145322)

2025-07-02 11:39:33 +01:00

sve2p1-intrinsics-fp-reduce.ll

[LLVM][AArch64] Relax SVE/SME codegen predicates. (#145322)

2025-07-02 11:39:33 +01:00

sve2p1-intrinsics-gather-loads-128bit-index.ll

…

sve2p1-intrinsics-gather-loads-128bit-unscaled-offset.ll

…

sve2p1-intrinsics-int-reduce.ll

[LLVM][AArch64] Relax SVE/SME codegen predicates. (#145322)

2025-07-02 11:39:33 +01:00

sve2p1-intrinsics-ld1-single.ll

…

sve2p1-intrinsics-loads.ll

[AArch64][SVE] Tweak how SVE CFI expressions are emitted (#151677)

2025-08-06 09:21:57 +01:00

sve2p1-intrinsics-multivec-loads.ll

[LLVM][AArch64] Relax SVE/SME codegen predicates. (#145322)

2025-07-02 11:39:33 +01:00

sve2p1-intrinsics-multivec-stores.ll

[LLVM][AArch64] Relax SVE/SME codegen predicates. (#145322)

2025-07-02 11:39:33 +01:00

sve2p1-intrinsics-pmov-to-pred.ll

[AArch64] Regenerate and update a number of check lines. NFC

2025-09-18 09:54:47 +01:00

sve2p1-intrinsics-pmov-to-vector.ll

[LLVM][AArch64] Relax SVE/SME codegen predicates. (#145322)

2025-07-02 11:39:33 +01:00

sve2p1-intrinsics-predicate-as-counter.ll

[LLVM][AArch64] Relax SVE/SME codegen predicates. (#145322)

2025-07-02 11:39:33 +01:00

sve2p1-intrinsics-qcvtn.ll

[LLVM][AArch64] Relax SVE/SME codegen predicates. (#145322)

2025-07-02 11:39:33 +01:00

sve2p1-intrinsics-qrshr.ll

[LLVM][AArch64] Relax SVE/SME codegen predicates. (#145322)

2025-07-02 11:39:33 +01:00

sve2p1-intrinsics-scatter-stores-128bit-index.ll

…

sve2p1-intrinsics-scatter-stores-128bit-unscaled-offset.ll

…

sve2p1-intrinsics-sclamp.ll

[LLVM][AArch64] Relax SVE/SME codegen predicates. (#145322)

2025-07-02 11:39:33 +01:00

sve2p1-intrinsics-selx2.ll

…

sve2p1-intrinsics-selx4.ll

…

sve2p1-intrinsics-st1-single.ll

…

sve2p1-intrinsics-stores.ll

[LLVM][AArch64] Relax SVE/SME codegen predicates. (#145322)

2025-07-02 11:39:33 +01:00

sve2p1-intrinsics-tblq.ll

…

sve2p1-intrinsics-tbxq.ll

…

sve2p1-intrinsics-uclamp.ll

[LLVM][AArch64] Relax SVE/SME codegen predicates. (#145322)

2025-07-02 11:39:33 +01:00

sve2p1-intrinsics-unpk.ll

…

sve2p1-intrinsics-uzpq1.ll

…

sve2p1-intrinsics-uzpq2.ll

…

sve2p1-intrinsics-uzpx2.ll

…

sve2p1-intrinsics-uzpx4.ll

…

sve2p1-intrinsics-while-pn.ll

[LLVM][AArch64] Relax SVE/SME codegen predicates. (#145322)

2025-07-02 11:39:33 +01:00

sve2p1-intrinsics-while-pp.ll

[LLVM][AArch64] Relax SVE/SME codegen predicates. (#145322)

2025-07-02 11:39:33 +01:00

sve2p1-intrinsics-zipq1.ll

…

sve2p1-intrinsics-zipq2.ll

…

sve2p1-intrinsics-zipx2.ll

…

sve2p1-intrinsics-zipx4.ll

…

sve2p1-vector-shuffles.ll

[AArch64][CostModel] Lower cost of dupq (SVE2.1) (#144918)

2025-06-25 13:26:56 +01:00

sve2p2-intrinsics.ll

[NFC][LLVM][SVE2p2] Add RUN lines to fully verify codegen predicates.

2025-06-24 15:48:16 +00:00

sve-aba.ll

…

sve-abd.ll

[DAG] foldABSToABD - fallback to value tracking if the (ABS (SUB LHS, RHS)) operands aren't extended (#147053)

2025-07-06 08:36:46 +01:00

sve-adr.ll

…

sve-aliasing.ll

…

sve-aliasing.mir

…

sve-alloca-stackid.ll

…

sve-alloca.ll

[AArch64][SVE] Tweak how SVE CFI expressions are emitted (#151677)

2025-08-06 09:21:57 +01:00

sve-asrd.ll

[LLVM][CodeGen][SVE] ASRD cannot represent sdiv-by-one. (#162708)

2025-10-10 12:37:43 +01:00

sve-bad-intrinsics.ll

…

sve-bad-select.ll

…

sve-bf16-arith.ll

[LLVM][CodeGen][SVE] Use BFMLALB for promoted bfloat fma operations. (#167340)

2025-11-12 11:46:14 +00:00

sve-bf16-combines.ll

[LLVM][CodeGen][SVE] Use BFMLALB for promoted bfloat fma operations. (#167340)

2025-11-12 11:46:14 +00:00

sve-bf16-compares.ll

[LLVM][CodeGen][SVE] Add ISel for bfloat scalable vector compares. (#138707)

2025-05-08 10:57:15 +01:00

sve-bf16-converts.ll

[AArch64] Adjust the scheduling info of SVE FCMP on Cortex-A510. (#153810)

2025-08-15 15:45:33 +01:00

sve-bf16-int-converts.ll

…

sve-bf16-reductions.ll

[LLVM][CodeGen][SVE] Add isel for bfloat unordered reductions. (#143540)

2025-06-20 11:46:25 +01:00

sve-bf16-rounding.ll

…

sve-bit-counting-pred.ll

…

sve-bit-counting.ll

…

sve-bitcast.ll

…

sve-breakdown-scalable-vectortype.ll

…

sve-callbyref-notailcall.ll

…

sve-callee-save-restore-pairs.ll

[AArch64][SVE] Tweak how SVE CFI expressions are emitted (#151677)

2025-08-06 09:21:57 +01:00

sve-calling-convention-byref.ll

[Codegen] Add a separate stack ID for scalable predicates (#142390)

2025-10-02 14:43:07 +01:00

sve-calling-convention-mixed.ll

[AArch64][SVE] Tweak how SVE CFI expressions are emitted (#151677)

2025-08-06 09:21:57 +01:00

sve-calling-convention.ll

…

sve-cmp-folds.ll

[AArch64][SVE2p1] Remove redundant PTESTs when predicate is a WHILEcc_x2 (#156478)

2025-09-11 13:53:22 +01:00

sve-cmp-select.ll

…

sve-cntp-combine-i32.ll

…

sve-cntp-combine-i64.ll

…

sve-coalesce-ptrue-intrinsics.ll

…

sve-copy-zprpair.mir

…

sve-dead-masked-store.ll

…

sve-doublereduct.ll

…

sve-expand-div.ll

[LLVM][CodeGen] Lower ConstantInt vectors like shufflevector base splats. (#144395)

2025-06-17 11:09:22 +01:00

sve-extload-icmp.ll

…

sve-extract-element.ll

[AArch64][SVE] Avoid redundant extend of unsigned i8/i16 extracts. (#165863)

2025-11-10 10:07:15 +00:00

sve-extract-fixed-from-scalable-vector.ll

AArch64: Enable terminal rule (#165959)

2025-11-10 12:49:21 -08:00

sve-extract-fixed-vector.ll

AArch64: Enable terminal rule (#165959)

2025-11-10 12:49:21 -08:00

sve-extract-scalable-vector.ll

[AArch64][SVE] Tweak how SVE CFI expressions are emitted (#151677)

2025-08-06 09:21:57 +01:00

sve-extract-vector-to-predicate-store.ll

…

sve-fadda-select.ll

…

sve-fcmp.ll

…

sve-fcopysign.ll

…

sve-fcvt.ll

…

sve-fix-length-and-combine-512.ll

…

sve-fixed-ld2-alloca.ll

[AArch64][SVE] Refactor getPTrue to return splat(1) when pattern=all. (#139236)

2025-05-12 10:35:30 +01:00

sve-fixed-length-addressing-modes.ll

…

sve-fixed-length-bit-counting.ll

[AArch64] Improve scalar and Neon popcount with SVE CNT. (#143870)

2025-06-30 09:04:45 +01:00

sve-fixed-length-bitcast.ll

…

sve-fixed-length-bitselect.ll

[AArch64] Add patterns for sub from add negative immediates (#156024)

2025-08-31 15:12:33 +01:00

sve-fixed-length-build-vector.ll

…

sve-fixed-length-concat.ll

…

sve-fixed-length-ext-loads.ll

[AArch64] Scalarize extracted vector loads. (#159714)

2025-09-23 07:18:46 +00:00

sve-fixed-length-extract-subvector.ll

[AArch64][ISel] Select constructive EXT_ZZI pseudo instruction (#152554)

2025-08-15 14:30:24 +01:00

sve-fixed-length-extract-vector-elt.ll

…

sve-fixed-length-fcopysign.ll

…

sve-fixed-length-fp128.ll

…

sve-fixed-length-fp-arith.ll

[AArch64][SVE] Avoid movprfx by reusing register for _UNDEF pseudos. (#166926)

2025-11-10 16:33:59 +00:00

sve-fixed-length-fp-compares.ll

…

sve-fixed-length-fp-convert.ll

[AArch64][SVE] Refactor getPTrue to return splat(1) when pattern=all. (#139236)

2025-05-12 10:35:30 +01:00

sve-fixed-length-fp-extend-trunc.ll

…

sve-fixed-length-fp-fma.ll

[AArch64][SVE] Avoid movprfx by reusing register for _UNDEF pseudos. (#166926)

2025-11-10 16:33:59 +00:00

sve-fixed-length-fp-minmax.ll

[AArch64][SVE] Avoid movprfx by reusing register for _UNDEF pseudos. (#166926)

2025-11-10 16:33:59 +00:00

sve-fixed-length-fp-reduce.ll

…

sve-fixed-length-fp-rounding.ll

…

sve-fixed-length-fp-select.ll

…

sve-fixed-length-fp-to-int.ll

[AArch64][ISel] Select constructive EXT_ZZI pseudo instruction (#152554)

2025-08-15 14:30:24 +01:00

sve-fixed-length-fp-vselect.ll

[DAG] Combine store + vselect to masked_store (#145176)

2025-08-04 19:05:36 +05:30

sve-fixed-length-frame-offests-crash.ll

[AArch64] Skip storing of stack arguments when lowering tail calls (#126735)

2025-06-06 11:26:24 +03:00

sve-fixed-length-frame-offests.ll

[AArch64][SVE] Refactor getPTrue to return splat(1) when pattern=all. (#139236)

2025-05-12 10:35:30 +01:00

sve-fixed-length-function-calls.ll

…

sve-fixed-length-functions.ll

…

sve-fixed-length-insert-vector-elt.ll

…

sve-fixed-length-int-abd.ll

[AArch64][SVE] Avoid movprfx by reusing register for _UNDEF pseudos. (#166926)

2025-11-10 16:33:59 +00:00

sve-fixed-length-int-arith.ll

[AArch64][SVE] Avoid movprfx by reusing register for _UNDEF pseudos. (#166926)

2025-11-10 16:33:59 +00:00

sve-fixed-length-int-compares.ll

…

sve-fixed-length-int-div.ll

…

sve-fixed-length-int-extends.ll

[AArch64][ISel] Select constructive EXT_ZZI pseudo instruction (#152554)

2025-08-15 14:30:24 +01:00

sve-fixed-length-int-immediates.ll

…

sve-fixed-length-int-log.ll

…

sve-fixed-length-int-minmax.ll

[AArch64][SVE] Avoid movprfx by reusing register for _UNDEF pseudos. (#166926)

2025-11-10 16:33:59 +00:00

sve-fixed-length-int-mulh.ll

[AArch64][SVE] Avoid movprfx by reusing register for _UNDEF pseudos. (#166926)

2025-11-10 16:33:59 +00:00

sve-fixed-length-int-reduce.ll

…

sve-fixed-length-int-rem.ll

[AArch64][SVE] Avoid movprfx by reusing register for _UNDEF pseudos. (#166926)

2025-11-10 16:33:59 +00:00

sve-fixed-length-int-select.ll

…

sve-fixed-length-int-shifts.ll

[AArch64][SVE] Avoid movprfx by reusing register for _UNDEF pseudos. (#166926)

2025-11-10 16:33:59 +00:00

sve-fixed-length-int-to-fp.ll

[AArch64][ISel] Select constructive EXT_ZZI pseudo instruction (#152554)

2025-08-15 14:30:24 +01:00

sve-fixed-length-int-vselect.ll

[DAG] Combine store + vselect to masked_store (#145176)

2025-08-04 19:05:36 +05:30

sve-fixed-length-limit-duplane.ll

[AArch64][ISel] Select constructive EXT_ZZI pseudo instruction (#152554)

2025-08-15 14:30:24 +01:00

sve-fixed-length-loads-stores.ll

[AArch64] Remove old non-power2 aarch64-sve-vector-bits-min tests. NFC

2025-11-03 07:58:01 +00:00

sve-fixed-length-log-reduce.ll

…

sve-fixed-length-mask-opt.ll

…

sve-fixed-length-masked-128bit-loads.ll

[AArch64] Combine signext_inreg of setcc(... != splat(0)) (#157665)

2025-09-16 11:42:28 +01:00

sve-fixed-length-masked-128bit-stores.ll

[AArch64] Combine signext_inreg of setcc(... != splat(0)) (#157665)

2025-09-16 11:42:28 +01:00

sve-fixed-length-masked-gather.ll

[AArch64] Scalarize extracted vector loads. (#159714)

2025-09-23 07:18:46 +00:00

sve-fixed-length-masked-loads.ll

[AArch64][ISel] Select constructive EXT_ZZI pseudo instruction (#152554)

2025-08-15 14:30:24 +01:00

sve-fixed-length-masked-scatter.ll

…

sve-fixed-length-masked-stores.ll

…

sve-fixed-length-no-vscale-range.ll

…

sve-fixed-length-offsets.ll

[AArch64][SVE] Refactor getPTrue to return splat(1) when pattern=all. (#139236)

2025-05-12 10:35:30 +01:00

sve-fixed-length-optimize-ptrue.ll

[AArch64][SVE] Refactor getPTrue to return splat(1) when pattern=all. (#139236)

2025-05-12 10:35:30 +01:00

sve-fixed-length-partial-reduce.ll

[IR] NFC: Remove 'experimental' from partial.reduce.add intrinsic (#158637)

2025-09-17 11:44:47 +01:00

sve-fixed-length-permute-rev.ll

[AArch64] Don't use LowerToPredicatedOp to shufflevector -> SVE lowerings (#140713)

2025-05-23 08:43:10 +01:00

sve-fixed-length-permute-zip-uzp-trn.ll

[AArch64][SVE] Refactor getPTrue to return splat(1) when pattern=all. (#139236)

2025-05-12 10:35:30 +01:00

sve-fixed-length-ptest.ll

[AArch64][SVE] Refactor getPTrue to return splat(1) when pattern=all. (#139236)

2025-05-12 10:35:30 +01:00

sve-fixed-length-reshuffle.ll

AArch64: Enable terminal rule (#165959)

2025-11-10 12:49:21 -08:00

sve-fixed-length-rev.ll

…

sve-fixed-length-sdiv-pow2.ll

[LLVM][CodeGen] Lower ConstantInt vectors like shufflevector base splats. (#144395)

2025-06-17 11:09:22 +01:00

sve-fixed-length-shuffles.ll

AArch64: Enable terminal rule (#165959)

2025-11-10 12:49:21 -08:00

sve-fixed-length-splat-segment.ll

[AArch64] Use indexed dup for 128b segmented splat (#144688)

2025-06-20 14:23:26 +01:00

sve-fixed-length-splat-vector.ll

[AArch64] Scalarize extracted vector loads. (#159714)

2025-09-23 07:18:46 +00:00

sve-fixed-length-subvector.ll

…

sve-fixed-length-trunc-stores.ll

…

sve-fixed-length-trunc.ll

…

sve-fixed-length-vector-shuffle-tbl.ll

[AArch64][SVE] Refactor getPTrue to return splat(1) when pattern=all. (#139236)

2025-05-12 10:35:30 +01:00

sve-fixed-length-vector-shuffle.ll

…

sve-fixed-vector-llrint.ll

[AArch64][ISel] Select constructive EXT_ZZI pseudo instruction (#152554)

2025-08-15 14:30:24 +01:00

sve-fixed-vector-lrint.ll

[AArch64][ISel] Select constructive EXT_ZZI pseudo instruction (#152554)

2025-08-15 14:30:24 +01:00

sve-fixed-vector-zext.ll

…

sve-fold-loadext-and-splat-vector.ll

…

sve-fold-vscale.ll

…

sve-forward-st-to-ld.ll

…

sve-fp-combine.ll

…

sve-fp-immediates-merging.ll

…

sve-fp-int-min-max.ll

…

sve-fp-reciprocal.ll

…

sve-fp-reduce-fadda.ll

[AArch64][SVE] Tweak how SVE CFI expressions are emitted (#151677)

2025-08-06 09:21:57 +01:00

sve-fp-reduce.ll

[LLVM][CodeGen][SVE] Add lowering for ISD::VECREDUCE_MUL/FMUL. (#161842)

2025-10-16 11:03:16 +01:00

sve-fp-rounding.ll

…

sve-fp-vselect.ll

…

sve-fp.ll

…

sve-fpext-load.ll

…

sve-fptosi-sat.ll

[AArch64] Adjust the scheduling info of SVE FCMP on Cortex-A510. (#153810)

2025-08-15 15:45:33 +01:00

sve-fptoui-sat.ll

[AArch64] Adjust the scheduling info of SVE FCMP on Cortex-A510. (#153810)

2025-08-15 15:45:33 +01:00

sve-fptrunc-store.ll

…

sve-gather-scatter-addr-opts.ll

…

sve-gather-scatter-dag-combine.ll

…

sve-gep.ll

…

sve-hadd.ll

…

sve-i1-add-reduce.ll

…

sve-implicit-zero-filling.ll

…

sve-index-const-step-vector.ll

[AArch64] Add patterns for sub from add negative immediates (#156024)

2025-08-31 15:12:33 +01:00

sve-indexed-arithmetic.ll

[AArch64] Match indexed forms of fmul/fmla/fmls (#144892)

2025-06-26 09:44:34 +01:00

sve-insert-element.ll

[AArch64][SVE] Tweak how SVE CFI expressions are emitted (#151677)

2025-08-06 09:21:57 +01:00

sve-insert-scalable-vector.ll

…

sve-insert-vector-to-predicate-load.ll

…

sve-insert-vector.ll

[AArch64][SVE] Tweak how SVE CFI expressions are emitted (#151677)

2025-08-06 09:21:57 +01:00

sve-insr.ll

…

sve-int-arith-imm.ll

…

sve-int-arith-pred.ll

…

sve-int-arith.ll

…

sve-int-div-pred.ll

…

sve-int-imm.ll

[AArch64] Add patterns for sub from add negative immediates (#156024)

2025-08-31 15:12:33 +01:00

sve-int-log-imm.ll

…

sve-int-log-pred.ll

…

sve-int-log.ll

…

sve-int-mad-pred.ll

…

sve-int-mul-neg.ll

Fold SVE mul and mul_u to neg during isel (#160828)

2025-10-03 15:52:43 +01:00

sve-int-mul-pred.ll

…

sve-int-mulh-pred.ll

…

sve-int-pred-reduce.ll

…

sve-int-reduce-pred.ll

…

sve-int-reduce.ll

[LLVM][CodeGen][SVE] Add lowering for ISD::VECREDUCE_MUL/FMUL. (#161842)

2025-10-16 11:03:16 +01:00

sve-intrinsics-adr.ll

…

sve-intrinsics-bfloat.ll

…

sve-intrinsics-contiguous-prefetches.ll

…

sve-intrinsics-conversion.ll

…

sve-intrinsics-counting-bits.ll

…

sve-intrinsics-counting-elems-i32.ll

…

sve-intrinsics-counting-elems.ll

…

sve-intrinsics-dup-x.ll

…

sve-intrinsics-fexpa.ll

[LLVM][AArch64] Relax SVE/SME codegen predicates. (#145322)

2025-07-02 11:39:33 +01:00

sve-intrinsics-ff-gather-loads-32bit-scaled-offsets.ll

…

sve-intrinsics-ff-gather-loads-32bit-unscaled-offsets.ll

…

sve-intrinsics-ff-gather-loads-64bit-scaled-offset.ll

…

sve-intrinsics-ff-gather-loads-64bit-unscaled-offset.ll

…

sve-intrinsics-ff-gather-loads-vector-base-imm-offset.ll

…

sve-intrinsics-ff-gather-loads-vector-base-scalar-offset.ll

…

sve-intrinsics-ffr-manipulation.ll

…

sve-intrinsics-fp-arith-imm.ll

…

sve-intrinsics-fp-arith-merging.ll

…

sve-intrinsics-fp-arith-undef.ll

…

sve-intrinsics-fp-arith.ll

[LLVM][CodeGen][SVE] Make bf16 fabs/fneg isel consistent with fp16. (#147543)

2025-07-10 11:54:19 +01:00

sve-intrinsics-fp-compares.ll

…

sve-intrinsics-fp-converts.ll

…

sve-intrinsics-fp-reduce.ll

…

sve-intrinsics-gather-loads-32bit-scaled-offsets.ll

…

sve-intrinsics-gather-loads-32bit-unscaled-offsets.ll

…

sve-intrinsics-gather-loads-64bit-scaled-offset.ll

…

sve-intrinsics-gather-loads-64bit-unscaled-offset.ll

…

sve-intrinsics-gather-loads-vector-base-imm-offset.ll

…

sve-intrinsics-gather-loads-vector-base-scalar-offset.ll

…

sve-intrinsics-gather-prefetches-scalar-base-vector-indexes.ll

…

sve-intrinsics-gather-prefetches-vect-base-imm-offset.ll

…

sve-intrinsics-gather-prefetches-vect-base-invalid-imm-offset.ll

…

sve-intrinsics-index.ll

[AArch64] Regenerate and update a number of check lines. NFC

2025-09-18 09:54:47 +01:00

sve-intrinsics-int-arith-imm-zero.ll

…

sve-intrinsics-int-arith-imm.ll

…

sve-intrinsics-int-arith-merging.ll

…

sve-intrinsics-int-arith-merging.mir

[AMDGPU] Avoid put implicit_def into bundle that break reg's liveness (#142563)

2025-08-13 10:41:44 +08:00

sve-intrinsics-int-arith-undef.ll

…

sve-intrinsics-int-arith.ll

…

sve-intrinsics-int-binaryComm-merging.mir

[AMDGPU] Avoid put implicit_def into bundle that break reg's liveness (#142563)

2025-08-13 10:41:44 +08:00

sve-intrinsics-int-binaryCommWithRev-merging.mir

[AMDGPU] Avoid put implicit_def into bundle that break reg's liveness (#142563)

2025-08-13 10:41:44 +08:00

sve-intrinsics-int-compares-with-imm.ll

…

sve-intrinsics-int-compares.ll

…

sve-intrinsics-ld1-addressing-mode-reg-imm.ll

…

sve-intrinsics-ld1-addressing-mode-reg-reg.ll

…

sve-intrinsics-ld1.ll

…

sve-intrinsics-ld1ro-addressing-mode-reg-imm.ll

…

sve-intrinsics-ld1ro-addressing-mode-reg-reg.ll

…

sve-intrinsics-ld1ro.ll

…

sve-intrinsics-ldN-sret-reg+imm-addr-mode.ll

…

sve-intrinsics-ldN-sret-reg+reg-addr-mode.ll

…

sve-intrinsics-ldst-ext.ll

[LLVM][CodeGen][SVE] List MVTs that are desirable for extending loads. (#149153)

2025-07-18 15:34:48 +01:00

sve-intrinsics-loads-ff.ll

…

sve-intrinsics-loads-nf.ll

…

sve-intrinsics-loads.ll

…

sve-intrinsics-logical-imm.ll

…

sve-intrinsics-logical-undef.ll

…

sve-intrinsics-logical.ll

…

sve-intrinsics-mask-ldst-ext.ll

…

sve-intrinsics-matmul-fp32.ll

…

sve-intrinsics-matmul-fp64.ll

…

sve-intrinsics-matmul-int8.ll

…

sve-intrinsics-perm-select-matmul-fp64.ll

…

sve-intrinsics-perm-select.ll

…

sve-intrinsics-pred-creation.ll

…

sve-intrinsics-pred-operations.ll

…

sve-intrinsics-pred-testing.ll

…

sve-intrinsics-reinterpret-no-streaming.ll

…

sve-intrinsics-reinterpret.ll

…

sve-intrinsics-reversal.ll

…

sve-intrinsics-scalar-to-vec.ll

…

sve-intrinsics-scatter-stores-32bit-scaled-offsets.ll

…

sve-intrinsics-scatter-stores-32bit-unscaled-offsets.ll

…

sve-intrinsics-scatter-stores-64bit-scaled-offset.ll

…

sve-intrinsics-scatter-stores-64bit-unscaled-offset.ll

…

sve-intrinsics-scatter-stores-vector-base-imm-offset.ll

…

sve-intrinsics-scatter-stores-vector-base-scalar-offset.ll

…

sve-intrinsics-sel.ll

…

sve-intrinsics-shifts-merging.ll

…

sve-intrinsics-shifts-undef.ll

…

sve-intrinsics-shifts.ll

…

sve-intrinsics-sqdec.ll

…

sve-intrinsics-sqinc.ll

…

sve-intrinsics-st1-addressing-mode-reg-imm.ll

…

sve-intrinsics-st1-addressing-mode-reg-reg.ll

…

sve-intrinsics-st1.ll

…

sve-intrinsics-stN-reg-imm-addr-mode.ll

…

sve-intrinsics-stN-reg-reg-addr-mode.ll

…

sve-intrinsics-stores.ll

…

sve-intrinsics-unpred-form.ll

…

sve-intrinsics-uqdec.ll

…

sve-intrinsics-uqinc.ll

…

sve-intrinsics-while.ll

[LLVM][SVE] Relax optimizeIncrementingWhile constant operand requirements. (#140037)

2025-05-16 11:43:56 +01:00

sve-knownbits.ll

…

sve-ld1-addressing-mode-reg-imm.ll

…

sve-ld1-addressing-mode-reg-reg.ll

[LLVM][CodeGen][SVE] Don't combine shifts at the expense of addressing modes. (#149873)

2025-07-24 10:54:48 +01:00

sve-ld1r.ll

…

sve-ld1r.mir

…

sve-ld-post-inc.ll

[AArch64][SVE] Refactor getPTrue to return splat(1) when pattern=all. (#139236)

2025-05-12 10:35:30 +01:00

sve-ldN.mir

…

sve-ldnf1.mir

[AArch64][SVE] Tweak how SVE CFI expressions are emitted (#151677)

2025-08-06 09:21:57 +01:00

sve-ldstnt1.mir

[AArch64][SVE] Tweak how SVE CFI expressions are emitted (#151677)

2025-08-06 09:21:57 +01:00

sve-llrint.ll

[AArch64] Adjust the scheduling info of SVE FCMP on Cortex-A510. (#153810)

2025-08-15 15:45:33 +01:00

sve-load-compare-store.ll

…

sve-load-store-legalisation.ll

[LLVM][CodeGen][SVE] Remove failure cases when widening vector load/store ops. (#160515)

2025-10-02 12:24:23 +01:00

sve-load-store-strict-align.ll

…

sve-localstackalloc.mir

…

sve-lrint.ll

[AArch64] Adjust the scheduling info of SVE FCMP on Cortex-A510. (#153810)

2025-08-15 15:45:33 +01:00

sve-lsr-scaled-index-addressing-mode.ll

[IR] Replace alignment argument with attribute on masked intrinsics (#163802)

2025-10-20 08:50:09 +00:00

sve-lsrchain.ll

[PHIElimination] Revert #131837 #146320 #146337 (#146850)

2025-07-03 07:48:08 -04:00

sve-masked-gather-32b-signed-scaled.ll

…

sve-masked-gather-32b-signed-unscaled.ll

…

sve-masked-gather-32b-unsigned-scaled.ll

…

sve-masked-gather-32b-unsigned-unscaled.ll

…

sve-masked-gather-64b-scaled.ll

…

sve-masked-gather-64b-unscaled.ll

…

sve-masked-gather-legalize.ll

…

sve-masked-gather-vec-plus-imm.ll

…

sve-masked-gather-vec-plus-reg.ll

…

sve-masked-gather.ll

…

sve-masked-int-arith.ll

…

sve-masked-ldst-nonext.ll

…

sve-masked-ldst-sext.ll

…

sve-masked-ldst-trunc.ll

…

sve-masked-ldst-zext.ll

…

sve-masked-scatter-32b-scaled.ll

…

sve-masked-scatter-32b-unscaled.ll

…

sve-masked-scatter-64b-scaled.ll

…

sve-masked-scatter-64b-unscaled.ll

…

sve-masked-scatter-legalize.ll

…

sve-masked-scatter-vec-plus-imm.ll

…

sve-masked-scatter-vec-plus-reg.ll

…

sve-masked-scatter.ll

…

sve-merging-stores.ll

…

sve-merging-unary.ll

[LLVM][CodeGen][SVE] Make bf16 fabs/fneg isel consistent with fp16. (#147543)

2025-07-10 11:54:19 +01:00

sve-min-max-pred.ll

…

sve-mov-imm-pred.ll

…

sve-no-typesize-warnings.ll

…

sve-nontemporal-masked-ldst.ll

[AArch64] Combine signext_inreg of setcc(... != splat(0)) (#157665)

2025-09-16 11:42:28 +01:00

sve-partial-reduce-dot-product.ll

[IR] NFC: Remove 'experimental' from partial.reduce.add intrinsic (#158637)

2025-09-17 11:44:47 +01:00

sve-partial-reduce-wide-add.ll

[IR] NFC: Remove 'experimental' from partial.reduce.add intrinsic (#158637)

2025-09-17 11:44:47 +01:00

sve-pfalse-machine-cse.mir

…

sve-pr62151.ll

…

sve-pr92779.ll

[AArch64][ISel] Select constructive EXT_ZZI pseudo instruction (#152554)

2025-08-15 14:30:24 +01:00

sve-pred-arith.ll

[AArch64][SVE] Tweak how SVE CFI expressions are emitted (#151677)

2025-08-06 09:21:57 +01:00

sve-pred-contiguous-ldst-addressing-mode-reg-imm.ll

…

sve-pred-contiguous-ldst-addressing-mode-reg-reg.ll

…

sve-pred-log.ll

…

sve-pred-non-temporal-ldst-addressing-mode-reg-imm.ll

…

sve-pred-non-temporal-ldst-addressing-mode-reg-reg.ll

…

sve-pred-pair-spill-fill.ll

…

sve-pred-selectop2.ll

[DAG] Handle truncated splat in isBoolConstant (#145473)

2025-07-10 20:59:34 +01:00

sve-pred-selectop3.ll

[DAG] Handle truncated splat in isBoolConstant (#145473)

2025-07-10 20:59:34 +01:00

sve-pred-selectop.ll

[AArch64] Use SVE2 bit-sel instructions for some binary patterns. (#147544)

2025-07-10 11:36:01 +01:00

sve-pseudos-expand-undef.mir

[LLVM][AArch64ExpandPseudo] Preserve undef flags when expanding SVE 1/2/3-op pseudo instructions. (#149104)

2025-07-17 11:20:47 +01:00

sve-ptest-removal-brk.ll

…

sve-ptest-removal-cmpeq.ll

…

sve-ptest-removal-cmpeq.mir

…

sve-ptest-removal-cmpge.ll

…

sve-ptest-removal-cmpgt.ll

…

sve-ptest-removal-cmphi.ll

…

sve-ptest-removal-cmphs.ll

…

sve-ptest-removal-cmple.ll

…

sve-ptest-removal-cmplo.ll

…

sve-ptest-removal-cmpls.ll

…

sve-ptest-removal-cmplt.ll

…

sve-ptest-removal-cmpne.ll

…

sve-ptest-removal-log.ll

…

sve-ptest-removal-match.ll

…

sve-ptest-removal-pfirst-pnext.ll

…

sve-ptest-removal-ptrue.ll

…

sve-ptest-removal-rdffr.mir

…

sve-ptest-removal-sink.ll

AArch64: Enable terminal rule (#165959)

2025-11-10 12:49:21 -08:00

sve-ptest-removal-whilege.mir

…

sve-ptest-removal-whilegt.mir

…

sve-ptest-removal-whilehi.mir

…

sve-ptest-removal-whilehs.mir

…

sve-ptest-removal-whilele.mir

…

sve-ptest-removal-whilelo.mir

[AArch64][SVE2p1] Remove redundant PTESTs when predicate is a WHILEcc_x2 (#156478)

2025-09-11 13:53:22 +01:00

sve-ptest-removal-whilels.mir

…

sve-ptest-removal-whilelt.mir

…

sve-ptest-removal-whilerw.mir

…

sve-ptest-removal-whilewr.mir

…

sve-ptest.ll

…

sve-punpklo-combine.ll

…

sve-reassocadd.ll

…

sve-redundant-store.ll

…

sve-rev.ll

…

sve-saba.ll

…

sve-saddv_64.ll

[AArch64] Use unsigned variant of <s|u>addv_64 SVE vector reduction intrinsic for 64 bit values (#157418)

2025-09-09 06:14:32 +00:00

sve-saturating-arith.ll

…

sve-scmp.ll

…

sve-sdiv-pow2.ll

[LLVM][CodeGen] Lower ConstantInt vectors like shufflevector base splats. (#144395)

2025-06-17 11:09:22 +01:00

sve-select.ll

…

sve-setcc.ll

…

sve-sext-zext.ll

…

sve-smulo-sdnode.ll

…

sve-splat-one-and-ptrue.ll

…

sve-splat-sext.ll

…

sve-split-extract-elt.ll

[AArch64][SVE] Tweak how SVE CFI expressions are emitted (#151677)

2025-08-06 09:21:57 +01:00

sve-split-fcvt.ll

…

sve-split-fp-reduce.ll

…

sve-split-insert-elt.ll

[AArch64][SVE] Tweak how SVE CFI expressions are emitted (#151677)

2025-08-06 09:21:57 +01:00

sve-split-int-pred-reduce.ll

…

sve-split-int-reduce.ll

…

sve-split-load.ll

…

sve-split-store.ll

…

sve-split-trunc.ll

…

sve-srem-combine-loop.ll

…

sve-st1-addressing-mode-reg-imm.ll

…

sve-st1-addressing-mode-reg-reg.ll

…

sve-stack-frame-layout-win.ll

[AArch64] Initial compiler support for SVE unwind on Windows. (#138609)

2025-06-02 18:28:23 -07:00

sve-stack-frame-layout.ll

[AArch64][SME] Support split ZPR and PPR area allocation (#142392)

2025-10-02 19:05:14 +01:00

sve-stepvector.ll

…

sve-stN.mir

…

sve-streaming-mode-cvt-fp-int-fp.ll

[DAGCombiner] Extend FP-to-Int cast without requiring nsz (#161093)

2025-10-11 00:34:33 +09:00

sve-streaming-mode-cvt-fp-to-int.ll

…

sve-streaming-mode-cvt-int-to-fp.ll

…

sve-streaming-mode-fixed-length-and-combine.ll

…

sve-streaming-mode-fixed-length-bit-counting.ll

…

sve-streaming-mode-fixed-length-bitcast.ll

[AArch64] Enable aggressivelyPreferBuildVectorSources (#142729)

2025-06-06 17:03:10 +01:00

sve-streaming-mode-fixed-length-bitselect.ll

[AArch64] Add patterns for sub from add negative immediates (#156024)

2025-08-31 15:12:33 +01:00

sve-streaming-mode-fixed-length-build-vector.ll

[AArch64] Add patterns for sub from add negative immediates (#156024)

2025-08-31 15:12:33 +01:00

sve-streaming-mode-fixed-length-concat.ll

…

sve-streaming-mode-fixed-length-ext-loads.ll

[AArch64] Scalarize extracted vector loads. (#159714)

2025-09-23 07:18:46 +00:00

sve-streaming-mode-fixed-length-extract-subvector.ll

…

sve-streaming-mode-fixed-length-extract-vector-elt.ll

…

sve-streaming-mode-fixed-length-fcopysign.ll

[AArch64] Use pattern to select bf16 fpextend (#137212)

2025-05-02 12:55:18 +01:00

sve-streaming-mode-fixed-length-fp-arith.ll

[AArch64][SVE] Avoid movprfx by reusing register for _UNDEF pseudos. (#166926)

2025-11-10 16:33:59 +00:00

sve-streaming-mode-fixed-length-fp-compares.ll

[AArch64] Adjust the scheduling info of SVE FCMP on Cortex-A510. (#153810)

2025-08-15 15:45:33 +01:00

sve-streaming-mode-fixed-length-fp-convert.ll

MachineScheduler: Improve instruction clustering (#137784)

2025-06-05 15:28:04 +08:00

sve-streaming-mode-fixed-length-fp-extend-trunc.ll

[AArch64][ISel] Select constructive EXT_ZZI pseudo instruction (#152554)

2025-08-15 14:30:24 +01:00

sve-streaming-mode-fixed-length-fp-fma.ll

[AArch64][SVE] Avoid movprfx by reusing register for _UNDEF pseudos. (#166926)

2025-11-10 16:33:59 +00:00

sve-streaming-mode-fixed-length-fp-minmax.ll

[AArch64][SVE] Avoid movprfx by reusing register for _UNDEF pseudos. (#166926)

2025-11-10 16:33:59 +00:00

sve-streaming-mode-fixed-length-fp-reduce-fa64.ll

…

sve-streaming-mode-fixed-length-fp-reduce.ll

MachineScheduler: Reset next cluster candidate for each node (#139513)

2025-05-28 14:53:46 +08:00

sve-streaming-mode-fixed-length-fp-rounding.ll

…

sve-streaming-mode-fixed-length-fp-select.ll

…

sve-streaming-mode-fixed-length-fp-to-int.ll

[AArch64][ISel] Select constructive EXT_ZZI pseudo instruction (#152554)

2025-08-15 14:30:24 +01:00

sve-streaming-mode-fixed-length-fp-vselect.ll

[DAG] Combine store + vselect to masked_store (#145176)

2025-08-04 19:05:36 +05:30

sve-streaming-mode-fixed-length-insert-vector-elt.ll

…

sve-streaming-mode-fixed-length-int-abd.ll

…

sve-streaming-mode-fixed-length-int-arith.ll

[AArch64][SVE] Avoid movprfx by reusing register for _UNDEF pseudos. (#166926)

2025-11-10 16:33:59 +00:00

sve-streaming-mode-fixed-length-int-compares.ll

…

sve-streaming-mode-fixed-length-int-div.ll

[AArch64][SVE] Avoid movprfx by reusing register for _UNDEF pseudos. (#166926)

2025-11-10 16:33:59 +00:00

sve-streaming-mode-fixed-length-int-extends.ll

[AArch64][ISel] Select constructive EXT_ZZI pseudo instruction (#152554)

2025-08-15 14:30:24 +01:00

sve-streaming-mode-fixed-length-int-immediates.ll

…

sve-streaming-mode-fixed-length-int-log.ll

…

sve-streaming-mode-fixed-length-int-minmax.ll

[AArch64][SVE] Avoid movprfx by reusing register for _UNDEF pseudos. (#166926)

2025-11-10 16:33:59 +00:00

sve-streaming-mode-fixed-length-int-mla-neon-fa64.ll

…

sve-streaming-mode-fixed-length-int-mul.ll

…

sve-streaming-mode-fixed-length-int-mulh.ll

[AArch64][SVE] Avoid movprfx by reusing register for _UNDEF pseudos. (#166926)

2025-11-10 16:33:59 +00:00

sve-streaming-mode-fixed-length-int-reduce.ll

MachineScheduler: Reset next cluster candidate for each node (#139513)

2025-05-28 14:53:46 +08:00

sve-streaming-mode-fixed-length-int-rem.ll

[AArch64][SVE] Avoid movprfx by reusing register for _UNDEF pseudos. (#166926)

2025-11-10 16:33:59 +00:00

sve-streaming-mode-fixed-length-int-select.ll

…

sve-streaming-mode-fixed-length-int-shifts.ll

[AArch64][SVE] Avoid movprfx by reusing register for _UNDEF pseudos. (#166926)

2025-11-10 16:33:59 +00:00

sve-streaming-mode-fixed-length-int-to-fp.ll

[AArch64][ISel] Select constructive EXT_ZZI pseudo instruction (#152554)

2025-08-15 14:30:24 +01:00

sve-streaming-mode-fixed-length-int-vselect.ll

[DAG] Combine store + vselect to masked_store (#145176)

2025-08-04 19:05:36 +05:30

sve-streaming-mode-fixed-length-ld2-alloca.ll

[AArch64] Scalarize extracted vector loads. (#159714)

2025-09-23 07:18:46 +00:00

sve-streaming-mode-fixed-length-limit-duplane.ll

[AArch64][ISel] Select constructive EXT_ZZI pseudo instruction (#152554)

2025-08-15 14:30:24 +01:00

sve-streaming-mode-fixed-length-loads.ll

…

sve-streaming-mode-fixed-length-log-reduce.ll

…

sve-streaming-mode-fixed-length-masked-gather-scatter.ll

…

sve-streaming-mode-fixed-length-masked-load.ll

[AArch64] Lower zero cycle FPR zeroing (#156261)

2025-09-10 08:32:51 +03:00

sve-streaming-mode-fixed-length-masked-store.ll

[AArch64] Lower zero cycle FPR zeroing (#156261)

2025-09-10 08:32:51 +03:00

sve-streaming-mode-fixed-length-optimize-ptrue.ll

[AArch64][SVE] Avoid movprfx by reusing register for _UNDEF pseudos. (#166926)

2025-11-10 16:33:59 +00:00

sve-streaming-mode-fixed-length-permute-rev.ll

[AArch64] Don't use LowerToPredicatedOp to shufflevector -> SVE lowerings (#140713)

2025-05-23 08:43:10 +01:00

sve-streaming-mode-fixed-length-permute-zip-uzp-trn.ll

[AArch64][SVE] Avoid movprfx by reusing register for _UNDEF pseudos. (#166926)

2025-11-10 16:33:59 +00:00

sve-streaming-mode-fixed-length-ptest.ll

[AArch64] Adjust the scheduling info of SVE FCMP on Cortex-A510. (#153810)

2025-08-15 15:45:33 +01:00

sve-streaming-mode-fixed-length-reductions.ll

[AArch64][ISel] Select constructive EXT_ZZI pseudo instruction (#152554)

2025-08-15 14:30:24 +01:00

sve-streaming-mode-fixed-length-reshuffle.ll

…

sve-streaming-mode-fixed-length-rev.ll

…

sve-streaming-mode-fixed-length-sdiv-pow2.ll

…

sve-streaming-mode-fixed-length-shuffle.ll

…

sve-streaming-mode-fixed-length-splat-vector.ll

…

sve-streaming-mode-fixed-length-stores.ll

…

sve-streaming-mode-fixed-length-subvector.ll

…

sve-streaming-mode-fixed-length-trunc-stores.ll

…

sve-streaming-mode-fixed-length-trunc.ll

…

sve-streaming-mode-fixed-length-vector-shuffle.ll

[AArch64] Scalarize extracted vector loads. (#159714)

2025-09-23 07:18:46 +00:00

sve-streaming-mode-test-register-mov.ll

…

sve-tailcall.ll

…

sve-trunc.ll

[AArch64][SVE] Tweak how SVE CFI expressions are emitted (#151677)

2025-08-06 09:21:57 +01:00

sve-ucmp.ll

…

sve-umulo-sdnode.ll

…

sve-unaligned-load-store-strict-align.ll

Reapply [IR] Remove options to make scalable TypeSize access a warning (#156336)

2025-09-03 11:12:11 +02:00

sve-unary-movprfx.ll

…

sve-uunpklo-load-uzp1-store-combine.ll

[AArch64][SVE] Refactor getPTrue to return splat(1) when pattern=all. (#139236)

2025-05-12 10:35:30 +01:00

sve-varargs-callee-broken.ll

…

sve-varargs-caller-broken.ll

[AArch64] Allow variadic calls with SVE argument if it is named. (#136833)

2025-04-24 07:57:09 +01:00

sve-varargs.ll

[AArch64] Allow variadic calls with SVE argument if it is named. (#136833)

2025-04-24 07:57:09 +01:00

sve-vecreduce-dot.ll

[AArch64][SVE] Avoid movprfx by reusing register for _UNDEF pseudos. (#166926)

2025-11-10 16:33:59 +00:00

sve-vecreduce-fold.ll

…

sve-vector-compress.ll

[DAG] Add ISD::VECTOR_COMPRESS handling in computeKnownBits/ComputeNumSignBits (#159692)

2025-09-22 10:02:18 +00:00

sve-vector-deinterleave.ll

[LLVM][CodeGen][SVE] Add lowering for 3-way VECTOR_(DE)INTERLEAVE operations. (#162502)

2025-10-10 11:12:50 +01:00

sve-vector-interleave.ll

[LLVM][CodeGen][SVE] Add lowering for 3-way VECTOR_(DE)INTERLEAVE operations. (#162502)

2025-10-10 11:12:50 +01:00

sve-vector-splat.ll

…

sve-vl-arith.ll

…

sve-vls-ldst-opt.mir

[AArch64] Fix stp kill when merging forward. (#152994)

2025-08-12 14:19:43 +01:00

sve-vscale-attr.ll

[AArch64][SVE] Refactor getPTrue to return splat(1) when pattern=all. (#139236)

2025-05-12 10:35:30 +01:00

sve-vscale-combine.ll

[LLVM][DAGCombiner] fold (shl (X * vscale(C0)), C1) -> (X * vscale(C0 << C1)). (#150651)

2025-08-01 11:42:45 +01:00

sve-vscale.ll

[AArch64] sve-vscale.ll - cleanup test checks

2025-07-07 15:50:26 +01:00

sve-vselect-fold.ll

…

sve-vselect-imm.ll

…

sve-widen-scalable-vectortype.ll

…

sve-zeroinit.ll

…

svtcf-fmul-fdiv-combine.ll

[CodeGen] Remove -enable-unsafe-fp-math option (#164559)

2025-10-22 15:40:31 +08:00

swap-compare-operands.ll

…

swift-async-context-seh.ll

…

swift-async-context-slot-offset-win.ll

…

swift-async-pei.ll

…

swift-async-reg.ll

…

swift-async-unwind.ll

…

swift-async-win.ll

…

swift-async.ll

…

swift-csr-win.ll

…

swift-dynamic-async-frame.ll

…

swift-error-unreachable-use.ll

…

swift-error.ll

…

swift-return.ll

…

swiftcc.ll

…

swifterror.ll

[PHIElimination] Revert #131837 #146320 #146337 (#146850)

2025-07-03 07:48:08 -04:00

swiftself-scavenger.ll

…

swiftself.ll

…

swifttail-arm64_32.ll

…

swifttail-async.ll

…

swifttail-call.ll

…

swifttail-funclet.ll

…

switch-cases-to-branch-and.ll

[AArch64] Add another switch clustering test with power-of-2 constants.

2025-08-26 21:51:53 +01:00

switch-unreachable-default.ll

…

tagged-globals-pic.ll

…

tagged-globals-static.ll

…

tagp.ll

…

tail-call-stack-args.ll

[AArch64] Skip storing of stack arguments when lowering tail calls (#126735)

2025-06-06 11:26:24 +03:00

tail-call-unused-zext.ll

…

tail-call.ll

…

tail-dup-redundant-phi.mir

[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)

2025-08-12 11:23:05 -07:00

tail-duplicate-debug-variance.mir

…

tailcall_misched_graph.ll

…

tailcall-bitcast-memcpy.ll

…

tailcall-ccmismatch2.ll

…

tailcall-ccmismatch.ll

…

tailcall-explicit-sret.ll

…

tailcall-fastisel.ll

…

tailcall-implicit-sret.ll

…

tailcall-mem-intrinsics.ll

…

tailcall-ssp-split-debug.ll

…

tailcall-string-rvo.ll

…

tailcc-notail.ll

…

tailcc-tail-call.ll

…

taildup-addrtaken.mir

[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)

2025-08-12 11:23:05 -07:00

taildup-cfi.ll

…

taildup-inst-dup-loc.mir

…

taildup-ssa-update-pr62712.mir

…

taildup-subreg-compose.mir

…

tailmerging_in_mbp.ll

…

tbi.ll

…

tbl-loops.ll

[RegAlloc] Remove default restriction on non-trivial rematerialization (#159211)

2025-10-04 22:50:44 +00:00

tbz-tbnz.ll

[AArch64] Some tests for cbz/tbz with wzr. NFC

2025-10-01 12:41:03 +01:00

tiny_supported.ll

…

tiny-model-pic.ll

…

tiny-model-static.ll

…

tme.ll

…

trampoline.ll

[MC] Make .note.GNU-stack explicit for the trampoline case (#151754)

2025-10-04 15:22:54 -07:00

trunc-avg-fold.ll

[DAG] Fold trunc(avg(x,y)) for avgceil/floor u/s nodes if they have sufficient leading zero/sign bits (#152273)

2025-08-18 16:36:26 +01:00

trunc-nsw-nuw.ll

…

trunc-to-tbl.ll

…

trunc-v1i64.ll

…

trunc.ll

[AArch64][GlobalISel] Ensure we have a insert-subreg v4i32 GPR pattern (#142724)

2025-06-06 17:44:33 +01:00

tst-br.ll

…

typepromotion-cost.ll

…

typepromotion-gep.ll

…

typepromotion-overflow.ll

…

typepromotion-phisret.ll

…

typepromotion-signed.ll

[AArch64] Check for negative numbers when adjusting icmps (#141151)

2025-05-30 15:22:54 +01:00

uadd_sat_plus.ll

…

uadd_sat_vec.ll

[AArch64] Add v1i64 addsat/subsat (#142342)

2025-06-03 21:47:41 +01:00

uadd_sat.ll

[AArch64] Extend test coverage for v1i64 add/sub.sat. NFC

2025-06-02 08:33:27 +01:00

uaddlv-vaddlp-combine.ll

…

uaddo.ll

…

ubsantrap.ll

…

ucmp.ll

[GlobalISel] Add G_CONCAT_VECTOR handling in computeNumSignBits (#142355)

2025-06-04 11:11:18 +01:00

udivmodei5.ll

…

umul_fix_sat.ll

…

umul_fix.ll

…

umulo-128-legalisation-lowering.ll

…

unfold-masked-merge-scalar-constmask-innerouter.ll

…

unfold-masked-merge-scalar-constmask-interleavedbits.ll

…

unfold-masked-merge-scalar-constmask-interleavedbytehalves.ll

…

unfold-masked-merge-scalar-constmask-lowhigh.ll

…

unfold-masked-merge-scalar-variablemask.ll

…

unfold-masked-merge-vector-variablemask-const.ll

…

unfold-masked-merge-vector-variablemask.ll

…

unreachable-emergency-spill-slot.mir

…

unsupported-cc-call.ll

AArch64: Use reportFatalUsageError for unsupported calling conv (#144840)

2025-06-20 15:43:39 +09:00

unsupported-cc-func.ll

AArch64: Use reportFatalUsageError for unsupported calling conv (#144840)

2025-06-20 15:43:39 +09:00

unsupported-object-format-err.ll

MC: Use reportFatalUsageError for COFF with non-windows (#147911)

2025-07-15 16:27:09 +09:00

unwind-preserved-from-mir.mir

…

unwind-preserved.ll

[AArch64][SVE] Tweak how SVE CFI expressions are emitted (#151677)

2025-08-06 09:21:57 +01:00

urem-lkk.ll

[GISel] Combine shift + trunc + shift pattern (#155583)

2025-09-10 15:01:55 +01:00

urem-seteq-illegal-types.ll

…

urem-seteq-nonzero.ll

…

urem-seteq-optsize.ll

[AArch64] Adjust comparison constant if adjusting it means less instructions (#151024)

2025-08-18 14:56:45 +01:00

urem-seteq-vec-nonsplat.ll

…

urem-seteq-vec-nonzero.ll

…

urem-seteq-vec-splat.ll

…

urem-seteq-vec-tautological.ll

…

urem-seteq.ll

[AArch64] Adjust comparison constant if adjusting it means less instructions (#151024)

2025-08-18 14:56:45 +01:00

urem-vector-lkk.ll

[AArch64] Move BSL generation to lowering. (#151855)

2025-08-21 09:54:42 +01:00

use-cr-result-of-dom-icmp-st.ll

[AArch64] Check for negative numbers when adjusting icmps (#141151)

2025-05-30 15:22:54 +01:00

ushl_sat.ll

…

usub_sat_plus.ll

…

usub_sat_vec.ll

[AArch64] Add v1i64 addsat/subsat (#142342)

2025-06-03 21:47:41 +01:00

usub_sat.ll

[AArch64] Extend test coverage for v1i64 add/sub.sat. NFC

2025-06-02 08:33:27 +01:00

v3f-to-int.ll

…

v8.2a-neon-intrinsics-constrained.ll

…

v8.4-atomic-128.ll

…

v8.4-atomic.ll

…

v8.5a-neon-frint3264-intrinsic.ll

…

v8.5a-scalar-frint3264-intrinsic.ll

…

vacg.ll

…

vararg-tallcall.ll

[AArch64] Fixes for Windows varargs handling. (#139972)

2025-05-16 11:30:51 -07:00

vararg.ll

…

varargs-fixed-i16.ll

…

variant-pcs.ll

[AArch64] Restrict .variant_pcs directive to ELF targets (#138924)

2025-05-16 09:21:55 +01:00

vcvt-oversize.ll

…

vec3-loads-ext-trunc-stores.ll

…

vec_uaddo.ll

MachineScheduler: Reset next cluster candidate for each node (#139513)

2025-05-28 14:53:46 +08:00

vec_umulo.ll

MachineScheduler: Reset next cluster candidate for each node (#139513)

2025-05-28 14:53:46 +08:00

vec-combine-compare-to-bitmask.ll

[AArch64] Regenerate and update a number of check lines. NFC

2025-09-18 09:54:47 +01:00

vec-combine-compare-truncate-store.ll

…

vec-extract-branch.ll

…

vec-libcalls.ll

…

veclib-llvm.modf.ll

…

veclib-llvm.sincos.ll

…

veclib-llvm.sincospi.ll

…

vecreduce-add-legalization.ll

…

vecreduce-add.ll

[AArch64] Protect against scalable vectors in performUADDVAddCombine.

2025-10-12 08:53:25 +01:00

vecreduce-and-legalization.ll

[DAG] visitINSERT_VECTOR_ELT - convert to or mask if all insertions are -1 (#138213)

2025-05-13 17:10:54 +01:00

vecreduce-bitext.ll

…

vecreduce-bool.ll

[LLVM][AArch64] Optimize sign bit tests with TST instruction for SIGN_EXTEND patterns (#158061)

2025-09-29 09:53:50 +01:00

vecreduce-fadd-legalization-strict.ll

[AArch64][GlobalISel] Add additional vecreduce.fadd and fadd 0.0 tests. NFC

2025-08-19 11:52:50 +01:00

vecreduce-fadd-legalization.ll

[AArch64][GlobalISel] Add additional vecreduce.fadd and fadd 0.0 tests. NFC

2025-08-19 11:52:50 +01:00

vecreduce-fadd-strict.ll

[AArch64][GlobalISel] Add G_FPEXT(G_FCONSTANT) folding (#162829)

2025-10-10 12:17:06 +00:00

vecreduce-fadd.ll

[AArch64][GlobalISel] Legalize s16 G_FCONSTANT to avoid widening to G_CONSTANT (#161205)

2025-10-08 08:15:11 +01:00

vecreduce-fmax-legalization-nan.ll

[AArch64][GlobalISel] Legalize more G_VECREDUCE_FMIN/FMAX operations. (#159082)

2025-09-17 17:19:10 +01:00

vecreduce-fmax-legalization.ll

[AArch64][GlobalISel] Legalize more G_VECREDUCE_FMIN/FMAX operations. (#159082)

2025-09-17 17:19:10 +01:00

vecreduce-fmaximum.ll

[AArch64][GlobalISel] Legalize more G_VECREDUCE_FMIN/FMAX operations. (#159082)

2025-09-17 17:19:10 +01:00

vecreduce-fmin-legalization.ll

[AArch64][GlobalISel] Legalize more G_VECREDUCE_FMIN/FMAX operations. (#159082)

2025-09-17 17:19:10 +01:00

vecreduce-fminimum.ll

[AArch64][GlobalISel] Legalize more G_VECREDUCE_FMIN/FMAX operations. (#159082)

2025-09-17 17:19:10 +01:00

vecreduce-fmul-legalization-strict.ll

…

vecreduce-fmul-strict.ll

[AArch64][GlobalISel] Add G_FPEXT(G_FCONSTANT) folding (#162829)

2025-10-10 12:17:06 +00:00

vecreduce-fmul.ll

Revert "[AArch64][GlobalISel] Expand 64bit extracts to 128bit to allow more patterns (#142904)"

2025-06-11 08:32:55 +01:00

vecreduce-propagate-sd-flags.ll

[DAG] visitFREEZE - always allow freezing multiple operands (#145939)

2025-07-02 11:28:37 +01:00

vecreduce-umax-legalization.ll

Revert "[AArch64][GlobalISel] Expand 64bit extracts to 128bit to allow more patterns (#142904)"

2025-06-11 08:32:55 +01:00

vector_merge_dep_check.ll

[AArch64][test] Remove unsafe-fp-math uses (NFC) (#164606)

2025-10-22 12:14:21 +00:00

vector_splat-const-shift-of-constmasked.ll

…

vector-compress.ll

[AArch64] Scalarize extracted vector loads. (#159714)

2025-09-23 07:18:46 +00:00

vector-extract-last-active.ll

…

vector-fcopysign.ll

…

vector-fcvt.ll

[AArch64] Prefer using DUP instead of INS where possible (#138549)

2025-05-15 10:31:09 +02:00

vector-gep.ll

…

vector-global-i1.ll

…

vector-insert-dag-combines.ll

…

vector-insert-shuffle-cycle.ll

…

vector-ldst-offset.ll

[AArch64] Add ISel for postindex ld1/st1 in big-endian (#144387)

2025-06-18 16:16:52 +01:00

vector-llrint.ll

[Test] Add and update tests for lrint/llrint (NFC) (#152662)

2025-08-12 09:56:51 +09:00

vector-lrint.ll

[AArch64] Regenerate and update a number of check lines. NFC

2025-09-18 09:54:47 +01:00

vector-minmax.ll

[AArch64] Lower v1i64 and v2i64 [S|U][MIN|MAX] to SVE when available (#166735)

2025-11-06 13:33:55 +00:00

vector-op-scalarize-strict.ll

…

vector-popcnt-128-ult-ugt.ll

…

vector-to-scalar-bitmask.ll

[AArch64] Fix vectorToScalarBitmask BE (#156314)

2025-09-07 13:33:13 +01:00

verify-imm.mir

[AArch64] Verify OPERAND_SHIFT_MSL and OPERAND_IMPLICIT_IMM_0 (#157031)

2025-09-11 16:56:25 +01:00

verify-memop.mir

…

vldn_shuffle.ll

Revert "[InterleavedAccess] Construct interleaved access store with shuffles"

2025-11-06 11:09:26 +02:00

volatile-combine.ll

…

vscale-and-sve-cnt-demandedbits.ll

…

vscale-power-of-two.ll

…

vselect-constants.ll

[DAG] combineVSelectWithAllOnesOrZeros - fold select Cond, 0, x -> and not(Cond), x (#147472)

2025-07-08 14:45:40 +01:00

vselect-ext.ll

[DAG] visitFREEZE - replace multiple frozen/unfrozen uses of an SDValue with just the frozen node (#150017)

2025-08-05 09:24:09 +01:00

wide-scalar-shift-by-byte-multiple-legalization.ll

…

wide-scalar-shift-legalization.ll

MachineScheduler: Reset next cluster candidate for each node (#139513)

2025-05-28 14:53:46 +08:00

win64_vararg2.ll

[AArch64] Fixes for Windows varargs handling. (#139972)

2025-05-16 11:30:51 -07:00

win64_vararg_float_cc.ll

…

win64_vararg_float.ll

…

win64_vararg.ll

[AArch64] Check for negative numbers when adjusting icmps (#141151)

2025-05-30 15:22:54 +01:00

win64-fpowi.ll

…

win64-jumptable.ll

…

win64-no-uwtable.ll

…

win64-nocfi.ll

…

win64cc-backup-x18.ll

…

win64cc-darwin-backup-x18.ll

…

win64cc-x18.ll

[AArch64] fix trampoline implementation: use X15 (#126743)

2025-06-11 21:49:01 -04:00

win_cst_pool.ll

…

win-align-chkstk.ll

…

win-alloca-no-stack-probe.ll

…

win-alloca.ll

…

win-catchpad-nested-cxx.ll

…

win-import-call-optimization-nocalls.ll

…

win-import-call-optimization.ll

…

win-loader-replaceable-function.ll

[aarch64][x86][win] Add compiler support for MSVC's /funcoverride flag (Windows kernel loader replaceable functions) (#125320)

2025-05-09 14:56:38 -07:00

win-realign.ll

…

win-sve.ll

[AArch64][SVE] Avoid extra pop of "FixedObject" with CalleeSavesAboveFrameRecord (#156452)

2025-10-13 08:53:12 +01:00

win-tls.ll

…

wincfi-minimal-seh-prologue.ll

Aarch64: Emit a minimal SEH prologue when needed (#158173)

2025-09-30 08:16:54 -07:00

wincfi-missing-seh-directives.ll

[win][aarch64] Always reserve frame pointers for Arm64 Windows, take 2 (#147354)

2025-07-08 12:18:13 -07:00

windows-extern-weak.ll

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windows-SEH-support.ll

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windows-trap.ll

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wineh1.mir

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wineh2.mir

[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)

2025-08-12 11:23:05 -07:00

wineh3.mir

[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)

2025-08-12 11:23:05 -07:00

wineh4.mir

[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)

2025-08-12 11:23:05 -07:00

wineh5.mir

[AArch64][test] Remove unsafe-fp-math uses (NFC) (#164606)

2025-10-22 12:14:21 +00:00

wineh6.mir

[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)

2025-08-12 11:23:05 -07:00

wineh7.mir

[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)

2025-08-12 11:23:05 -07:00

wineh8.mir

[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)

2025-08-12 11:23:05 -07:00

wineh9.mir

[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)

2025-08-12 11:23:05 -07:00

wineh_shrinkwrap.mir

[AArch64][test] Remove unsafe-fp-math uses (NFC) (#164606)

2025-10-22 12:14:21 +00:00

wineh-align-stack.ll

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wineh-aligned-stack-obj.ll

[win][aarch64] Place catch objects in the fixed object area (#147421)

2025-07-08 12:44:09 -07:00

wineh-bti-funclet.ll

[AArch64][BTI] Add BTI at EH entries. (#155308)

2025-08-30 10:56:03 +01:00

wineh-bti.ll

[AArch64][BTI] Add BTI at EH entries. (#155308)

2025-08-30 10:56:03 +01:00

wineh-catchret-label-generation.ll

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wineh-frame0.mir

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wineh-frame1.mir

[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)

2025-08-12 11:23:05 -07:00

wineh-frame2.mir

[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)

2025-08-12 11:23:05 -07:00

wineh-frame3.mir

[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)

2025-08-12 11:23:05 -07:00

wineh-frame4.mir

[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)

2025-08-12 11:23:05 -07:00

wineh-frame5.mir

[AArch64][test] Remove unsafe-fp-math uses (NFC) (#164606)

2025-10-22 12:14:21 +00:00

wineh-frame6.mir

[AArch64][test] Remove unsafe-fp-math uses (NFC) (#164606)

2025-10-22 12:14:21 +00:00

wineh-frame7.mir

[AArch64][test] Remove unsafe-fp-math uses (NFC) (#164606)

2025-10-22 12:14:21 +00:00

wineh-frame8.mir

[AArch64][test] Remove unsafe-fp-math uses (NFC) (#164606)

2025-10-22 12:14:21 +00:00

wineh-frame-predecrement.mir

[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)

2025-08-12 11:23:05 -07:00

wineh-frame-scavenge.mir

[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)

2025-08-12 11:23:05 -07:00

wineh-mingw.ll

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wineh-pac.ll

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wineh-save-lrpair1.mir

[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)

2025-08-12 11:23:05 -07:00

wineh-save-lrpair2.mir

[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)

2025-08-12 11:23:05 -07:00

wineh-save-lrpair3.mir

[MIR] Remove std::variant from multiple save/restore point handling [nfc] (#153226)

2025-08-12 11:23:05 -07:00

wineh-try-catch-cbz.ll

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wineh-try-catch-nobase.ll

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wineh-try-catch-realign.ll

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wineh-try-catch-vla.ll

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wineh-try-catch.ll

[win][aarch64] Place catch objects in the fixed object area (#147421)

2025-07-08 12:44:09 -07:00

wineh-unwindhelp-via-fp.ll

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wrong_debug_loc_after_regalloc.ll

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wrong-callee-save-size-after-livedebugvariables.mir

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xar.ll

[AArch64] Extend usage of XAR instruction for fixed-length operations (#139460)

2025-06-12 10:54:01 +05:30

xbfiz.ll

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xor-min-max.ll

[DAGCombiner] add fold (xor (smin(x, C), C)) and fold (xor (smax(x, C), C)) (#155141)

2025-09-16 15:30:57 +00:00

xor.ll

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xray-attribute-instrumentation.ll

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xray-custom-log.ll

[DebugInfo][DWARF] Don't emit bogus DW_AT_call_target for complex calls (#151378)

2025-08-05 13:25:01 -07:00

xray-omit-function-index.ll

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xray-partial-instrumentation-skip-entry.ll

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xray-partial-instrumentation-skip-exit.ll

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xray-tail-call-sled.ll

[XRay] Fix tail call sleds for AArch64 (#141403)

2025-05-29 21:54:15 -07:00

xtn.ll

[AArch64][GlobalISel] Ensure we have a insert-subreg v4i32 GPR pattern (#142724)

2025-06-06 17:44:33 +01:00

zero-call-used-regs.ll

[AArch64] fix trampoline implementation: use X15 (#126743)

2025-06-11 21:49:01 -04:00

zero-reg.ll

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zeroing-forms-abs-neg.ll

[NFC][LLVM][SVE2p2] Add RUN lines to fully verify codegen predicates.

2025-06-24 15:48:16 +00:00

zeroing-forms-counts-not.ll

[NFC][LLVM][SVE2p2] Add RUN lines to fully verify codegen predicates.

2025-06-24 15:48:16 +00:00

zeroing-forms-ext.ll

[NFC][LLVM][SVE2p2] Add RUN lines to fully verify codegen predicates.

2025-06-24 15:48:16 +00:00

zeroing-forms-fcvt-bfcvt.ll

[NFC][LLVM][SVE2p2] Add RUN lines to fully verify codegen predicates.

2025-06-24 15:48:16 +00:00

zeroing-forms-fcvtlt-fcvtx.ll

[NFC][LLVM][SVE2p2] Add RUN lines to fully verify codegen predicates.

2025-06-24 15:48:16 +00:00

zeroing-forms-fcvtzsu.ll

[NFC][LLVM][SVE2p2] Add RUN lines to fully verify codegen predicates.

2025-06-24 15:48:16 +00:00

zeroing-forms-flogb.ll

[NFC][LLVM][SVE2p2] Add RUN lines to fully verify codegen predicates.

2025-06-24 15:48:16 +00:00

zeroing-forms-frint-frecpx-fsqrt.ll

[NFC][LLVM][SVE2p2] Add RUN lines to fully verify codegen predicates.

2025-06-24 15:48:16 +00:00

zeroing-forms-rev.ll

[NFC][LLVM][SVE2p2] Add RUN lines to fully verify codegen predicates.

2025-06-24 15:48:16 +00:00

zeroing-forms-urecpe-ursqrte-sqabs-sqneg.ll

[NFC][LLVM][SVE2p2] Add RUN lines to fully verify codegen predicates.

2025-06-24 15:48:16 +00:00

zeroing-forms-uscvtf.ll

[NFC][LLVM][SVE2p2] Add RUN lines to fully verify codegen predicates.

2025-06-24 15:48:16 +00:00

zext-logic-shift-load.ll

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zext-reg-coalesce.mir

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zext-shuffle.ll

[DAG] visitTRUNCATE - more aggressively fold trunc(add(x,x)) -> add(trunc(x),trunc(x)) (#164227)

2025-10-21 10:17:57 +00:00

zext-to-tbl.ll

AArch64: Enable terminal rule (#165959)

2025-11-10 12:49:21 -08:00

zext.ll

[AArch64][GlobalISel] Ensure we have a insert-subreg v4i32 GPR pattern (#142724)

2025-06-06 17:44:33 +01:00