Alexander Richardson fc2230f574

[RISC-V][MC] Introduce RVY extension feature ...

This adds the initial feature for the base RVY extension,
other extensions such as the hybrid mode will be added later.
RVY specification: https://riscv.github.io/riscv-cheri/

Co-authored-by: Jessica Clarke <jrtc27@jrtc27.com>
Co-authored-by: Petr Vesely <petr.vesely@codasip.com>

Pull Request: https://github.com/llvm/llvm-project/pull/176870

2026-01-25 22:05:31 -08:00

..

AArch64

[DAG] Extend MinMax matchers to detect flippable sign (#177504)

2026-01-25 15:35:57 +00:00

AMDGPU

[AMDGPU] Fix DomTree preservation in SILowerControlFlow when nodes are removed (#176691)

2026-01-25 09:45:44 +05:30

ARC

…

ARM

TargetLowering: Allow FMINNUM/FMAXNUM to lower to FMINIMUM/FMAXIMUM even without nsz (#177828)

2026-01-25 18:24:12 -05:00

AVR

IR: Remove llvm.convert.to.fp16 and llvm.convert.from.fp16 intrinsics (#174484)

2026-01-21 09:50:28 +00:00

BPF

llvm: Convert some assorted lit tests to opaque pointers (#174564)

2026-01-06 11:41:27 +00:00

CSKY

[CSKY] Use softPromoteHalfType (#175138)

2026-01-09 11:10:54 +01:00

DirectX

[HLSL] Add wave active ballot to set of wave ops that set waveops shader flag (#177043)

2026-01-21 10:06:04 -08:00

Generic

[TargetLowering] Change the softPromoteHalfType default to true (#175149)

2026-01-11 12:48:26 +01:00

Hexagon

IR: Remove llvm.convert.to.fp16 and llvm.convert.from.fp16 intrinsics (#174484)

2026-01-21 09:50:28 +00:00

Inputs

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Lanai

…

LoongArch

[LoongArch] Remove DAG combination for extractelement (#177083)

2026-01-21 14:42:17 +08:00

M68k

[M68k] Fix MOVEM collapse pass for 2 instances of same register (#174349)

2026-01-21 18:28:53 -06:00

Mips

IR: Remove llvm.convert.to.fp16 and llvm.convert.from.fp16 intrinsics (#174484)

2026-01-21 09:50:28 +00:00

MIR

[MIR] Add parsing for ehscope_entry. (#175592)

2026-01-13 08:39:34 +00:00

MIR2Vec

[win][x64] Unwind v2: Avoid non-terminator instructions after terminator by using different psuedo for splitting frame infos (#177007)

2026-01-21 12:28:23 -08:00

MLRegAlloc

llvm: Convert some assorted lit tests to opaque pointers (#174564)

2026-01-06 11:41:27 +00:00

MSP430

[MSP430] Use softPromoteHalfType (#175139)

2026-01-09 11:08:34 +01:00

NVPTX

[NVPTX] fix illegal name for .extern .shared global variables (#173018)

2026-01-22 21:28:07 +01:00

PowerPC

ValueTracking: Improve handling for fma/fmuladd (#175614)

2026-01-24 11:35:14 +01:00

RISCV

[RISC-V][MC] Introduce RVY extension feature

2026-01-25 22:05:31 -08:00

SPARC

IR: Remove llvm.convert.to.fp16 and llvm.convert.from.fp16 intrinsics (#174484)

2026-01-21 09:50:28 +00:00

SPIRV

[SPIR-V] Implement sample and sample_clamp intrinsics for HLSL resources (#177234)

2026-01-23 12:21:31 -05:00

SystemZ

[SystemZ] Implement ctor/dtor emission via @@SQINIT and .xtor sections (#171476)

2026-01-23 13:29:08 -05:00

Thumb

[CodeGen] Consider imm offsets when sorting framerefs (#171012)

2026-01-08 17:48:30 -05:00

Thumb2

IR: Remove llvm.convert.to.fp16 and llvm.convert.from.fp16 intrinsics (#174484)

2026-01-21 09:50:28 +00:00

VE

IR: Remove llvm.convert.to.fp16 and llvm.convert.from.fp16 intrinsics (#174484)

2026-01-21 09:50:28 +00:00

WebAssembly

TargetLowering: Allow FMINNUM/FMAXNUM to lower to FMINIMUM/FMAXIMUM even without nsz (#177828)

2026-01-25 18:24:12 -05:00

WinCFGuard

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WinEH

[IR] Reland Optimize PHINode::removeIncomingValue() and PHINode::removeIncomingValueIf() to use the swapping strategy. (#174274)

2026-01-04 09:24:53 +08:00

X86

[X86] Prefer andl to andb to save one byte encoding when using with bzhi or bextr (#86921)

2026-01-25 21:34:00 +08:00

XCore

[XCore] Use softPromoteHalfType (#175142)

2026-01-09 10:31:01 +00:00

Xtensa

[Xtensa] Regenerate test/CodeGen/Xtensa/mul.ll to fix test

2026-01-08 22:13:20 -08:00