Aaditya 6a0593b0a3
[AMDGPU] Extend wave reduce intrinsics for i32 type (#126469)
Currently, wave reduction intrinsics are supported for `umin` and `umax`
operations for `i32` type only.
This patch extends support for the following operations: 
`add`, `sub`, `min`, `max`, `and`, `or`, `xor` for `i32` type.

---------

Co-authored-by: Matt Arsenault <arsenm2@gmail.com>
2025-06-23 10:31:22 +05:30
..
2024-12-10 10:11:19 +01:00

+==============================================================================+
| How to organize the lit tests                                                |
+==============================================================================+

- If you write a test for matching a single DAG opcode or intrinsic, it should
  go in a file called {opcode_name,intrinsic_name}.ll (e.g. fadd.ll)

- If you write a test that matches several DAG opcodes and checks for a single
  ISA instruction, then that test should go in a file called {ISA_name}.ll (e.g.
  bfi_int.ll

- For all other tests, use your best judgement for organizing tests and naming
  the files.

+==============================================================================+
| Naming conventions                                                           |
+==============================================================================+

- Use dash '-' and not underscore '_' to separate words in file names, unless
  the file is named after a DAG opcode or ISA instruction that has an
  underscore '_' in its name.